2026-09-24 14:08:32 -06:00
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#define SIMDE_TEST_ARM_NEON_INSN ld1_dup
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#include "test-neon.h"
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#include "../../../simde/arm/neon/ld1_dup.h"
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#if !defined(SIMDE_BUG_INTEL_857088)
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2026-09-24 14:30:19 -06:00
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static int
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test_simde_vld1_dup_f16 (SIMDE_MUNIT_TEST_ARGS) {
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struct {
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simde_float16_t a;
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simde_float16_t unused;
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simde_float16_t r[4];
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} test_vec[] = {
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{ SIMDE_FLOAT16_VALUE(4.04),
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SIMDE_FLOAT16_VALUE(4.51),
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{ SIMDE_FLOAT16_VALUE(4.04), SIMDE_FLOAT16_VALUE(4.04), SIMDE_FLOAT16_VALUE(4.04), SIMDE_FLOAT16_VALUE(4.04) } },
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{ SIMDE_FLOAT16_VALUE(-0.29),
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SIMDE_FLOAT16_VALUE(8.79),
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{ SIMDE_FLOAT16_VALUE(-0.29), SIMDE_FLOAT16_VALUE(-0.29), SIMDE_FLOAT16_VALUE(-0.29), SIMDE_FLOAT16_VALUE(-0.29) } },
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{ SIMDE_FLOAT16_VALUE(-1.66),
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SIMDE_FLOAT16_VALUE(-8.54),
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{ SIMDE_FLOAT16_VALUE(-1.66), SIMDE_FLOAT16_VALUE(-1.66), SIMDE_FLOAT16_VALUE(-1.66), SIMDE_FLOAT16_VALUE(-1.66) } },
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{ SIMDE_FLOAT16_VALUE(-7.87),
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SIMDE_FLOAT16_VALUE(2.04),
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{ SIMDE_FLOAT16_VALUE(-7.87), SIMDE_FLOAT16_VALUE(-7.87), SIMDE_FLOAT16_VALUE(-7.87), SIMDE_FLOAT16_VALUE(-7.87) } },
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{ SIMDE_FLOAT16_VALUE(2.65),
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SIMDE_FLOAT16_VALUE(-7.48),
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{ SIMDE_FLOAT16_VALUE(2.65), SIMDE_FLOAT16_VALUE(2.65), SIMDE_FLOAT16_VALUE(2.65), SIMDE_FLOAT16_VALUE(2.65) } },
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};
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for (size_t i = 0 ; i < (sizeof(test_vec) / sizeof(test_vec[0])) ; i++) {
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simde_float16x4_t r = simde_vld1_dup_f16(&test_vec[i].a);
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simde_test_arm_neon_assert_equal_f16x4(r, simde_vld1_f16(test_vec[i].r),
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INT_MAX);
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}
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return 0;
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}
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2026-09-24 14:08:32 -06:00
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static int
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test_simde_vld1_dup_f32 (SIMDE_MUNIT_TEST_ARGS) {
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#if 1
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static const struct {
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float a;
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float unused;
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float r[2];
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} test_vec[] = {
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{ SIMDE_FLOAT32_C( -662.67),
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SIMDE_FLOAT32_C( 17.22),
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{ SIMDE_FLOAT32_C( -662.67), SIMDE_FLOAT32_C( -662.67) } },
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{ SIMDE_FLOAT32_C( 654.51),
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SIMDE_FLOAT32_C( 873.43),
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{ SIMDE_FLOAT32_C( 654.51), SIMDE_FLOAT32_C( 654.51) } },
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{ SIMDE_FLOAT32_C( -203.77),
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SIMDE_FLOAT32_C( 870.06),
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{ SIMDE_FLOAT32_C( -203.77), SIMDE_FLOAT32_C( -203.77) } },
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{ SIMDE_FLOAT32_C( 727.90),
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SIMDE_FLOAT32_C( -797.12),
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{ SIMDE_FLOAT32_C( 727.90), SIMDE_FLOAT32_C( 727.90) } },
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{ SIMDE_FLOAT32_C( -68.97),
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SIMDE_FLOAT32_C( -923.20),
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{ SIMDE_FLOAT32_C( -68.97), SIMDE_FLOAT32_C( -68.97) } },
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{ SIMDE_FLOAT32_C( -345.60),
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SIMDE_FLOAT32_C( -686.50),
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{ SIMDE_FLOAT32_C( -345.60), SIMDE_FLOAT32_C( -345.60) } },
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{ SIMDE_FLOAT32_C( 638.84),
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SIMDE_FLOAT32_C( -823.74),
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{ SIMDE_FLOAT32_C( 638.84), SIMDE_FLOAT32_C( 638.84) } },
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{ SIMDE_FLOAT32_C( -581.13),
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SIMDE_FLOAT32_C( 639.86),
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{ SIMDE_FLOAT32_C( -581.13), SIMDE_FLOAT32_C( -581.13) } },
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};
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for (size_t i = 0 ; i < (sizeof(test_vec) / sizeof(test_vec[0])) ; i++) {
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simde_float32x2_t r = simde_vld1_dup_f32(&test_vec[i].a);
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simde_test_arm_neon_assert_equal_f32x2(r, simde_vld1_f32(test_vec[i].r),
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INT_MAX);
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}
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return 0;
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#else
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for (int i = 0 ; i < 8 ; i++) {
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simde_float32 a = simde_test_codegen_random_f32(-1000.0f, 1000.0f);
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simde_float32x2_t r = simde_vld1_dup_f32(&a);
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// Random buffer between pointer to load and expected results to check for
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// loading out of bounds.
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simde_float32 unused = simde_test_codegen_random_f32(-1000.0f, 1000.0f);
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simde_test_codegen_write_f32(2, a, SIMDE_TEST_VEC_POS_FIRST);
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simde_test_codegen_write_f32(2, unused, SIMDE_TEST_VEC_POS_MIDDLE);
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simde_test_arm_neon_write_f32x2(2, r, SIMDE_TEST_VEC_POS_LAST);
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}
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return 1;
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#endif
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}
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static int
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test_simde_vld1_dup_f64 (SIMDE_MUNIT_TEST_ARGS) {
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#if 1
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static const struct {
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simde_float64 a;
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simde_float64 unused;
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simde_float64 r[1];
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} test_vec[] = {
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{ SIMDE_FLOAT64_C( -199.19),
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SIMDE_FLOAT64_C( -652.54),
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{ SIMDE_FLOAT64_C( -199.19) } },
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{ SIMDE_FLOAT64_C( 11.30),
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SIMDE_FLOAT64_C( -621.52),
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{ SIMDE_FLOAT64_C( 11.30) } },
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{ SIMDE_FLOAT64_C( -587.57),
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SIMDE_FLOAT64_C( -210.68),
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{ SIMDE_FLOAT64_C( -587.57) } },
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{ SIMDE_FLOAT64_C( -223.20),
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SIMDE_FLOAT64_C( -765.77),
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{ SIMDE_FLOAT64_C( -223.20) } },
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{ SIMDE_FLOAT64_C( -367.49),
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SIMDE_FLOAT64_C( -137.16),
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{ SIMDE_FLOAT64_C( -367.49) } },
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{ SIMDE_FLOAT64_C( -246.44),
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SIMDE_FLOAT64_C( -591.64),
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{ SIMDE_FLOAT64_C( -246.44) } },
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{ SIMDE_FLOAT64_C( -126.41),
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SIMDE_FLOAT64_C( -142.21),
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{ SIMDE_FLOAT64_C( -126.41) } },
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{ SIMDE_FLOAT64_C( 386.04),
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SIMDE_FLOAT64_C( 914.92),
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{ SIMDE_FLOAT64_C( 386.04) } }
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};
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for (size_t i = 0 ; i < (sizeof(test_vec) / sizeof(test_vec[0])) ; i++) {
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simde_float64x1_t r = simde_vld1_dup_f64(&test_vec[i].a);
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simde_test_arm_neon_assert_equal_f64x1(r, simde_vld1_f64(test_vec[i].r),
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INT_MAX);
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}
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return 0;
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#else
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for (int i = 0 ; i < 8 ; i++) {
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simde_float64 a = simde_test_codegen_random_f64(-1000.0, 1000.0);
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simde_float64x1_t r = simde_vld1_dup_f64(&a);
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// Random buffer between pointer to load and expected results to check for
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// loading out of bounds.
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simde_float64 unused = simde_test_codegen_random_f64(-1000.0, 1000.0);
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simde_test_codegen_write_f64(2, a, SIMDE_TEST_VEC_POS_FIRST);
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simde_test_codegen_write_f64(2, unused, SIMDE_TEST_VEC_POS_MIDDLE);
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simde_test_arm_neon_write_f64x1(2, r, SIMDE_TEST_VEC_POS_LAST);
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}
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return 1;
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#endif
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}
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static int
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test_simde_vld1_dup_s8 (SIMDE_MUNIT_TEST_ARGS) {
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#if 1
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static const struct {
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int8_t a;
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int8_t unused;
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int8_t r[8];
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} test_vec[] = {
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{ INT8_C( 73),
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INT8_C( 15),
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{ INT8_C( 73), INT8_C( 73), INT8_C( 73), INT8_C( 73), INT8_C( 73), INT8_C( 73), INT8_C( 73), INT8_C( 73) } },
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{ -INT8_C( 124),
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INT8_C( 68),
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{ -INT8_C( 124), -INT8_C( 124), -INT8_C( 124), -INT8_C( 124), -INT8_C( 124), -INT8_C( 124), -INT8_C( 124), -INT8_C( 124) } },
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{ INT8_C( 26),
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INT8_C( 85),
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{ INT8_C( 26), INT8_C( 26), INT8_C( 26), INT8_C( 26), INT8_C( 26), INT8_C( 26), INT8_C( 26), INT8_C( 26) } },
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{ -INT8_C( 89),
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-INT8_C( 30),
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{ -INT8_C( 89), -INT8_C( 89), -INT8_C( 89), -INT8_C( 89), -INT8_C( 89), -INT8_C( 89), -INT8_C( 89), -INT8_C( 89) } },
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{ INT8_C( 76),
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INT8_C( 115),
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{ INT8_C( 76), INT8_C( 76), INT8_C( 76), INT8_C( 76), INT8_C( 76), INT8_C( 76), INT8_C( 76), INT8_C( 76) } },
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{ -INT8_C( 91),
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INT8_C( 77),
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{ -INT8_C( 91), -INT8_C( 91), -INT8_C( 91), -INT8_C( 91), -INT8_C( 91), -INT8_C( 91), -INT8_C( 91), -INT8_C( 91) } },
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{ INT8_C( 29),
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INT8_C( 98),
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{ INT8_C( 29), INT8_C( 29), INT8_C( 29), INT8_C( 29), INT8_C( 29), INT8_C( 29), INT8_C( 29), INT8_C( 29) } },
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{ -INT8_C( 28),
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INT8_C( 80),
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{ -INT8_C( 28), -INT8_C( 28), -INT8_C( 28), -INT8_C( 28), -INT8_C( 28), -INT8_C( 28), -INT8_C( 28), -INT8_C( 28) } },
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};
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for (size_t i = 0 ; i < (sizeof(test_vec) / sizeof(test_vec[0])) ; i++) {
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simde_int8x8_t r = simde_vld1_dup_s8(&test_vec[i].a);
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simde_test_arm_neon_assert_equal_i8x8(r,
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simde_vld1_s8(test_vec[i].r));
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}
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return 0;
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#else
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for (int i = 0 ; i < 8 ; i++) {
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int8_t a = simde_test_codegen_random_i8();
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simde_int8x8_t r = simde_vld1_dup_s8(&a);
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// Random buffer between pointer to load and expected results to check for
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// loading out of bounds.
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int8_t unused = simde_test_codegen_random_i8();
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simde_test_codegen_write_i8(2, a, SIMDE_TEST_VEC_POS_FIRST);
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simde_test_codegen_write_i8(2, unused, SIMDE_TEST_VEC_POS_MIDDLE);
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simde_test_arm_neon_write_i8x8(2, r, SIMDE_TEST_VEC_POS_LAST);
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}
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return 1;
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#endif
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}
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static int
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test_simde_vld1_dup_s16 (SIMDE_MUNIT_TEST_ARGS) {
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#if 1
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static const struct {
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int16_t a;
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int16_t unused;
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int16_t r[4];
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} test_vec[] = {
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{ -INT16_C( 27597),
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-INT16_C( 9545),
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{ -INT16_C( 27597), -INT16_C( 27597), -INT16_C( 27597), -INT16_C( 27597) } },
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{ INT16_C( 28663),
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-INT16_C( 25243),
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{ INT16_C( 28663), INT16_C( 28663), INT16_C( 28663), INT16_C( 28663) } },
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{ -INT16_C( 2220),
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-INT16_C( 10872),
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{ -INT16_C( 2220), -INT16_C( 2220), -INT16_C( 2220), -INT16_C( 2220) } },
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{ -INT16_C( 15825),
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-INT16_C( 27888),
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{ -INT16_C( 15825), -INT16_C( 15825), -INT16_C( 15825), -INT16_C( 15825) } },
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{ INT16_C( 31110),
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-INT16_C( 164),
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{ INT16_C( 31110), INT16_C( 31110), INT16_C( 31110), INT16_C( 31110) } },
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{ -INT16_C( 1723),
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INT16_C( 30925),
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{ -INT16_C( 1723), -INT16_C( 1723), -INT16_C( 1723), -INT16_C( 1723) } },
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{ INT16_C( 13821),
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-INT16_C( 11774),
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{ INT16_C( 13821), INT16_C( 13821), INT16_C( 13821), INT16_C( 13821) } },
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{ -INT16_C( 17883),
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INT16_C( 23030),
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{ -INT16_C( 17883), -INT16_C( 17883), -INT16_C( 17883), -INT16_C( 17883) } },
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};
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for (size_t i = 0 ; i < (sizeof(test_vec) / sizeof(test_vec[0])) ; i++) {
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simde_int16x4_t r = simde_vld1_dup_s16(&test_vec[i].a);
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simde_test_arm_neon_assert_equal_i16x4(r,
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simde_vld1_s16(test_vec[i].r));
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}
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return 0;
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#else
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for (int i = 0 ; i < 8 ; i++) {
|
|
|
|
|
int16_t a = simde_test_codegen_random_i16();
|
|
|
|
|
simde_int16x4_t r = simde_vld1_dup_s16(&a);
|
|
|
|
|
// Random buffer between pointer to load and expected results to check for
|
|
|
|
|
// loading out of bounds.
|
|
|
|
|
int16_t unused = simde_test_codegen_random_i16();
|
|
|
|
|
|
|
|
|
|
simde_test_codegen_write_i16(2, a, SIMDE_TEST_VEC_POS_FIRST);
|
|
|
|
|
simde_test_codegen_write_i16(2, unused, SIMDE_TEST_VEC_POS_MIDDLE);
|
|
|
|
|
simde_test_arm_neon_write_i16x4(2, r, SIMDE_TEST_VEC_POS_LAST);
|
|
|
|
|
}
|
|
|
|
|
return 1;
|
|
|
|
|
#endif
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static int
|
|
|
|
|
test_simde_vld1_dup_s32 (SIMDE_MUNIT_TEST_ARGS) {
|
|
|
|
|
#if 1
|
|
|
|
|
static const struct {
|
|
|
|
|
int32_t a;
|
|
|
|
|
int32_t unused;
|
|
|
|
|
int32_t r[4];
|
|
|
|
|
} test_vec[] = {
|
|
|
|
|
{ INT32_C( 1464770501),
|
|
|
|
|
INT32_C( 1347243241),
|
|
|
|
|
{ INT32_C( 1464770501), INT32_C( 1464770501) } },
|
|
|
|
|
{ -INT32_C( 966582799),
|
|
|
|
|
INT32_C( 1680225793),
|
|
|
|
|
{ -INT32_C( 966582799), -INT32_C( 966582799) } },
|
|
|
|
|
{ INT32_C( 208435532),
|
|
|
|
|
INT32_C( 1415871482),
|
|
|
|
|
{ INT32_C( 208435532), INT32_C( 208435532) } },
|
|
|
|
|
{ -INT32_C( 568185185),
|
|
|
|
|
INT32_C( 2063026613),
|
|
|
|
|
{ -INT32_C( 568185185), -INT32_C( 568185185) } },
|
|
|
|
|
{ -INT32_C( 774814232),
|
|
|
|
|
-INT32_C( 2094915951),
|
|
|
|
|
{ -INT32_C( 774814232), -INT32_C( 774814232) } },
|
|
|
|
|
{ INT32_C( 1028228412),
|
|
|
|
|
INT32_C( 128020411),
|
|
|
|
|
{ INT32_C( 1028228412), INT32_C( 1028228412) } },
|
|
|
|
|
{ -INT32_C( 485290520),
|
|
|
|
|
INT32_C( 674723976),
|
|
|
|
|
{ -INT32_C( 485290520), -INT32_C( 485290520) } },
|
|
|
|
|
{ INT32_C( 1527142822),
|
|
|
|
|
-INT32_C( 1948910174),
|
|
|
|
|
{ INT32_C( 1527142822), INT32_C( 1527142822) } },
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
for (size_t i = 0 ; i < (sizeof(test_vec) / sizeof(test_vec[0])) ; i++) {
|
|
|
|
|
simde_int32x2_t r = simde_vld1_dup_s32(&test_vec[i].a);
|
|
|
|
|
|
|
|
|
|
simde_test_arm_neon_assert_equal_i32x2(r,
|
|
|
|
|
simde_vld1_s32(test_vec[i].r));
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
|
#else
|
|
|
|
|
for (int i = 0 ; i < 8 ; i++) {
|
|
|
|
|
int32_t a = simde_test_codegen_random_i32();
|
|
|
|
|
simde_int32x2_t r = simde_vld1_dup_s32(&a);
|
|
|
|
|
// Random buffer between pointer to load and expected results to check for
|
|
|
|
|
// loading out of bounds.
|
|
|
|
|
int32_t unused = simde_test_codegen_random_i32();
|
|
|
|
|
|
|
|
|
|
simde_test_codegen_write_i32(2, a, SIMDE_TEST_VEC_POS_FIRST);
|
|
|
|
|
simde_test_codegen_write_i32(2, unused, SIMDE_TEST_VEC_POS_MIDDLE);
|
|
|
|
|
simde_test_arm_neon_write_i32x2(2, r, SIMDE_TEST_VEC_POS_LAST);
|
|
|
|
|
}
|
|
|
|
|
return 1;
|
|
|
|
|
#endif
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static int
|
|
|
|
|
test_simde_vld1_dup_s64 (SIMDE_MUNIT_TEST_ARGS) {
|
|
|
|
|
#if 1
|
|
|
|
|
static const struct {
|
|
|
|
|
int64_t a;
|
|
|
|
|
int64_t unused;
|
|
|
|
|
int64_t r[2];
|
|
|
|
|
} test_vec[] = {
|
|
|
|
|
{ INT64_C( 8743357196936080404),
|
|
|
|
|
-INT64_C( 8148682543142269101),
|
|
|
|
|
{ INT64_C( 8743357196936080404) } },
|
|
|
|
|
{ INT64_C( 8533853554141708737),
|
|
|
|
|
-INT64_C( 5683316659150636598),
|
|
|
|
|
{ INT64_C( 8533853554141708737) } },
|
|
|
|
|
{ -INT64_C( 3224891244747629894),
|
|
|
|
|
-INT64_C( 6564478166056840207),
|
|
|
|
|
{ -INT64_C( 3224891244747629894) } },
|
|
|
|
|
{ -INT64_C( 2767481697241876086),
|
|
|
|
|
INT64_C( 7166672494563351591),
|
|
|
|
|
{ -INT64_C( 2767481697241876086) } },
|
|
|
|
|
{ -INT64_C( 3076125793732525571),
|
|
|
|
|
-INT64_C( 9096967820244308422),
|
|
|
|
|
{ -INT64_C( 3076125793732525571) } },
|
|
|
|
|
{ INT64_C( 6319740158625333708),
|
|
|
|
|
-INT64_C( 3016408060519532778),
|
|
|
|
|
{ INT64_C( 6319740158625333708) } },
|
|
|
|
|
{ -INT64_C( 1420143845125698671),
|
|
|
|
|
INT64_C( 6326092421369788241),
|
|
|
|
|
{ -INT64_C( 1420143845125698671) } },
|
|
|
|
|
{ -INT64_C( 4858003396865397748),
|
|
|
|
|
-INT64_C( 3364576772367798370),
|
|
|
|
|
{ -INT64_C( 4858003396865397748) } },
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
for (size_t i = 0 ; i < (sizeof(test_vec) / sizeof(test_vec[0])) ; i++) {
|
|
|
|
|
simde_int64x1_t r = simde_vld1_dup_s64(&test_vec[i].a);
|
|
|
|
|
|
|
|
|
|
simde_test_arm_neon_assert_equal_i64x1(r,
|
|
|
|
|
simde_vld1_s64(test_vec[i].r));
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
|
#else
|
|
|
|
|
for (int i = 0 ; i < 8 ; i++) {
|
|
|
|
|
int64_t a = simde_test_codegen_random_i64();
|
|
|
|
|
simde_int64x1_t r = simde_vld1_dup_s64(&a);
|
|
|
|
|
// Random buffer between pointer to load and expected results to check for
|
|
|
|
|
// loading out of bounds.
|
|
|
|
|
int64_t unused = simde_test_codegen_random_i64();
|
|
|
|
|
|
|
|
|
|
simde_test_codegen_write_i64(2, a, SIMDE_TEST_VEC_POS_FIRST);
|
|
|
|
|
simde_test_codegen_write_i64(2, unused, SIMDE_TEST_VEC_POS_MIDDLE);
|
|
|
|
|
simde_test_arm_neon_write_i64x1(2, r, SIMDE_TEST_VEC_POS_LAST);
|
|
|
|
|
}
|
|
|
|
|
return 1;
|
|
|
|
|
#endif
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static int
|
|
|
|
|
test_simde_vld1_dup_u8 (SIMDE_MUNIT_TEST_ARGS) {
|
|
|
|
|
#if 1
|
|
|
|
|
static const struct {
|
|
|
|
|
uint8_t a;
|
|
|
|
|
uint8_t unused;
|
|
|
|
|
uint8_t r[8];
|
|
|
|
|
} test_vec[] = {
|
|
|
|
|
{ UINT8_C(231),
|
|
|
|
|
UINT8_C(217),
|
|
|
|
|
{ UINT8_C(231), UINT8_C(231), UINT8_C(231), UINT8_C(231), UINT8_C(231), UINT8_C(231), UINT8_C(231), UINT8_C(231) } },
|
|
|
|
|
{ UINT8_C(245),
|
|
|
|
|
UINT8_C(157),
|
|
|
|
|
{ UINT8_C(245), UINT8_C(245), UINT8_C(245), UINT8_C(245), UINT8_C(245), UINT8_C(245), UINT8_C(245), UINT8_C(245) } },
|
|
|
|
|
{ UINT8_C(245),
|
|
|
|
|
UINT8_C(131),
|
|
|
|
|
{ UINT8_C(245), UINT8_C(245), UINT8_C(245), UINT8_C(245), UINT8_C(245), UINT8_C(245), UINT8_C(245), UINT8_C(245) } },
|
|
|
|
|
{ UINT8_C(185),
|
|
|
|
|
UINT8_C(129),
|
|
|
|
|
{ UINT8_C(185), UINT8_C(185), UINT8_C(185), UINT8_C(185), UINT8_C(185), UINT8_C(185), UINT8_C(185), UINT8_C(185) } },
|
|
|
|
|
{ UINT8_C(125),
|
|
|
|
|
UINT8_C(175),
|
|
|
|
|
{ UINT8_C(125), UINT8_C(125), UINT8_C(125), UINT8_C(125), UINT8_C(125), UINT8_C(125), UINT8_C(125), UINT8_C(125) } },
|
|
|
|
|
{ UINT8_C(177),
|
|
|
|
|
UINT8_C( 91),
|
|
|
|
|
{ UINT8_C(177), UINT8_C(177), UINT8_C(177), UINT8_C(177), UINT8_C(177), UINT8_C(177), UINT8_C(177), UINT8_C(177) } },
|
|
|
|
|
{ UINT8_C( 1),
|
|
|
|
|
UINT8_C( 55),
|
|
|
|
|
{ UINT8_C( 1), UINT8_C( 1), UINT8_C( 1), UINT8_C( 1), UINT8_C( 1), UINT8_C( 1), UINT8_C( 1), UINT8_C( 1) } },
|
|
|
|
|
{ UINT8_C(218),
|
|
|
|
|
UINT8_C( 31),
|
|
|
|
|
{ UINT8_C(218), UINT8_C(218), UINT8_C(218), UINT8_C(218), UINT8_C(218), UINT8_C(218), UINT8_C(218), UINT8_C(218) } },
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
for (size_t i = 0 ; i < (sizeof(test_vec) / sizeof(test_vec[0])) ; i++) {
|
|
|
|
|
simde_uint8x8_t r = simde_vld1_dup_u8(&test_vec[i].a);
|
|
|
|
|
|
|
|
|
|
simde_test_arm_neon_assert_equal_u8x8(r,
|
|
|
|
|
simde_vld1_u8(test_vec[i].r));
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
|
#else
|
|
|
|
|
for (int i = 0 ; i < 8 ; i++) {
|
|
|
|
|
uint8_t a = simde_test_codegen_random_u8();
|
|
|
|
|
simde_uint8x8_t r = simde_vld1_dup_u8(&a);
|
|
|
|
|
// Random buffer between pointer to load and expected results to check for
|
|
|
|
|
// loading out of bounds.
|
|
|
|
|
uint8_t unused = simde_test_codegen_random_i8();
|
|
|
|
|
|
|
|
|
|
simde_test_codegen_write_u8(2, a, SIMDE_TEST_VEC_POS_FIRST);
|
|
|
|
|
simde_test_codegen_write_u8(2, unused, SIMDE_TEST_VEC_POS_MIDDLE);
|
|
|
|
|
simde_test_arm_neon_write_u8x8(2, r, SIMDE_TEST_VEC_POS_LAST);
|
|
|
|
|
}
|
|
|
|
|
return 1;
|
|
|
|
|
#endif
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static int
|
|
|
|
|
test_simde_vld1_dup_u16 (SIMDE_MUNIT_TEST_ARGS) {
|
|
|
|
|
#if 1
|
|
|
|
|
static const struct {
|
|
|
|
|
uint16_t a;
|
|
|
|
|
uint16_t unused;
|
|
|
|
|
uint16_t r[4];
|
|
|
|
|
} test_vec[] = {
|
|
|
|
|
{ UINT16_C(31796),
|
|
|
|
|
UINT16_C(36233),
|
|
|
|
|
{ UINT16_C(31796), UINT16_C(31796), UINT16_C(31796), UINT16_C(31796) } },
|
|
|
|
|
{ UINT16_C(51277),
|
|
|
|
|
UINT16_C(42972),
|
|
|
|
|
{ UINT16_C(51277), UINT16_C(51277), UINT16_C(51277), UINT16_C(51277) } },
|
|
|
|
|
{ UINT16_C(39412),
|
|
|
|
|
UINT16_C(27257),
|
|
|
|
|
{ UINT16_C(39412), UINT16_C(39412), UINT16_C(39412), UINT16_C(39412) } },
|
|
|
|
|
{ UINT16_C(51769),
|
|
|
|
|
UINT16_C(15179),
|
|
|
|
|
{ UINT16_C(51769), UINT16_C(51769), UINT16_C(51769), UINT16_C(51769) } },
|
|
|
|
|
{ UINT16_C(35128),
|
|
|
|
|
UINT16_C(46029),
|
|
|
|
|
{ UINT16_C(35128), UINT16_C(35128), UINT16_C(35128), UINT16_C(35128) } },
|
|
|
|
|
{ UINT16_C( 9030),
|
|
|
|
|
UINT16_C( 9851),
|
|
|
|
|
{ UINT16_C( 9030), UINT16_C( 9030), UINT16_C( 9030), UINT16_C( 9030) } },
|
|
|
|
|
{ UINT16_C(20351),
|
|
|
|
|
UINT16_C( 7861),
|
|
|
|
|
{ UINT16_C(20351), UINT16_C(20351), UINT16_C(20351), UINT16_C(20351) } },
|
|
|
|
|
{ UINT16_C( 8317),
|
|
|
|
|
UINT16_C(45707),
|
|
|
|
|
{ UINT16_C( 8317), UINT16_C( 8317), UINT16_C( 8317), UINT16_C( 8317) } },
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
for (size_t i = 0 ; i < (sizeof(test_vec) / sizeof(test_vec[0])) ; i++) {
|
|
|
|
|
simde_uint16x4_t r = simde_vld1_dup_u16(&test_vec[i].a);
|
|
|
|
|
|
|
|
|
|
simde_test_arm_neon_assert_equal_u16x4(r,
|
|
|
|
|
simde_vld1_u16(test_vec[i].r));
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
|
#else
|
|
|
|
|
for (int i = 0 ; i < 8 ; i++) {
|
|
|
|
|
uint16_t a = simde_test_codegen_random_u16();
|
|
|
|
|
simde_uint16x4_t r = simde_vld1_dup_u16(&a);
|
|
|
|
|
// Random buffer between pointer to load and expected results to check for
|
|
|
|
|
// loading out of bounds.
|
|
|
|
|
uint16_t unused = simde_test_codegen_random_u16();
|
|
|
|
|
|
|
|
|
|
simde_test_codegen_write_u16(2, a, SIMDE_TEST_VEC_POS_FIRST);
|
|
|
|
|
simde_test_codegen_write_u16(2, unused, SIMDE_TEST_VEC_POS_MIDDLE);
|
|
|
|
|
simde_test_arm_neon_write_u16x4(2, r, SIMDE_TEST_VEC_POS_LAST);
|
|
|
|
|
}
|
|
|
|
|
return 1;
|
|
|
|
|
#endif
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static int
|
|
|
|
|
test_simde_vld1_dup_u32 (SIMDE_MUNIT_TEST_ARGS) {
|
|
|
|
|
#if 1
|
|
|
|
|
static const struct {
|
|
|
|
|
uint32_t a;
|
|
|
|
|
uint32_t unused;
|
|
|
|
|
uint32_t r[4];
|
|
|
|
|
} test_vec[] = {
|
|
|
|
|
{ UINT32_C(3825720010),
|
|
|
|
|
UINT32_C(3826244170),
|
|
|
|
|
{ UINT32_C(3825720010), UINT32_C(3825720010) } },
|
|
|
|
|
{ UINT32_C(1087586190),
|
|
|
|
|
UINT32_C(3816690413),
|
|
|
|
|
{ UINT32_C(1087586190), UINT32_C(1087586190) } },
|
|
|
|
|
{ UINT32_C(2085795807),
|
|
|
|
|
UINT32_C(3597975878),
|
|
|
|
|
{ UINT32_C(2085795807), UINT32_C(2085795807) } },
|
|
|
|
|
{ UINT32_C( 666002012),
|
|
|
|
|
UINT32_C( 825250919),
|
|
|
|
|
{ UINT32_C( 666002012), UINT32_C( 666002012) } },
|
|
|
|
|
{ UINT32_C(2014721838),
|
|
|
|
|
UINT32_C(2690393361),
|
|
|
|
|
{ UINT32_C(2014721838), UINT32_C(2014721838) } },
|
|
|
|
|
{ UINT32_C(1373646948),
|
|
|
|
|
UINT32_C( 557145666),
|
|
|
|
|
{ UINT32_C(1373646948), UINT32_C(1373646948) } },
|
|
|
|
|
{ UINT32_C(1553893142),
|
|
|
|
|
UINT32_C(2754744904),
|
|
|
|
|
{ UINT32_C(1553893142), UINT32_C(1553893142) } },
|
|
|
|
|
{ UINT32_C(3687572596),
|
|
|
|
|
UINT32_C(1728903992),
|
|
|
|
|
{ UINT32_C(3687572596), UINT32_C(3687572596) } },
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
for (size_t i = 0 ; i < (sizeof(test_vec) / sizeof(test_vec[0])) ; i++) {
|
|
|
|
|
simde_uint32x2_t r = simde_vld1_dup_u32(&test_vec[i].a);
|
|
|
|
|
|
|
|
|
|
simde_test_arm_neon_assert_equal_u32x2(r,
|
|
|
|
|
simde_vld1_u32(test_vec[i].r));
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
|
#else
|
|
|
|
|
for (int i = 0 ; i < 8 ; i++) {
|
|
|
|
|
uint32_t a = simde_test_codegen_random_u32();
|
|
|
|
|
simde_uint32x2_t r = simde_vld1_dup_u32(&a);
|
|
|
|
|
// Random buffer between pointer to load and expected results to check for
|
|
|
|
|
// loading out of bounds.
|
|
|
|
|
uint32_t unused = simde_test_codegen_random_u32();
|
|
|
|
|
|
|
|
|
|
simde_test_codegen_write_u32(2, a, SIMDE_TEST_VEC_POS_FIRST);
|
|
|
|
|
simde_test_codegen_write_u32(2, unused, SIMDE_TEST_VEC_POS_MIDDLE);
|
|
|
|
|
simde_test_arm_neon_write_u32x2(2, r, SIMDE_TEST_VEC_POS_LAST);
|
|
|
|
|
}
|
|
|
|
|
return 1;
|
|
|
|
|
#endif
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static int
|
|
|
|
|
test_simde_vld1_dup_u64 (SIMDE_MUNIT_TEST_ARGS) {
|
|
|
|
|
#if 1
|
|
|
|
|
static const struct {
|
|
|
|
|
uint64_t a;
|
|
|
|
|
uint64_t unused;
|
|
|
|
|
uint64_t r[2];
|
|
|
|
|
} test_vec[] = {
|
|
|
|
|
{ UINT64_C( 6656865874902462022),
|
|
|
|
|
UINT64_C(16891003216436391159),
|
|
|
|
|
{ UINT64_C( 6656865874902462022) } },
|
|
|
|
|
{ UINT64_C( 2467426079629300125),
|
|
|
|
|
UINT64_C( 9361357704487281973),
|
|
|
|
|
{ UINT64_C( 2467426079629300125) } },
|
|
|
|
|
{ UINT64_C(14700383420062623079),
|
|
|
|
|
UINT64_C( 3388127016823008557),
|
|
|
|
|
{ UINT64_C(14700383420062623079) } },
|
|
|
|
|
{ UINT64_C( 2302103479159151581),
|
|
|
|
|
UINT64_C(16580521545662613084),
|
|
|
|
|
{ UINT64_C( 2302103479159151581) } },
|
|
|
|
|
{ UINT64_C( 7377052567572641982),
|
|
|
|
|
UINT64_C(17076952764489204539),
|
|
|
|
|
{ UINT64_C( 7377052567572641982) } },
|
|
|
|
|
{ UINT64_C( 9830141017426982241),
|
|
|
|
|
UINT64_C(17318935631344130547),
|
|
|
|
|
{ UINT64_C( 9830141017426982241) } },
|
|
|
|
|
{ UINT64_C(12668875840935945521),
|
|
|
|
|
UINT64_C( 4098973678832538087),
|
|
|
|
|
{ UINT64_C(12668875840935945521) } },
|
|
|
|
|
{ UINT64_C( 4513714357418630639),
|
|
|
|
|
UINT64_C( 3200382560411697992),
|
|
|
|
|
{ UINT64_C( 4513714357418630639) } },
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
for (size_t i = 0 ; i < (sizeof(test_vec) / sizeof(test_vec[0])) ; i++) {
|
|
|
|
|
simde_uint64x1_t r = simde_vld1_dup_u64(&test_vec[i].a);
|
|
|
|
|
|
|
|
|
|
simde_test_arm_neon_assert_equal_u64x1(r,
|
|
|
|
|
simde_vld1_u64(test_vec[i].r));
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
|
#else
|
|
|
|
|
for (int i = 0 ; i < 8 ; i++) {
|
|
|
|
|
uint64_t a = simde_test_codegen_random_u64();
|
|
|
|
|
simde_uint64x1_t r = simde_vld1_dup_u64(&a);
|
|
|
|
|
// Random buffer between pointer to load and expected results to check for
|
|
|
|
|
// loading out of bounds.
|
|
|
|
|
uint64_t unused = simde_test_codegen_random_u64();
|
|
|
|
|
|
|
|
|
|
simde_test_codegen_write_u64(2, a, SIMDE_TEST_VEC_POS_FIRST);
|
|
|
|
|
simde_test_codegen_write_u64(2, unused, SIMDE_TEST_VEC_POS_MIDDLE);
|
|
|
|
|
simde_test_arm_neon_write_u64x1(2, r, SIMDE_TEST_VEC_POS_LAST);
|
|
|
|
|
}
|
|
|
|
|
return 1;
|
|
|
|
|
#endif
|
|
|
|
|
}
|
|
|
|
|
|
2026-09-24 14:30:19 -06:00
|
|
|
static int
|
|
|
|
|
test_simde_vld1q_dup_f16 (SIMDE_MUNIT_TEST_ARGS) {
|
|
|
|
|
struct {
|
|
|
|
|
simde_float16_t a;
|
|
|
|
|
simde_float16_t unused;
|
|
|
|
|
simde_float16_t r[8];
|
|
|
|
|
} test_vec[] = {
|
|
|
|
|
{ SIMDE_FLOAT16_VALUE( -275.48),
|
|
|
|
|
SIMDE_FLOAT16_VALUE( 563.30),
|
|
|
|
|
{ SIMDE_FLOAT16_VALUE( -275.48), SIMDE_FLOAT16_VALUE( -275.48), SIMDE_FLOAT16_VALUE( -275.48), SIMDE_FLOAT16_VALUE( -275.48),
|
|
|
|
|
SIMDE_FLOAT16_VALUE( -275.48), SIMDE_FLOAT16_VALUE( -275.48), SIMDE_FLOAT16_VALUE( -275.48), SIMDE_FLOAT16_VALUE( -275.48) } },
|
|
|
|
|
{ SIMDE_FLOAT16_VALUE( -478.65),
|
|
|
|
|
SIMDE_FLOAT16_VALUE( 688.84),
|
|
|
|
|
{ SIMDE_FLOAT16_VALUE( -478.65), SIMDE_FLOAT16_VALUE( -478.65), SIMDE_FLOAT16_VALUE( -478.65), SIMDE_FLOAT16_VALUE( -478.65),
|
|
|
|
|
SIMDE_FLOAT16_VALUE( -478.65), SIMDE_FLOAT16_VALUE( -478.65), SIMDE_FLOAT16_VALUE( -478.65), SIMDE_FLOAT16_VALUE( -478.65) } },
|
|
|
|
|
{ SIMDE_FLOAT16_VALUE( 810.78),
|
|
|
|
|
SIMDE_FLOAT16_VALUE( -456.08),
|
|
|
|
|
{ SIMDE_FLOAT16_VALUE( 810.78), SIMDE_FLOAT16_VALUE( 810.78), SIMDE_FLOAT16_VALUE( 810.78), SIMDE_FLOAT16_VALUE( 810.78),
|
|
|
|
|
SIMDE_FLOAT16_VALUE( 810.78), SIMDE_FLOAT16_VALUE( 810.78), SIMDE_FLOAT16_VALUE( 810.78), SIMDE_FLOAT16_VALUE( 810.78) } },
|
|
|
|
|
{ SIMDE_FLOAT16_VALUE( -139.83),
|
|
|
|
|
SIMDE_FLOAT16_VALUE( -302.96),
|
|
|
|
|
{ SIMDE_FLOAT16_VALUE( -139.83), SIMDE_FLOAT16_VALUE( -139.83), SIMDE_FLOAT16_VALUE( -139.83), SIMDE_FLOAT16_VALUE( -139.83),
|
|
|
|
|
SIMDE_FLOAT16_VALUE( -139.83), SIMDE_FLOAT16_VALUE( -139.83), SIMDE_FLOAT16_VALUE( -139.83), SIMDE_FLOAT16_VALUE( -139.83) } },
|
|
|
|
|
{ SIMDE_FLOAT16_VALUE( 16.91),
|
|
|
|
|
SIMDE_FLOAT16_VALUE( -128.20),
|
|
|
|
|
{ SIMDE_FLOAT16_VALUE( 16.91), SIMDE_FLOAT16_VALUE( 16.91), SIMDE_FLOAT16_VALUE( 16.91), SIMDE_FLOAT16_VALUE( 16.91),
|
|
|
|
|
SIMDE_FLOAT16_VALUE( 16.91), SIMDE_FLOAT16_VALUE( 16.91), SIMDE_FLOAT16_VALUE( 16.91), SIMDE_FLOAT16_VALUE( 16.91) } },
|
|
|
|
|
{ SIMDE_FLOAT16_VALUE( 315.19),
|
|
|
|
|
SIMDE_FLOAT16_VALUE( -659.25),
|
|
|
|
|
{ SIMDE_FLOAT16_VALUE( 315.19), SIMDE_FLOAT16_VALUE( 315.19), SIMDE_FLOAT16_VALUE( 315.19), SIMDE_FLOAT16_VALUE( 315.19),
|
|
|
|
|
SIMDE_FLOAT16_VALUE( 315.19), SIMDE_FLOAT16_VALUE( 315.19), SIMDE_FLOAT16_VALUE( 315.19), SIMDE_FLOAT16_VALUE( 315.19) } },
|
|
|
|
|
{ SIMDE_FLOAT16_VALUE( -303.00),
|
|
|
|
|
SIMDE_FLOAT16_VALUE( -865.13),
|
|
|
|
|
{ SIMDE_FLOAT16_VALUE( -303.00), SIMDE_FLOAT16_VALUE( -303.00), SIMDE_FLOAT16_VALUE( -303.00), SIMDE_FLOAT16_VALUE( -303.00),
|
|
|
|
|
SIMDE_FLOAT16_VALUE( -303.00), SIMDE_FLOAT16_VALUE( -303.00), SIMDE_FLOAT16_VALUE( -303.00), SIMDE_FLOAT16_VALUE( -303.00) } },
|
|
|
|
|
{ SIMDE_FLOAT16_VALUE( 391.93),
|
|
|
|
|
SIMDE_FLOAT16_VALUE( -958.40),
|
|
|
|
|
{ SIMDE_FLOAT16_VALUE( 391.93), SIMDE_FLOAT16_VALUE( 391.93), SIMDE_FLOAT16_VALUE( 391.93), SIMDE_FLOAT16_VALUE( 391.93),
|
|
|
|
|
SIMDE_FLOAT16_VALUE( 391.93), SIMDE_FLOAT16_VALUE( 391.93), SIMDE_FLOAT16_VALUE( 391.93), SIMDE_FLOAT16_VALUE( 391.93) } },
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
for (size_t i = 0 ; i < (sizeof(test_vec) / sizeof(test_vec[0])) ; i++) {
|
|
|
|
|
simde_float16x8_t r = simde_vld1q_dup_f16(&test_vec[i].a);
|
|
|
|
|
|
|
|
|
|
simde_test_arm_neon_assert_equal_f16x8(r, simde_vld1q_f16(test_vec[i].r),
|
|
|
|
|
INT_MAX);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
|
}
|
|
|
|
|
|
2026-09-24 14:08:32 -06:00
|
|
|
static int
|
|
|
|
|
test_simde_vld1q_dup_f32 (SIMDE_MUNIT_TEST_ARGS) {
|
|
|
|
|
#if 1
|
|
|
|
|
static const struct {
|
|
|
|
|
float a;
|
|
|
|
|
float unused;
|
|
|
|
|
float r[16];
|
|
|
|
|
} test_vec[] = {
|
|
|
|
|
{ SIMDE_FLOAT32_C( -275.48),
|
|
|
|
|
SIMDE_FLOAT32_C( 563.30),
|
|
|
|
|
{ SIMDE_FLOAT32_C( -275.48), SIMDE_FLOAT32_C( -275.48), SIMDE_FLOAT32_C( -275.48), SIMDE_FLOAT32_C( -275.48) } },
|
|
|
|
|
{ SIMDE_FLOAT32_C( -478.65),
|
|
|
|
|
SIMDE_FLOAT32_C( 688.84),
|
|
|
|
|
{ SIMDE_FLOAT32_C( -478.65), SIMDE_FLOAT32_C( -478.65), SIMDE_FLOAT32_C( -478.65), SIMDE_FLOAT32_C( -478.65) } },
|
|
|
|
|
{ SIMDE_FLOAT32_C( 810.78),
|
|
|
|
|
SIMDE_FLOAT32_C( -456.08),
|
|
|
|
|
{ SIMDE_FLOAT32_C( 810.78), SIMDE_FLOAT32_C( 810.78), SIMDE_FLOAT32_C( 810.78), SIMDE_FLOAT32_C( 810.78) } },
|
|
|
|
|
{ SIMDE_FLOAT32_C( -139.83),
|
|
|
|
|
SIMDE_FLOAT32_C( -302.96),
|
|
|
|
|
{ SIMDE_FLOAT32_C( -139.83), SIMDE_FLOAT32_C( -139.83), SIMDE_FLOAT32_C( -139.83), SIMDE_FLOAT32_C( -139.83) } },
|
|
|
|
|
{ SIMDE_FLOAT32_C( 16.91),
|
|
|
|
|
SIMDE_FLOAT32_C( -128.20),
|
|
|
|
|
{ SIMDE_FLOAT32_C( 16.91), SIMDE_FLOAT32_C( 16.91), SIMDE_FLOAT32_C( 16.91), SIMDE_FLOAT32_C( 16.91) } },
|
|
|
|
|
{ SIMDE_FLOAT32_C( 315.19),
|
|
|
|
|
SIMDE_FLOAT32_C( -659.25),
|
|
|
|
|
{ SIMDE_FLOAT32_C( 315.19), SIMDE_FLOAT32_C( 315.19), SIMDE_FLOAT32_C( 315.19), SIMDE_FLOAT32_C( 315.19) } },
|
|
|
|
|
{ SIMDE_FLOAT32_C( -303.00),
|
|
|
|
|
SIMDE_FLOAT32_C( -865.13),
|
|
|
|
|
{ SIMDE_FLOAT32_C( -303.00), SIMDE_FLOAT32_C( -303.00), SIMDE_FLOAT32_C( -303.00), SIMDE_FLOAT32_C( -303.00) } },
|
|
|
|
|
{ SIMDE_FLOAT32_C( 391.93),
|
|
|
|
|
SIMDE_FLOAT32_C( -958.40),
|
|
|
|
|
{ SIMDE_FLOAT32_C( 391.93), SIMDE_FLOAT32_C( 391.93), SIMDE_FLOAT32_C( 391.93), SIMDE_FLOAT32_C( 391.93) } },
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
for (size_t i = 0 ; i < (sizeof(test_vec) / sizeof(test_vec[0])) ; i++) {
|
|
|
|
|
simde_float32x4_t r = simde_vld1q_dup_f32(&test_vec[i].a);
|
|
|
|
|
|
|
|
|
|
simde_test_arm_neon_assert_equal_f32x4(r, simde_vld1q_f32(test_vec[i].r),
|
|
|
|
|
INT_MAX);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
|
#else
|
|
|
|
|
for (int i = 0 ; i < 8 ; i++) {
|
|
|
|
|
simde_float32 a = simde_test_codegen_random_f32(-1000.0f, 1000.0f);
|
|
|
|
|
simde_float32x4_t r = simde_vld1q_dup_f32(&a);
|
|
|
|
|
// Random buffer between pointer to load and expected results to check for
|
|
|
|
|
// loading out of bounds.
|
|
|
|
|
simde_float32 unused = simde_test_codegen_random_f32(-1000.0f, 1000.0f);
|
|
|
|
|
|
|
|
|
|
simde_test_codegen_write_f32(2, a, SIMDE_TEST_VEC_POS_FIRST);
|
|
|
|
|
simde_test_codegen_write_f32(2, unused, SIMDE_TEST_VEC_POS_MIDDLE);
|
|
|
|
|
simde_test_arm_neon_write_f32x4(2, r, SIMDE_TEST_VEC_POS_LAST);
|
|
|
|
|
}
|
|
|
|
|
return 1;
|
|
|
|
|
#endif
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static int
|
|
|
|
|
test_simde_vld1q_dup_f64 (SIMDE_MUNIT_TEST_ARGS) {
|
|
|
|
|
#if 1
|
|
|
|
|
static const struct {
|
|
|
|
|
simde_float64 a;
|
|
|
|
|
simde_float64 unused;
|
|
|
|
|
simde_float64 r[2];
|
|
|
|
|
} test_vec[] = {
|
|
|
|
|
{ SIMDE_FLOAT64_C( 945.56),
|
|
|
|
|
SIMDE_FLOAT64_C( 952.66),
|
|
|
|
|
{ SIMDE_FLOAT64_C( 945.56), SIMDE_FLOAT64_C( 945.56) } },
|
|
|
|
|
{ SIMDE_FLOAT64_C( 348.50),
|
|
|
|
|
SIMDE_FLOAT64_C( 702.22),
|
|
|
|
|
{ SIMDE_FLOAT64_C( 348.50), SIMDE_FLOAT64_C( 348.50) } },
|
|
|
|
|
{ SIMDE_FLOAT64_C( 923.73),
|
|
|
|
|
SIMDE_FLOAT64_C( 862.68),
|
|
|
|
|
{ SIMDE_FLOAT64_C( 923.73), SIMDE_FLOAT64_C( 923.73) } },
|
|
|
|
|
{ SIMDE_FLOAT64_C( -143.77),
|
|
|
|
|
SIMDE_FLOAT64_C( -692.29),
|
|
|
|
|
{ SIMDE_FLOAT64_C( -143.77), SIMDE_FLOAT64_C( -143.77) } },
|
|
|
|
|
{ SIMDE_FLOAT64_C( 416.05),
|
|
|
|
|
SIMDE_FLOAT64_C( 338.33),
|
|
|
|
|
{ SIMDE_FLOAT64_C( 416.05), SIMDE_FLOAT64_C( 416.05) } },
|
|
|
|
|
{ SIMDE_FLOAT64_C( -126.60),
|
|
|
|
|
SIMDE_FLOAT64_C( -878.65),
|
|
|
|
|
{ SIMDE_FLOAT64_C( -126.60), SIMDE_FLOAT64_C( -126.60) } },
|
|
|
|
|
{ SIMDE_FLOAT64_C( 790.83),
|
|
|
|
|
SIMDE_FLOAT64_C( 220.64),
|
|
|
|
|
{ SIMDE_FLOAT64_C( 790.83), SIMDE_FLOAT64_C( 790.83) } },
|
|
|
|
|
{ SIMDE_FLOAT64_C( -50.24),
|
|
|
|
|
SIMDE_FLOAT64_C( 252.99),
|
|
|
|
|
{ SIMDE_FLOAT64_C( -50.24), SIMDE_FLOAT64_C( -50.24) } }
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
for (size_t i = 0 ; i < (sizeof(test_vec) / sizeof(test_vec[0])) ; i++) {
|
|
|
|
|
simde_float64x2_t r = simde_vld1q_dup_f64(&test_vec[i].a);
|
|
|
|
|
|
|
|
|
|
simde_test_arm_neon_assert_equal_f64x2(r, simde_vld1q_f64(test_vec[i].r),
|
|
|
|
|
INT_MAX);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
|
#else
|
|
|
|
|
for (int i = 0 ; i < 8 ; i++) {
|
|
|
|
|
simde_float64 a = simde_test_codegen_random_f64(-1000.0, 1000.0);
|
|
|
|
|
simde_float64x2_t r = simde_vld1q_dup_f64(&a);
|
|
|
|
|
// Random buffer between pointer to load and expected results to check for
|
|
|
|
|
// loading out of bounds.
|
|
|
|
|
simde_float64 unused = simde_test_codegen_random_f64(-1000.0, 1000.0);
|
|
|
|
|
|
|
|
|
|
simde_test_codegen_write_f64(2, a, SIMDE_TEST_VEC_POS_FIRST);
|
|
|
|
|
simde_test_codegen_write_f64(2, unused, SIMDE_TEST_VEC_POS_MIDDLE);
|
|
|
|
|
simde_test_arm_neon_write_f64x2(2, r, SIMDE_TEST_VEC_POS_LAST);
|
|
|
|
|
}
|
|
|
|
|
return 1;
|
|
|
|
|
#endif
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static int
|
|
|
|
|
test_simde_vld1q_dup_s8 (SIMDE_MUNIT_TEST_ARGS) {
|
|
|
|
|
#if 1
|
|
|
|
|
static const struct {
|
|
|
|
|
int8_t a;
|
|
|
|
|
int8_t unused;
|
|
|
|
|
int8_t r[16];
|
|
|
|
|
} test_vec[] = {
|
|
|
|
|
{ -INT8_C( 6),
|
|
|
|
|
-INT8_C( 98),
|
|
|
|
|
{ -INT8_C( 6), -INT8_C( 6), -INT8_C( 6), -INT8_C( 6), -INT8_C( 6), -INT8_C( 6), -INT8_C( 6), -INT8_C( 6),
|
|
|
|
|
-INT8_C( 6), -INT8_C( 6), -INT8_C( 6), -INT8_C( 6), -INT8_C( 6), -INT8_C( 6), -INT8_C( 6), -INT8_C( 6) } },
|
|
|
|
|
{ INT8_C( 10),
|
|
|
|
|
-INT8_C( 19),
|
|
|
|
|
{ INT8_C( 10), INT8_C( 10), INT8_C( 10), INT8_C( 10), INT8_C( 10), INT8_C( 10), INT8_C( 10), INT8_C( 10),
|
|
|
|
|
INT8_C( 10), INT8_C( 10), INT8_C( 10), INT8_C( 10), INT8_C( 10), INT8_C( 10), INT8_C( 10), INT8_C( 10) } },
|
|
|
|
|
{ INT8_C( 51),
|
|
|
|
|
-INT8_C( 99),
|
|
|
|
|
{ INT8_C( 51), INT8_C( 51), INT8_C( 51), INT8_C( 51), INT8_C( 51), INT8_C( 51), INT8_C( 51), INT8_C( 51),
|
|
|
|
|
INT8_C( 51), INT8_C( 51), INT8_C( 51), INT8_C( 51), INT8_C( 51), INT8_C( 51), INT8_C( 51), INT8_C( 51) } },
|
|
|
|
|
{ -INT8_C( 62),
|
|
|
|
|
INT8_C( 75),
|
|
|
|
|
{ -INT8_C( 62), -INT8_C( 62), -INT8_C( 62), -INT8_C( 62), -INT8_C( 62), -INT8_C( 62), -INT8_C( 62), -INT8_C( 62),
|
|
|
|
|
-INT8_C( 62), -INT8_C( 62), -INT8_C( 62), -INT8_C( 62), -INT8_C( 62), -INT8_C( 62), -INT8_C( 62), -INT8_C( 62) } },
|
|
|
|
|
{ -INT8_C( 38),
|
|
|
|
|
-INT8_C( 112),
|
|
|
|
|
{ -INT8_C( 38), -INT8_C( 38), -INT8_C( 38), -INT8_C( 38), -INT8_C( 38), -INT8_C( 38), -INT8_C( 38), -INT8_C( 38),
|
|
|
|
|
-INT8_C( 38), -INT8_C( 38), -INT8_C( 38), -INT8_C( 38), -INT8_C( 38), -INT8_C( 38), -INT8_C( 38), -INT8_C( 38) } },
|
|
|
|
|
{ -INT8_C( 94),
|
|
|
|
|
-INT8_C( 52),
|
|
|
|
|
{ -INT8_C( 94), -INT8_C( 94), -INT8_C( 94), -INT8_C( 94), -INT8_C( 94), -INT8_C( 94), -INT8_C( 94), -INT8_C( 94),
|
|
|
|
|
-INT8_C( 94), -INT8_C( 94), -INT8_C( 94), -INT8_C( 94), -INT8_C( 94), -INT8_C( 94), -INT8_C( 94), -INT8_C( 94) } },
|
|
|
|
|
{ -INT8_C( 74),
|
|
|
|
|
INT8_C( 103),
|
|
|
|
|
{ -INT8_C( 74), -INT8_C( 74), -INT8_C( 74), -INT8_C( 74), -INT8_C( 74), -INT8_C( 74), -INT8_C( 74), -INT8_C( 74),
|
|
|
|
|
-INT8_C( 74), -INT8_C( 74), -INT8_C( 74), -INT8_C( 74), -INT8_C( 74), -INT8_C( 74), -INT8_C( 74), -INT8_C( 74) } },
|
|
|
|
|
{ -INT8_C( 77),
|
|
|
|
|
-INT8_C( 89),
|
|
|
|
|
{ -INT8_C( 77), -INT8_C( 77), -INT8_C( 77), -INT8_C( 77), -INT8_C( 77), -INT8_C( 77), -INT8_C( 77), -INT8_C( 77),
|
|
|
|
|
-INT8_C( 77), -INT8_C( 77), -INT8_C( 77), -INT8_C( 77), -INT8_C( 77), -INT8_C( 77), -INT8_C( 77), -INT8_C( 77) } },
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
for (size_t i = 0 ; i < (sizeof(test_vec) / sizeof(test_vec[0])) ; i++) {
|
|
|
|
|
simde_int8x16_t r = simde_vld1q_dup_s8(&test_vec[i].a);
|
|
|
|
|
|
|
|
|
|
simde_test_arm_neon_assert_equal_i8x16(r,
|
|
|
|
|
simde_vld1q_s8(test_vec[i].r));
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
|
#else
|
|
|
|
|
for (int i = 0 ; i < 8 ; i++) {
|
|
|
|
|
int8_t a = simde_test_codegen_random_i8();
|
|
|
|
|
simde_int8x16_t r = simde_vld1q_dup_s8(&a);
|
|
|
|
|
// Random buffer between pointer to load and expected results to check for
|
|
|
|
|
// loading out of bounds.
|
|
|
|
|
int8_t unused = simde_test_codegen_random_i8();
|
|
|
|
|
|
|
|
|
|
simde_test_codegen_write_i8(2, a, SIMDE_TEST_VEC_POS_FIRST);
|
|
|
|
|
simde_test_codegen_write_i8(2, unused, SIMDE_TEST_VEC_POS_MIDDLE);
|
|
|
|
|
simde_test_arm_neon_write_i8x16(2, r, SIMDE_TEST_VEC_POS_LAST);
|
|
|
|
|
}
|
|
|
|
|
return 1;
|
|
|
|
|
#endif
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static int
|
|
|
|
|
test_simde_vld1q_dup_s16 (SIMDE_MUNIT_TEST_ARGS) {
|
|
|
|
|
#if 1
|
|
|
|
|
static const struct {
|
|
|
|
|
int16_t a;
|
|
|
|
|
int16_t unused;
|
|
|
|
|
int16_t r[16];
|
|
|
|
|
} test_vec[] = {
|
|
|
|
|
{ INT16_C( 25140),
|
|
|
|
|
INT16_C( 27159),
|
|
|
|
|
{ INT16_C( 25140), INT16_C( 25140), INT16_C( 25140), INT16_C( 25140), INT16_C( 25140), INT16_C( 25140), INT16_C( 25140), INT16_C( 25140) } },
|
|
|
|
|
{ INT16_C( 17366),
|
|
|
|
|
INT16_C( 7763),
|
|
|
|
|
{ INT16_C( 17366), INT16_C( 17366), INT16_C( 17366), INT16_C( 17366), INT16_C( 17366), INT16_C( 17366), INT16_C( 17366), INT16_C( 17366) } },
|
|
|
|
|
{ INT16_C( 28655),
|
|
|
|
|
INT16_C( 17684),
|
|
|
|
|
{ INT16_C( 28655), INT16_C( 28655), INT16_C( 28655), INT16_C( 28655), INT16_C( 28655), INT16_C( 28655), INT16_C( 28655), INT16_C( 28655) } },
|
|
|
|
|
{ -INT16_C( 24572),
|
|
|
|
|
INT16_C( 23778),
|
|
|
|
|
{ -INT16_C( 24572), -INT16_C( 24572), -INT16_C( 24572), -INT16_C( 24572), -INT16_C( 24572), -INT16_C( 24572), -INT16_C( 24572), -INT16_C( 24572) } },
|
|
|
|
|
{ INT16_C( 11818),
|
|
|
|
|
INT16_C( 21424),
|
|
|
|
|
{ INT16_C( 11818), INT16_C( 11818), INT16_C( 11818), INT16_C( 11818), INT16_C( 11818), INT16_C( 11818), INT16_C( 11818), INT16_C( 11818) } },
|
|
|
|
|
{ INT16_C( 11802),
|
|
|
|
|
INT16_C( 23800),
|
|
|
|
|
{ INT16_C( 11802), INT16_C( 11802), INT16_C( 11802), INT16_C( 11802), INT16_C( 11802), INT16_C( 11802), INT16_C( 11802), INT16_C( 11802) } },
|
|
|
|
|
{ INT16_C( 15325),
|
|
|
|
|
INT16_C( 30593),
|
|
|
|
|
{ INT16_C( 15325), INT16_C( 15325), INT16_C( 15325), INT16_C( 15325), INT16_C( 15325), INT16_C( 15325), INT16_C( 15325), INT16_C( 15325) } },
|
|
|
|
|
{ -INT16_C( 1781),
|
|
|
|
|
INT16_C( 16340),
|
|
|
|
|
{ -INT16_C( 1781), -INT16_C( 1781), -INT16_C( 1781), -INT16_C( 1781), -INT16_C( 1781), -INT16_C( 1781), -INT16_C( 1781), -INT16_C( 1781) } },
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
for (size_t i = 0 ; i < (sizeof(test_vec) / sizeof(test_vec[0])) ; i++) {
|
|
|
|
|
simde_int16x8_t r = simde_vld1q_dup_s16(&test_vec[i].a);
|
|
|
|
|
|
|
|
|
|
simde_test_arm_neon_assert_equal_i16x8(r,
|
|
|
|
|
simde_vld1q_s16(test_vec[i].r));
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
|
#else
|
|
|
|
|
for (int i = 0 ; i < 8 ; i++) {
|
|
|
|
|
int16_t a = simde_test_codegen_random_i16();
|
|
|
|
|
simde_int16x8_t r = simde_vld1q_dup_s16(&a);
|
|
|
|
|
// Random buffer between pointer to load and expected results to check for
|
|
|
|
|
// loading out of bounds.
|
|
|
|
|
int16_t unused = simde_test_codegen_random_i16();
|
|
|
|
|
|
|
|
|
|
simde_test_codegen_write_i16(2, a, SIMDE_TEST_VEC_POS_FIRST);
|
|
|
|
|
simde_test_codegen_write_i16(2, unused, SIMDE_TEST_VEC_POS_MIDDLE);
|
|
|
|
|
simde_test_arm_neon_write_i16x8(2, r, SIMDE_TEST_VEC_POS_LAST);
|
|
|
|
|
}
|
|
|
|
|
return 1;
|
|
|
|
|
#endif
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static int
|
|
|
|
|
test_simde_vld1q_dup_s32 (SIMDE_MUNIT_TEST_ARGS) {
|
|
|
|
|
#if 1
|
|
|
|
|
static const struct {
|
|
|
|
|
int32_t a;
|
|
|
|
|
int32_t unused;
|
|
|
|
|
int32_t r[16];
|
|
|
|
|
} test_vec[] = {
|
|
|
|
|
{ -INT32_C( 184150047),
|
|
|
|
|
INT32_C( 616751798),
|
|
|
|
|
{ -INT32_C( 184150047), -INT32_C( 184150047), -INT32_C( 184150047), -INT32_C( 184150047) } },
|
|
|
|
|
{ INT32_C( 2117210528),
|
|
|
|
|
INT32_C( 1709426408),
|
|
|
|
|
{ INT32_C( 2117210528), INT32_C( 2117210528), INT32_C( 2117210528), INT32_C( 2117210528) } },
|
|
|
|
|
{ -INT32_C( 300479163),
|
|
|
|
|
INT32_C( 569423300),
|
|
|
|
|
{ -INT32_C( 300479163), -INT32_C( 300479163), -INT32_C( 300479163), -INT32_C( 300479163) } },
|
|
|
|
|
{ -INT32_C( 818696462),
|
|
|
|
|
INT32_C( 1251895145),
|
|
|
|
|
{ -INT32_C( 818696462), -INT32_C( 818696462), -INT32_C( 818696462), -INT32_C( 818696462) } },
|
|
|
|
|
{ INT32_C( 876651646),
|
|
|
|
|
INT32_C( 643302022),
|
|
|
|
|
{ INT32_C( 876651646), INT32_C( 876651646), INT32_C( 876651646), INT32_C( 876651646) } },
|
|
|
|
|
{ -INT32_C( 56259820),
|
|
|
|
|
-INT32_C( 1755215791),
|
|
|
|
|
{ -INT32_C( 56259820), -INT32_C( 56259820), -INT32_C( 56259820), -INT32_C( 56259820) } },
|
|
|
|
|
{ INT32_C( 1518696597),
|
|
|
|
|
INT32_C( 544961838),
|
|
|
|
|
{ INT32_C( 1518696597), INT32_C( 1518696597), INT32_C( 1518696597), INT32_C( 1518696597) } },
|
|
|
|
|
{ -INT32_C( 1913672157),
|
|
|
|
|
-INT32_C( 1814590187),
|
|
|
|
|
{ -INT32_C( 1913672157), -INT32_C( 1913672157), -INT32_C( 1913672157), -INT32_C( 1913672157) } },
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
for (size_t i = 0 ; i < (sizeof(test_vec) / sizeof(test_vec[0])) ; i++) {
|
|
|
|
|
simde_int32x4_t r = simde_vld1q_dup_s32(&test_vec[i].a);
|
|
|
|
|
|
|
|
|
|
simde_test_arm_neon_assert_equal_i32x4(r,
|
|
|
|
|
simde_vld1q_s32(test_vec[i].r));
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
|
#else
|
|
|
|
|
for (int i = 0 ; i < 8 ; i++) {
|
|
|
|
|
int32_t a = simde_test_codegen_random_i32();
|
|
|
|
|
simde_int32x4_t r = simde_vld1q_dup_s32(&a);
|
|
|
|
|
// Random buffer between pointer to load and expected results to check for
|
|
|
|
|
// loading out of bounds.
|
|
|
|
|
int32_t unused = simde_test_codegen_random_i32();
|
|
|
|
|
|
|
|
|
|
simde_test_codegen_write_i32(2, a, SIMDE_TEST_VEC_POS_FIRST);
|
|
|
|
|
simde_test_codegen_write_i32(2, unused, SIMDE_TEST_VEC_POS_MIDDLE);
|
|
|
|
|
simde_test_arm_neon_write_i32x4(2, r, SIMDE_TEST_VEC_POS_LAST);
|
|
|
|
|
}
|
|
|
|
|
return 1;
|
|
|
|
|
#endif
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static int
|
|
|
|
|
test_simde_vld1q_dup_s64 (SIMDE_MUNIT_TEST_ARGS) {
|
|
|
|
|
#if 1
|
|
|
|
|
static const struct {
|
|
|
|
|
int64_t a;
|
|
|
|
|
int64_t unused;
|
|
|
|
|
int64_t r[16];
|
|
|
|
|
} test_vec[] = {
|
|
|
|
|
{ INT64_C( 8263121084250523414),
|
|
|
|
|
-INT64_C( 133247727922472292),
|
|
|
|
|
{ INT64_C( 8263121084250523414), INT64_C( 8263121084250523414) } },
|
|
|
|
|
{ -INT64_C( 6063255998107405179),
|
|
|
|
|
INT64_C( 2810408970900099590),
|
|
|
|
|
{ -INT64_C( 6063255998107405179), -INT64_C( 6063255998107405179) } },
|
|
|
|
|
{ -INT64_C( 1592455347479851877),
|
|
|
|
|
INT64_C( 1510058888478061328),
|
|
|
|
|
{ -INT64_C( 1592455347479851877), -INT64_C( 1592455347479851877) } },
|
|
|
|
|
{ -INT64_C( 8901012275148193534),
|
|
|
|
|
-INT64_C( 4915075221215212654),
|
|
|
|
|
{ -INT64_C( 8901012275148193534), -INT64_C( 8901012275148193534) } },
|
|
|
|
|
{ INT64_C( 1884216627821516017),
|
|
|
|
|
-INT64_C( 7013506924103545335),
|
|
|
|
|
{ INT64_C( 1884216627821516017), INT64_C( 1884216627821516017) } },
|
|
|
|
|
{ -INT64_C( 2051417869619818107),
|
|
|
|
|
-INT64_C( 4445807296613274511),
|
|
|
|
|
{ -INT64_C( 2051417869619818107), -INT64_C( 2051417869619818107) } },
|
|
|
|
|
{ -INT64_C( 7274959835513258779),
|
|
|
|
|
-INT64_C( 6616106579711091980),
|
|
|
|
|
{ -INT64_C( 7274959835513258779), -INT64_C( 7274959835513258779) } },
|
|
|
|
|
{ -INT64_C( 998620985170617361),
|
|
|
|
|
-INT64_C( 2202592284581254181),
|
|
|
|
|
{ -INT64_C( 998620985170617361), -INT64_C( 998620985170617361) } },
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
for (size_t i = 0 ; i < (sizeof(test_vec) / sizeof(test_vec[0])) ; i++) {
|
|
|
|
|
simde_int64x2_t r = simde_vld1q_dup_s64(&test_vec[i].a);
|
|
|
|
|
|
|
|
|
|
simde_test_arm_neon_assert_equal_i64x2(r,
|
|
|
|
|
simde_vld1q_s64(test_vec[i].r));
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
|
#else
|
|
|
|
|
for (int i = 0 ; i < 8 ; i++) {
|
|
|
|
|
int64_t a = simde_test_codegen_random_i64();
|
|
|
|
|
simde_int64x2_t r = simde_vld1q_dup_s64(&a);
|
|
|
|
|
// Random buffer between pointer to load and expected results to check for
|
|
|
|
|
// loading out of bounds.
|
|
|
|
|
int64_t unused = simde_test_codegen_random_i64();
|
|
|
|
|
|
|
|
|
|
simde_test_codegen_write_i64(2, a, SIMDE_TEST_VEC_POS_FIRST);
|
|
|
|
|
simde_test_codegen_write_i64(2, unused, SIMDE_TEST_VEC_POS_MIDDLE);
|
|
|
|
|
simde_test_arm_neon_write_i64x2(2, r, SIMDE_TEST_VEC_POS_LAST);
|
|
|
|
|
}
|
|
|
|
|
return 1;
|
|
|
|
|
#endif
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static int
|
|
|
|
|
test_simde_vld1q_dup_u8 (SIMDE_MUNIT_TEST_ARGS) {
|
|
|
|
|
#if 1
|
|
|
|
|
static const struct {
|
|
|
|
|
uint8_t a;
|
|
|
|
|
uint8_t unused;
|
|
|
|
|
uint8_t r[16];
|
|
|
|
|
} test_vec[] = {
|
|
|
|
|
{ UINT8_C( 49),
|
|
|
|
|
UINT8_C(147),
|
|
|
|
|
{ UINT8_C( 49), UINT8_C( 49), UINT8_C( 49), UINT8_C( 49), UINT8_C( 49), UINT8_C( 49), UINT8_C( 49), UINT8_C( 49),
|
|
|
|
|
UINT8_C( 49), UINT8_C( 49), UINT8_C( 49), UINT8_C( 49), UINT8_C( 49), UINT8_C( 49), UINT8_C( 49), UINT8_C( 49) } },
|
|
|
|
|
{ UINT8_C(153),
|
|
|
|
|
UINT8_C(198),
|
|
|
|
|
{ UINT8_C(153), UINT8_C(153), UINT8_C(153), UINT8_C(153), UINT8_C(153), UINT8_C(153), UINT8_C(153), UINT8_C(153),
|
|
|
|
|
UINT8_C(153), UINT8_C(153), UINT8_C(153), UINT8_C(153), UINT8_C(153), UINT8_C(153), UINT8_C(153), UINT8_C(153) } },
|
|
|
|
|
{ UINT8_C(159),
|
|
|
|
|
UINT8_C(134),
|
|
|
|
|
{ UINT8_C(159), UINT8_C(159), UINT8_C(159), UINT8_C(159), UINT8_C(159), UINT8_C(159), UINT8_C(159), UINT8_C(159),
|
|
|
|
|
UINT8_C(159), UINT8_C(159), UINT8_C(159), UINT8_C(159), UINT8_C(159), UINT8_C(159), UINT8_C(159), UINT8_C(159) } },
|
|
|
|
|
{ UINT8_C( 72),
|
|
|
|
|
UINT8_C(166),
|
|
|
|
|
{ UINT8_C( 72), UINT8_C( 72), UINT8_C( 72), UINT8_C( 72), UINT8_C( 72), UINT8_C( 72), UINT8_C( 72), UINT8_C( 72),
|
|
|
|
|
UINT8_C( 72), UINT8_C( 72), UINT8_C( 72), UINT8_C( 72), UINT8_C( 72), UINT8_C( 72), UINT8_C( 72), UINT8_C( 72) } },
|
|
|
|
|
{ UINT8_C(102),
|
|
|
|
|
UINT8_C( 68),
|
|
|
|
|
{ UINT8_C(102), UINT8_C(102), UINT8_C(102), UINT8_C(102), UINT8_C(102), UINT8_C(102), UINT8_C(102), UINT8_C(102),
|
|
|
|
|
UINT8_C(102), UINT8_C(102), UINT8_C(102), UINT8_C(102), UINT8_C(102), UINT8_C(102), UINT8_C(102), UINT8_C(102) } },
|
|
|
|
|
{ UINT8_C(112),
|
|
|
|
|
UINT8_C(230),
|
|
|
|
|
{ UINT8_C(112), UINT8_C(112), UINT8_C(112), UINT8_C(112), UINT8_C(112), UINT8_C(112), UINT8_C(112), UINT8_C(112),
|
|
|
|
|
UINT8_C(112), UINT8_C(112), UINT8_C(112), UINT8_C(112), UINT8_C(112), UINT8_C(112), UINT8_C(112), UINT8_C(112) } },
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
for (size_t i = 0 ; i < (sizeof(test_vec) / sizeof(test_vec[0])) ; i++) {
|
|
|
|
|
simde_uint8x16_t r = simde_vld1q_dup_u8(&test_vec[i].a);
|
|
|
|
|
|
|
|
|
|
simde_test_arm_neon_assert_equal_u8x16(r,
|
|
|
|
|
simde_vld1q_u8(test_vec[i].r));
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
|
#else
|
|
|
|
|
for (int i = 0 ; i < 8 ; i++) {
|
|
|
|
|
uint8_t a = simde_test_codegen_random_u8();
|
|
|
|
|
simde_uint8x16_t r = simde_vld1q_dup_u8(&a);
|
|
|
|
|
// Random buffer between pointer to load and expected results to check for
|
|
|
|
|
// loading out of bounds.
|
|
|
|
|
uint8_t unused = simde_test_codegen_random_u8();
|
|
|
|
|
|
|
|
|
|
simde_test_codegen_write_u8(2, a, SIMDE_TEST_VEC_POS_FIRST);
|
|
|
|
|
simde_test_codegen_write_u8(2, unused, SIMDE_TEST_VEC_POS_MIDDLE);
|
|
|
|
|
simde_test_arm_neon_write_u8x16(2, r, SIMDE_TEST_VEC_POS_LAST);
|
|
|
|
|
}
|
|
|
|
|
return 1;
|
|
|
|
|
#endif
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static int
|
|
|
|
|
test_simde_vld1q_dup_u16 (SIMDE_MUNIT_TEST_ARGS) {
|
|
|
|
|
#if 1
|
|
|
|
|
static const struct {
|
|
|
|
|
uint16_t a;
|
|
|
|
|
uint16_t unused;
|
|
|
|
|
uint16_t r[16];
|
|
|
|
|
} test_vec[] = {
|
|
|
|
|
{ UINT16_C( 4043),
|
|
|
|
|
UINT16_C(61235),
|
|
|
|
|
{ UINT16_C( 4043), UINT16_C( 4043), UINT16_C( 4043), UINT16_C( 4043), UINT16_C( 4043), UINT16_C( 4043), UINT16_C( 4043), UINT16_C( 4043) } },
|
|
|
|
|
{ UINT16_C(48168),
|
|
|
|
|
UINT16_C(22282),
|
|
|
|
|
{ UINT16_C(48168), UINT16_C(48168), UINT16_C(48168), UINT16_C(48168), UINT16_C(48168), UINT16_C(48168), UINT16_C(48168), UINT16_C(48168) } },
|
|
|
|
|
{ UINT16_C( 4777),
|
|
|
|
|
UINT16_C( 5331),
|
|
|
|
|
{ UINT16_C( 4777), UINT16_C( 4777), UINT16_C( 4777), UINT16_C( 4777), UINT16_C( 4777), UINT16_C( 4777), UINT16_C( 4777), UINT16_C( 4777) } },
|
|
|
|
|
{ UINT16_C(45057),
|
|
|
|
|
UINT16_C(39588),
|
|
|
|
|
{ UINT16_C(45057), UINT16_C(45057), UINT16_C(45057), UINT16_C(45057), UINT16_C(45057), UINT16_C(45057), UINT16_C(45057), UINT16_C(45057) } },
|
|
|
|
|
{ UINT16_C( 6709),
|
|
|
|
|
UINT16_C(26419),
|
|
|
|
|
{ UINT16_C( 6709), UINT16_C( 6709), UINT16_C( 6709), UINT16_C( 6709), UINT16_C( 6709), UINT16_C( 6709), UINT16_C( 6709), UINT16_C( 6709) } },
|
|
|
|
|
{ UINT16_C(52397),
|
|
|
|
|
UINT16_C(19757),
|
|
|
|
|
{ UINT16_C(52397), UINT16_C(52397), UINT16_C(52397), UINT16_C(52397), UINT16_C(52397), UINT16_C(52397), UINT16_C(52397), UINT16_C(52397) } },
|
|
|
|
|
{ UINT16_C(30290),
|
|
|
|
|
UINT16_C(47603),
|
|
|
|
|
{ UINT16_C(30290), UINT16_C(30290), UINT16_C(30290), UINT16_C(30290), UINT16_C(30290), UINT16_C(30290), UINT16_C(30290), UINT16_C(30290) } },
|
|
|
|
|
{ UINT16_C(25530),
|
|
|
|
|
UINT16_C(34207),
|
|
|
|
|
{ UINT16_C(25530), UINT16_C(25530), UINT16_C(25530), UINT16_C(25530), UINT16_C(25530), UINT16_C(25530), UINT16_C(25530), UINT16_C(25530) } },
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
for (size_t i = 0 ; i < (sizeof(test_vec) / sizeof(test_vec[0])) ; i++) {
|
|
|
|
|
simde_uint16x8_t r = simde_vld1q_dup_u16(&test_vec[i].a);
|
|
|
|
|
|
|
|
|
|
simde_test_arm_neon_assert_equal_u16x8(r,
|
|
|
|
|
simde_vld1q_u16(test_vec[i].r));
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
|
#else
|
|
|
|
|
for (int i = 0 ; i < 8 ; i++) {
|
|
|
|
|
uint16_t a = simde_test_codegen_random_u16();
|
|
|
|
|
simde_uint16x8_t r = simde_vld1q_dup_u16(&a);
|
|
|
|
|
// Random buffer between pointer to load and expected results to check for
|
|
|
|
|
// loading out of bounds.
|
|
|
|
|
uint16_t unused = simde_test_codegen_random_u16();
|
|
|
|
|
|
|
|
|
|
simde_test_codegen_write_u16(2, a, SIMDE_TEST_VEC_POS_FIRST);
|
|
|
|
|
simde_test_codegen_write_u16(2, unused, SIMDE_TEST_VEC_POS_MIDDLE);
|
|
|
|
|
simde_test_arm_neon_write_u16x8(2, r, SIMDE_TEST_VEC_POS_LAST);
|
|
|
|
|
}
|
|
|
|
|
return 1;
|
|
|
|
|
#endif
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static int
|
|
|
|
|
test_simde_vld1q_dup_u32 (SIMDE_MUNIT_TEST_ARGS) {
|
|
|
|
|
#if 1
|
|
|
|
|
static const struct {
|
|
|
|
|
uint32_t a;
|
|
|
|
|
uint32_t unused;
|
|
|
|
|
uint32_t r[16];
|
|
|
|
|
} test_vec[] = {
|
|
|
|
|
{ UINT32_C(2591347570),
|
|
|
|
|
UINT32_C( 955416207),
|
|
|
|
|
{ UINT32_C(2591347570), UINT32_C(2591347570), UINT32_C(2591347570), UINT32_C(2591347570) } },
|
|
|
|
|
{ UINT32_C(2454570385),
|
|
|
|
|
UINT32_C(2871849333),
|
|
|
|
|
{ UINT32_C(2454570385), UINT32_C(2454570385), UINT32_C(2454570385), UINT32_C(2454570385) } },
|
|
|
|
|
{ UINT32_C(3104988939),
|
|
|
|
|
UINT32_C(2114338603),
|
|
|
|
|
{ UINT32_C(3104988939), UINT32_C(3104988939), UINT32_C(3104988939), UINT32_C(3104988939) } },
|
|
|
|
|
{ UINT32_C(1865939381),
|
|
|
|
|
UINT32_C(3472217692),
|
|
|
|
|
{ UINT32_C(1865939381), UINT32_C(1865939381), UINT32_C(1865939381), UINT32_C(1865939381) } },
|
|
|
|
|
{ UINT32_C( 963144105),
|
|
|
|
|
UINT32_C(2037471976),
|
|
|
|
|
{ UINT32_C( 963144105), UINT32_C( 963144105), UINT32_C( 963144105), UINT32_C( 963144105) } },
|
|
|
|
|
{ UINT32_C(2500574751),
|
|
|
|
|
UINT32_C(3141547951),
|
|
|
|
|
{ UINT32_C(2500574751), UINT32_C(2500574751), UINT32_C(2500574751), UINT32_C(2500574751) } },
|
|
|
|
|
{ UINT32_C(3245626006),
|
|
|
|
|
UINT32_C(1195342481),
|
|
|
|
|
{ UINT32_C(3245626006), UINT32_C(3245626006), UINT32_C(3245626006), UINT32_C(3245626006) } },
|
|
|
|
|
{ UINT32_C(3484841587),
|
|
|
|
|
UINT32_C(4137528141),
|
|
|
|
|
{ UINT32_C(3484841587), UINT32_C(3484841587), UINT32_C(3484841587), UINT32_C(3484841587) } },
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
for (size_t i = 0 ; i < (sizeof(test_vec) / sizeof(test_vec[0])) ; i++) {
|
|
|
|
|
simde_uint32x4_t r = simde_vld1q_dup_u32(&test_vec[i].a);
|
|
|
|
|
|
|
|
|
|
simde_test_arm_neon_assert_equal_u32x4(r,
|
|
|
|
|
simde_vld1q_u32(test_vec[i].r));
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
|
#else
|
|
|
|
|
for (int i = 0 ; i < 8 ; i++) {
|
|
|
|
|
uint32_t a = simde_test_codegen_random_u32();
|
|
|
|
|
simde_uint32x4_t r = simde_vld1q_dup_u32(&a);
|
|
|
|
|
// Random buffer between pointer to load and expected results to check for
|
|
|
|
|
// loading out of bounds.
|
|
|
|
|
uint32_t unused = simde_test_codegen_random_u32();
|
|
|
|
|
|
|
|
|
|
simde_test_codegen_write_u32(2, a, SIMDE_TEST_VEC_POS_FIRST);
|
|
|
|
|
simde_test_codegen_write_u32(2, unused, SIMDE_TEST_VEC_POS_MIDDLE);
|
|
|
|
|
simde_test_arm_neon_write_u32x4(2, r, SIMDE_TEST_VEC_POS_LAST);
|
|
|
|
|
}
|
|
|
|
|
return 1;
|
|
|
|
|
#endif
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static int
|
|
|
|
|
test_simde_vld1q_dup_u64 (SIMDE_MUNIT_TEST_ARGS) {
|
|
|
|
|
#if 1
|
|
|
|
|
static const struct {
|
|
|
|
|
uint64_t a;
|
|
|
|
|
uint64_t unused;
|
|
|
|
|
uint64_t r[16];
|
|
|
|
|
} test_vec[] = {
|
|
|
|
|
{ UINT64_C( 9184705928005354773),
|
|
|
|
|
UINT64_C( 5677443429757649247),
|
|
|
|
|
{ UINT64_C( 9184705928005354773), UINT64_C( 9184705928005354773) } },
|
|
|
|
|
{ UINT64_C( 3134311518306254502),
|
|
|
|
|
UINT64_C(17728868401062491589),
|
|
|
|
|
{ UINT64_C( 3134311518306254502), UINT64_C( 3134311518306254502) } },
|
|
|
|
|
{ UINT64_C( 4142302142246631580),
|
|
|
|
|
UINT64_C(10083580343162015978),
|
|
|
|
|
{ UINT64_C( 4142302142246631580), UINT64_C( 4142302142246631580) } },
|
|
|
|
|
{ UINT64_C( 1455580007492747088),
|
|
|
|
|
UINT64_C( 6939818071156993400),
|
|
|
|
|
{ UINT64_C( 1455580007492747088), UINT64_C( 1455580007492747088) } },
|
|
|
|
|
{ UINT64_C(10771160788369228392),
|
|
|
|
|
UINT64_C( 2655478723087155817),
|
|
|
|
|
{ UINT64_C(10771160788369228392), UINT64_C(10771160788369228392) } },
|
|
|
|
|
{ UINT64_C( 6379735764790189350),
|
|
|
|
|
UINT64_C( 5165911206702198668),
|
|
|
|
|
{ UINT64_C( 6379735764790189350), UINT64_C( 6379735764790189350) } },
|
|
|
|
|
{ UINT64_C( 5801203564664065602),
|
|
|
|
|
UINT64_C( 485959815376386501),
|
|
|
|
|
{ UINT64_C( 5801203564664065602), UINT64_C( 5801203564664065602) } },
|
|
|
|
|
{ UINT64_C(15514342486347344662),
|
|
|
|
|
UINT64_C( 4745343749585371060),
|
|
|
|
|
{ UINT64_C(15514342486347344662), UINT64_C(15514342486347344662) } },
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
for (size_t i = 0 ; i < (sizeof(test_vec) / sizeof(test_vec[0])) ; i++) {
|
|
|
|
|
simde_uint64x2_t r = simde_vld1q_dup_u64(&test_vec[i].a);
|
|
|
|
|
|
|
|
|
|
simde_test_arm_neon_assert_equal_u64x2(r,
|
|
|
|
|
simde_vld1q_u64(test_vec[i].r));
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
|
#else
|
|
|
|
|
for (int i = 0 ; i < 8 ; i++) {
|
|
|
|
|
uint64_t a = simde_test_codegen_random_u64();
|
|
|
|
|
simde_uint64x2_t r = simde_vld1q_dup_u64(&a);
|
|
|
|
|
// Random buffer between pointer to load and expected results to check for
|
|
|
|
|
// loading out of bounds.
|
|
|
|
|
uint64_t unused = simde_test_codegen_random_u64();
|
|
|
|
|
|
|
|
|
|
simde_test_codegen_write_u64(2, a, SIMDE_TEST_VEC_POS_FIRST);
|
|
|
|
|
simde_test_codegen_write_u64(2, unused, SIMDE_TEST_VEC_POS_MIDDLE);
|
|
|
|
|
simde_test_arm_neon_write_u64x2(2, r, SIMDE_TEST_VEC_POS_LAST);
|
|
|
|
|
}
|
|
|
|
|
return 1;
|
|
|
|
|
#endif
|
|
|
|
|
}
|
|
|
|
|
|
2026-09-24 14:30:19 -06:00
|
|
|
static int
|
|
|
|
|
test_simde_vld1_dup_p8 (SIMDE_MUNIT_TEST_ARGS) {
|
|
|
|
|
#if 1
|
|
|
|
|
static const struct {
|
|
|
|
|
simde_poly8_t a;
|
|
|
|
|
simde_poly8_t unused;
|
|
|
|
|
simde_poly8_t r[8];
|
|
|
|
|
} test_vec[] = {
|
|
|
|
|
{ SIMDE_POLY8_C( 209),
|
|
|
|
|
SIMDE_POLY8_C( 197),
|
|
|
|
|
{ SIMDE_POLY8_C( 209), SIMDE_POLY8_C( 209), SIMDE_POLY8_C( 209), SIMDE_POLY8_C( 209),
|
|
|
|
|
SIMDE_POLY8_C( 209), SIMDE_POLY8_C( 209), SIMDE_POLY8_C( 209), SIMDE_POLY8_C( 209) } },
|
|
|
|
|
{ SIMDE_POLY8_C( 57),
|
|
|
|
|
SIMDE_POLY8_C( 35),
|
|
|
|
|
{ SIMDE_POLY8_C( 57), SIMDE_POLY8_C( 57), SIMDE_POLY8_C( 57), SIMDE_POLY8_C( 57),
|
|
|
|
|
SIMDE_POLY8_C( 57), SIMDE_POLY8_C( 57), SIMDE_POLY8_C( 57), SIMDE_POLY8_C( 57) } },
|
|
|
|
|
{ SIMDE_POLY8_C( 188),
|
|
|
|
|
SIMDE_POLY8_C( 183),
|
|
|
|
|
{ SIMDE_POLY8_C( 188), SIMDE_POLY8_C( 188), SIMDE_POLY8_C( 188), SIMDE_POLY8_C( 188),
|
|
|
|
|
SIMDE_POLY8_C( 188), SIMDE_POLY8_C( 188), SIMDE_POLY8_C( 188), SIMDE_POLY8_C( 188) } },
|
|
|
|
|
{ SIMDE_POLY8_C( 119),
|
|
|
|
|
SIMDE_POLY8_C( 79),
|
|
|
|
|
{ SIMDE_POLY8_C( 119), SIMDE_POLY8_C( 119), SIMDE_POLY8_C( 119), SIMDE_POLY8_C( 119),
|
|
|
|
|
SIMDE_POLY8_C( 119), SIMDE_POLY8_C( 119), SIMDE_POLY8_C( 119), SIMDE_POLY8_C( 119) } },
|
|
|
|
|
{ SIMDE_POLY8_C( 218),
|
|
|
|
|
SIMDE_POLY8_C( 61),
|
|
|
|
|
{ SIMDE_POLY8_C( 218), SIMDE_POLY8_C( 218), SIMDE_POLY8_C( 218), SIMDE_POLY8_C( 218),
|
|
|
|
|
SIMDE_POLY8_C( 218), SIMDE_POLY8_C( 218), SIMDE_POLY8_C( 218), SIMDE_POLY8_C( 218) } },
|
|
|
|
|
{ SIMDE_POLY8_C( 208),
|
|
|
|
|
SIMDE_POLY8_C( 7),
|
|
|
|
|
{ SIMDE_POLY8_C( 208), SIMDE_POLY8_C( 208), SIMDE_POLY8_C( 208), SIMDE_POLY8_C( 208),
|
|
|
|
|
SIMDE_POLY8_C( 208), SIMDE_POLY8_C( 208), SIMDE_POLY8_C( 208), SIMDE_POLY8_C( 208) } },
|
|
|
|
|
{ SIMDE_POLY8_C( 214),
|
|
|
|
|
SIMDE_POLY8_C( 66),
|
|
|
|
|
{ SIMDE_POLY8_C( 214), SIMDE_POLY8_C( 214), SIMDE_POLY8_C( 214), SIMDE_POLY8_C( 214),
|
|
|
|
|
SIMDE_POLY8_C( 214), SIMDE_POLY8_C( 214), SIMDE_POLY8_C( 214), SIMDE_POLY8_C( 214) } },
|
|
|
|
|
{ SIMDE_POLY8_C( 23),
|
|
|
|
|
SIMDE_POLY8_C( 167),
|
|
|
|
|
{ SIMDE_POLY8_C( 23), SIMDE_POLY8_C( 23), SIMDE_POLY8_C( 23), SIMDE_POLY8_C( 23),
|
|
|
|
|
SIMDE_POLY8_C( 23), SIMDE_POLY8_C( 23), SIMDE_POLY8_C( 23), SIMDE_POLY8_C( 23) } },
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
for (size_t i = 0 ; i < (sizeof(test_vec) / sizeof(test_vec[0])) ; i++) {
|
|
|
|
|
simde_poly8x8_t r = simde_vld1_dup_p8(&test_vec[i].a);
|
|
|
|
|
|
|
|
|
|
simde_test_arm_neon_assert_equal_p8x8(r,
|
|
|
|
|
simde_vld1_p8(test_vec[i].r));
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
|
#else
|
|
|
|
|
for (int i = 0 ; i < 8 ; i++) {
|
|
|
|
|
simde_poly8_t a = simde_test_codegen_random_p8();
|
|
|
|
|
simde_poly8x8_t r = simde_vld1_dup_p8(&a);
|
|
|
|
|
// Random buffer between pointer to load and expected results to check for
|
|
|
|
|
// loading out of bounds.
|
|
|
|
|
simde_poly8_t unused = simde_test_codegen_random_p8();
|
|
|
|
|
|
|
|
|
|
simde_test_codegen_write_p8(2, a, SIMDE_TEST_VEC_POS_FIRST);
|
|
|
|
|
simde_test_codegen_write_p8(2, unused, SIMDE_TEST_VEC_POS_MIDDLE);
|
|
|
|
|
simde_test_arm_neon_write_p8x8(2, r, SIMDE_TEST_VEC_POS_LAST);
|
|
|
|
|
}
|
|
|
|
|
return 1;
|
|
|
|
|
#endif
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static int
|
|
|
|
|
test_simde_vld1_dup_p16 (SIMDE_MUNIT_TEST_ARGS) {
|
|
|
|
|
#if 1
|
|
|
|
|
static const struct {
|
|
|
|
|
simde_poly16_t a;
|
|
|
|
|
simde_poly16_t unused;
|
|
|
|
|
simde_poly16_t r[4];
|
|
|
|
|
} test_vec[] = {
|
|
|
|
|
{ SIMDE_POLY16_C( 34867),
|
|
|
|
|
SIMDE_POLY16_C( 7182),
|
|
|
|
|
{ SIMDE_POLY16_C( 34867), SIMDE_POLY16_C( 34867), SIMDE_POLY16_C( 34867), SIMDE_POLY16_C( 34867) } },
|
|
|
|
|
{ SIMDE_POLY16_C( 36059),
|
|
|
|
|
SIMDE_POLY16_C( 31267),
|
|
|
|
|
{ SIMDE_POLY16_C( 36059), SIMDE_POLY16_C( 36059), SIMDE_POLY16_C( 36059), SIMDE_POLY16_C( 36059) } },
|
|
|
|
|
{ SIMDE_POLY16_C( 56161),
|
|
|
|
|
SIMDE_POLY16_C( 64909),
|
|
|
|
|
{ SIMDE_POLY16_C( 56161), SIMDE_POLY16_C( 56161), SIMDE_POLY16_C( 56161), SIMDE_POLY16_C( 56161) } },
|
|
|
|
|
{ SIMDE_POLY16_C( 10073),
|
|
|
|
|
SIMDE_POLY16_C( 61690),
|
|
|
|
|
{ SIMDE_POLY16_C( 10073), SIMDE_POLY16_C( 10073), SIMDE_POLY16_C( 10073), SIMDE_POLY16_C( 10073) } },
|
|
|
|
|
{ SIMDE_POLY16_C( 32118),
|
|
|
|
|
SIMDE_POLY16_C( 39068),
|
|
|
|
|
{ SIMDE_POLY16_C( 32118), SIMDE_POLY16_C( 32118), SIMDE_POLY16_C( 32118), SIMDE_POLY16_C( 32118) } },
|
|
|
|
|
{ SIMDE_POLY16_C( 45034),
|
|
|
|
|
SIMDE_POLY16_C( 21618),
|
|
|
|
|
{ SIMDE_POLY16_C( 45034), SIMDE_POLY16_C( 45034), SIMDE_POLY16_C( 45034), SIMDE_POLY16_C( 45034) } },
|
|
|
|
|
{ SIMDE_POLY16_C( 30202),
|
|
|
|
|
SIMDE_POLY16_C( 47155),
|
|
|
|
|
{ SIMDE_POLY16_C( 30202), SIMDE_POLY16_C( 30202), SIMDE_POLY16_C( 30202), SIMDE_POLY16_C( 30202) } },
|
|
|
|
|
{ SIMDE_POLY16_C( 58928),
|
|
|
|
|
SIMDE_POLY16_C( 39173),
|
|
|
|
|
{ SIMDE_POLY16_C( 58928), SIMDE_POLY16_C( 58928), SIMDE_POLY16_C( 58928), SIMDE_POLY16_C( 58928) } },
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
for (size_t i = 0 ; i < (sizeof(test_vec) / sizeof(test_vec[0])) ; i++) {
|
|
|
|
|
simde_poly16x4_t r = simde_vld1_dup_p16(&test_vec[i].a);
|
|
|
|
|
|
|
|
|
|
simde_test_arm_neon_assert_equal_p16x4(r,
|
|
|
|
|
simde_vld1_p16(test_vec[i].r));
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
|
#else
|
|
|
|
|
for (int i = 0 ; i < 8 ; i++) {
|
|
|
|
|
simde_poly16_t a = simde_test_codegen_random_p16();
|
|
|
|
|
simde_poly16x4_t r = simde_vld1_dup_p16(&a);
|
|
|
|
|
// Random buffer between pointer to load and expected results to check for
|
|
|
|
|
// loading out of bounds.
|
|
|
|
|
simde_poly16_t unused = simde_test_codegen_random_p16();
|
|
|
|
|
|
|
|
|
|
simde_test_codegen_write_p16(2, a, SIMDE_TEST_VEC_POS_FIRST);
|
|
|
|
|
simde_test_codegen_write_p16(2, unused, SIMDE_TEST_VEC_POS_MIDDLE);
|
|
|
|
|
simde_test_arm_neon_write_p16x4(2, r, SIMDE_TEST_VEC_POS_LAST);
|
|
|
|
|
}
|
|
|
|
|
return 1;
|
|
|
|
|
#endif
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static int
|
|
|
|
|
test_simde_vld1_dup_p64 (SIMDE_MUNIT_TEST_ARGS) {
|
|
|
|
|
#if 1
|
|
|
|
|
static const struct {
|
|
|
|
|
simde_poly64_t a;
|
|
|
|
|
simde_poly64_t unused;
|
|
|
|
|
simde_poly64_t r[1];
|
|
|
|
|
} test_vec[] = {
|
|
|
|
|
{ SIMDE_POLY64_C( 4392643112618697728),
|
|
|
|
|
SIMDE_POLY64_C( 3354028758843489792),
|
|
|
|
|
{ SIMDE_POLY64_C( 4392643112618697728) } },
|
|
|
|
|
{ SIMDE_POLY64_C(18317427155191939072),
|
|
|
|
|
SIMDE_POLY64_C(10160887856017633280),
|
|
|
|
|
{ SIMDE_POLY64_C(18317427155191939072) } },
|
|
|
|
|
{ SIMDE_POLY64_C(10350362669022711808),
|
|
|
|
|
SIMDE_POLY64_C( 7994024566605000704),
|
|
|
|
|
{ SIMDE_POLY64_C(10350362669022711808) } },
|
|
|
|
|
{ SIMDE_POLY64_C(14107770653017739264),
|
|
|
|
|
SIMDE_POLY64_C( 3814138787431153152),
|
|
|
|
|
{ SIMDE_POLY64_C(14107770653017739264) } },
|
|
|
|
|
{ SIMDE_POLY64_C(15427966675278313472),
|
|
|
|
|
SIMDE_POLY64_C( 4321414787632762880),
|
|
|
|
|
{ SIMDE_POLY64_C(15427966675278313472) } },
|
|
|
|
|
{ SIMDE_POLY64_C( 1338525244735576320),
|
|
|
|
|
SIMDE_POLY64_C(11729639870110578688),
|
|
|
|
|
{ SIMDE_POLY64_C( 1338525244735576320) } },
|
|
|
|
|
{ SIMDE_POLY64_C( 7803697585605856256),
|
|
|
|
|
SIMDE_POLY64_C(12285132752678977536),
|
|
|
|
|
{ SIMDE_POLY64_C( 7803697585605856256) } },
|
|
|
|
|
{ SIMDE_POLY64_C( 8726576153679393792),
|
|
|
|
|
SIMDE_POLY64_C( 5301365093824081920),
|
|
|
|
|
{ SIMDE_POLY64_C( 8726576153679393792) } },
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
for (size_t i = 0 ; i < (sizeof(test_vec) / sizeof(test_vec[0])) ; i++) {
|
|
|
|
|
simde_poly64x1_t r = simde_vld1_dup_p64(&test_vec[i].a);
|
|
|
|
|
|
|
|
|
|
simde_test_arm_neon_assert_equal_p64x1(r,
|
|
|
|
|
simde_vld1_p64(test_vec[i].r));
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
|
#else
|
|
|
|
|
for (int i = 0 ; i < 8 ; i++) {
|
|
|
|
|
simde_poly64_t a = simde_test_codegen_random_p64();
|
|
|
|
|
simde_poly64x1_t r = simde_vld1_dup_p64(&a);
|
|
|
|
|
// Random buffer between pointer to load and expected results to check for
|
|
|
|
|
// loading out of bounds.
|
|
|
|
|
simde_poly64_t unused = simde_test_codegen_random_p64();
|
|
|
|
|
|
|
|
|
|
simde_test_codegen_write_p64(2, a, SIMDE_TEST_VEC_POS_FIRST);
|
|
|
|
|
simde_test_codegen_write_p64(2, unused, SIMDE_TEST_VEC_POS_MIDDLE);
|
|
|
|
|
simde_test_arm_neon_write_p64x1(2, r, SIMDE_TEST_VEC_POS_LAST);
|
|
|
|
|
}
|
|
|
|
|
return 1;
|
|
|
|
|
#endif
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static int
|
|
|
|
|
test_simde_vld1q_dup_p8 (SIMDE_MUNIT_TEST_ARGS) {
|
|
|
|
|
#if 1
|
|
|
|
|
static const struct {
|
|
|
|
|
simde_poly8_t a;
|
|
|
|
|
simde_poly8_t unused;
|
|
|
|
|
simde_poly8_t r[16];
|
|
|
|
|
} test_vec[] = {
|
|
|
|
|
{ SIMDE_POLY8_C( 103),
|
|
|
|
|
SIMDE_POLY8_C( 108),
|
|
|
|
|
{ SIMDE_POLY8_C( 103), SIMDE_POLY8_C( 103), SIMDE_POLY8_C( 103), SIMDE_POLY8_C( 103),
|
|
|
|
|
SIMDE_POLY8_C( 103), SIMDE_POLY8_C( 103), SIMDE_POLY8_C( 103), SIMDE_POLY8_C( 103),
|
|
|
|
|
SIMDE_POLY8_C( 103), SIMDE_POLY8_C( 103), SIMDE_POLY8_C( 103), SIMDE_POLY8_C( 103),
|
|
|
|
|
SIMDE_POLY8_C( 103), SIMDE_POLY8_C( 103), SIMDE_POLY8_C( 103), SIMDE_POLY8_C( 103) } },
|
|
|
|
|
{ SIMDE_POLY8_C( 6),
|
|
|
|
|
SIMDE_POLY8_C( 35),
|
|
|
|
|
{ SIMDE_POLY8_C( 6), SIMDE_POLY8_C( 6), SIMDE_POLY8_C( 6), SIMDE_POLY8_C( 6),
|
|
|
|
|
SIMDE_POLY8_C( 6), SIMDE_POLY8_C( 6), SIMDE_POLY8_C( 6), SIMDE_POLY8_C( 6),
|
|
|
|
|
SIMDE_POLY8_C( 6), SIMDE_POLY8_C( 6), SIMDE_POLY8_C( 6), SIMDE_POLY8_C( 6),
|
|
|
|
|
SIMDE_POLY8_C( 6), SIMDE_POLY8_C( 6), SIMDE_POLY8_C( 6), SIMDE_POLY8_C( 6) } },
|
|
|
|
|
{ SIMDE_POLY8_C( 51),
|
|
|
|
|
SIMDE_POLY8_C( 218),
|
|
|
|
|
{ SIMDE_POLY8_C( 51), SIMDE_POLY8_C( 51), SIMDE_POLY8_C( 51), SIMDE_POLY8_C( 51),
|
|
|
|
|
SIMDE_POLY8_C( 51), SIMDE_POLY8_C( 51), SIMDE_POLY8_C( 51), SIMDE_POLY8_C( 51),
|
|
|
|
|
SIMDE_POLY8_C( 51), SIMDE_POLY8_C( 51), SIMDE_POLY8_C( 51), SIMDE_POLY8_C( 51),
|
|
|
|
|
SIMDE_POLY8_C( 51), SIMDE_POLY8_C( 51), SIMDE_POLY8_C( 51), SIMDE_POLY8_C( 51) } },
|
|
|
|
|
{ SIMDE_POLY8_C( 240),
|
|
|
|
|
SIMDE_POLY8_C( 134),
|
|
|
|
|
{ SIMDE_POLY8_C( 240), SIMDE_POLY8_C( 240), SIMDE_POLY8_C( 240), SIMDE_POLY8_C( 240),
|
|
|
|
|
SIMDE_POLY8_C( 240), SIMDE_POLY8_C( 240), SIMDE_POLY8_C( 240), SIMDE_POLY8_C( 240),
|
|
|
|
|
SIMDE_POLY8_C( 240), SIMDE_POLY8_C( 240), SIMDE_POLY8_C( 240), SIMDE_POLY8_C( 240),
|
|
|
|
|
SIMDE_POLY8_C( 240), SIMDE_POLY8_C( 240), SIMDE_POLY8_C( 240), SIMDE_POLY8_C( 240) } },
|
|
|
|
|
{ SIMDE_POLY8_C( 113),
|
|
|
|
|
SIMDE_POLY8_C( 128),
|
|
|
|
|
{ SIMDE_POLY8_C( 113), SIMDE_POLY8_C( 113), SIMDE_POLY8_C( 113), SIMDE_POLY8_C( 113),
|
|
|
|
|
SIMDE_POLY8_C( 113), SIMDE_POLY8_C( 113), SIMDE_POLY8_C( 113), SIMDE_POLY8_C( 113),
|
|
|
|
|
SIMDE_POLY8_C( 113), SIMDE_POLY8_C( 113), SIMDE_POLY8_C( 113), SIMDE_POLY8_C( 113),
|
|
|
|
|
SIMDE_POLY8_C( 113), SIMDE_POLY8_C( 113), SIMDE_POLY8_C( 113), SIMDE_POLY8_C( 113) } },
|
|
|
|
|
{ SIMDE_POLY8_C( 218),
|
|
|
|
|
SIMDE_POLY8_C( 158),
|
|
|
|
|
{ SIMDE_POLY8_C( 218), SIMDE_POLY8_C( 218), SIMDE_POLY8_C( 218), SIMDE_POLY8_C( 218),
|
|
|
|
|
SIMDE_POLY8_C( 218), SIMDE_POLY8_C( 218), SIMDE_POLY8_C( 218), SIMDE_POLY8_C( 218),
|
|
|
|
|
SIMDE_POLY8_C( 218), SIMDE_POLY8_C( 218), SIMDE_POLY8_C( 218), SIMDE_POLY8_C( 218),
|
|
|
|
|
SIMDE_POLY8_C( 218), SIMDE_POLY8_C( 218), SIMDE_POLY8_C( 218), SIMDE_POLY8_C( 218) } },
|
|
|
|
|
{ SIMDE_POLY8_C( 52),
|
|
|
|
|
SIMDE_POLY8_C( 206),
|
|
|
|
|
{ SIMDE_POLY8_C( 52), SIMDE_POLY8_C( 52), SIMDE_POLY8_C( 52), SIMDE_POLY8_C( 52),
|
|
|
|
|
SIMDE_POLY8_C( 52), SIMDE_POLY8_C( 52), SIMDE_POLY8_C( 52), SIMDE_POLY8_C( 52),
|
|
|
|
|
SIMDE_POLY8_C( 52), SIMDE_POLY8_C( 52), SIMDE_POLY8_C( 52), SIMDE_POLY8_C( 52),
|
|
|
|
|
SIMDE_POLY8_C( 52), SIMDE_POLY8_C( 52), SIMDE_POLY8_C( 52), SIMDE_POLY8_C( 52) } },
|
|
|
|
|
{ SIMDE_POLY8_C( 44),
|
|
|
|
|
SIMDE_POLY8_C( 199),
|
|
|
|
|
{ SIMDE_POLY8_C( 44), SIMDE_POLY8_C( 44), SIMDE_POLY8_C( 44), SIMDE_POLY8_C( 44),
|
|
|
|
|
SIMDE_POLY8_C( 44), SIMDE_POLY8_C( 44), SIMDE_POLY8_C( 44), SIMDE_POLY8_C( 44),
|
|
|
|
|
SIMDE_POLY8_C( 44), SIMDE_POLY8_C( 44), SIMDE_POLY8_C( 44), SIMDE_POLY8_C( 44),
|
|
|
|
|
SIMDE_POLY8_C( 44), SIMDE_POLY8_C( 44), SIMDE_POLY8_C( 44), SIMDE_POLY8_C( 44) } },
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
for (size_t i = 0 ; i < (sizeof(test_vec) / sizeof(test_vec[0])) ; i++) {
|
|
|
|
|
simde_poly8x16_t r = simde_vld1q_dup_p8(&test_vec[i].a);
|
|
|
|
|
|
|
|
|
|
simde_test_arm_neon_assert_equal_p8x16(r,
|
|
|
|
|
simde_vld1q_p8(test_vec[i].r));
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
|
#else
|
|
|
|
|
for (int i = 0 ; i < 8 ; i++) {
|
|
|
|
|
simde_poly8_t a = simde_test_codegen_random_p8();
|
|
|
|
|
simde_poly8x16_t r = simde_vld1q_dup_p8(&a);
|
|
|
|
|
// Random buffer between pointer to load and expected results to check for
|
|
|
|
|
// loading out of bounds.
|
|
|
|
|
simde_poly8_t unused = simde_test_codegen_random_p8();
|
|
|
|
|
|
|
|
|
|
simde_test_codegen_write_p8(2, a, SIMDE_TEST_VEC_POS_FIRST);
|
|
|
|
|
simde_test_codegen_write_p8(2, unused, SIMDE_TEST_VEC_POS_MIDDLE);
|
|
|
|
|
simde_test_arm_neon_write_p8x16(2, r, SIMDE_TEST_VEC_POS_LAST);
|
|
|
|
|
}
|
|
|
|
|
return 1;
|
|
|
|
|
#endif
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static int
|
|
|
|
|
test_simde_vld1q_dup_p16 (SIMDE_MUNIT_TEST_ARGS) {
|
|
|
|
|
#if 1
|
|
|
|
|
static const struct {
|
|
|
|
|
simde_poly16_t a;
|
|
|
|
|
simde_poly16_t unused;
|
|
|
|
|
simde_poly16_t r[8];
|
|
|
|
|
} test_vec[] = {
|
|
|
|
|
{ SIMDE_POLY16_C( 4455),
|
|
|
|
|
SIMDE_POLY16_C( 37418),
|
|
|
|
|
{ SIMDE_POLY16_C( 4455), SIMDE_POLY16_C( 4455), SIMDE_POLY16_C( 4455), SIMDE_POLY16_C( 4455),
|
|
|
|
|
SIMDE_POLY16_C( 4455), SIMDE_POLY16_C( 4455), SIMDE_POLY16_C( 4455), SIMDE_POLY16_C( 4455) } },
|
|
|
|
|
{ SIMDE_POLY16_C( 31157),
|
|
|
|
|
SIMDE_POLY16_C( 30377),
|
|
|
|
|
{ SIMDE_POLY16_C( 31157), SIMDE_POLY16_C( 31157), SIMDE_POLY16_C( 31157), SIMDE_POLY16_C( 31157),
|
|
|
|
|
SIMDE_POLY16_C( 31157), SIMDE_POLY16_C( 31157), SIMDE_POLY16_C( 31157), SIMDE_POLY16_C( 31157) } },
|
|
|
|
|
{ SIMDE_POLY16_C( 59316),
|
|
|
|
|
SIMDE_POLY16_C( 48368),
|
|
|
|
|
{ SIMDE_POLY16_C( 59316), SIMDE_POLY16_C( 59316), SIMDE_POLY16_C( 59316), SIMDE_POLY16_C( 59316),
|
|
|
|
|
SIMDE_POLY16_C( 59316), SIMDE_POLY16_C( 59316), SIMDE_POLY16_C( 59316), SIMDE_POLY16_C( 59316) } },
|
|
|
|
|
{ SIMDE_POLY16_C( 5207),
|
|
|
|
|
SIMDE_POLY16_C( 40527),
|
|
|
|
|
{ SIMDE_POLY16_C( 5207), SIMDE_POLY16_C( 5207), SIMDE_POLY16_C( 5207), SIMDE_POLY16_C( 5207),
|
|
|
|
|
SIMDE_POLY16_C( 5207), SIMDE_POLY16_C( 5207), SIMDE_POLY16_C( 5207), SIMDE_POLY16_C( 5207) } },
|
|
|
|
|
{ SIMDE_POLY16_C( 16849),
|
|
|
|
|
SIMDE_POLY16_C( 44988),
|
|
|
|
|
{ SIMDE_POLY16_C( 16849), SIMDE_POLY16_C( 16849), SIMDE_POLY16_C( 16849), SIMDE_POLY16_C( 16849),
|
|
|
|
|
SIMDE_POLY16_C( 16849), SIMDE_POLY16_C( 16849), SIMDE_POLY16_C( 16849), SIMDE_POLY16_C( 16849) } },
|
|
|
|
|
{ SIMDE_POLY16_C( 35804),
|
|
|
|
|
SIMDE_POLY16_C( 15300),
|
|
|
|
|
{ SIMDE_POLY16_C( 35804), SIMDE_POLY16_C( 35804), SIMDE_POLY16_C( 35804), SIMDE_POLY16_C( 35804),
|
|
|
|
|
SIMDE_POLY16_C( 35804), SIMDE_POLY16_C( 35804), SIMDE_POLY16_C( 35804), SIMDE_POLY16_C( 35804) } },
|
|
|
|
|
{ SIMDE_POLY16_C( 43896),
|
|
|
|
|
SIMDE_POLY16_C( 50062),
|
|
|
|
|
{ SIMDE_POLY16_C( 43896), SIMDE_POLY16_C( 43896), SIMDE_POLY16_C( 43896), SIMDE_POLY16_C( 43896),
|
|
|
|
|
SIMDE_POLY16_C( 43896), SIMDE_POLY16_C( 43896), SIMDE_POLY16_C( 43896), SIMDE_POLY16_C( 43896) } },
|
|
|
|
|
{ SIMDE_POLY16_C( 24746),
|
|
|
|
|
SIMDE_POLY16_C( 39394),
|
|
|
|
|
{ SIMDE_POLY16_C( 24746), SIMDE_POLY16_C( 24746), SIMDE_POLY16_C( 24746), SIMDE_POLY16_C( 24746),
|
|
|
|
|
SIMDE_POLY16_C( 24746), SIMDE_POLY16_C( 24746), SIMDE_POLY16_C( 24746), SIMDE_POLY16_C( 24746) } },
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
for (size_t i = 0 ; i < (sizeof(test_vec) / sizeof(test_vec[0])) ; i++) {
|
|
|
|
|
simde_poly16x8_t r = simde_vld1q_dup_p16(&test_vec[i].a);
|
|
|
|
|
|
|
|
|
|
simde_test_arm_neon_assert_equal_p16x8(r,
|
|
|
|
|
simde_vld1q_p16(test_vec[i].r));
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
|
#else
|
|
|
|
|
for (int i = 0 ; i < 8 ; i++) {
|
|
|
|
|
simde_poly16_t a = simde_test_codegen_random_p16();
|
|
|
|
|
simde_poly16x8_t r = simde_vld1q_dup_p16(&a);
|
|
|
|
|
// Random buffer between pointer to load and expected results to check for
|
|
|
|
|
// loading out of bounds.
|
|
|
|
|
simde_poly16_t unused = simde_test_codegen_random_p16();
|
|
|
|
|
|
|
|
|
|
simde_test_codegen_write_p16(2, a, SIMDE_TEST_VEC_POS_FIRST);
|
|
|
|
|
simde_test_codegen_write_p16(2, unused, SIMDE_TEST_VEC_POS_MIDDLE);
|
|
|
|
|
simde_test_arm_neon_write_p16x8(2, r, SIMDE_TEST_VEC_POS_LAST);
|
|
|
|
|
}
|
|
|
|
|
return 1;
|
|
|
|
|
#endif
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static int
|
|
|
|
|
test_simde_vld1q_dup_p64 (SIMDE_MUNIT_TEST_ARGS) {
|
|
|
|
|
#if 1
|
|
|
|
|
static const struct {
|
|
|
|
|
simde_poly64_t a;
|
|
|
|
|
simde_poly64_t unused;
|
|
|
|
|
simde_poly64_t r[2];
|
|
|
|
|
} test_vec[] = {
|
|
|
|
|
{ SIMDE_POLY64_C( 4085526464958964736),
|
|
|
|
|
SIMDE_POLY64_C(12036863701681594368),
|
|
|
|
|
{ SIMDE_POLY64_C( 4085526464958964736), SIMDE_POLY64_C( 4085526464958964736) } },
|
|
|
|
|
{ SIMDE_POLY64_C( 2766158147798991872),
|
|
|
|
|
SIMDE_POLY64_C(13979426383030849536),
|
|
|
|
|
{ SIMDE_POLY64_C( 2766158147798991872), SIMDE_POLY64_C( 2766158147798991872) } },
|
|
|
|
|
{ SIMDE_POLY64_C(14512035966483087360),
|
|
|
|
|
SIMDE_POLY64_C( 8883705765774869504),
|
|
|
|
|
{ SIMDE_POLY64_C(14512035966483087360), SIMDE_POLY64_C(14512035966483087360) } },
|
|
|
|
|
{ SIMDE_POLY64_C(18340636043580037120),
|
|
|
|
|
SIMDE_POLY64_C( 2150253255460409600),
|
|
|
|
|
{ SIMDE_POLY64_C(18340636043580037120), SIMDE_POLY64_C(18340636043580037120) } },
|
|
|
|
|
{ SIMDE_POLY64_C(13137622059308990464),
|
|
|
|
|
SIMDE_POLY64_C( 8194210194362209280),
|
|
|
|
|
{ SIMDE_POLY64_C(13137622059308990464), SIMDE_POLY64_C(13137622059308990464) } },
|
|
|
|
|
{ SIMDE_POLY64_C(10481627232013793280),
|
|
|
|
|
SIMDE_POLY64_C( 3784515254263812096),
|
|
|
|
|
{ SIMDE_POLY64_C(10481627232013793280), SIMDE_POLY64_C(10481627232013793280) } },
|
|
|
|
|
{ SIMDE_POLY64_C(13114093544671561728),
|
|
|
|
|
SIMDE_POLY64_C(10238116799618189312),
|
|
|
|
|
{ SIMDE_POLY64_C(13114093544671561728), SIMDE_POLY64_C(13114093544671561728) } },
|
|
|
|
|
{ SIMDE_POLY64_C( 7970424308297574400),
|
|
|
|
|
SIMDE_POLY64_C( 6584517148334770176),
|
|
|
|
|
{ SIMDE_POLY64_C( 7970424308297574400), SIMDE_POLY64_C( 7970424308297574400) } },
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
for (size_t i = 0 ; i < (sizeof(test_vec) / sizeof(test_vec[0])) ; i++) {
|
|
|
|
|
simde_poly64x2_t r = simde_vld1q_dup_p64(&test_vec[i].a);
|
|
|
|
|
|
|
|
|
|
simde_test_arm_neon_assert_equal_p64x2(r,
|
|
|
|
|
simde_vld1q_p64(test_vec[i].r));
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
|
#else
|
|
|
|
|
for (int i = 0 ; i < 8 ; i++) {
|
|
|
|
|
simde_poly64_t a = simde_test_codegen_random_p64();
|
|
|
|
|
simde_poly64x2_t r = simde_vld1q_dup_p64(&a);
|
|
|
|
|
// Random buffer between pointer to load and expected results to check for
|
|
|
|
|
// loading out of bounds.
|
|
|
|
|
simde_poly64_t unused = simde_test_codegen_random_p64();
|
|
|
|
|
|
|
|
|
|
simde_test_codegen_write_p64(2, a, SIMDE_TEST_VEC_POS_FIRST);
|
|
|
|
|
simde_test_codegen_write_p64(2, unused, SIMDE_TEST_VEC_POS_MIDDLE);
|
|
|
|
|
simde_test_arm_neon_write_p64x2(2, r, SIMDE_TEST_VEC_POS_LAST);
|
|
|
|
|
}
|
|
|
|
|
return 1;
|
|
|
|
|
#endif
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static int
|
|
|
|
|
test_simde_vld1_dup_bf16 (SIMDE_MUNIT_TEST_ARGS) {
|
|
|
|
|
struct {
|
|
|
|
|
simde_bfloat16_t a;
|
|
|
|
|
simde_bfloat16_t unused;
|
|
|
|
|
simde_bfloat16_t r[4];
|
|
|
|
|
} test_vec[] = {
|
|
|
|
|
{ SIMDE_BFLOAT16_VALUE(4.04),
|
|
|
|
|
SIMDE_BFLOAT16_VALUE(4.51),
|
|
|
|
|
{ SIMDE_BFLOAT16_VALUE(4.04), SIMDE_BFLOAT16_VALUE(4.04), SIMDE_BFLOAT16_VALUE(4.04), SIMDE_BFLOAT16_VALUE(4.04) } },
|
|
|
|
|
{ SIMDE_BFLOAT16_VALUE(-0.29),
|
|
|
|
|
SIMDE_BFLOAT16_VALUE(8.79),
|
|
|
|
|
{ SIMDE_BFLOAT16_VALUE(-0.29), SIMDE_BFLOAT16_VALUE(-0.29), SIMDE_BFLOAT16_VALUE(-0.29), SIMDE_BFLOAT16_VALUE(-0.29) } },
|
|
|
|
|
{ SIMDE_BFLOAT16_VALUE(-1.66),
|
|
|
|
|
SIMDE_BFLOAT16_VALUE(-8.54),
|
|
|
|
|
{ SIMDE_BFLOAT16_VALUE(-1.66), SIMDE_BFLOAT16_VALUE(-1.66), SIMDE_BFLOAT16_VALUE(-1.66), SIMDE_BFLOAT16_VALUE(-1.66) } },
|
|
|
|
|
{ SIMDE_BFLOAT16_VALUE(-7.87),
|
|
|
|
|
SIMDE_BFLOAT16_VALUE(2.04),
|
|
|
|
|
{ SIMDE_BFLOAT16_VALUE(-7.87), SIMDE_BFLOAT16_VALUE(-7.87), SIMDE_BFLOAT16_VALUE(-7.87), SIMDE_BFLOAT16_VALUE(-7.87) } },
|
|
|
|
|
{ SIMDE_BFLOAT16_VALUE(2.65),
|
|
|
|
|
SIMDE_BFLOAT16_VALUE(-7.48),
|
|
|
|
|
{ SIMDE_BFLOAT16_VALUE(2.65), SIMDE_BFLOAT16_VALUE(2.65), SIMDE_BFLOAT16_VALUE(2.65), SIMDE_BFLOAT16_VALUE(2.65) } },
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
for (size_t i = 0 ; i < (sizeof(test_vec) / sizeof(test_vec[0])) ; i++) {
|
|
|
|
|
simde_bfloat16x4_t r = simde_vld1_dup_bf16(&test_vec[i].a);
|
|
|
|
|
|
|
|
|
|
simde_test_arm_neon_assert_equal_bf16x4(r, simde_vld1_bf16(test_vec[i].r),
|
|
|
|
|
INT_MAX);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static int
|
|
|
|
|
test_simde_vld1q_dup_bf16 (SIMDE_MUNIT_TEST_ARGS) {
|
|
|
|
|
struct {
|
|
|
|
|
simde_bfloat16_t a;
|
|
|
|
|
simde_bfloat16_t unused;
|
|
|
|
|
simde_bfloat16_t r[8];
|
|
|
|
|
} test_vec[] = {
|
|
|
|
|
{ SIMDE_BFLOAT16_VALUE( -275.48),
|
|
|
|
|
SIMDE_BFLOAT16_VALUE( 563.30),
|
|
|
|
|
{ SIMDE_BFLOAT16_VALUE( -275.48), SIMDE_BFLOAT16_VALUE( -275.48), SIMDE_BFLOAT16_VALUE( -275.48), SIMDE_BFLOAT16_VALUE( -275.48),
|
|
|
|
|
SIMDE_BFLOAT16_VALUE( -275.48), SIMDE_BFLOAT16_VALUE( -275.48), SIMDE_BFLOAT16_VALUE( -275.48), SIMDE_BFLOAT16_VALUE( -275.48) } },
|
|
|
|
|
{ SIMDE_BFLOAT16_VALUE( -478.65),
|
|
|
|
|
SIMDE_BFLOAT16_VALUE( 688.84),
|
|
|
|
|
{ SIMDE_BFLOAT16_VALUE( -478.65), SIMDE_BFLOAT16_VALUE( -478.65), SIMDE_BFLOAT16_VALUE( -478.65), SIMDE_BFLOAT16_VALUE( -478.65),
|
|
|
|
|
SIMDE_BFLOAT16_VALUE( -478.65), SIMDE_BFLOAT16_VALUE( -478.65), SIMDE_BFLOAT16_VALUE( -478.65), SIMDE_BFLOAT16_VALUE( -478.65) } },
|
|
|
|
|
{ SIMDE_BFLOAT16_VALUE( 810.78),
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SIMDE_BFLOAT16_VALUE( -456.08),
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{ SIMDE_BFLOAT16_VALUE( 810.78), SIMDE_BFLOAT16_VALUE( 810.78), SIMDE_BFLOAT16_VALUE( 810.78), SIMDE_BFLOAT16_VALUE( 810.78),
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SIMDE_BFLOAT16_VALUE( 810.78), SIMDE_BFLOAT16_VALUE( 810.78), SIMDE_BFLOAT16_VALUE( 810.78), SIMDE_BFLOAT16_VALUE( 810.78) } },
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{ SIMDE_BFLOAT16_VALUE( -139.83),
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SIMDE_BFLOAT16_VALUE( -302.96),
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{ SIMDE_BFLOAT16_VALUE( -139.83), SIMDE_BFLOAT16_VALUE( -139.83), SIMDE_BFLOAT16_VALUE( -139.83), SIMDE_BFLOAT16_VALUE( -139.83),
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SIMDE_BFLOAT16_VALUE( -139.83), SIMDE_BFLOAT16_VALUE( -139.83), SIMDE_BFLOAT16_VALUE( -139.83), SIMDE_BFLOAT16_VALUE( -139.83) } },
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{ SIMDE_BFLOAT16_VALUE( 16.91),
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SIMDE_BFLOAT16_VALUE( -128.20),
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{ SIMDE_BFLOAT16_VALUE( 16.91), SIMDE_BFLOAT16_VALUE( 16.91), SIMDE_BFLOAT16_VALUE( 16.91), SIMDE_BFLOAT16_VALUE( 16.91),
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|
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SIMDE_BFLOAT16_VALUE( 16.91), SIMDE_BFLOAT16_VALUE( 16.91), SIMDE_BFLOAT16_VALUE( 16.91), SIMDE_BFLOAT16_VALUE( 16.91) } },
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{ SIMDE_BFLOAT16_VALUE( 315.19),
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SIMDE_BFLOAT16_VALUE( -659.25),
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{ SIMDE_BFLOAT16_VALUE( 315.19), SIMDE_BFLOAT16_VALUE( 315.19), SIMDE_BFLOAT16_VALUE( 315.19), SIMDE_BFLOAT16_VALUE( 315.19),
|
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|
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SIMDE_BFLOAT16_VALUE( 315.19), SIMDE_BFLOAT16_VALUE( 315.19), SIMDE_BFLOAT16_VALUE( 315.19), SIMDE_BFLOAT16_VALUE( 315.19) } },
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{ SIMDE_BFLOAT16_VALUE( -303.00),
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SIMDE_BFLOAT16_VALUE( -865.13),
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|
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|
{ SIMDE_BFLOAT16_VALUE( -303.00), SIMDE_BFLOAT16_VALUE( -303.00), SIMDE_BFLOAT16_VALUE( -303.00), SIMDE_BFLOAT16_VALUE( -303.00),
|
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|
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|
SIMDE_BFLOAT16_VALUE( -303.00), SIMDE_BFLOAT16_VALUE( -303.00), SIMDE_BFLOAT16_VALUE( -303.00), SIMDE_BFLOAT16_VALUE( -303.00) } },
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{ SIMDE_BFLOAT16_VALUE( 391.93),
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|
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|
SIMDE_BFLOAT16_VALUE( -958.40),
|
|
|
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|
{ SIMDE_BFLOAT16_VALUE( 391.93), SIMDE_BFLOAT16_VALUE( 391.93), SIMDE_BFLOAT16_VALUE( 391.93), SIMDE_BFLOAT16_VALUE( 391.93),
|
|
|
|
|
SIMDE_BFLOAT16_VALUE( 391.93), SIMDE_BFLOAT16_VALUE( 391.93), SIMDE_BFLOAT16_VALUE( 391.93), SIMDE_BFLOAT16_VALUE( 391.93) } },
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|
};
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|
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|
for (size_t i = 0 ; i < (sizeof(test_vec) / sizeof(test_vec[0])) ; i++) {
|
|
|
|
|
simde_bfloat16x8_t r = simde_vld1q_dup_bf16(&test_vec[i].a);
|
|
|
|
|
|
|
|
|
|
simde_test_arm_neon_assert_equal_bf16x8(r, simde_vld1q_bf16(test_vec[i].r),
|
|
|
|
|
INT_MAX);
|
|
|
|
|
}
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|
|
|
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|
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|
return 0;
|
|
|
|
|
}
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|
2026-09-24 14:08:32 -06:00
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|
#endif /* !defined(SIMDE_BUG_INTEL_857088) */
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|
SIMDE_TEST_FUNC_LIST_BEGIN
|
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|
#if !defined(SIMDE_BUG_INTEL_857088)
|
2026-09-24 14:30:19 -06:00
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|
SIMDE_TEST_FUNC_LIST_ENTRY(vld1_dup_f16)
|
2026-09-24 14:08:32 -06:00
|
|
|
SIMDE_TEST_FUNC_LIST_ENTRY(vld1_dup_f32)
|
|
|
|
|
SIMDE_TEST_FUNC_LIST_ENTRY(vld1_dup_f64)
|
|
|
|
|
SIMDE_TEST_FUNC_LIST_ENTRY(vld1_dup_s8)
|
|
|
|
|
SIMDE_TEST_FUNC_LIST_ENTRY(vld1_dup_s16)
|
|
|
|
|
SIMDE_TEST_FUNC_LIST_ENTRY(vld1_dup_s32)
|
|
|
|
|
SIMDE_TEST_FUNC_LIST_ENTRY(vld1_dup_s64)
|
|
|
|
|
SIMDE_TEST_FUNC_LIST_ENTRY(vld1_dup_u8)
|
|
|
|
|
SIMDE_TEST_FUNC_LIST_ENTRY(vld1_dup_u16)
|
|
|
|
|
SIMDE_TEST_FUNC_LIST_ENTRY(vld1_dup_u32)
|
|
|
|
|
SIMDE_TEST_FUNC_LIST_ENTRY(vld1_dup_u64)
|
2026-09-24 14:30:19 -06:00
|
|
|
SIMDE_TEST_FUNC_LIST_ENTRY(vld1q_dup_f16)
|
2026-09-24 14:08:32 -06:00
|
|
|
SIMDE_TEST_FUNC_LIST_ENTRY(vld1q_dup_f32)
|
|
|
|
|
SIMDE_TEST_FUNC_LIST_ENTRY(vld1q_dup_f64)
|
|
|
|
|
SIMDE_TEST_FUNC_LIST_ENTRY(vld1q_dup_s8)
|
|
|
|
|
SIMDE_TEST_FUNC_LIST_ENTRY(vld1q_dup_s16)
|
|
|
|
|
SIMDE_TEST_FUNC_LIST_ENTRY(vld1q_dup_s32)
|
|
|
|
|
SIMDE_TEST_FUNC_LIST_ENTRY(vld1q_dup_s64)
|
|
|
|
|
SIMDE_TEST_FUNC_LIST_ENTRY(vld1q_dup_u8)
|
|
|
|
|
SIMDE_TEST_FUNC_LIST_ENTRY(vld1q_dup_u16)
|
|
|
|
|
SIMDE_TEST_FUNC_LIST_ENTRY(vld1q_dup_u32)
|
|
|
|
|
SIMDE_TEST_FUNC_LIST_ENTRY(vld1q_dup_u64)
|
2026-09-24 14:30:19 -06:00
|
|
|
|
|
|
|
|
SIMDE_TEST_FUNC_LIST_ENTRY(vld1_dup_p8)
|
|
|
|
|
SIMDE_TEST_FUNC_LIST_ENTRY(vld1_dup_p16)
|
|
|
|
|
SIMDE_TEST_FUNC_LIST_ENTRY(vld1_dup_p64)
|
|
|
|
|
SIMDE_TEST_FUNC_LIST_ENTRY(vld1q_dup_p8)
|
|
|
|
|
SIMDE_TEST_FUNC_LIST_ENTRY(vld1q_dup_p16)
|
|
|
|
|
SIMDE_TEST_FUNC_LIST_ENTRY(vld1q_dup_p64)
|
|
|
|
|
|
|
|
|
|
SIMDE_TEST_FUNC_LIST_ENTRY(vld1_dup_bf16)
|
|
|
|
|
SIMDE_TEST_FUNC_LIST_ENTRY(vld1q_dup_bf16)
|
2026-09-24 14:08:32 -06:00
|
|
|
#endif /* !defined(SIMDE_BUG_INTEL_857088) */
|
|
|
|
|
SIMDE_TEST_FUNC_LIST_END
|
|
|
|
|
|
|
|
|
|
#include "test-neon-footer.h"
|