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Update googletest to 1.18.0 and SIMDe to 0.8.2.

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Googletest 1.18 asks for CMake 3.13 or newer, so configuring the tests no longer warns that CMake compatibility below 3.10 is deprecated.

Co-authored-by: Cursor <cursoragent@cursor.com>
This commit is contained in:
Ryan Henry 2026-09-24 14:30:19 -06:00
parent e4e666f459
commit 3f10e05176
912 changed files with 224964 additions and 11502 deletions
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306
thirdparty/simde/test/arm/neon/abs.c vendored
View file

@ -3,6 +3,52 @@
#include "test-neon.h"
#include "../../../simde/arm/neon/abs.h"
static int
test_simde_vabsh_f16 (SIMDE_MUNIT_TEST_ARGS) {
#if 1
struct {
simde_float16_t a;
simde_float16_t r;
} test_vec[] = {
{ SIMDE_FLOAT16_VALUE( - 24.786),
SIMDE_FLOAT16_VALUE( 24.786) },
{ SIMDE_FLOAT16_VALUE( 27.135),
SIMDE_FLOAT16_VALUE( 27.135) },
{ SIMDE_FLOAT16_VALUE( 16.821),
SIMDE_FLOAT16_VALUE( 16.821) },
{ SIMDE_FLOAT16_VALUE( - 25.652),
SIMDE_FLOAT16_VALUE( 25.652) },
{ SIMDE_FLOAT16_VALUE( 8.252),
SIMDE_FLOAT16_VALUE( 8.252) },
{ SIMDE_FLOAT16_VALUE( 1.127),
SIMDE_FLOAT16_VALUE( 1.127) },
{ SIMDE_FLOAT16_VALUE( - 26.641),
SIMDE_FLOAT16_VALUE( 26.641) },
{ SIMDE_FLOAT16_VALUE( - 2.663),
SIMDE_FLOAT16_VALUE( 2.663) },
};
for (size_t i = 0 ; i < (sizeof(test_vec) / sizeof(test_vec[0])) ; i++) {
simde_float16_t r = simde_vabsh_f16(test_vec[i].a);
simde_assert_equal_f16(r, test_vec[i].r, 1);
}
return 0;
#else
fputc('\n', stdout);
for (int i = 0 ; i < 8 ; i++) {
simde_float16_t a = simde_test_arm_neon_random_f16(-100.0f, 100.0f);
simde_float16_t r = simde_vabsh_f16(a);
simde_test_arm_neon_write_f16(2, a, SIMDE_TEST_VEC_POS_FIRST);
simde_test_arm_neon_write_f16(2, r, SIMDE_TEST_VEC_POS_LAST);
}
return 1;
#endif
}
static int
test_simde_vabsd_s64 (SIMDE_MUNIT_TEST_ARGS) {
#if 1
@ -48,8 +94,60 @@ test_simde_vabsd_s64 (SIMDE_MUNIT_TEST_ARGS) {
#endif
}
static int
test_simde_vabs_f16 (SIMDE_MUNIT_TEST_ARGS) {
#if 1
struct {
simde_float16_t a[4];
simde_float16_t r[4];
} test_vec[] = {
{ { SIMDE_FLOAT16_VALUE(-0.70), SIMDE_FLOAT16_VALUE(-8.20), SIMDE_FLOAT16_VALUE(-4.90), SIMDE_FLOAT16_VALUE(-5.20) },
{ SIMDE_FLOAT16_VALUE(0.70), SIMDE_FLOAT16_VALUE(8.20), SIMDE_FLOAT16_VALUE(4.90), SIMDE_FLOAT16_VALUE(5.20) } },
{ { SIMDE_FLOAT16_VALUE(-4.40), SIMDE_FLOAT16_VALUE(0.40), SIMDE_FLOAT16_VALUE(-0.80), SIMDE_FLOAT16_VALUE(-3.80) },
{ SIMDE_FLOAT16_VALUE(4.40), SIMDE_FLOAT16_VALUE(0.40), SIMDE_FLOAT16_VALUE(0.80), SIMDE_FLOAT16_VALUE(3.80) } },
{ { SIMDE_FLOAT16_VALUE(-6.20), SIMDE_FLOAT16_VALUE(-2.40), SIMDE_FLOAT16_VALUE(3.20), SIMDE_FLOAT16_VALUE(5.70) },
{ SIMDE_FLOAT16_VALUE(6.20), SIMDE_FLOAT16_VALUE(2.40), SIMDE_FLOAT16_VALUE(3.20), SIMDE_FLOAT16_VALUE(5.70) } },
{ { SIMDE_FLOAT16_VALUE(8.30), SIMDE_FLOAT16_VALUE(-8.00), SIMDE_FLOAT16_VALUE(9.10), SIMDE_FLOAT16_VALUE(8.50) },
{ SIMDE_FLOAT16_VALUE(8.30), SIMDE_FLOAT16_VALUE(8.00), SIMDE_FLOAT16_VALUE(9.10), SIMDE_FLOAT16_VALUE(8.50) } },
{ { SIMDE_FLOAT16_VALUE(-1.20), SIMDE_FLOAT16_VALUE(3.80), SIMDE_FLOAT16_VALUE(6.00), SIMDE_FLOAT16_VALUE(5.50) },
{ SIMDE_FLOAT16_VALUE(1.20), SIMDE_FLOAT16_VALUE(3.80), SIMDE_FLOAT16_VALUE(6.00), SIMDE_FLOAT16_VALUE(5.50) } },
{ { SIMDE_FLOAT16_VALUE(7.70), SIMDE_FLOAT16_VALUE(-9.70), SIMDE_FLOAT16_VALUE(3.40), SIMDE_FLOAT16_VALUE(3.90) },
{ SIMDE_FLOAT16_VALUE(7.70), SIMDE_FLOAT16_VALUE(9.70), SIMDE_FLOAT16_VALUE(3.40), SIMDE_FLOAT16_VALUE(3.90) } },
{ { SIMDE_FLOAT16_VALUE(0.50), SIMDE_FLOAT16_VALUE(9.90), SIMDE_FLOAT16_VALUE(2.50), SIMDE_FLOAT16_VALUE(1.00) },
{ SIMDE_FLOAT16_VALUE(0.50), SIMDE_FLOAT16_VALUE(9.90), SIMDE_FLOAT16_VALUE(2.50), SIMDE_FLOAT16_VALUE(1.00) } },
{ { SIMDE_FLOAT16_VALUE(-0.80), SIMDE_FLOAT16_VALUE(-9.60), SIMDE_FLOAT16_VALUE(1.30), SIMDE_FLOAT16_VALUE(3.70) },
{ SIMDE_FLOAT16_VALUE(0.80), SIMDE_FLOAT16_VALUE(9.60), SIMDE_FLOAT16_VALUE(1.30), SIMDE_FLOAT16_VALUE(3.70) } },
{ { SIMDE_FLOAT16_VALUE(-4.00), SIMDE_FLOAT16_VALUE(2.00), SIMDE_FLOAT16_VALUE(-4.80), SIMDE_FLOAT16_VALUE(8.40) },
{ SIMDE_FLOAT16_VALUE(4.00), SIMDE_FLOAT16_VALUE(2.00), SIMDE_FLOAT16_VALUE(4.80), SIMDE_FLOAT16_VALUE(8.40) } },
{ { SIMDE_FLOAT16_VALUE(3.90), SIMDE_FLOAT16_VALUE(-2.60), SIMDE_FLOAT16_VALUE(6.50), SIMDE_FLOAT16_VALUE(4.10) },
{ SIMDE_FLOAT16_VALUE(3.90), SIMDE_FLOAT16_VALUE(2.60), SIMDE_FLOAT16_VALUE(6.50), SIMDE_FLOAT16_VALUE(4.10) } },
};
for (size_t i = 0 ; i < (sizeof(test_vec) / sizeof(test_vec[0])) ; i++) {
simde_float16x4_t a = simde_vld1_f16(test_vec[i].a);
simde_float16x4_t r = simde_vabs_f16(a);
simde_test_arm_neon_assert_equal_f16x4(r, simde_vld1_f16(test_vec[i].r), INT_MAX);
}
return 0;
#else
fputc('\n', stdout);
for (int i = 0 ; i < 8 ; i++) {
simde_float16x4_t a = simde_test_arm_neon_random_f16x4(-100.0f, 100.0f);
simde_float16x4_t r = simde_vabs_f16(a);
simde_test_arm_neon_write_f16x4(2, a, SIMDE_TEST_VEC_POS_FIRST);
simde_test_arm_neon_write_f16x4(2, r, SIMDE_TEST_VEC_POS_LAST);
}
return 1;
#endif
}
static int
test_simde_vabs_f32 (SIMDE_MUNIT_TEST_ARGS) {
#if 1
static const struct {
simde_float32 a[2];
simde_float32 r[2];
@ -80,10 +178,23 @@ test_simde_vabs_f32 (SIMDE_MUNIT_TEST_ARGS) {
}
return 0;
#else
fputc('\n', stdout);
for (int i = 0 ; i < 8 ; i++) {
simde_float32x2_t a = simde_test_arm_neon_random_f32x2(-1000.0f, 1000.0f);
simde_float32x2_t r = simde_vabs_f32(a);
simde_test_arm_neon_write_f32x2(2, a, SIMDE_TEST_VEC_POS_FIRST);
simde_test_arm_neon_write_f32x2(2, r, SIMDE_TEST_VEC_POS_LAST);
}
return 1;
#endif
}
static int
test_simde_vabs_f64 (SIMDE_MUNIT_TEST_ARGS) {
#if 1
static const struct {
simde_float64 a[1];
simde_float64 r[1];
@ -114,10 +225,23 @@ test_simde_vabs_f64 (SIMDE_MUNIT_TEST_ARGS) {
}
return 0;
#else
fputc('\n', stdout);
for (int i = 0 ; i < 8 ; i++) {
simde_float64x1_t a = simde_test_arm_neon_random_f64x1(SIMDE_FLOAT64_C(-1000.0), SIMDE_FLOAT64_C(1000.0));
simde_float64x1_t r = simde_vabs_f64(a);
simde_test_arm_neon_write_f64x1(2, a, SIMDE_TEST_VEC_POS_FIRST);
simde_test_arm_neon_write_f64x1(2, r, SIMDE_TEST_VEC_POS_LAST);
}
return 1;
#endif
}
static int
test_simde_vabs_s8 (SIMDE_MUNIT_TEST_ARGS) {
#if 1
static const struct {
int8_t a[8];
int8_t r[8];
@ -148,10 +272,23 @@ test_simde_vabs_s8 (SIMDE_MUNIT_TEST_ARGS) {
}
return 0;
#else
fputc('\n', stdout);
for (int i = 0 ; i < 8 ; i++) {
simde_int8x8_t a = simde_test_arm_neon_random_i8x8();
simde_int8x8_t r = simde_vabs_s8(a);
simde_test_arm_neon_write_i8x8(2, a, SIMDE_TEST_VEC_POS_FIRST);
simde_test_arm_neon_write_i8x8(2, r, SIMDE_TEST_VEC_POS_LAST);
}
return 1;
#endif
}
static int
test_simde_vabs_s16 (SIMDE_MUNIT_TEST_ARGS) {
#if 1
static const struct {
int16_t a[4];
int16_t r[4];
@ -182,10 +319,23 @@ test_simde_vabs_s16 (SIMDE_MUNIT_TEST_ARGS) {
}
return 0;
#else
fputc('\n', stdout);
for (int i = 0 ; i < 8 ; i++) {
simde_int16x4_t a = simde_test_arm_neon_random_i16x4();
simde_int16x4_t r = simde_vabs_s16(a);
simde_test_arm_neon_write_i16x4(2, a, SIMDE_TEST_VEC_POS_FIRST);
simde_test_arm_neon_write_i16x4(2, r, SIMDE_TEST_VEC_POS_LAST);
}
return 1;
#endif
}
static int
test_simde_vabs_s32 (SIMDE_MUNIT_TEST_ARGS) {
#if 1
static const struct {
int32_t a[2];
int32_t r[2];
@ -216,10 +366,23 @@ test_simde_vabs_s32 (SIMDE_MUNIT_TEST_ARGS) {
}
return 0;
#else
fputc('\n', stdout);
for (int i = 0 ; i < 8 ; i++) {
simde_int32x2_t a = simde_test_arm_neon_random_i32x2();
simde_int32x2_t r = simde_vabs_s32(a);
simde_test_arm_neon_write_i32x2(2, a, SIMDE_TEST_VEC_POS_FIRST);
simde_test_arm_neon_write_i32x2(2, r, SIMDE_TEST_VEC_POS_LAST);
}
return 1;
#endif
}
static int
test_simde_vabs_s64 (SIMDE_MUNIT_TEST_ARGS) {
#if 1
static const struct {
int64_t a[1];
int64_t r[1];
@ -250,10 +413,73 @@ test_simde_vabs_s64 (SIMDE_MUNIT_TEST_ARGS) {
}
return 0;
#else
fputc('\n', stdout);
for (int i = 0 ; i < 8 ; i++) {
simde_int64x1_t a = simde_test_arm_neon_random_i64x1();
simde_int64x1_t r = simde_vabs_s64(a);
simde_test_arm_neon_write_i64x1(2, a, SIMDE_TEST_VEC_POS_FIRST);
simde_test_arm_neon_write_i64x1(2, r, SIMDE_TEST_VEC_POS_LAST);
}
return 1;
#endif
}
static int
test_simde_vabsq_f16 (SIMDE_MUNIT_TEST_ARGS) {
#if 1
struct {
simde_float16_t a[8];
simde_float16_t r[8];
} test_vec[] = {
{ { SIMDE_FLOAT16_VALUE(-6.20), SIMDE_FLOAT16_VALUE(-7.50), SIMDE_FLOAT16_VALUE(-1.70), SIMDE_FLOAT16_VALUE(3.30), SIMDE_FLOAT16_VALUE(1.30), SIMDE_FLOAT16_VALUE(-9.30), SIMDE_FLOAT16_VALUE(7.80), SIMDE_FLOAT16_VALUE(3.00) },
{ SIMDE_FLOAT16_VALUE(6.20), SIMDE_FLOAT16_VALUE(7.50), SIMDE_FLOAT16_VALUE(1.70), SIMDE_FLOAT16_VALUE(3.30), SIMDE_FLOAT16_VALUE(1.30), SIMDE_FLOAT16_VALUE(9.30), SIMDE_FLOAT16_VALUE(7.80), SIMDE_FLOAT16_VALUE(3.00) } },
{ { SIMDE_FLOAT16_VALUE(-2.30), SIMDE_FLOAT16_VALUE(-5.70), SIMDE_FLOAT16_VALUE(6.60), SIMDE_FLOAT16_VALUE(-2.60), SIMDE_FLOAT16_VALUE(4.80), SIMDE_FLOAT16_VALUE(9.80), SIMDE_FLOAT16_VALUE(-4.70), SIMDE_FLOAT16_VALUE(8.30) },
{ SIMDE_FLOAT16_VALUE(2.30), SIMDE_FLOAT16_VALUE(5.70), SIMDE_FLOAT16_VALUE(6.60), SIMDE_FLOAT16_VALUE(2.60), SIMDE_FLOAT16_VALUE(4.80), SIMDE_FLOAT16_VALUE(9.80), SIMDE_FLOAT16_VALUE(4.70), SIMDE_FLOAT16_VALUE(8.30) } },
{ { SIMDE_FLOAT16_VALUE(-9.00), SIMDE_FLOAT16_VALUE(8.70), SIMDE_FLOAT16_VALUE(2.20), SIMDE_FLOAT16_VALUE(-3.60), SIMDE_FLOAT16_VALUE(-6.10), SIMDE_FLOAT16_VALUE(-5.40), SIMDE_FLOAT16_VALUE(0.40), SIMDE_FLOAT16_VALUE(1.70) },
{ SIMDE_FLOAT16_VALUE(9.00), SIMDE_FLOAT16_VALUE(8.70), SIMDE_FLOAT16_VALUE(2.20), SIMDE_FLOAT16_VALUE(3.60), SIMDE_FLOAT16_VALUE(6.10), SIMDE_FLOAT16_VALUE(5.40), SIMDE_FLOAT16_VALUE(0.40), SIMDE_FLOAT16_VALUE(1.70) } },
{ { SIMDE_FLOAT16_VALUE(-10.00), SIMDE_FLOAT16_VALUE(-3.20), SIMDE_FLOAT16_VALUE(3.90), SIMDE_FLOAT16_VALUE(-6.20), SIMDE_FLOAT16_VALUE(7.00), SIMDE_FLOAT16_VALUE(-9.40), SIMDE_FLOAT16_VALUE(0.70), SIMDE_FLOAT16_VALUE(-9.50) },
{ SIMDE_FLOAT16_VALUE(10.00), SIMDE_FLOAT16_VALUE(3.20), SIMDE_FLOAT16_VALUE(3.90), SIMDE_FLOAT16_VALUE(6.20), SIMDE_FLOAT16_VALUE(7.00), SIMDE_FLOAT16_VALUE(9.40), SIMDE_FLOAT16_VALUE(0.70), SIMDE_FLOAT16_VALUE(9.50) } },
{ { SIMDE_FLOAT16_VALUE(-2.80), SIMDE_FLOAT16_VALUE(1.20), SIMDE_FLOAT16_VALUE(-7.80), SIMDE_FLOAT16_VALUE(10.00), SIMDE_FLOAT16_VALUE(8.40), SIMDE_FLOAT16_VALUE(8.50), SIMDE_FLOAT16_VALUE(-8.80), SIMDE_FLOAT16_VALUE(-6.00) },
{ SIMDE_FLOAT16_VALUE(2.80), SIMDE_FLOAT16_VALUE(1.20), SIMDE_FLOAT16_VALUE(7.80), SIMDE_FLOAT16_VALUE(10.00), SIMDE_FLOAT16_VALUE(8.40), SIMDE_FLOAT16_VALUE(8.50), SIMDE_FLOAT16_VALUE(8.80), SIMDE_FLOAT16_VALUE(6.00) } },
{ { SIMDE_FLOAT16_VALUE(3.50), SIMDE_FLOAT16_VALUE(2.30), SIMDE_FLOAT16_VALUE(9.00), SIMDE_FLOAT16_VALUE(7.00), SIMDE_FLOAT16_VALUE(-5.10), SIMDE_FLOAT16_VALUE(-6.90), SIMDE_FLOAT16_VALUE(4.70), SIMDE_FLOAT16_VALUE(2.80) },
{ SIMDE_FLOAT16_VALUE(3.50), SIMDE_FLOAT16_VALUE(2.30), SIMDE_FLOAT16_VALUE(9.00), SIMDE_FLOAT16_VALUE(7.00), SIMDE_FLOAT16_VALUE(5.10), SIMDE_FLOAT16_VALUE(6.90), SIMDE_FLOAT16_VALUE(4.70), SIMDE_FLOAT16_VALUE(2.80) } },
{ { SIMDE_FLOAT16_VALUE(-2.60), SIMDE_FLOAT16_VALUE(-1.50), SIMDE_FLOAT16_VALUE(3.30), SIMDE_FLOAT16_VALUE(-7.00), SIMDE_FLOAT16_VALUE(9.80), SIMDE_FLOAT16_VALUE(-3.60), SIMDE_FLOAT16_VALUE(-2.80), SIMDE_FLOAT16_VALUE(4.30) },
{ SIMDE_FLOAT16_VALUE(2.60), SIMDE_FLOAT16_VALUE(1.50), SIMDE_FLOAT16_VALUE(3.30), SIMDE_FLOAT16_VALUE(7.00), SIMDE_FLOAT16_VALUE(9.80), SIMDE_FLOAT16_VALUE(3.60), SIMDE_FLOAT16_VALUE(2.80), SIMDE_FLOAT16_VALUE(4.30) } },
{ { SIMDE_FLOAT16_VALUE(-2.50), SIMDE_FLOAT16_VALUE(1.30), SIMDE_FLOAT16_VALUE(-7.20), SIMDE_FLOAT16_VALUE(-2.80), SIMDE_FLOAT16_VALUE(5.10), SIMDE_FLOAT16_VALUE(-4.80), SIMDE_FLOAT16_VALUE(-5.50), SIMDE_FLOAT16_VALUE(5.90) },
{ SIMDE_FLOAT16_VALUE(2.50), SIMDE_FLOAT16_VALUE(1.30), SIMDE_FLOAT16_VALUE(7.20), SIMDE_FLOAT16_VALUE(2.80), SIMDE_FLOAT16_VALUE(5.10), SIMDE_FLOAT16_VALUE(4.80), SIMDE_FLOAT16_VALUE(5.50), SIMDE_FLOAT16_VALUE(5.90) } },
{ { SIMDE_FLOAT16_VALUE(-3.60), SIMDE_FLOAT16_VALUE(9.20), SIMDE_FLOAT16_VALUE(3.50), SIMDE_FLOAT16_VALUE(10.00), SIMDE_FLOAT16_VALUE(-6.90), SIMDE_FLOAT16_VALUE(9.20), SIMDE_FLOAT16_VALUE(4.50), SIMDE_FLOAT16_VALUE(7.30) },
{ SIMDE_FLOAT16_VALUE(3.60), SIMDE_FLOAT16_VALUE(9.20), SIMDE_FLOAT16_VALUE(3.50), SIMDE_FLOAT16_VALUE(10.00), SIMDE_FLOAT16_VALUE(6.90), SIMDE_FLOAT16_VALUE(9.20), SIMDE_FLOAT16_VALUE(4.50), SIMDE_FLOAT16_VALUE(7.30) } },
{ { SIMDE_FLOAT16_VALUE(5.10), SIMDE_FLOAT16_VALUE(-7.80), SIMDE_FLOAT16_VALUE(-7.10), SIMDE_FLOAT16_VALUE(6.20), SIMDE_FLOAT16_VALUE(7.40), SIMDE_FLOAT16_VALUE(-3.90), SIMDE_FLOAT16_VALUE(7.50), SIMDE_FLOAT16_VALUE(0.00) },
{ SIMDE_FLOAT16_VALUE(5.10), SIMDE_FLOAT16_VALUE(7.80), SIMDE_FLOAT16_VALUE(7.10), SIMDE_FLOAT16_VALUE(6.20), SIMDE_FLOAT16_VALUE(7.40), SIMDE_FLOAT16_VALUE(3.90), SIMDE_FLOAT16_VALUE(7.50), SIMDE_FLOAT16_VALUE(0.00) } },
};
for (size_t i = 0 ; i < (sizeof(test_vec) / sizeof(test_vec[0])) ; i++) {
simde_float16x8_t a = simde_vld1q_f16(test_vec[i].a);
simde_float16x8_t r = simde_vabsq_f16(a);
simde_test_arm_neon_assert_equal_f16x8(r, simde_vld1q_f16(test_vec[i].r), INT_MAX);
}
return 0;
#else
fputc('\n', stdout);
for (int i = 0 ; i < 8 ; i++) {
simde_float16x8_t a = simde_test_arm_neon_random_f16x8(-100.0f, 100.0f);
simde_float16x8_t r = simde_vabsq_f16(a);
simde_test_arm_neon_write_f16x8(2, a, SIMDE_TEST_VEC_POS_FIRST);
simde_test_arm_neon_write_f16x8(2, r, SIMDE_TEST_VEC_POS_LAST);
}
return 1;
#endif
}
static int
test_simde_vabsq_f32 (SIMDE_MUNIT_TEST_ARGS) {
#if 1
static const struct {
simde_float32 a[4];
simde_float32 r[4];
@ -283,10 +509,23 @@ test_simde_vabsq_f32 (SIMDE_MUNIT_TEST_ARGS) {
}
return 0;
#else
fputc('\n', stdout);
for (int i = 0 ; i < 8 ; i++) {
simde_float32x4_t a = simde_test_arm_neon_random_f32x4(-1000.0f, 1000.0f);
simde_float32x4_t r = simde_vabsq_f32(a);
simde_test_arm_neon_write_f32x4(2, a, SIMDE_TEST_VEC_POS_FIRST);
simde_test_arm_neon_write_f32x4(2, r, SIMDE_TEST_VEC_POS_LAST);
}
return 1;
#endif
}
static int
test_simde_vabsq_f64 (SIMDE_MUNIT_TEST_ARGS) {
#if 1
static const struct {
simde_float64 a[2];
simde_float64 r[2];
@ -317,10 +556,23 @@ test_simde_vabsq_f64 (SIMDE_MUNIT_TEST_ARGS) {
}
return 0;
#else
fputc('\n', stdout);
for (int i = 0 ; i < 8 ; i++) {
simde_float64x2_t a = simde_test_arm_neon_random_f64x2(SIMDE_FLOAT64_C(-1000.0), SIMDE_FLOAT64_C(1000.0));
simde_float64x2_t r = simde_vabsq_f64(a);
simde_test_arm_neon_write_f64x2(2, a, SIMDE_TEST_VEC_POS_FIRST);
simde_test_arm_neon_write_f64x2(2, r, SIMDE_TEST_VEC_POS_LAST);
}
return 1;
#endif
}
static int
test_simde_vabsq_s8 (SIMDE_MUNIT_TEST_ARGS) {
#if 1
static const struct {
int8_t a[16];
int8_t r[16];
@ -367,10 +619,23 @@ test_simde_vabsq_s8 (SIMDE_MUNIT_TEST_ARGS) {
}
return 0;
#else
fputc('\n', stdout);
for (int i = 0 ; i < 8 ; i++) {
simde_int8x16_t a = simde_test_arm_neon_random_i8x16();
simde_int8x16_t r = simde_vabsq_s8(a);
simde_test_arm_neon_write_i8x16(2, a, SIMDE_TEST_VEC_POS_FIRST);
simde_test_arm_neon_write_i8x16(2, r, SIMDE_TEST_VEC_POS_LAST);
}
return 1;
#endif
}
static int
test_simde_vabsq_s16 (SIMDE_MUNIT_TEST_ARGS) {
#if 1
static const struct {
int16_t a[8];
int16_t r[8];
@ -401,10 +666,23 @@ test_simde_vabsq_s16 (SIMDE_MUNIT_TEST_ARGS) {
}
return 0;
#else
fputc('\n', stdout);
for (int i = 0 ; i < 8 ; i++) {
simde_int16x8_t a = simde_test_arm_neon_random_i16x8();
simde_int16x8_t r = simde_vabsq_s16(a);
simde_test_arm_neon_write_i16x8(2, a, SIMDE_TEST_VEC_POS_FIRST);
simde_test_arm_neon_write_i16x8(2, r, SIMDE_TEST_VEC_POS_LAST);
}
return 1;
#endif
}
static int
test_simde_vabsq_s32 (SIMDE_MUNIT_TEST_ARGS) {
#if 1
static const struct {
int32_t a[4];
int32_t r[4];
@ -434,10 +712,23 @@ test_simde_vabsq_s32 (SIMDE_MUNIT_TEST_ARGS) {
}
return 0;
#else
fputc('\n', stdout);
for (int i = 0 ; i < 8 ; i++) {
simde_int32x4_t a = simde_test_arm_neon_random_i32x4();
simde_int32x4_t r = simde_vabsq_s32(a);
simde_test_arm_neon_write_i32x4(2, a, SIMDE_TEST_VEC_POS_FIRST);
simde_test_arm_neon_write_i32x4(2, r, SIMDE_TEST_VEC_POS_LAST);
}
return 1;
#endif
}
static int
test_simde_vabsq_s64 (SIMDE_MUNIT_TEST_ARGS) {
#if 1
static const struct {
int64_t a[2];
int64_t r[2];
@ -467,11 +758,25 @@ test_simde_vabsq_s64 (SIMDE_MUNIT_TEST_ARGS) {
}
return 0;
#else
fputc('\n', stdout);
for (int i = 0 ; i < 8 ; i++) {
simde_int64x2_t a = simde_test_arm_neon_random_i64x2();
simde_int64x2_t r = simde_vabsq_s64(a);
simde_test_arm_neon_write_i64x2(2, a, SIMDE_TEST_VEC_POS_FIRST);
simde_test_arm_neon_write_i64x2(2, r, SIMDE_TEST_VEC_POS_LAST);
}
return 1;
#endif
}
SIMDE_TEST_FUNC_LIST_BEGIN
SIMDE_TEST_FUNC_LIST_ENTRY(vabsh_f16)
SIMDE_TEST_FUNC_LIST_ENTRY(vabsd_s64)
SIMDE_TEST_FUNC_LIST_ENTRY(vabs_f16)
SIMDE_TEST_FUNC_LIST_ENTRY(vabs_f32)
SIMDE_TEST_FUNC_LIST_ENTRY(vabs_f64)
SIMDE_TEST_FUNC_LIST_ENTRY(vabs_s8)
@ -479,6 +784,7 @@ SIMDE_TEST_FUNC_LIST_ENTRY(vabs_s16)
SIMDE_TEST_FUNC_LIST_ENTRY(vabs_s32)
SIMDE_TEST_FUNC_LIST_ENTRY(vabs_s64)
SIMDE_TEST_FUNC_LIST_ENTRY(vabsq_f16)
SIMDE_TEST_FUNC_LIST_ENTRY(vabsq_f32)
SIMDE_TEST_FUNC_LIST_ENTRY(vabsq_f64)
SIMDE_TEST_FUNC_LIST_ENTRY(vabsq_s8)