Update googletest to 1.18.0 and SIMDe to 0.8.2.
Googletest 1.18 asks for CMake 3.13 or newer, so configuring the tests no longer warns that CMake compatibility below 3.10 is deprecated. Co-authored-by: Cursor <cursoragent@cursor.com>
This commit is contained in:
parent
e4e666f459
commit
3f10e05176
912 changed files with 224964 additions and 11502 deletions
277
thirdparty/simde/test/arm/neon/dot_lane.c
vendored
277
thirdparty/simde/test/arm/neon/dot_lane.c
vendored
|
|
@ -732,6 +732,278 @@ test_simde_vdotq_lane_s32 (SIMDE_MUNIT_TEST_ARGS) {
|
|||
#endif
|
||||
}
|
||||
|
||||
static int
|
||||
test_simde_vbfdot_lane_f32 (SIMDE_MUNIT_TEST_ARGS) {
|
||||
#if 1
|
||||
struct {
|
||||
simde_float32_t r_[2];
|
||||
simde_bfloat16_t a[4];
|
||||
simde_bfloat16_t b[4];
|
||||
const int lane;
|
||||
simde_float32_t r[2];
|
||||
} test_vec[] = {
|
||||
{ { SIMDE_FLOAT32_C( -149.82), SIMDE_FLOAT32_C( 786.97) },
|
||||
{ SIMDE_BFLOAT16_VALUE( 91.00), SIMDE_BFLOAT16_VALUE( -20.75), SIMDE_BFLOAT16_VALUE( 39.50), SIMDE_BFLOAT16_VALUE( -76.50) },
|
||||
{ SIMDE_BFLOAT16_VALUE( 11.75), SIMDE_BFLOAT16_VALUE( 81.00), SIMDE_BFLOAT16_VALUE( -1.40), SIMDE_BFLOAT16_VALUE( -54.25) },
|
||||
INT32_C( 0),
|
||||
{ SIMDE_FLOAT32_C( -761.32), SIMDE_FLOAT32_C( -4945.41) } },
|
||||
{ { SIMDE_FLOAT32_C( -27.31), SIMDE_FLOAT32_C( 520.43) },
|
||||
{ SIMDE_BFLOAT16_VALUE( -23.12), SIMDE_BFLOAT16_VALUE( -58.00), SIMDE_BFLOAT16_VALUE( 19.50), SIMDE_BFLOAT16_VALUE( 62.00) },
|
||||
{ SIMDE_BFLOAT16_VALUE( 9.44), SIMDE_BFLOAT16_VALUE( -14.56), SIMDE_BFLOAT16_VALUE( -38.50), SIMDE_BFLOAT16_VALUE( -84.00) },
|
||||
INT32_C( 1),
|
||||
{ SIMDE_FLOAT32_C( 5735.00), SIMDE_FLOAT32_C( -5438.32) } },
|
||||
{ { SIMDE_FLOAT32_C( -132.86), SIMDE_FLOAT32_C( -52.12) },
|
||||
{ SIMDE_BFLOAT16_VALUE( -8.50), SIMDE_BFLOAT16_VALUE( -9.56), SIMDE_BFLOAT16_VALUE( -36.75), SIMDE_BFLOAT16_VALUE( 11.19) },
|
||||
{ SIMDE_BFLOAT16_VALUE( 61.50), SIMDE_BFLOAT16_VALUE( -45.75), SIMDE_BFLOAT16_VALUE( -15.81), SIMDE_BFLOAT16_VALUE( -53.25) },
|
||||
INT32_C( 1),
|
||||
{ SIMDE_FLOAT32_C( 510.75), SIMDE_FLOAT32_C( -66.74) } },
|
||||
{ { SIMDE_FLOAT32_C( -246.78), SIMDE_FLOAT32_C( 258.80) },
|
||||
{ SIMDE_BFLOAT16_VALUE( 72.50), SIMDE_BFLOAT16_VALUE( -1.24), SIMDE_BFLOAT16_VALUE( -62.25), SIMDE_BFLOAT16_VALUE( 53.25) },
|
||||
{ SIMDE_BFLOAT16_VALUE( 97.50), SIMDE_BFLOAT16_VALUE( -16.62), SIMDE_BFLOAT16_VALUE( 81.50), SIMDE_BFLOAT16_VALUE( -5.38) },
|
||||
INT32_C( 0),
|
||||
{ SIMDE_FLOAT32_C( 6842.62), SIMDE_FLOAT32_C( -6695.86) } },
|
||||
};
|
||||
|
||||
for (size_t i = 0 ; i < (sizeof(test_vec) / sizeof(test_vec[0])) ; i++) {
|
||||
simde_float32x2_t r_ = simde_vld1_f32(test_vec[i].r_);
|
||||
simde_bfloat16x4_t a = simde_vld1_bf16(test_vec[i].a);
|
||||
simde_bfloat16x4_t b = simde_vld1_bf16(test_vec[i].b);
|
||||
simde_float32x2_t r;
|
||||
|
||||
SIMDE_CONSTIFY_2_(simde_vbfdot_lane_f32, r, (HEDLEY_UNREACHABLE(), r), test_vec[i].lane, r_, a, b);
|
||||
|
||||
simde_test_arm_neon_assert_equal_f32x2(r, simde_vld1_f32(test_vec[i].r), 1);
|
||||
}
|
||||
|
||||
return 0;
|
||||
#else
|
||||
fputc('\n', stdout);
|
||||
for (int i = 0 ; i < 4 ; i++) {
|
||||
simde_float32x2_t r_ = simde_test_arm_neon_random_f32x2(-1000.0, 1000.0);
|
||||
simde_bfloat16x4_t a = simde_test_arm_neon_random_bf16x4(SIMDE_BFLOAT16_VALUE(-100.0), SIMDE_BFLOAT16_VALUE(100.0));
|
||||
simde_bfloat16x4_t b = simde_test_arm_neon_random_bf16x4(SIMDE_BFLOAT16_VALUE(-100.0), SIMDE_BFLOAT16_VALUE(100.0));
|
||||
int lane = simde_test_codegen_random_i8() & 1;
|
||||
simde_float32x2_t r;
|
||||
SIMDE_CONSTIFY_2_(simde_vbfdot_lane_f32, r, (HEDLEY_UNREACHABLE(), simde_vdup_n_f32(0.0f)), lane, r_, a, b);
|
||||
|
||||
simde_test_arm_neon_write_f32x2(2, r_, SIMDE_TEST_VEC_POS_FIRST);
|
||||
simde_test_arm_neon_write_bf16x4(2, a, SIMDE_TEST_VEC_POS_MIDDLE);
|
||||
simde_test_arm_neon_write_bf16x4(2, b, SIMDE_TEST_VEC_POS_MIDDLE);
|
||||
simde_test_codegen_write_i32(2, lane, SIMDE_TEST_VEC_POS_MIDDLE);
|
||||
simde_test_arm_neon_write_f32x2(2, r, SIMDE_TEST_VEC_POS_LAST);
|
||||
}
|
||||
return 1;
|
||||
#endif
|
||||
}
|
||||
|
||||
static int
|
||||
test_simde_vbfdotq_lane_f32 (SIMDE_MUNIT_TEST_ARGS) {
|
||||
#if 1
|
||||
struct {
|
||||
simde_float32_t r_[4];
|
||||
simde_bfloat16_t a[8];
|
||||
simde_bfloat16_t b[4];
|
||||
const int lane;
|
||||
simde_float32_t r[4];
|
||||
} test_vec[] = {
|
||||
{ { SIMDE_FLOAT32_C( -716.46), SIMDE_FLOAT32_C( 325.35), SIMDE_FLOAT32_C( -139.56), SIMDE_FLOAT32_C( 137.36) },
|
||||
{ SIMDE_BFLOAT16_VALUE( -91.50), SIMDE_BFLOAT16_VALUE( 14.94), SIMDE_BFLOAT16_VALUE( 1.34), SIMDE_BFLOAT16_VALUE( -28.50),
|
||||
SIMDE_BFLOAT16_VALUE( 99.50), SIMDE_BFLOAT16_VALUE( -2.69), SIMDE_BFLOAT16_VALUE( -48.50), SIMDE_BFLOAT16_VALUE( 5.62) },
|
||||
{ SIMDE_BFLOAT16_VALUE( -39.75), SIMDE_BFLOAT16_VALUE( -89.00), SIMDE_BFLOAT16_VALUE( 20.75), SIMDE_BFLOAT16_VALUE( -19.00) },
|
||||
INT32_C( 0),
|
||||
{ SIMDE_FLOAT32_C( 1591.23), SIMDE_FLOAT32_C( 2808.44), SIMDE_FLOAT32_C( -3855.50), SIMDE_FLOAT32_C( 1564.61) } },
|
||||
{ { SIMDE_FLOAT32_C( -555.68), SIMDE_FLOAT32_C( -136.93), SIMDE_FLOAT32_C( -701.24), SIMDE_FLOAT32_C( 181.13) },
|
||||
{ SIMDE_BFLOAT16_VALUE( 0.85), SIMDE_BFLOAT16_VALUE( -36.75), SIMDE_BFLOAT16_VALUE( 43.50), SIMDE_BFLOAT16_VALUE( 38.50),
|
||||
SIMDE_BFLOAT16_VALUE( -7.00), SIMDE_BFLOAT16_VALUE( 75.00), SIMDE_BFLOAT16_VALUE( -23.25), SIMDE_BFLOAT16_VALUE( -58.00) },
|
||||
{ SIMDE_BFLOAT16_VALUE( -59.75), SIMDE_BFLOAT16_VALUE( -74.50), SIMDE_BFLOAT16_VALUE( -29.75), SIMDE_BFLOAT16_VALUE( 72.50) },
|
||||
INT32_C( 0),
|
||||
{ SIMDE_FLOAT32_C( 2131.31), SIMDE_FLOAT32_C( -5604.30), SIMDE_FLOAT32_C( -5870.49), SIMDE_FLOAT32_C( 5891.32) } },
|
||||
{ { SIMDE_FLOAT32_C( 839.64), SIMDE_FLOAT32_C( 812.75), SIMDE_FLOAT32_C( -737.26), SIMDE_FLOAT32_C( -146.98) },
|
||||
{ SIMDE_BFLOAT16_VALUE( -47.25), SIMDE_BFLOAT16_VALUE( -74.00), SIMDE_BFLOAT16_VALUE( 82.50), SIMDE_BFLOAT16_VALUE( 4.28),
|
||||
SIMDE_BFLOAT16_VALUE( 31.50), SIMDE_BFLOAT16_VALUE( -57.00), SIMDE_BFLOAT16_VALUE( 15.19), SIMDE_BFLOAT16_VALUE( -47.75) },
|
||||
{ SIMDE_BFLOAT16_VALUE( 24.00), SIMDE_BFLOAT16_VALUE( 74.50), SIMDE_BFLOAT16_VALUE( -3.28), SIMDE_BFLOAT16_VALUE( -89.50) },
|
||||
INT32_C( 0),
|
||||
{ SIMDE_FLOAT32_C( -5807.36), SIMDE_FLOAT32_C( 3111.70), SIMDE_FLOAT32_C( -4227.76), SIMDE_FLOAT32_C( -3339.85) } },
|
||||
{ { SIMDE_FLOAT32_C( -851.72), SIMDE_FLOAT32_C( 111.17), SIMDE_FLOAT32_C( -320.42), SIMDE_FLOAT32_C( 583.32) },
|
||||
{ SIMDE_BFLOAT16_VALUE( -50.25), SIMDE_BFLOAT16_VALUE( 61.00), SIMDE_BFLOAT16_VALUE( 33.25), SIMDE_BFLOAT16_VALUE( 26.38),
|
||||
SIMDE_BFLOAT16_VALUE( -97.00), SIMDE_BFLOAT16_VALUE( 73.50), SIMDE_BFLOAT16_VALUE( 51.75), SIMDE_BFLOAT16_VALUE( -26.88) },
|
||||
{ SIMDE_BFLOAT16_VALUE( 46.25), SIMDE_BFLOAT16_VALUE( -37.00), SIMDE_BFLOAT16_VALUE( -43.00), SIMDE_BFLOAT16_VALUE( 27.38) },
|
||||
INT32_C( 0),
|
||||
{ SIMDE_FLOAT32_C( -5432.78), SIMDE_FLOAT32_C( 673.11), SIMDE_FLOAT32_C( -7526.17), SIMDE_FLOAT32_C( 3971.13) } },
|
||||
};
|
||||
|
||||
for (size_t i = 0 ; i < (sizeof(test_vec) / sizeof(test_vec[0])) ; i++) {
|
||||
simde_float32x4_t r_ = simde_vld1q_f32(test_vec[i].r_);
|
||||
simde_bfloat16x8_t a = simde_vld1q_bf16(test_vec[i].a);
|
||||
simde_bfloat16x4_t b = simde_vld1_bf16(test_vec[i].b);
|
||||
simde_float32x4_t r;
|
||||
|
||||
SIMDE_CONSTIFY_2_(simde_vbfdotq_lane_f32, r, (HEDLEY_UNREACHABLE(), r), test_vec[i].lane, r_, a, b);
|
||||
|
||||
simde_test_arm_neon_assert_equal_f32x4(r, simde_vld1q_f32(test_vec[i].r), 1);
|
||||
}
|
||||
|
||||
return 0;
|
||||
#else
|
||||
fputc('\n', stdout);
|
||||
for (int i = 0 ; i < 4 ; i++) {
|
||||
simde_float32x4_t r_ = simde_test_arm_neon_random_f32x4(-1000.0, 1000.0);
|
||||
simde_bfloat16x8_t a = simde_test_arm_neon_random_bf16x8(SIMDE_BFLOAT16_VALUE(-100.0), SIMDE_BFLOAT16_VALUE(100.0));
|
||||
simde_bfloat16x4_t b = simde_test_arm_neon_random_bf16x4(SIMDE_BFLOAT16_VALUE(-100.0), SIMDE_BFLOAT16_VALUE(100.0));
|
||||
int lane = simde_test_codegen_random_i8() & 1;
|
||||
simde_float32x4_t r;
|
||||
SIMDE_CONSTIFY_2_(simde_vbfdotq_lane_f32, r, (HEDLEY_UNREACHABLE(), simde_vdupq_n_f32(0.0f)), lane, r_, a, b);
|
||||
|
||||
simde_test_arm_neon_write_f32x4(2, r_, SIMDE_TEST_VEC_POS_FIRST);
|
||||
simde_test_arm_neon_write_bf16x8(2, a, SIMDE_TEST_VEC_POS_MIDDLE);
|
||||
simde_test_arm_neon_write_bf16x4(2, b, SIMDE_TEST_VEC_POS_MIDDLE);
|
||||
simde_test_codegen_write_i32(2, lane, SIMDE_TEST_VEC_POS_MIDDLE);
|
||||
simde_test_arm_neon_write_f32x4(2, r, SIMDE_TEST_VEC_POS_LAST);
|
||||
}
|
||||
return 1;
|
||||
#endif
|
||||
}
|
||||
|
||||
static int
|
||||
test_simde_vbfdot_laneq_f32 (SIMDE_MUNIT_TEST_ARGS) {
|
||||
#if 1
|
||||
struct {
|
||||
simde_float32_t r_[2];
|
||||
simde_bfloat16_t a[4];
|
||||
simde_bfloat16_t b[8];
|
||||
const int lane;
|
||||
simde_float32_t r[2];
|
||||
} test_vec[] = {
|
||||
{ { SIMDE_FLOAT32_C( 587.89), SIMDE_FLOAT32_C( 435.61) },
|
||||
{ SIMDE_BFLOAT16_VALUE( -74.00), SIMDE_BFLOAT16_VALUE( -43.50), SIMDE_BFLOAT16_VALUE( 57.75), SIMDE_BFLOAT16_VALUE( -15.00) },
|
||||
{ SIMDE_BFLOAT16_VALUE( 46.75), SIMDE_BFLOAT16_VALUE( -85.00), SIMDE_BFLOAT16_VALUE( -13.88), SIMDE_BFLOAT16_VALUE( -56.25),
|
||||
SIMDE_BFLOAT16_VALUE( -48.25), SIMDE_BFLOAT16_VALUE( -97.50), SIMDE_BFLOAT16_VALUE( -33.50), SIMDE_BFLOAT16_VALUE( -22.38) },
|
||||
INT32_C( 1),
|
||||
{ SIMDE_FLOAT32_C( 4061.52), SIMDE_FLOAT32_C( 478.08) } },
|
||||
{ { SIMDE_FLOAT32_C( 950.19), SIMDE_FLOAT32_C( 622.60) },
|
||||
{ SIMDE_BFLOAT16_VALUE( 29.75), SIMDE_BFLOAT16_VALUE( -47.50), SIMDE_BFLOAT16_VALUE( -95.00), SIMDE_BFLOAT16_VALUE( 57.75) },
|
||||
{ SIMDE_BFLOAT16_VALUE( -76.50), SIMDE_BFLOAT16_VALUE( 10.38), SIMDE_BFLOAT16_VALUE( -58.75), SIMDE_BFLOAT16_VALUE( 9.19),
|
||||
SIMDE_BFLOAT16_VALUE( -18.62), SIMDE_BFLOAT16_VALUE( -96.50), SIMDE_BFLOAT16_VALUE( 70.00), SIMDE_BFLOAT16_VALUE( 79.00) },
|
||||
INT32_C( 0),
|
||||
{ SIMDE_FLOAT32_C( -1818.50), SIMDE_FLOAT32_C( 8489.26) } },
|
||||
{ { SIMDE_FLOAT32_C( -621.37), SIMDE_FLOAT32_C( 377.94) },
|
||||
{ SIMDE_BFLOAT16_VALUE( 81.50), SIMDE_BFLOAT16_VALUE( -36.00), SIMDE_BFLOAT16_VALUE( 94.50), SIMDE_BFLOAT16_VALUE( 39.25) },
|
||||
{ SIMDE_BFLOAT16_VALUE( 49.00), SIMDE_BFLOAT16_VALUE( 41.25), SIMDE_BFLOAT16_VALUE( 54.00), SIMDE_BFLOAT16_VALUE( -65.00),
|
||||
SIMDE_BFLOAT16_VALUE( 85.00), SIMDE_BFLOAT16_VALUE( -94.50), SIMDE_BFLOAT16_VALUE( -62.50), SIMDE_BFLOAT16_VALUE( -48.75) },
|
||||
INT32_C( 1),
|
||||
{ SIMDE_FLOAT32_C( 6119.63), SIMDE_FLOAT32_C( 2929.69) } },
|
||||
{ { SIMDE_FLOAT32_C( -384.17), SIMDE_FLOAT32_C( -536.21) },
|
||||
{ SIMDE_BFLOAT16_VALUE( -54.50), SIMDE_BFLOAT16_VALUE( 91.50), SIMDE_BFLOAT16_VALUE( -1.21), SIMDE_BFLOAT16_VALUE( -49.25) },
|
||||
{ SIMDE_BFLOAT16_VALUE( 49.25), SIMDE_BFLOAT16_VALUE( 22.00), SIMDE_BFLOAT16_VALUE( 61.25), SIMDE_BFLOAT16_VALUE( 90.50),
|
||||
SIMDE_BFLOAT16_VALUE( -69.00), SIMDE_BFLOAT16_VALUE( -57.50), SIMDE_BFLOAT16_VALUE( 94.00), SIMDE_BFLOAT16_VALUE( -98.50) },
|
||||
INT32_C( 2),
|
||||
{ SIMDE_FLOAT32_C( -1884.92), SIMDE_FLOAT32_C( 2379.22) } },
|
||||
};
|
||||
|
||||
for (size_t i = 0 ; i < (sizeof(test_vec) / sizeof(test_vec[0])) ; i++) {
|
||||
simde_float32x2_t r_ = simde_vld1_f32(test_vec[i].r_);
|
||||
simde_bfloat16x4_t a = simde_vld1_bf16(test_vec[i].a);
|
||||
simde_bfloat16x8_t b = simde_vld1q_bf16(test_vec[i].b);
|
||||
simde_float32x2_t r;
|
||||
|
||||
SIMDE_CONSTIFY_4_(simde_vbfdot_laneq_f32, r, (HEDLEY_UNREACHABLE(), r), test_vec[i].lane, r_, a, b);
|
||||
|
||||
simde_test_arm_neon_assert_equal_f32x2(r, simde_vld1_f32(test_vec[i].r), 1);
|
||||
}
|
||||
|
||||
return 0;
|
||||
#else
|
||||
fputc('\n', stdout);
|
||||
for (int i = 0 ; i < 4 ; i++) {
|
||||
simde_float32x2_t r_ = simde_test_arm_neon_random_f32x2(-1000.0, 1000.0);
|
||||
simde_bfloat16x4_t a = simde_test_arm_neon_random_bf16x4(SIMDE_BFLOAT16_VALUE(-100.0), SIMDE_BFLOAT16_VALUE(100.0));
|
||||
simde_bfloat16x8_t b = simde_test_arm_neon_random_bf16x8(SIMDE_BFLOAT16_VALUE(-100.0), SIMDE_BFLOAT16_VALUE(100.0));
|
||||
int lane = simde_test_codegen_random_i8() & 3;
|
||||
simde_float32x2_t r;
|
||||
SIMDE_CONSTIFY_4_(simde_vbfdot_laneq_f32, r, (HEDLEY_UNREACHABLE(), simde_vdup_n_f32(0.0f)), lane, r_, a, b);
|
||||
|
||||
simde_test_arm_neon_write_f32x2(2, r_, SIMDE_TEST_VEC_POS_FIRST);
|
||||
simde_test_arm_neon_write_bf16x4(2, a, SIMDE_TEST_VEC_POS_MIDDLE);
|
||||
simde_test_arm_neon_write_bf16x8(2, b, SIMDE_TEST_VEC_POS_MIDDLE);
|
||||
simde_test_codegen_write_i32(2, lane, SIMDE_TEST_VEC_POS_MIDDLE);
|
||||
simde_test_arm_neon_write_f32x2(2, r, SIMDE_TEST_VEC_POS_LAST);
|
||||
}
|
||||
return 1;
|
||||
#endif
|
||||
}
|
||||
|
||||
static int
|
||||
test_simde_vbfdotq_laneq_f32 (SIMDE_MUNIT_TEST_ARGS) {
|
||||
#if 1
|
||||
struct {
|
||||
simde_float32_t r_[4];
|
||||
simde_bfloat16_t a[8];
|
||||
simde_bfloat16_t b[8];
|
||||
const int lane;
|
||||
simde_float32_t r[4];
|
||||
} test_vec[] = {
|
||||
{ { SIMDE_FLOAT32_C( 227.56), SIMDE_FLOAT32_C( 208.46), SIMDE_FLOAT32_C( 840.03), SIMDE_FLOAT32_C( 133.04) },
|
||||
{ SIMDE_BFLOAT16_VALUE( -86.50), SIMDE_BFLOAT16_VALUE( 76.50), SIMDE_BFLOAT16_VALUE( 32.25), SIMDE_BFLOAT16_VALUE( 88.00),
|
||||
SIMDE_BFLOAT16_VALUE( 0.74), SIMDE_BFLOAT16_VALUE( 12.81), SIMDE_BFLOAT16_VALUE( 55.25), SIMDE_BFLOAT16_VALUE( 80.50) },
|
||||
{ SIMDE_BFLOAT16_VALUE( -37.50), SIMDE_BFLOAT16_VALUE( -28.50), SIMDE_BFLOAT16_VALUE( 6.06), SIMDE_BFLOAT16_VALUE( -3.45),
|
||||
SIMDE_BFLOAT16_VALUE( -88.00), SIMDE_BFLOAT16_VALUE( 61.50), SIMDE_BFLOAT16_VALUE( -89.50), SIMDE_BFLOAT16_VALUE( -29.25) },
|
||||
INT32_C( 2),
|
||||
{ SIMDE_FLOAT32_C( 12544.31), SIMDE_FLOAT32_C( 2782.46), SIMDE_FLOAT32_C( 1563.03), SIMDE_FLOAT32_C( 221.79) } },
|
||||
{ { SIMDE_FLOAT32_C( -671.68), SIMDE_FLOAT32_C( 569.68), SIMDE_FLOAT32_C( -658.75), SIMDE_FLOAT32_C( -929.73) },
|
||||
{ SIMDE_BFLOAT16_VALUE( -9.44), SIMDE_BFLOAT16_VALUE( -41.75), SIMDE_BFLOAT16_VALUE( -50.50), SIMDE_BFLOAT16_VALUE( 38.50),
|
||||
SIMDE_BFLOAT16_VALUE( -83.00), SIMDE_BFLOAT16_VALUE( 70.00), SIMDE_BFLOAT16_VALUE( -38.50), SIMDE_BFLOAT16_VALUE( 37.75) },
|
||||
{ SIMDE_BFLOAT16_VALUE( 54.00), SIMDE_BFLOAT16_VALUE( 74.50), SIMDE_BFLOAT16_VALUE( 51.25), SIMDE_BFLOAT16_VALUE( 30.50),
|
||||
SIMDE_BFLOAT16_VALUE( 7.00), SIMDE_BFLOAT16_VALUE( 39.00), SIMDE_BFLOAT16_VALUE( -68.50), SIMDE_BFLOAT16_VALUE( -80.00) },
|
||||
INT32_C( 1),
|
||||
{ SIMDE_FLOAT32_C( -2428.73), SIMDE_FLOAT32_C( -844.20), SIMDE_FLOAT32_C( -2777.50), SIMDE_FLOAT32_C( -1751.48) } },
|
||||
{ { SIMDE_FLOAT32_C( -883.22), SIMDE_FLOAT32_C( -177.38), SIMDE_FLOAT32_C( 657.38), SIMDE_FLOAT32_C( 177.35) },
|
||||
{ SIMDE_BFLOAT16_VALUE( 79.00), SIMDE_BFLOAT16_VALUE( 78.00), SIMDE_BFLOAT16_VALUE( -20.75), SIMDE_BFLOAT16_VALUE( 89.50),
|
||||
SIMDE_BFLOAT16_VALUE( -51.25), SIMDE_BFLOAT16_VALUE( 40.50), SIMDE_BFLOAT16_VALUE( -78.00), SIMDE_BFLOAT16_VALUE( -94.50) },
|
||||
{ SIMDE_BFLOAT16_VALUE( 74.50), SIMDE_BFLOAT16_VALUE( -71.00), SIMDE_BFLOAT16_VALUE( -3.77), SIMDE_BFLOAT16_VALUE( -67.00),
|
||||
SIMDE_BFLOAT16_VALUE( -21.38), SIMDE_BFLOAT16_VALUE( -65.00), SIMDE_BFLOAT16_VALUE( -50.00), SIMDE_BFLOAT16_VALUE( -51.25) },
|
||||
INT32_C( 2),
|
||||
{ SIMDE_FLOAT32_C( -7641.84), SIMDE_FLOAT32_C( -5551.35), SIMDE_FLOAT32_C( -879.65), SIMDE_FLOAT32_C( 7987.10) } },
|
||||
{ { SIMDE_FLOAT32_C( 876.90), SIMDE_FLOAT32_C( -971.55), SIMDE_FLOAT32_C( -290.86), SIMDE_FLOAT32_C( 389.10) },
|
||||
{ SIMDE_BFLOAT16_VALUE( 33.50), SIMDE_BFLOAT16_VALUE( 78.00), SIMDE_BFLOAT16_VALUE( -22.12), SIMDE_BFLOAT16_VALUE( 64.50),
|
||||
SIMDE_BFLOAT16_VALUE( 97.50), SIMDE_BFLOAT16_VALUE( 72.00), SIMDE_BFLOAT16_VALUE( 76.50), SIMDE_BFLOAT16_VALUE( -20.00) },
|
||||
{ SIMDE_BFLOAT16_VALUE( 37.75), SIMDE_BFLOAT16_VALUE( -5.91), SIMDE_BFLOAT16_VALUE( -41.25), SIMDE_BFLOAT16_VALUE( 15.75),
|
||||
SIMDE_BFLOAT16_VALUE( 73.50), SIMDE_BFLOAT16_VALUE( -52.00), SIMDE_BFLOAT16_VALUE( 64.50), SIMDE_BFLOAT16_VALUE( 13.88) },
|
||||
INT32_C( 0),
|
||||
{ SIMDE_FLOAT32_C( 1680.84), SIMDE_FLOAT32_C( -2187.72), SIMDE_FLOAT32_C( 2964.52), SIMDE_FLOAT32_C( 3395.10) } },
|
||||
};
|
||||
|
||||
for (size_t i = 0 ; i < (sizeof(test_vec) / sizeof(test_vec[0])) ; i++) {
|
||||
simde_float32x4_t r_ = simde_vld1q_f32(test_vec[i].r_);
|
||||
simde_bfloat16x8_t a = simde_vld1q_bf16(test_vec[i].a);
|
||||
simde_bfloat16x8_t b = simde_vld1q_bf16(test_vec[i].b);
|
||||
simde_float32x4_t r;
|
||||
|
||||
SIMDE_CONSTIFY_4_(simde_vbfdotq_laneq_f32, r, (HEDLEY_UNREACHABLE(), r), test_vec[i].lane, r_, a, b);
|
||||
|
||||
simde_test_arm_neon_assert_equal_f32x4(r, simde_vld1q_f32(test_vec[i].r), 1);
|
||||
}
|
||||
|
||||
return 0;
|
||||
#else
|
||||
fputc('\n', stdout);
|
||||
for (int i = 0 ; i < 4 ; i++) {
|
||||
simde_float32x4_t r_ = simde_test_arm_neon_random_f32x4(-1000.0, 1000.0);
|
||||
simde_bfloat16x8_t a = simde_test_arm_neon_random_bf16x8(SIMDE_BFLOAT16_VALUE(-100.0), SIMDE_BFLOAT16_VALUE(100.0));
|
||||
simde_bfloat16x8_t b = simde_test_arm_neon_random_bf16x8(SIMDE_BFLOAT16_VALUE(-100.0), SIMDE_BFLOAT16_VALUE(100.0));
|
||||
int lane = simde_test_codegen_random_i8() & 3;
|
||||
simde_float32x4_t r;
|
||||
SIMDE_CONSTIFY_4_(simde_vbfdotq_laneq_f32, r, (HEDLEY_UNREACHABLE(), simde_vdupq_n_f32(0.0f)), lane, r_, a, b);
|
||||
|
||||
simde_test_arm_neon_write_f32x4(2, r_, SIMDE_TEST_VEC_POS_FIRST);
|
||||
simde_test_arm_neon_write_bf16x8(2, a, SIMDE_TEST_VEC_POS_MIDDLE);
|
||||
simde_test_arm_neon_write_bf16x8(2, b, SIMDE_TEST_VEC_POS_MIDDLE);
|
||||
simde_test_codegen_write_i32(2, lane, SIMDE_TEST_VEC_POS_MIDDLE);
|
||||
simde_test_arm_neon_write_f32x4(2, r, SIMDE_TEST_VEC_POS_LAST);
|
||||
}
|
||||
return 1;
|
||||
#endif
|
||||
}
|
||||
|
||||
SIMDE_TEST_FUNC_LIST_BEGIN
|
||||
SIMDE_TEST_FUNC_LIST_ENTRY(vdot_lane_s32)
|
||||
SIMDE_TEST_FUNC_LIST_ENTRY(vdot_lane_u32)
|
||||
|
|
@ -744,6 +1016,11 @@ SIMDE_TEST_FUNC_LIST_ENTRY(vdotq_laneq_s32)
|
|||
|
||||
SIMDE_TEST_FUNC_LIST_ENTRY(vdotq_lane_u32)
|
||||
SIMDE_TEST_FUNC_LIST_ENTRY(vdotq_lane_s32)
|
||||
|
||||
SIMDE_TEST_FUNC_LIST_ENTRY(vbfdot_lane_f32)
|
||||
SIMDE_TEST_FUNC_LIST_ENTRY(vbfdotq_lane_f32)
|
||||
SIMDE_TEST_FUNC_LIST_ENTRY(vbfdot_laneq_f32)
|
||||
SIMDE_TEST_FUNC_LIST_ENTRY(vbfdotq_laneq_f32)
|
||||
SIMDE_TEST_FUNC_LIST_END
|
||||
|
||||
#include "test-neon-footer.h"
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue