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Update googletest to 1.18.0 and SIMDe to 0.8.2.

Browse source 
Googletest 1.18 asks for CMake 3.13 or newer, so configuring the tests no longer warns that CMake compatibility below 3.10 is deprecated.

Co-authored-by: Cursor <cursoragent@cursor.com>
This commit is contained in:
Ryan Henry 2026-09-24 14:30:19 -06:00
parent e4e666f459
commit 3f10e05176
912 changed files with 224964 additions and 11502 deletions
Download patch file Download diff file Expand all files Collapse all files

348
thirdparty/simde/test/arm/neon/max.c vendored
View file

@ -3,6 +3,112 @@
#include "test-neon.h"
#include "../../../simde/arm/neon/max.h"
static int
test_simde_vmaxh_f16 (SIMDE_MUNIT_TEST_ARGS) {
#if 1
struct {
simde_float16 a;
simde_float16 b;
simde_float16 r;
} test_vec[] = {
{ SIMDE_FLOAT16_VALUE( 27.944),
SIMDE_FLOAT16_VALUE( 4.766),
SIMDE_FLOAT16_VALUE( 27.944) },
{ SIMDE_FLOAT16_VALUE( -6.101),
SIMDE_FLOAT16_VALUE( 6.573),
SIMDE_FLOAT16_VALUE( 6.573) },
{ SIMDE_FLOAT16_VALUE( 16.846),
SIMDE_FLOAT16_VALUE( 3.658),
SIMDE_FLOAT16_VALUE( 16.846) },
{ SIMDE_FLOAT16_VALUE( -4.194),
SIMDE_FLOAT16_VALUE( -13.220),
SIMDE_FLOAT16_VALUE( -4.194) },
{ SIMDE_FLOAT16_VALUE( 12.582),
SIMDE_FLOAT16_VALUE( 4.663),
SIMDE_FLOAT16_VALUE( 12.582) },
{ SIMDE_FLOAT16_VALUE( 14.203),
SIMDE_FLOAT16_VALUE( -15.993),
SIMDE_FLOAT16_VALUE( 14.203) },
{ SIMDE_FLOAT16_VALUE( 13.812),
SIMDE_FLOAT16_VALUE( 1.543),
SIMDE_FLOAT16_VALUE( 13.812) },
{ SIMDE_FLOAT16_VALUE( 25.248),
SIMDE_FLOAT16_VALUE( 4.234),
SIMDE_FLOAT16_VALUE( 25.248) },
};
for (size_t i = 0 ; i < (sizeof(test_vec) / sizeof(test_vec[0])) ; i++) {
simde_float16_t a = test_vec[i].a;
simde_float16_t b = test_vec[i].b;
simde_float16_t r = simde_vmaxh_f16(a, b);
simde_assert_equal_f16(r, test_vec[i].r, 1);
}
return 0;
#else
fputc('\n', stdout);
for (int i = 0 ; i < 8 ; i++) {
simde_float16_t a = simde_test_codegen_random_f16(-100.0f, 100.0f);
simde_float16_t b = simde_test_codegen_random_f16(-100.0f, 100.0f);
simde_float16_t r = simde_vmaxh_f16(a, b);
simde_test_codegen_write_f16(2, a, SIMDE_TEST_VEC_POS_FIRST);
simde_test_codegen_write_f16(2, b, SIMDE_TEST_VEC_POS_MIDDLE);
simde_test_codegen_write_f16(2, r, SIMDE_TEST_VEC_POS_LAST);
}
return 1;
#endif
}
static int
test_simde_vmax_f16 (SIMDE_MUNIT_TEST_ARGS) {
#if 1
struct {
simde_float16_t a[4];
simde_float16_t b[4];
simde_float16_t r[4];
} test_vec[] = {
{ { SIMDE_FLOAT16_VALUE( 441.00), SIMDE_FLOAT16_VALUE( 861.50), SIMDE_FLOAT16_VALUE( 98.06), SIMDE_FLOAT16_VALUE( 896.00) },
{ SIMDE_FLOAT16_VALUE( 684.00), SIMDE_FLOAT16_VALUE( 563.00), SIMDE_FLOAT16_VALUE( 15.31), SIMDE_FLOAT16_VALUE( -786.50) },
{ SIMDE_FLOAT16_VALUE( 684.00), SIMDE_FLOAT16_VALUE( 861.50), SIMDE_FLOAT16_VALUE( 98.06), SIMDE_FLOAT16_VALUE( 896.00) } },
{ { SIMDE_FLOAT16_VALUE( -6.45), SIMDE_FLOAT16_VALUE( 29.20), SIMDE_FLOAT16_VALUE( -856.00), SIMDE_FLOAT16_VALUE( 267.25) },
{ SIMDE_FLOAT16_VALUE( -848.00), SIMDE_FLOAT16_VALUE( 815.50), SIMDE_FLOAT16_VALUE( -672.50), SIMDE_FLOAT16_VALUE( 274.50) },
{ SIMDE_FLOAT16_VALUE( -6.45), SIMDE_FLOAT16_VALUE( 815.50), SIMDE_FLOAT16_VALUE( -672.50), SIMDE_FLOAT16_VALUE( 274.50) } },
{ { SIMDE_FLOAT16_VALUE( 909.00), SIMDE_FLOAT16_VALUE( -475.75), SIMDE_FLOAT16_VALUE( 269.75), SIMDE_FLOAT16_VALUE( 991.00) },
{ SIMDE_FLOAT16_VALUE( 9.56), SIMDE_FLOAT16_VALUE( 425.25), SIMDE_FLOAT16_VALUE( -294.75), SIMDE_FLOAT16_VALUE( -99.19) },
{ SIMDE_FLOAT16_VALUE( 909.00), SIMDE_FLOAT16_VALUE( 425.25), SIMDE_FLOAT16_VALUE( 269.75), SIMDE_FLOAT16_VALUE( 991.00) } },
{ { SIMDE_FLOAT16_VALUE( 121.69), SIMDE_FLOAT16_VALUE( 14.28), SIMDE_FLOAT16_VALUE( 545.00), SIMDE_FLOAT16_VALUE( 819.50) },
{ SIMDE_FLOAT16_VALUE( 73.81), SIMDE_FLOAT16_VALUE( 132.25), SIMDE_FLOAT16_VALUE( 967.50), SIMDE_FLOAT16_VALUE( 6.60) },
{ SIMDE_FLOAT16_VALUE( 121.69), SIMDE_FLOAT16_VALUE( 132.25), SIMDE_FLOAT16_VALUE( 967.50), SIMDE_FLOAT16_VALUE( 819.50) } }
};
for (size_t i = 0 ; i < (sizeof(test_vec) / sizeof(test_vec[0])) ; i++) {
simde_float16x4_t a = simde_vld1_f16(test_vec[i].a);
simde_float16x4_t b = simde_vld1_f16(test_vec[i].b);
simde_float16x4_t r = simde_vmax_f16(a, b);
simde_test_arm_neon_assert_equal_f16x4(r, simde_vld1_f16(test_vec[i].r), 1);
}
return 0;
#else
fputc('\n', stdout);
for (int i = 0 ; i < 8 ; i++) {
simde_float16x4_t a = simde_test_arm_neon_random_f16x4(-100.0f, 100.0f);
simde_float16x4_t b = simde_test_arm_neon_random_f16x4(-100.0f, 100.0f);
simde_float16x4_t r = simde_vmax_f16(a, b);
simde_test_arm_neon_write_f16x4(2, a, SIMDE_TEST_VEC_POS_FIRST);
simde_test_arm_neon_write_f16x4(2, b, SIMDE_TEST_VEC_POS_MIDDLE);
simde_test_arm_neon_write_f16x4(2, r, SIMDE_TEST_VEC_POS_LAST);
}
return 1;
#endif
}
static int
test_simde_vmax_f32 (SIMDE_MUNIT_TEST_ARGS) {
#if 1
@ -131,6 +237,7 @@ test_simde_vmax_f64 (SIMDE_MUNIT_TEST_ARGS) {
static int
test_simde_vmax_s8 (SIMDE_MUNIT_TEST_ARGS) {
#if 1
struct {
int8_t a[8];
int8_t b[8];
@ -171,10 +278,25 @@ test_simde_vmax_s8 (SIMDE_MUNIT_TEST_ARGS) {
}
return 0;
#else
fputc('\n', stdout);
for (int i = 0 ; i < 8 ; i++) {
simde_int8x8_t a = simde_test_arm_neon_random_i8x8();
simde_int8x8_t b = simde_test_arm_neon_random_i8x8();
simde_int8x8_t r = simde_vmax_s8(a, b);
simde_test_arm_neon_write_i8x8(2, a, SIMDE_TEST_VEC_POS_FIRST);
simde_test_arm_neon_write_i8x8(2, b, SIMDE_TEST_VEC_POS_MIDDLE);
simde_test_arm_neon_write_i8x8(2, r, SIMDE_TEST_VEC_POS_LAST);
}
return 1;
#endif
}
static int
test_simde_vmax_s16 (SIMDE_MUNIT_TEST_ARGS) {
#if 1
struct {
int16_t a[4];
int16_t b[4];
@ -215,10 +337,25 @@ test_simde_vmax_s16 (SIMDE_MUNIT_TEST_ARGS) {
}
return 0;
#else
fputc('\n', stdout);
for (int i = 0 ; i < 8 ; i++) {
simde_int16x4_t a = simde_test_arm_neon_random_i16x4();
simde_int16x4_t b = simde_test_arm_neon_random_i16x4();
simde_int16x4_t r = simde_vmax_s16(a, b);
simde_test_arm_neon_write_i16x4(2, a, SIMDE_TEST_VEC_POS_FIRST);
simde_test_arm_neon_write_i16x4(2, b, SIMDE_TEST_VEC_POS_MIDDLE);
simde_test_arm_neon_write_i16x4(2, r, SIMDE_TEST_VEC_POS_LAST);
}
return 1;
#endif
}
static int
test_simde_vmax_s32 (SIMDE_MUNIT_TEST_ARGS) {
#if 1
struct {
int32_t a[2];
int32_t b[2];
@ -259,6 +396,20 @@ test_simde_vmax_s32 (SIMDE_MUNIT_TEST_ARGS) {
}
return 0;
#else
fputc('\n', stdout);
for (int i = 0 ; i < 8 ; i++) {
simde_int32x2_t a = simde_test_arm_neon_random_i32x2();
simde_int32x2_t b = simde_test_arm_neon_random_i32x2();
simde_int32x2_t r = simde_vmax_s32(a, b);
simde_test_arm_neon_write_i32x2(2, a, SIMDE_TEST_VEC_POS_FIRST);
simde_test_arm_neon_write_i32x2(2, b, SIMDE_TEST_VEC_POS_MIDDLE);
simde_test_arm_neon_write_i32x2(2, r, SIMDE_TEST_VEC_POS_LAST);
}
return 1;
#endif
}
static int
@ -321,6 +472,7 @@ test_simde_x_vmax_s64 (SIMDE_MUNIT_TEST_ARGS) {
static int
test_simde_vmax_u8 (SIMDE_MUNIT_TEST_ARGS) {
#if 1
struct {
uint8_t a[8];
uint8_t b[8];
@ -361,10 +513,25 @@ test_simde_vmax_u8 (SIMDE_MUNIT_TEST_ARGS) {
}
return 0;
#else
fputc('\n', stdout);
for (int i = 0 ; i < 8 ; i++) {
simde_uint8x8_t a = simde_test_arm_neon_random_u8x8();
simde_uint8x8_t b = simde_test_arm_neon_random_u8x8();
simde_uint8x8_t r = simde_vmax_u8(a, b);
simde_test_arm_neon_write_u8x8(2, a, SIMDE_TEST_VEC_POS_FIRST);
simde_test_arm_neon_write_u8x8(2, b, SIMDE_TEST_VEC_POS_MIDDLE);
simde_test_arm_neon_write_u8x8(2, r, SIMDE_TEST_VEC_POS_LAST);
}
return 1;
#endif
}
static int
test_simde_vmax_u16 (SIMDE_MUNIT_TEST_ARGS) {
#if 1
struct {
uint16_t a[4];
uint16_t b[4];
@ -404,10 +571,25 @@ test_simde_vmax_u16 (SIMDE_MUNIT_TEST_ARGS) {
}
return 0;
#else
fputc('\n', stdout);
for (int i = 0 ; i < 8 ; i++) {
simde_uint16x4_t a = simde_test_arm_neon_random_u16x4();
simde_uint16x4_t b = simde_test_arm_neon_random_u16x4();
simde_uint16x4_t r = simde_vmax_u16(a, b);
simde_test_arm_neon_write_u16x4(2, a, SIMDE_TEST_VEC_POS_FIRST);
simde_test_arm_neon_write_u16x4(2, b, SIMDE_TEST_VEC_POS_MIDDLE);
simde_test_arm_neon_write_u16x4(2, r, SIMDE_TEST_VEC_POS_LAST);
}
return 1;
#endif
}
static int
test_simde_vmax_u32 (SIMDE_MUNIT_TEST_ARGS) {
#if 1
struct {
uint32_t a[2];
uint32_t b[2];
@ -447,6 +629,20 @@ test_simde_vmax_u32 (SIMDE_MUNIT_TEST_ARGS) {
}
return 0;
#else
fputc('\n', stdout);
for (int i = 0 ; i < 8 ; i++) {
simde_uint32x2_t a = simde_test_arm_neon_random_u32x2();
simde_uint32x2_t b = simde_test_arm_neon_random_u32x2();
simde_uint32x2_t r = simde_vmax_u32(a, b);
simde_test_arm_neon_write_u32x2(2, a, SIMDE_TEST_VEC_POS_FIRST);
simde_test_arm_neon_write_u32x2(2, b, SIMDE_TEST_VEC_POS_MIDDLE);
simde_test_arm_neon_write_u32x2(2, r, SIMDE_TEST_VEC_POS_LAST);
}
return 1;
#endif
}
static int
@ -506,6 +702,65 @@ test_simde_x_vmax_u64 (SIMDE_MUNIT_TEST_ARGS) {
#endif
}
static int
test_simde_vmaxq_f16 (SIMDE_MUNIT_TEST_ARGS) {
#if 1
struct {
simde_float16_t a[8];
simde_float16_t b[8];
simde_float16_t r[8];
} test_vec[] = {
{ { SIMDE_FLOAT16_VALUE( 441.00), SIMDE_FLOAT16_VALUE( 861.50), SIMDE_FLOAT16_VALUE( 98.06), SIMDE_FLOAT16_VALUE( 896.00),
SIMDE_FLOAT16_VALUE( -918.50), SIMDE_FLOAT16_VALUE( -717.00), SIMDE_FLOAT16_VALUE( -823.00), SIMDE_FLOAT16_VALUE( -581.00) },
{ SIMDE_FLOAT16_VALUE( 684.00), SIMDE_FLOAT16_VALUE( 563.00), SIMDE_FLOAT16_VALUE( 15.31), SIMDE_FLOAT16_VALUE( -786.50),
SIMDE_FLOAT16_VALUE( 891.00), SIMDE_FLOAT16_VALUE( 859.50), SIMDE_FLOAT16_VALUE( 387.25), SIMDE_FLOAT16_VALUE( 969.00) },
{ SIMDE_FLOAT16_VALUE( 684.00), SIMDE_FLOAT16_VALUE( 861.50), SIMDE_FLOAT16_VALUE( 98.06), SIMDE_FLOAT16_VALUE( 896.00),
SIMDE_FLOAT16_VALUE( 891.00), SIMDE_FLOAT16_VALUE( 859.50), SIMDE_FLOAT16_VALUE( 387.25), SIMDE_FLOAT16_VALUE( 969.00) } },
{ { SIMDE_FLOAT16_VALUE( -6.45), SIMDE_FLOAT16_VALUE( 29.20), SIMDE_FLOAT16_VALUE( -856.00), SIMDE_FLOAT16_VALUE( 267.25),
SIMDE_FLOAT16_VALUE( -302.00), SIMDE_FLOAT16_VALUE( 526.50), SIMDE_FLOAT16_VALUE( 713.00), SIMDE_FLOAT16_VALUE( -14.83) },
{ SIMDE_FLOAT16_VALUE( -848.00), SIMDE_FLOAT16_VALUE( 815.50), SIMDE_FLOAT16_VALUE( -672.50), SIMDE_FLOAT16_VALUE( 274.50),
SIMDE_FLOAT16_VALUE( 933.00), SIMDE_FLOAT16_VALUE( -952.50), SIMDE_FLOAT16_VALUE( 426.00), SIMDE_FLOAT16_VALUE( 373.75) },
{ SIMDE_FLOAT16_VALUE( -6.45), SIMDE_FLOAT16_VALUE( 815.50), SIMDE_FLOAT16_VALUE( -672.50), SIMDE_FLOAT16_VALUE( 274.50),
SIMDE_FLOAT16_VALUE( 933.00), SIMDE_FLOAT16_VALUE( 526.50), SIMDE_FLOAT16_VALUE( 713.00), SIMDE_FLOAT16_VALUE( 373.75) } },
{ { SIMDE_FLOAT16_VALUE( 909.00), SIMDE_FLOAT16_VALUE( -475.75), SIMDE_FLOAT16_VALUE( 269.75), SIMDE_FLOAT16_VALUE( 991.00),
SIMDE_FLOAT16_VALUE( -192.62), SIMDE_FLOAT16_VALUE( 446.50), SIMDE_FLOAT16_VALUE( -590.00), SIMDE_FLOAT16_VALUE( -508.50) },
{ SIMDE_FLOAT16_VALUE( 9.56), SIMDE_FLOAT16_VALUE( 425.25), SIMDE_FLOAT16_VALUE( -294.75), SIMDE_FLOAT16_VALUE( -99.19),
SIMDE_FLOAT16_VALUE( 284.50), SIMDE_FLOAT16_VALUE( -907.50), SIMDE_FLOAT16_VALUE( -130.00), SIMDE_FLOAT16_VALUE( -722.00) },
{ SIMDE_FLOAT16_VALUE( 909.00), SIMDE_FLOAT16_VALUE( 425.25), SIMDE_FLOAT16_VALUE( 269.75), SIMDE_FLOAT16_VALUE( 991.00),
SIMDE_FLOAT16_VALUE( 284.50), SIMDE_FLOAT16_VALUE( 446.50), SIMDE_FLOAT16_VALUE( -130.00), SIMDE_FLOAT16_VALUE( -508.50) } },
{ { SIMDE_FLOAT16_VALUE( 121.69), SIMDE_FLOAT16_VALUE( 14.28), SIMDE_FLOAT16_VALUE( 545.00), SIMDE_FLOAT16_VALUE( 819.50),
SIMDE_FLOAT16_VALUE( -459.00), SIMDE_FLOAT16_VALUE( 258.50), SIMDE_FLOAT16_VALUE( -195.12), SIMDE_FLOAT16_VALUE( -307.00) },
{ SIMDE_FLOAT16_VALUE( 73.81), SIMDE_FLOAT16_VALUE( 132.25), SIMDE_FLOAT16_VALUE( 967.50), SIMDE_FLOAT16_VALUE( 6.60),
SIMDE_FLOAT16_VALUE( 179.88), SIMDE_FLOAT16_VALUE( 393.50), SIMDE_FLOAT16_VALUE( -619.50), SIMDE_FLOAT16_VALUE( 89.12) },
{ SIMDE_FLOAT16_VALUE( 121.69), SIMDE_FLOAT16_VALUE( 132.25), SIMDE_FLOAT16_VALUE( 967.50), SIMDE_FLOAT16_VALUE( 819.50),
SIMDE_FLOAT16_VALUE( 179.88), SIMDE_FLOAT16_VALUE( 393.50), SIMDE_FLOAT16_VALUE( -195.12), SIMDE_FLOAT16_VALUE( 89.12) } }
};
for (size_t i = 0 ; i < (sizeof(test_vec) / sizeof(test_vec[0])) ; i++) {
simde_float16x8_t a = simde_vld1q_f16(test_vec[i].a);
simde_float16x8_t b = simde_vld1q_f16(test_vec[i].b);
simde_float16x8_t r = simde_vmaxq_f16(a, b);
simde_test_arm_neon_assert_equal_f16x8(r, simde_vld1q_f16(test_vec[i].r), 1);
}
return 0;
#else
fputc('\n', stdout);
for (int i = 0 ; i < 8 ; i++) {
simde_float16x8_t a = simde_test_arm_neon_random_f16x8(-100.0f, 100.0f);
simde_float16x8_t b = simde_test_arm_neon_random_f16x8(-100.0f, 100.0f);
simde_float16x8_t r = simde_vmaxq_f16(a, b);
simde_test_arm_neon_write_f16x8(2, a, SIMDE_TEST_VEC_POS_FIRST);
simde_test_arm_neon_write_f16x8(2, b, SIMDE_TEST_VEC_POS_MIDDLE);
simde_test_arm_neon_write_f16x8(2, r, SIMDE_TEST_VEC_POS_LAST);
}
return 1;
#endif
}
static int
test_simde_vmaxq_f32 (SIMDE_MUNIT_TEST_ARGS) {
#if 1
@ -634,6 +889,7 @@ test_simde_vmaxq_f64 (SIMDE_MUNIT_TEST_ARGS) {
static int
test_simde_vmaxq_s8 (SIMDE_MUNIT_TEST_ARGS) {
#if 1
struct {
int8_t a[16];
int8_t b[16];
@ -698,10 +954,25 @@ test_simde_vmaxq_s8 (SIMDE_MUNIT_TEST_ARGS) {
}
return 0;
#else
fputc('\n', stdout);
for (int i = 0 ; i < 8 ; i++) {
simde_int8x16_t a = simde_test_arm_neon_random_i8x16();
simde_int8x16_t b = simde_test_arm_neon_random_i8x16();
simde_int8x16_t r = simde_vmaxq_s8(a, b);
simde_test_arm_neon_write_i8x16(2, a, SIMDE_TEST_VEC_POS_FIRST);
simde_test_arm_neon_write_i8x16(2, b, SIMDE_TEST_VEC_POS_MIDDLE);
simde_test_arm_neon_write_i8x16(2, r, SIMDE_TEST_VEC_POS_LAST);
}
return 1;
#endif
}
static int
test_simde_vmaxq_s16 (SIMDE_MUNIT_TEST_ARGS) {
#if 1
struct {
int16_t a[8];
int16_t b[8];
@ -742,10 +1013,25 @@ test_simde_vmaxq_s16 (SIMDE_MUNIT_TEST_ARGS) {
}
return 0;
#else
fputc('\n', stdout);
for (int i = 0 ; i < 8 ; i++) {
simde_int16x8_t a = simde_test_arm_neon_random_i16x8();
simde_int16x8_t b = simde_test_arm_neon_random_i16x8();
simde_int16x8_t r = simde_vmaxq_s16(a, b);
simde_test_arm_neon_write_i16x8(2, a, SIMDE_TEST_VEC_POS_FIRST);
simde_test_arm_neon_write_i16x8(2, b, SIMDE_TEST_VEC_POS_MIDDLE);
simde_test_arm_neon_write_i16x8(2, r, SIMDE_TEST_VEC_POS_LAST);
}
return 1;
#endif
}
static int
test_simde_vmaxq_s32 (SIMDE_MUNIT_TEST_ARGS) {
#if 1
struct {
int32_t a[4];
int32_t b[4];
@ -785,6 +1071,20 @@ test_simde_vmaxq_s32 (SIMDE_MUNIT_TEST_ARGS) {
}
return 0;
#else
fputc('\n', stdout);
for (int i = 0 ; i < 8 ; i++) {
simde_int32x4_t a = simde_test_arm_neon_random_i32x4();
simde_int32x4_t b = simde_test_arm_neon_random_i32x4();
simde_int32x4_t r = simde_vmaxq_s32(a, b);
simde_test_arm_neon_write_i32x4(2, a, SIMDE_TEST_VEC_POS_FIRST);
simde_test_arm_neon_write_i32x4(2, b, SIMDE_TEST_VEC_POS_MIDDLE);
simde_test_arm_neon_write_i32x4(2, r, SIMDE_TEST_VEC_POS_LAST);
}
return 1;
#endif
}
static int
@ -846,6 +1146,7 @@ test_simde_x_vmaxq_s64 (SIMDE_MUNIT_TEST_ARGS) {
static int
test_simde_vmaxq_u8 (SIMDE_MUNIT_TEST_ARGS) {
#if 1
struct {
uint8_t a[16];
uint8_t b[16];
@ -910,10 +1211,25 @@ test_simde_vmaxq_u8 (SIMDE_MUNIT_TEST_ARGS) {
}
return 0;
#else
fputc('\n', stdout);
for (int i = 0 ; i < 8 ; i++) {
simde_uint8x16_t a = simde_test_arm_neon_random_u8x16();
simde_uint8x16_t b = simde_test_arm_neon_random_u8x16();
simde_uint8x16_t r = simde_vmaxq_u8(a, b);
simde_test_arm_neon_write_u8x16(2, a, SIMDE_TEST_VEC_POS_FIRST);
simde_test_arm_neon_write_u8x16(2, b, SIMDE_TEST_VEC_POS_MIDDLE);
simde_test_arm_neon_write_u8x16(2, r, SIMDE_TEST_VEC_POS_LAST);
}
return 1;
#endif
}
static int
test_simde_vmaxq_u16 (SIMDE_MUNIT_TEST_ARGS) {
#if 1
struct {
uint16_t a[8];
uint16_t b[8];
@ -953,10 +1269,25 @@ test_simde_vmaxq_u16 (SIMDE_MUNIT_TEST_ARGS) {
}
return 0;
#else
fputc('\n', stdout);
for (int i = 0 ; i < 8 ; i++) {
simde_uint16x8_t a = simde_test_arm_neon_random_u16x8();
simde_uint16x8_t b = simde_test_arm_neon_random_u16x8();
simde_uint16x8_t r = simde_vmaxq_u16(a, b);
simde_test_arm_neon_write_u16x8(2, a, SIMDE_TEST_VEC_POS_FIRST);
simde_test_arm_neon_write_u16x8(2, b, SIMDE_TEST_VEC_POS_MIDDLE);
simde_test_arm_neon_write_u16x8(2, r, SIMDE_TEST_VEC_POS_LAST);
}
return 1;
#endif
}
static int
test_simde_vmaxq_u32 (SIMDE_MUNIT_TEST_ARGS) {
#if 1
struct {
uint32_t a[4];
uint32_t b[4];
@ -997,6 +1328,20 @@ test_simde_vmaxq_u32 (SIMDE_MUNIT_TEST_ARGS) {
}
return 0;
#else
fputc('\n', stdout);
for (int i = 0 ; i < 8 ; i++) {
simde_uint32x4_t a = simde_test_arm_neon_random_u32x4();
simde_uint32x4_t b = simde_test_arm_neon_random_u32x4();
simde_uint32x4_t r = simde_vmaxq_u32(a, b);
simde_test_arm_neon_write_u32x4(2, a, SIMDE_TEST_VEC_POS_FIRST);
simde_test_arm_neon_write_u32x4(2, b, SIMDE_TEST_VEC_POS_MIDDLE);
simde_test_arm_neon_write_u32x4(2, r, SIMDE_TEST_VEC_POS_LAST);
}
return 1;
#endif
}
static int
@ -1057,6 +1402,8 @@ test_simde_x_vmaxq_u64 (SIMDE_MUNIT_TEST_ARGS) {
}
SIMDE_TEST_FUNC_LIST_BEGIN
SIMDE_TEST_FUNC_LIST_ENTRY(vmaxh_f16)
SIMDE_TEST_FUNC_LIST_ENTRY(vmax_f16)
SIMDE_TEST_FUNC_LIST_ENTRY(vmax_f32)
SIMDE_TEST_FUNC_LIST_ENTRY(vmax_f64)
SIMDE_TEST_FUNC_LIST_ENTRY(vmax_s8)
@ -1068,6 +1415,7 @@ SIMDE_TEST_FUNC_LIST_ENTRY(vmax_u16)
SIMDE_TEST_FUNC_LIST_ENTRY(vmax_u32)
SIMDE_TEST_FUNC_LIST_ENTRY(x_vmax_u64)
SIMDE_TEST_FUNC_LIST_ENTRY(vmaxq_f16)
SIMDE_TEST_FUNC_LIST_ENTRY(vmaxq_f32)
SIMDE_TEST_FUNC_LIST_ENTRY(vmaxq_f64)
SIMDE_TEST_FUNC_LIST_ENTRY(vmaxq_s8)