Update googletest to 1.18.0 and SIMDe to 0.8.2.
Googletest 1.18 asks for CMake 3.13 or newer, so configuring the tests no longer warns that CMake compatibility below 3.10 is deprecated. Co-authored-by: Cursor <cursoragent@cursor.com>
This commit is contained in:
parent
e4e666f459
commit
3f10e05176
912 changed files with 224964 additions and 11502 deletions
183
thirdparty/simde/test/wasm/relaxed-simd/fma.c
vendored
183
thirdparty/simde/test/wasm/relaxed-simd/fma.c
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@ -1,183 +0,0 @@
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/* Copyright (c) 2021 Evan Nemerson <evan@nemerson.com>
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*
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* Permission is hereby granted, free of charge, to any person
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* obtaining a copy of this software and associated documentation
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* files (the "Software"), to deal in the Software without
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* restriction, including without limitation the rights to use, copy,
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* modify, merge, publish, distribute, sublicense, and/or sell copies
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* of the Software, and to permit persons to whom the Software is
|
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be
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* included in all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
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* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
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* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*/
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#define SIMDE_TEST_WASM_RELAXED_SIMD_INSN fma
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#include "../../../simde/wasm/relaxed-simd.h"
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#include "test-relaxed-simd.h"
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static int
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test_simde_wasm_f32x4_fma(SIMDE_MUNIT_TEST_ARGS) {
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#if 1
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SIMDE_TEST_STRUCT_MODIFIERS struct {
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simde_float32 a[sizeof(simde_v128_t) / sizeof(simde_float32)];
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simde_float32 b[sizeof(simde_v128_t) / sizeof(simde_float32)];
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simde_float32 c[sizeof(simde_v128_t) / sizeof(simde_float32)];
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simde_float32 r[sizeof(simde_v128_t) / sizeof(simde_float32)];
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} test_vec[] = {
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#if !defined(SIMDE_FAST_MATH)
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{ { SIMDE_MATH_NANF, SIMDE_FLOAT32_C( 35.68), SIMDE_MATH_NANF, SIMDE_FLOAT32_C( -774.53) },
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{ SIMDE_FLOAT32_C( 759.66), SIMDE_MATH_NANF, SIMDE_MATH_NANF, SIMDE_FLOAT32_C( -774.53) },
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{ SIMDE_FLOAT32_C( 759.66), SIMDE_MATH_NANF, SIMDE_MATH_NANF, SIMDE_FLOAT32_C( -774.53) },
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{ SIMDE_MATH_NANF, SIMDE_MATH_NANF, SIMDE_MATH_NANF, SIMDE_FLOAT32_C(599122.25) } },
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#endif
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{ { SIMDE_FLOAT32_C( 718.59), SIMDE_FLOAT32_C( -622.20), SIMDE_FLOAT32_C( -12.71), SIMDE_FLOAT32_C( 145.90) },
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{ SIMDE_FLOAT32_C( 493.69), SIMDE_FLOAT32_C( -413.24), SIMDE_FLOAT32_C( -414.24), SIMDE_FLOAT32_C( 394.66) },
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{ SIMDE_FLOAT32_C( 493.69), SIMDE_FLOAT32_C( -413.24), SIMDE_FLOAT32_C( -414.24), SIMDE_FLOAT32_C( 394.66) },
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{ SIMDE_FLOAT32_C(244448.41), SIMDE_FLOAT32_C(170145.09), SIMDE_FLOAT32_C(171582.06), SIMDE_FLOAT32_C(155902.42) } },
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{ { SIMDE_FLOAT32_C( 308.42), SIMDE_FLOAT32_C( 86.05), SIMDE_FLOAT32_C( 150.72), SIMDE_FLOAT32_C( -861.13) },
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{ SIMDE_FLOAT32_C( -705.94), SIMDE_FLOAT32_C( 541.94), SIMDE_FLOAT32_C( -888.14), SIMDE_FLOAT32_C( 233.26) },
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{ SIMDE_FLOAT32_C( -705.94), SIMDE_FLOAT32_C( 541.94), SIMDE_FLOAT32_C( -888.14), SIMDE_FLOAT32_C( 233.26) },
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{ SIMDE_FLOAT32_C(498659.69), SIMDE_FLOAT32_C(293785.03), SIMDE_FLOAT32_C(788943.44), SIMDE_FLOAT32_C( 53549.10) } },
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{ { SIMDE_FLOAT32_C( -756.83), SIMDE_FLOAT32_C( 995.47), SIMDE_FLOAT32_C( 603.58), SIMDE_FLOAT32_C( -894.80) },
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{ SIMDE_FLOAT32_C( -794.79), SIMDE_FLOAT32_C( 27.52), SIMDE_FLOAT32_C( -472.09), SIMDE_FLOAT32_C( -978.18) },
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{ SIMDE_FLOAT32_C( -794.79), SIMDE_FLOAT32_C( 27.52), SIMDE_FLOAT32_C( -472.09), SIMDE_FLOAT32_C( -978.18) },
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{ SIMDE_FLOAT32_C(630934.31), SIMDE_FLOAT32_C( 1752.82), SIMDE_FLOAT32_C(223472.55), SIMDE_FLOAT32_C(955941.31) } },
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{ { SIMDE_FLOAT32_C( -936.80), SIMDE_FLOAT32_C( -668.74), SIMDE_FLOAT32_C( 863.15), SIMDE_FLOAT32_C( 822.85) },
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{ SIMDE_FLOAT32_C( 593.95), SIMDE_FLOAT32_C( 59.13), SIMDE_FLOAT32_C( 718.77), SIMDE_FLOAT32_C( 312.54) },
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{ SIMDE_FLOAT32_C( 593.95), SIMDE_FLOAT32_C( 59.13), SIMDE_FLOAT32_C( 718.77), SIMDE_FLOAT32_C( 312.54) },
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{ SIMDE_FLOAT32_C(351839.81), SIMDE_FLOAT32_C( 2827.62), SIMDE_FLOAT32_C(517493.50), SIMDE_FLOAT32_C( 98504.11) } },
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{ { SIMDE_FLOAT32_C( 436.93), SIMDE_FLOAT32_C( -293.94), SIMDE_FLOAT32_C( -541.56), SIMDE_FLOAT32_C( -69.39) },
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{ SIMDE_FLOAT32_C( 292.82), SIMDE_FLOAT32_C( 44.21), SIMDE_FLOAT32_C( -674.72), SIMDE_FLOAT32_C( -398.76) },
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{ SIMDE_FLOAT32_C( 292.82), SIMDE_FLOAT32_C( 44.21), SIMDE_FLOAT32_C( -674.72), SIMDE_FLOAT32_C( -398.76) },
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{ SIMDE_FLOAT32_C( 86180.48), SIMDE_FLOAT32_C( 1660.58), SIMDE_FLOAT32_C(454705.47), SIMDE_FLOAT32_C(158940.16) } },
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{ { SIMDE_FLOAT32_C( -869.74), SIMDE_FLOAT32_C( 475.99), SIMDE_FLOAT32_C( -259.88), SIMDE_FLOAT32_C( -575.68) },
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{ SIMDE_FLOAT32_C( 17.93), SIMDE_FLOAT32_C( -148.02), SIMDE_FLOAT32_C( 657.58), SIMDE_FLOAT32_C( 261.10) },
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{ SIMDE_FLOAT32_C( 17.93), SIMDE_FLOAT32_C( -148.02), SIMDE_FLOAT32_C( 657.58), SIMDE_FLOAT32_C( 261.10) },
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{ SIMDE_FLOAT32_C( -548.26), SIMDE_FLOAT32_C( 22385.91), SIMDE_FLOAT32_C(432151.59), SIMDE_FLOAT32_C( 67597.53) } },
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{ { SIMDE_FLOAT32_C( -152.55), SIMDE_FLOAT32_C( 261.17), SIMDE_FLOAT32_C( 366.30), SIMDE_FLOAT32_C( 52.65) },
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{ SIMDE_FLOAT32_C( -711.32), SIMDE_FLOAT32_C( 894.21), SIMDE_FLOAT32_C( 74.47), SIMDE_FLOAT32_C( -648.12) },
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{ SIMDE_FLOAT32_C( -711.32), SIMDE_FLOAT32_C( 894.21), SIMDE_FLOAT32_C( 74.47), SIMDE_FLOAT32_C( -648.12) },
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{ SIMDE_FLOAT32_C(505823.59), SIMDE_FLOAT32_C(799872.75), SIMDE_FLOAT32_C( 5912.08), SIMDE_FLOAT32_C(420112.19) } }
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};
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for (size_t i = 0 ; i < (sizeof(test_vec) / sizeof(test_vec[0])) ; i++) {
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simde_v128_t a = simde_wasm_v128_load(test_vec[i].a);
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simde_v128_t b = simde_wasm_v128_load(test_vec[i].b);
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simde_v128_t c = simde_wasm_v128_load(test_vec[i].b);
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simde_v128_t r = simde_wasm_f32x4_fma(a, b, c);
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simde_test_wasm_f32x4_assert_equal(r, simde_wasm_v128_load(test_vec[i].r), 1);
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}
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return 0;
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#else
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fputc('\n', stdout);
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simde_float32 inputs[8 * 2 * (sizeof(simde_v128_t) / sizeof(simde_float32))];
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simde_test_wasm_f32x4_random_full(8, 2, inputs, -SIMDE_FLOAT32_C(1000.0), SIMDE_FLOAT32_C(1000.0), HEDLEY_STATIC_CAST(SimdeTestVecFloatType, SIMDE_TEST_VEC_FLOAT_NAN | SIMDE_TEST_VEC_FLOAT_EQUAL));
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for (size_t i = 0 ; i < 8 ; i++) {
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simde_v128_t
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a = simde_test_wasm_f32x4_random_full_extract(2, inputs, i, 0),
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b = simde_test_wasm_f32x4_random_full_extract(2, inputs, i, 1),
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c = simde_test_wasm_f32x4_random_full_extract(2, inputs, i, 1),
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r;
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r = simde_wasm_f32x4_fma(a, b, c);
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simde_test_wasm_f32x4_write(3, a, SIMDE_TEST_VEC_POS_FIRST);
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simde_test_wasm_f32x4_write(3, b, SIMDE_TEST_VEC_POS_MIDDLE);
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simde_test_wasm_f32x4_write(3, c, SIMDE_TEST_VEC_POS_MIDDLE);
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simde_test_wasm_f32x4_write(3, r, SIMDE_TEST_VEC_POS_LAST);
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}
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return 1;
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#endif
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}
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static int
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test_simde_wasm_f64x2_fma(SIMDE_MUNIT_TEST_ARGS) {
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#if 1
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SIMDE_TEST_STRUCT_MODIFIERS struct {
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simde_float64 a[sizeof(simde_v128_t) / sizeof(simde_float64)];
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simde_float64 b[sizeof(simde_v128_t) / sizeof(simde_float64)];
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simde_float64 c[sizeof(simde_v128_t) / sizeof(simde_float64)];
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simde_float64 r[sizeof(simde_v128_t) / sizeof(simde_float64)];
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} test_vec[] = {
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#if !defined(SIMDE_FAST_MATH)
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{ { SIMDE_MATH_NAN, SIMDE_FLOAT64_C( -621.40) },
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{ SIMDE_FLOAT64_C( 52.22), SIMDE_MATH_NAN },
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{ SIMDE_FLOAT64_C( 52.22), SIMDE_MATH_NAN },
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{ SIMDE_MATH_NAN, SIMDE_MATH_NAN } },
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{ { SIMDE_MATH_NAN, SIMDE_FLOAT64_C( -435.92) },
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{ SIMDE_MATH_NAN, SIMDE_FLOAT64_C( 407.34) },
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{ SIMDE_MATH_NAN, SIMDE_FLOAT64_C( 407.34) },
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{ SIMDE_MATH_NAN, SIMDE_FLOAT64_C(165489.96) } },
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#endif
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{ { SIMDE_FLOAT64_C( -930.00), SIMDE_FLOAT64_C( -720.45) },
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{ SIMDE_FLOAT64_C( 96.66), SIMDE_FLOAT64_C( 326.47) },
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{ SIMDE_FLOAT64_C( 96.66), SIMDE_FLOAT64_C( 326.47) },
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{ SIMDE_FLOAT64_C( 8413.16), SIMDE_FLOAT64_C(105862.21) } },
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{ { SIMDE_FLOAT64_C( -52.84), SIMDE_FLOAT64_C( 875.57) },
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{ SIMDE_FLOAT64_C( -832.42), SIMDE_FLOAT64_C( -266.54) },
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{ SIMDE_FLOAT64_C( -832.42), SIMDE_FLOAT64_C( -266.54) },
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{ SIMDE_FLOAT64_C(692870.22), SIMDE_FLOAT64_C( 71919.14) } },
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{ { SIMDE_FLOAT64_C( 582.06), SIMDE_FLOAT64_C( 390.67) },
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{ SIMDE_FLOAT64_C( 713.92), SIMDE_FLOAT64_C( -481.53) },
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{ SIMDE_FLOAT64_C( 713.92), SIMDE_FLOAT64_C( -481.53) },
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{ SIMDE_FLOAT64_C(510263.83), SIMDE_FLOAT64_C(232261.81) } },
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{ { SIMDE_FLOAT64_C( 246.83), SIMDE_FLOAT64_C( -742.77) },
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{ SIMDE_FLOAT64_C( 332.12), SIMDE_FLOAT64_C( -798.45) },
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{ SIMDE_FLOAT64_C( 332.12), SIMDE_FLOAT64_C( -798.45) },
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{ SIMDE_FLOAT64_C(110550.52), SIMDE_FLOAT64_C(636779.63) } },
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{ { SIMDE_FLOAT64_C( 180.40), SIMDE_FLOAT64_C( -132.97) },
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{ SIMDE_FLOAT64_C( 916.06), SIMDE_FLOAT64_C( 698.44) },
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{ SIMDE_FLOAT64_C( 916.06), SIMDE_FLOAT64_C( 698.44) },
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{ SIMDE_FLOAT64_C(839346.32), SIMDE_FLOAT64_C(487685.46) } },
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{ { SIMDE_FLOAT64_C( -79.04), SIMDE_FLOAT64_C( 600.83) },
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{ SIMDE_FLOAT64_C( -871.27), SIMDE_FLOAT64_C( 389.47) },
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{ SIMDE_FLOAT64_C( -871.27), SIMDE_FLOAT64_C( 389.47) },
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{ SIMDE_FLOAT64_C(759032.37), SIMDE_FLOAT64_C(152287.71) } },
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};
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for (size_t i = 0 ; i < (sizeof(test_vec) / sizeof(test_vec[0])) ; i++) {
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simde_v128_t a = simde_wasm_v128_load(test_vec[i].a);
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simde_v128_t b = simde_wasm_v128_load(test_vec[i].b);
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simde_v128_t c = simde_wasm_v128_load(test_vec[i].c);
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simde_v128_t r = simde_wasm_f64x2_fma(a, b, c);
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simde_test_wasm_f64x2_assert_equal(r, simde_wasm_v128_load(test_vec[i].r), 1);
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}
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return 0;
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#else
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fputc('\n', stdout);
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simde_float64 inputs[8 * 2 * (sizeof(simde_v128_t) / sizeof(simde_float64))];
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simde_test_wasm_f64x2_random_full(8, 2, inputs, -SIMDE_FLOAT64_C(1000.0), SIMDE_FLOAT64_C(1000.0), HEDLEY_STATIC_CAST(SimdeTestVecFloatType, SIMDE_TEST_VEC_FLOAT_NAN));
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for (size_t i = 0 ; i < 8 ; i++) {
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simde_v128_t
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a = simde_test_wasm_f64x2_random_full_extract(2, inputs, i, 0),
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b = simde_test_wasm_f64x2_random_full_extract(2, inputs, i, 1),
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c = simde_test_wasm_f64x2_random_full_extract(2, inputs, i, 1),
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r;
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r = simde_wasm_f64x2_fma(a, b, c);
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simde_test_wasm_f64x2_write(3, a, SIMDE_TEST_VEC_POS_FIRST);
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simde_test_wasm_f64x2_write(3, b, SIMDE_TEST_VEC_POS_MIDDLE);
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simde_test_wasm_f64x2_write(3, c, SIMDE_TEST_VEC_POS_MIDDLE);
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simde_test_wasm_f64x2_write(3, r, SIMDE_TEST_VEC_POS_LAST);
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}
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return 1;
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#endif
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}
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SIMDE_TEST_FUNC_LIST_BEGIN
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SIMDE_TEST_FUNC_LIST_ENTRY(wasm_f32x4_fma)
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SIMDE_TEST_FUNC_LIST_ENTRY(wasm_f64x2_fma)
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SIMDE_TEST_FUNC_LIST_END
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#include "test-relaxed-simd-footer.h"
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183
thirdparty/simde/test/wasm/relaxed-simd/fms.c
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183
thirdparty/simde/test/wasm/relaxed-simd/fms.c
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@ -1,183 +0,0 @@
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/* Copyright (c) 2021 Evan Nemerson <evan@nemerson.com>
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*
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* Permission is hereby granted, free of charge, to any person
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* obtaining a copy of this software and associated documentation
|
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* files (the "Software"), to deal in the Software without
|
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* restriction, including without limitation the rights to use, copy,
|
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* modify, merge, publish, distribute, sublicense, and/or sell copies
|
||||
* of the Software, and to permit persons to whom the Software is
|
||||
* furnished to do so, subject to the following conditions:
|
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*
|
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* The above copyright notice and this permission notice shall be
|
||||
* included in all copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
|
||||
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
|
||||
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
|
||||
* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
|
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* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
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* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
|
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* SOFTWARE.
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*/
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#define SIMDE_TEST_WASM_RELAXED_SIMD_INSN fms
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#include "../../../simde/wasm/relaxed-simd.h"
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#include "test-relaxed-simd.h"
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static int
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test_simde_wasm_f32x4_fms(SIMDE_MUNIT_TEST_ARGS) {
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#if 1
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SIMDE_TEST_STRUCT_MODIFIERS struct {
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simde_float32 a[sizeof(simde_v128_t) / sizeof(simde_float32)];
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simde_float32 b[sizeof(simde_v128_t) / sizeof(simde_float32)];
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simde_float32 c[sizeof(simde_v128_t) / sizeof(simde_float32)];
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simde_float32 r[sizeof(simde_v128_t) / sizeof(simde_float32)];
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} test_vec[] = {
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#if !defined(SIMDE_FAST_MATH)
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{ { SIMDE_MATH_NANF, SIMDE_FLOAT32_C( -993.27), SIMDE_MATH_NANF, SIMDE_FLOAT32_C( 417.41) },
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{ SIMDE_FLOAT32_C( -485.37), SIMDE_MATH_NANF, SIMDE_MATH_NANF, SIMDE_FLOAT32_C( 417.41) },
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{ SIMDE_FLOAT32_C( -485.37), SIMDE_MATH_NANF, SIMDE_MATH_NANF, SIMDE_FLOAT32_C( 417.41) },
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{ SIMDE_MATH_NANF, SIMDE_MATH_NANF, SIMDE_MATH_NANF, SIMDE_FLOAT32_C(-173813.70) } },
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#endif
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{ { SIMDE_FLOAT32_C( -135.40), SIMDE_FLOAT32_C( -44.03), SIMDE_FLOAT32_C( 309.21), SIMDE_FLOAT32_C( 776.94) },
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{ SIMDE_FLOAT32_C( 285.44), SIMDE_FLOAT32_C( 449.56), SIMDE_FLOAT32_C( -32.12), SIMDE_FLOAT32_C( 455.56) },
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{ SIMDE_FLOAT32_C( 285.44), SIMDE_FLOAT32_C( 449.56), SIMDE_FLOAT32_C( -32.12), SIMDE_FLOAT32_C( 455.56) },
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{ SIMDE_FLOAT32_C(-81611.39), SIMDE_FLOAT32_C(-202148.22), SIMDE_FLOAT32_C( -722.48), SIMDE_FLOAT32_C(-206757.97) } },
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{ { SIMDE_FLOAT32_C( -255.61), SIMDE_FLOAT32_C( -375.49), SIMDE_FLOAT32_C( -500.83), SIMDE_FLOAT32_C( -933.43) },
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{ SIMDE_FLOAT32_C( 338.55), SIMDE_FLOAT32_C( -93.11), SIMDE_FLOAT32_C( 370.59), SIMDE_FLOAT32_C( -687.41) },
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{ SIMDE_FLOAT32_C( 338.55), SIMDE_FLOAT32_C( -93.11), SIMDE_FLOAT32_C( 370.59), SIMDE_FLOAT32_C( -687.41) },
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{ SIMDE_FLOAT32_C(-114871.70), SIMDE_FLOAT32_C( -9044.96), SIMDE_FLOAT32_C(-137837.78), SIMDE_FLOAT32_C(-473465.91) } },
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{ { SIMDE_FLOAT32_C( 898.51), SIMDE_FLOAT32_C( 628.53), SIMDE_FLOAT32_C( 902.40), SIMDE_FLOAT32_C( 62.33) },
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{ SIMDE_FLOAT32_C( -446.25), SIMDE_FLOAT32_C( 645.33), SIMDE_FLOAT32_C( -460.63), SIMDE_FLOAT32_C( 754.66) },
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{ SIMDE_FLOAT32_C( -446.25), SIMDE_FLOAT32_C( 645.33), SIMDE_FLOAT32_C( -460.63), SIMDE_FLOAT32_C( 754.66) },
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{ SIMDE_FLOAT32_C(-198240.55), SIMDE_FLOAT32_C(-415822.31), SIMDE_FLOAT32_C(-211277.59), SIMDE_FLOAT32_C(-569449.38) } },
|
||||
{ { SIMDE_FLOAT32_C( 652.06), SIMDE_FLOAT32_C( 329.68), SIMDE_FLOAT32_C( -821.45), SIMDE_FLOAT32_C( -833.31) },
|
||||
{ SIMDE_FLOAT32_C( -319.39), SIMDE_FLOAT32_C( 484.50), SIMDE_FLOAT32_C( 1.43), SIMDE_FLOAT32_C( 545.21) },
|
||||
{ SIMDE_FLOAT32_C( -319.39), SIMDE_FLOAT32_C( 484.50), SIMDE_FLOAT32_C( 1.43), SIMDE_FLOAT32_C( 545.21) },
|
||||
{ SIMDE_FLOAT32_C(-101357.92), SIMDE_FLOAT32_C(-234410.56), SIMDE_FLOAT32_C( -823.49), SIMDE_FLOAT32_C(-298087.28) } },
|
||||
{ { SIMDE_FLOAT32_C( -559.53), SIMDE_FLOAT32_C( -689.36), SIMDE_FLOAT32_C( 322.15), SIMDE_FLOAT32_C( 725.90) },
|
||||
{ SIMDE_FLOAT32_C( 760.20), SIMDE_FLOAT32_C( -709.97), SIMDE_FLOAT32_C( 181.46), SIMDE_FLOAT32_C( -495.41) },
|
||||
{ SIMDE_FLOAT32_C( 760.20), SIMDE_FLOAT32_C( -709.97), SIMDE_FLOAT32_C( 181.46), SIMDE_FLOAT32_C( -495.41) },
|
||||
{ SIMDE_FLOAT32_C(-578463.56), SIMDE_FLOAT32_C(-504746.72), SIMDE_FLOAT32_C(-32605.58), SIMDE_FLOAT32_C(-244705.17) } },
|
||||
{ { SIMDE_FLOAT32_C( -85.45), SIMDE_FLOAT32_C( 680.63), SIMDE_FLOAT32_C( -428.83), SIMDE_FLOAT32_C( -746.90) },
|
||||
{ SIMDE_FLOAT32_C( -412.48), SIMDE_FLOAT32_C( 941.76), SIMDE_FLOAT32_C( -434.31), SIMDE_FLOAT32_C( -513.97) },
|
||||
{ SIMDE_FLOAT32_C( -412.48), SIMDE_FLOAT32_C( 941.76), SIMDE_FLOAT32_C( -434.31), SIMDE_FLOAT32_C( -513.97) },
|
||||
{ SIMDE_FLOAT32_C(-170225.22), SIMDE_FLOAT32_C(-886231.31), SIMDE_FLOAT32_C(-189054.00), SIMDE_FLOAT32_C(-264912.03) } },
|
||||
{ { SIMDE_FLOAT32_C( 570.28), SIMDE_FLOAT32_C( -531.92), SIMDE_FLOAT32_C( 548.36), SIMDE_FLOAT32_C( -875.96) },
|
||||
{ SIMDE_FLOAT32_C( -886.59), SIMDE_FLOAT32_C( -912.27), SIMDE_FLOAT32_C( 878.70), SIMDE_FLOAT32_C( 765.47) },
|
||||
{ SIMDE_FLOAT32_C( -886.59), SIMDE_FLOAT32_C( -912.27), SIMDE_FLOAT32_C( 878.70), SIMDE_FLOAT32_C( 765.47) },
|
||||
{ SIMDE_FLOAT32_C(-785471.62), SIMDE_FLOAT32_C(-832768.50), SIMDE_FLOAT32_C(-771565.31), SIMDE_FLOAT32_C(-586820.19) } },
|
||||
};
|
||||
|
||||
for (size_t i = 0 ; i < (sizeof(test_vec) / sizeof(test_vec[0])) ; i++) {
|
||||
simde_v128_t a = simde_wasm_v128_load(test_vec[i].a);
|
||||
simde_v128_t b = simde_wasm_v128_load(test_vec[i].b);
|
||||
simde_v128_t c = simde_wasm_v128_load(test_vec[i].b);
|
||||
simde_v128_t r = simde_wasm_f32x4_fms(a, b, c);
|
||||
simde_test_wasm_f32x4_assert_equal(r, simde_wasm_v128_load(test_vec[i].r), 1);
|
||||
}
|
||||
return 0;
|
||||
#else
|
||||
fputc('\n', stdout);
|
||||
simde_float32 inputs[8 * 2 * (sizeof(simde_v128_t) / sizeof(simde_float32))];
|
||||
simde_test_wasm_f32x4_random_full(8, 2, inputs, -SIMDE_FLOAT32_C(1000.0), SIMDE_FLOAT32_C(1000.0), HEDLEY_STATIC_CAST(SimdeTestVecFloatType, SIMDE_TEST_VEC_FLOAT_NAN | SIMDE_TEST_VEC_FLOAT_EQUAL));
|
||||
for (size_t i = 0 ; i < 8 ; i++) {
|
||||
simde_v128_t
|
||||
a = simde_test_wasm_f32x4_random_full_extract(2, inputs, i, 0),
|
||||
b = simde_test_wasm_f32x4_random_full_extract(2, inputs, i, 1),
|
||||
c = simde_test_wasm_f32x4_random_full_extract(2, inputs, i, 1),
|
||||
r;
|
||||
|
||||
r = simde_wasm_f32x4_fms(a, b, c);
|
||||
|
||||
simde_test_wasm_f32x4_write(3, a, SIMDE_TEST_VEC_POS_FIRST);
|
||||
simde_test_wasm_f32x4_write(3, b, SIMDE_TEST_VEC_POS_MIDDLE);
|
||||
simde_test_wasm_f32x4_write(3, c, SIMDE_TEST_VEC_POS_MIDDLE);
|
||||
simde_test_wasm_f32x4_write(3, r, SIMDE_TEST_VEC_POS_LAST);
|
||||
}
|
||||
return 1;
|
||||
#endif
|
||||
}
|
||||
|
||||
static int
|
||||
test_simde_wasm_f64x2_fms(SIMDE_MUNIT_TEST_ARGS) {
|
||||
#if 1
|
||||
SIMDE_TEST_STRUCT_MODIFIERS struct {
|
||||
simde_float64 a[sizeof(simde_v128_t) / sizeof(simde_float64)];
|
||||
simde_float64 b[sizeof(simde_v128_t) / sizeof(simde_float64)];
|
||||
simde_float64 c[sizeof(simde_v128_t) / sizeof(simde_float64)];
|
||||
simde_float64 r[sizeof(simde_v128_t) / sizeof(simde_float64)];
|
||||
} test_vec[] = {
|
||||
#if !defined(SIMDE_FAST_MATH)
|
||||
{ { SIMDE_MATH_NAN, SIMDE_FLOAT64_C( 932.16) },
|
||||
{ SIMDE_FLOAT64_C( -901.98), SIMDE_MATH_NAN },
|
||||
{ SIMDE_FLOAT64_C( -901.98), SIMDE_MATH_NAN },
|
||||
{ SIMDE_MATH_NAN, SIMDE_MATH_NAN } },
|
||||
{ { SIMDE_MATH_NAN, SIMDE_FLOAT64_C( 643.23) },
|
||||
{ SIMDE_MATH_NAN, SIMDE_FLOAT64_C( 244.23) },
|
||||
{ SIMDE_MATH_NAN, SIMDE_FLOAT64_C( 244.23) },
|
||||
{ SIMDE_MATH_NAN, SIMDE_FLOAT64_C(-59005.06) } },
|
||||
#endif
|
||||
{ { SIMDE_FLOAT64_C( -34.62), SIMDE_FLOAT64_C( 708.12) },
|
||||
{ SIMDE_FLOAT64_C( 4.43), SIMDE_FLOAT64_C( 255.42) },
|
||||
{ SIMDE_FLOAT64_C( 4.43), SIMDE_FLOAT64_C( 255.42) },
|
||||
{ SIMDE_FLOAT64_C( -54.24), SIMDE_FLOAT64_C(-64531.26) } },
|
||||
{ { SIMDE_FLOAT64_C( -110.42), SIMDE_FLOAT64_C( 509.02) },
|
||||
{ SIMDE_FLOAT64_C( -830.04), SIMDE_FLOAT64_C( -429.79) },
|
||||
{ SIMDE_FLOAT64_C( -830.04), SIMDE_FLOAT64_C( -429.79) },
|
||||
{ SIMDE_FLOAT64_C(-689076.82), SIMDE_FLOAT64_C(-184210.42) } },
|
||||
{ { SIMDE_FLOAT64_C( -919.81), SIMDE_FLOAT64_C( -576.94) },
|
||||
{ SIMDE_FLOAT64_C( 157.73), SIMDE_FLOAT64_C( -978.05) },
|
||||
{ SIMDE_FLOAT64_C( 157.73), SIMDE_FLOAT64_C( -978.05) },
|
||||
{ SIMDE_FLOAT64_C(-25798.56), SIMDE_FLOAT64_C(-957158.74) } },
|
||||
{ { SIMDE_FLOAT64_C( -11.25), SIMDE_FLOAT64_C( 643.76) },
|
||||
{ SIMDE_FLOAT64_C( 592.23), SIMDE_FLOAT64_C( 456.83) },
|
||||
{ SIMDE_FLOAT64_C( 592.23), SIMDE_FLOAT64_C( 456.83) },
|
||||
{ SIMDE_FLOAT64_C(-350747.62), SIMDE_FLOAT64_C(-208049.89) } },
|
||||
{ { SIMDE_FLOAT64_C( 192.13), SIMDE_FLOAT64_C( 716.26) },
|
||||
{ SIMDE_FLOAT64_C( 570.24), SIMDE_FLOAT64_C( 279.86) },
|
||||
{ SIMDE_FLOAT64_C( 570.24), SIMDE_FLOAT64_C( 279.86) },
|
||||
{ SIMDE_FLOAT64_C(-324981.53), SIMDE_FLOAT64_C(-77605.36) } },
|
||||
{ { SIMDE_FLOAT64_C( 594.96), SIMDE_FLOAT64_C( 335.72) },
|
||||
{ SIMDE_FLOAT64_C( -302.73), SIMDE_FLOAT64_C( 652.21) },
|
||||
{ SIMDE_FLOAT64_C( -302.73), SIMDE_FLOAT64_C( 652.21) },
|
||||
{ SIMDE_FLOAT64_C(-91050.49), SIMDE_FLOAT64_C(-425042.16) } },
|
||||
};
|
||||
|
||||
for (size_t i = 0 ; i < (sizeof(test_vec) / sizeof(test_vec[0])) ; i++) {
|
||||
simde_v128_t a = simde_wasm_v128_load(test_vec[i].a);
|
||||
simde_v128_t b = simde_wasm_v128_load(test_vec[i].b);
|
||||
simde_v128_t c = simde_wasm_v128_load(test_vec[i].c);
|
||||
simde_v128_t r = simde_wasm_f64x2_fms(a, b, c);
|
||||
simde_test_wasm_f64x2_assert_equal(r, simde_wasm_v128_load(test_vec[i].r), 1);
|
||||
}
|
||||
return 0;
|
||||
#else
|
||||
fputc('\n', stdout);
|
||||
simde_float64 inputs[8 * 2 * (sizeof(simde_v128_t) / sizeof(simde_float64))];
|
||||
simde_test_wasm_f64x2_random_full(8, 2, inputs, -SIMDE_FLOAT64_C(1000.0), SIMDE_FLOAT64_C(1000.0), HEDLEY_STATIC_CAST(SimdeTestVecFloatType, SIMDE_TEST_VEC_FLOAT_NAN));
|
||||
for (size_t i = 0 ; i < 8 ; i++) {
|
||||
simde_v128_t
|
||||
a = simde_test_wasm_f64x2_random_full_extract(2, inputs, i, 0),
|
||||
b = simde_test_wasm_f64x2_random_full_extract(2, inputs, i, 1),
|
||||
c = simde_test_wasm_f64x2_random_full_extract(2, inputs, i, 1),
|
||||
r;
|
||||
|
||||
r = simde_wasm_f64x2_fms(a, b, c);
|
||||
|
||||
simde_test_wasm_f64x2_write(3, a, SIMDE_TEST_VEC_POS_FIRST);
|
||||
simde_test_wasm_f64x2_write(3, b, SIMDE_TEST_VEC_POS_MIDDLE);
|
||||
simde_test_wasm_f64x2_write(3, c, SIMDE_TEST_VEC_POS_MIDDLE);
|
||||
simde_test_wasm_f64x2_write(3, r, SIMDE_TEST_VEC_POS_LAST);
|
||||
}
|
||||
return 1;
|
||||
#endif
|
||||
}
|
||||
|
||||
SIMDE_TEST_FUNC_LIST_BEGIN
|
||||
SIMDE_TEST_FUNC_LIST_ENTRY(wasm_f32x4_fms)
|
||||
SIMDE_TEST_FUNC_LIST_ENTRY(wasm_f64x2_fms)
|
||||
SIMDE_TEST_FUNC_LIST_END
|
||||
|
||||
#include "test-relaxed-simd-footer.h"
|
||||
|
|
@ -21,12 +21,12 @@
|
|||
* SOFTWARE.
|
||||
*/
|
||||
|
||||
#define SIMDE_TEST_WASM_RELAXED_SIMD_INSN blend
|
||||
#define SIMDE_TEST_WASM_RELAXED_SIMD_INSN laneselect
|
||||
#include "../../../simde/wasm/relaxed-simd.h"
|
||||
#include "test-relaxed-simd.h"
|
||||
|
||||
static int
|
||||
test_simde_wasm_i8x16_blend(SIMDE_MUNIT_TEST_ARGS) {
|
||||
test_simde_wasm_i8x16_relaxed_laneselect(SIMDE_MUNIT_TEST_ARGS) {
|
||||
#if 1
|
||||
SIMDE_TEST_STRUCT_MODIFIERS struct {
|
||||
int8_t a[sizeof(simde_v128_t) / sizeof(int8_t)];
|
||||
|
|
@ -104,7 +104,7 @@ test_simde_wasm_i8x16_blend(SIMDE_MUNIT_TEST_ARGS) {
|
|||
simde_v128_t a = simde_wasm_v128_load(test_vec[i].a);
|
||||
simde_v128_t b = simde_wasm_v128_load(test_vec[i].b);
|
||||
simde_v128_t mask = simde_wasm_v128_load(test_vec[i].mask);
|
||||
simde_v128_t r = simde_wasm_i8x16_blend(a, b, mask);
|
||||
simde_v128_t r = simde_wasm_i8x16_relaxed_laneselect(a, b, mask);
|
||||
simde_test_wasm_i8x16_assert_equal(r, simde_wasm_v128_load(test_vec[i].r));
|
||||
}
|
||||
return 0;
|
||||
|
|
@ -117,7 +117,7 @@ test_simde_wasm_i8x16_blend(SIMDE_MUNIT_TEST_ARGS) {
|
|||
mask = simde_wasm_i8x16_shr(simde_test_wasm_i8x16_random(), 7),
|
||||
r;
|
||||
|
||||
r = simde_wasm_i8x16_blend(a, b, mask);
|
||||
r = simde_wasm_i8x16_relaxed_laneselect(a, b, mask);
|
||||
|
||||
simde_test_wasm_i8x16_write(3, a, SIMDE_TEST_VEC_POS_FIRST);
|
||||
simde_test_wasm_i8x16_write(3, b, SIMDE_TEST_VEC_POS_MIDDLE);
|
||||
|
|
@ -129,7 +129,7 @@ test_simde_wasm_i8x16_blend(SIMDE_MUNIT_TEST_ARGS) {
|
|||
}
|
||||
|
||||
static int
|
||||
test_simde_wasm_i16x8_blend(SIMDE_MUNIT_TEST_ARGS) {
|
||||
test_simde_wasm_i16x8_relaxed_laneselect(SIMDE_MUNIT_TEST_ARGS) {
|
||||
#if 1
|
||||
SIMDE_TEST_STRUCT_MODIFIERS struct {
|
||||
int16_t a[sizeof(simde_v128_t) / sizeof(int16_t)];
|
||||
|
|
@ -175,7 +175,7 @@ test_simde_wasm_i16x8_blend(SIMDE_MUNIT_TEST_ARGS) {
|
|||
simde_v128_t a = simde_wasm_v128_load(test_vec[i].a);
|
||||
simde_v128_t b = simde_wasm_v128_load(test_vec[i].b);
|
||||
simde_v128_t mask = simde_wasm_v128_load(test_vec[i].mask);
|
||||
simde_v128_t r = simde_wasm_i16x8_blend(a, b, mask);
|
||||
simde_v128_t r = simde_wasm_i16x8_relaxed_laneselect(a, b, mask);
|
||||
simde_test_wasm_i16x8_assert_equal(r, simde_wasm_v128_load(test_vec[i].r));
|
||||
}
|
||||
return 0;
|
||||
|
|
@ -188,7 +188,7 @@ test_simde_wasm_i16x8_blend(SIMDE_MUNIT_TEST_ARGS) {
|
|||
mask = simde_wasm_i16x8_shr(simde_test_wasm_i16x8_random(), 15),
|
||||
r;
|
||||
|
||||
r = simde_wasm_i16x8_blend(a, b, mask);
|
||||
r = simde_wasm_i16x8_relaxed_laneselect(a, b, mask);
|
||||
|
||||
simde_test_wasm_i16x8_write(3, a, SIMDE_TEST_VEC_POS_FIRST);
|
||||
simde_test_wasm_i16x8_write(3, b, SIMDE_TEST_VEC_POS_MIDDLE);
|
||||
|
|
@ -200,7 +200,7 @@ test_simde_wasm_i16x8_blend(SIMDE_MUNIT_TEST_ARGS) {
|
|||
}
|
||||
|
||||
static int
|
||||
test_simde_wasm_i32x4_blend(SIMDE_MUNIT_TEST_ARGS) {
|
||||
test_simde_wasm_i32x4_relaxed_laneselect(SIMDE_MUNIT_TEST_ARGS) {
|
||||
#if 1
|
||||
SIMDE_TEST_STRUCT_MODIFIERS struct {
|
||||
int32_t a[sizeof(simde_v128_t) / sizeof(int32_t)];
|
||||
|
|
@ -246,7 +246,7 @@ test_simde_wasm_i32x4_blend(SIMDE_MUNIT_TEST_ARGS) {
|
|||
simde_v128_t a = simde_wasm_v128_load(test_vec[i].a);
|
||||
simde_v128_t b = simde_wasm_v128_load(test_vec[i].b);
|
||||
simde_v128_t mask = simde_wasm_v128_load(test_vec[i].mask);
|
||||
simde_v128_t r = simde_wasm_i32x4_blend(a, b, mask);
|
||||
simde_v128_t r = simde_wasm_i32x4_relaxed_laneselect(a, b, mask);
|
||||
simde_test_wasm_i32x4_assert_equal(r, simde_wasm_v128_load(test_vec[i].r));
|
||||
}
|
||||
return 0;
|
||||
|
|
@ -259,7 +259,7 @@ test_simde_wasm_i32x4_blend(SIMDE_MUNIT_TEST_ARGS) {
|
|||
mask = simde_wasm_i32x4_shr(simde_test_wasm_i32x4_random(), 31),
|
||||
r;
|
||||
|
||||
r = simde_wasm_i32x4_blend(a, b, mask);
|
||||
r = simde_wasm_i32x4_relaxed_laneselect(a, b, mask);
|
||||
|
||||
simde_test_wasm_i32x4_write(3, a, SIMDE_TEST_VEC_POS_FIRST);
|
||||
simde_test_wasm_i32x4_write(3, b, SIMDE_TEST_VEC_POS_MIDDLE);
|
||||
|
|
@ -271,7 +271,7 @@ test_simde_wasm_i32x4_blend(SIMDE_MUNIT_TEST_ARGS) {
|
|||
}
|
||||
|
||||
static int
|
||||
test_simde_wasm_i64x2_blend(SIMDE_MUNIT_TEST_ARGS) {
|
||||
test_simde_wasm_i64x2_relaxed_laneselect(SIMDE_MUNIT_TEST_ARGS) {
|
||||
#if 1
|
||||
SIMDE_TEST_STRUCT_MODIFIERS struct {
|
||||
int64_t a[sizeof(simde_v128_t) / sizeof(int64_t)];
|
||||
|
|
@ -317,7 +317,7 @@ test_simde_wasm_i64x2_blend(SIMDE_MUNIT_TEST_ARGS) {
|
|||
simde_v128_t a = simde_wasm_v128_load(test_vec[i].a);
|
||||
simde_v128_t b = simde_wasm_v128_load(test_vec[i].b);
|
||||
simde_v128_t mask = simde_wasm_v128_load(test_vec[i].mask);
|
||||
simde_v128_t r = simde_wasm_i64x2_blend(a, b, mask);
|
||||
simde_v128_t r = simde_wasm_i64x2_relaxed_laneselect(a, b, mask);
|
||||
simde_test_wasm_i64x2_assert_equal(r, simde_wasm_v128_load(test_vec[i].r));
|
||||
}
|
||||
return 0;
|
||||
|
|
@ -330,7 +330,7 @@ test_simde_wasm_i64x2_blend(SIMDE_MUNIT_TEST_ARGS) {
|
|||
mask = simde_wasm_i64x2_shr(simde_test_wasm_i64x2_random(), 63),
|
||||
r;
|
||||
|
||||
r = simde_wasm_i64x2_blend(a, b, mask);
|
||||
r = simde_wasm_i64x2_relaxed_laneselect(a, b, mask);
|
||||
|
||||
simde_test_wasm_i64x2_write(3, a, SIMDE_TEST_VEC_POS_FIRST);
|
||||
simde_test_wasm_i64x2_write(3, b, SIMDE_TEST_VEC_POS_MIDDLE);
|
||||
|
|
@ -342,10 +342,10 @@ test_simde_wasm_i64x2_blend(SIMDE_MUNIT_TEST_ARGS) {
|
|||
}
|
||||
|
||||
SIMDE_TEST_FUNC_LIST_BEGIN
|
||||
SIMDE_TEST_FUNC_LIST_ENTRY(wasm_i8x16_blend)
|
||||
SIMDE_TEST_FUNC_LIST_ENTRY(wasm_i16x8_blend)
|
||||
SIMDE_TEST_FUNC_LIST_ENTRY(wasm_i32x4_blend)
|
||||
SIMDE_TEST_FUNC_LIST_ENTRY(wasm_i64x2_blend)
|
||||
SIMDE_TEST_FUNC_LIST_ENTRY(wasm_i8x16_relaxed_laneselect)
|
||||
SIMDE_TEST_FUNC_LIST_ENTRY(wasm_i16x8_relaxed_laneselect)
|
||||
SIMDE_TEST_FUNC_LIST_ENTRY(wasm_i32x4_relaxed_laneselect)
|
||||
SIMDE_TEST_FUNC_LIST_ENTRY(wasm_i64x2_relaxed_laneselect)
|
||||
SIMDE_TEST_FUNC_LIST_END
|
||||
|
||||
#include "test-relaxed-simd-footer.h"
|
||||
183
thirdparty/simde/test/wasm/relaxed-simd/madd.c
vendored
Normal file
183
thirdparty/simde/test/wasm/relaxed-simd/madd.c
vendored
Normal file
|
|
@ -0,0 +1,183 @@
|
|||
/* Copyright (c) 2021 Evan Nemerson <evan@nemerson.com>
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person
|
||||
* obtaining a copy of this software and associated documentation
|
||||
* files (the "Software"), to deal in the Software without
|
||||
* restriction, including without limitation the rights to use, copy,
|
||||
* modify, merge, publish, distribute, sublicense, and/or sell copies
|
||||
* of the Software, and to permit persons to whom the Software is
|
||||
* furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be
|
||||
* included in all copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
|
||||
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
|
||||
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
|
||||
* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
|
||||
* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
|
||||
* SOFTWARE.
|
||||
*/
|
||||
|
||||
#define SIMDE_TEST_WASM_RELAXED_SIMD_INSN madd
|
||||
#include "../../../simde/wasm/relaxed-simd.h"
|
||||
#include "test-relaxed-simd.h"
|
||||
|
||||
static int
|
||||
test_simde_wasm_f32x4_relaxed_madd(SIMDE_MUNIT_TEST_ARGS) {
|
||||
#if 1
|
||||
SIMDE_TEST_STRUCT_MODIFIERS struct {
|
||||
simde_float32 a[sizeof(simde_v128_t) / sizeof(simde_float32)];
|
||||
simde_float32 b[sizeof(simde_v128_t) / sizeof(simde_float32)];
|
||||
simde_float32 c[sizeof(simde_v128_t) / sizeof(simde_float32)];
|
||||
simde_float32 r[sizeof(simde_v128_t) / sizeof(simde_float32)];
|
||||
} test_vec[] = {
|
||||
#if !defined(SIMDE_FAST_MATH)
|
||||
{ { SIMDE_MATH_NANF, SIMDE_FLOAT32_C( -939.85), SIMDE_MATH_NANF, SIMDE_FLOAT32_C( -336.73) },
|
||||
{ SIMDE_FLOAT32_C( 40.12), SIMDE_MATH_NANF, SIMDE_MATH_NANF, SIMDE_FLOAT32_C( -336.73) },
|
||||
{ SIMDE_FLOAT32_C( 40.12), SIMDE_MATH_NANF, SIMDE_MATH_NANF, SIMDE_FLOAT32_C( -336.73) },
|
||||
{ SIMDE_MATH_NANF, SIMDE_MATH_NANF, SIMDE_MATH_NANF, SIMDE_FLOAT32_C(113050.37) } },
|
||||
#endif
|
||||
{ { SIMDE_FLOAT32_C( 279.46), SIMDE_FLOAT32_C( -892.17), SIMDE_FLOAT32_C( 472.79), SIMDE_FLOAT32_C( 28.20) },
|
||||
{ SIMDE_FLOAT32_C( 553.33), SIMDE_FLOAT32_C( -43.23), SIMDE_FLOAT32_C( 213.29), SIMDE_FLOAT32_C( 976.59) },
|
||||
{ SIMDE_FLOAT32_C( 553.33), SIMDE_FLOAT32_C( -43.23), SIMDE_FLOAT32_C( 213.29), SIMDE_FLOAT32_C( 976.59) },
|
||||
{ SIMDE_FLOAT32_C(155186.94), SIMDE_FLOAT32_C( 38525.28), SIMDE_FLOAT32_C(101054.66), SIMDE_FLOAT32_C( 28516.43) } },
|
||||
{ { SIMDE_FLOAT32_C( -199.25), SIMDE_FLOAT32_C( 569.13), SIMDE_FLOAT32_C( -283.83), SIMDE_FLOAT32_C( 765.16) },
|
||||
{ SIMDE_FLOAT32_C( 566.57), SIMDE_FLOAT32_C( -354.03), SIMDE_FLOAT32_C( 136.16), SIMDE_FLOAT32_C( -900.31) },
|
||||
{ SIMDE_FLOAT32_C( 566.57), SIMDE_FLOAT32_C( -354.03), SIMDE_FLOAT32_C( 136.16), SIMDE_FLOAT32_C( -900.31) },
|
||||
{ SIMDE_FLOAT32_C(-112322.51), SIMDE_FLOAT32_C(-201843.12), SIMDE_FLOAT32_C(-38510.13), SIMDE_FLOAT32_C(-689781.50) } },
|
||||
{ { SIMDE_FLOAT32_C( -487.28), SIMDE_FLOAT32_C( 960.14), SIMDE_FLOAT32_C( 549.78), SIMDE_FLOAT32_C( -162.66) },
|
||||
{ SIMDE_FLOAT32_C( 999.49), SIMDE_FLOAT32_C( 808.42), SIMDE_FLOAT32_C( -550.69), SIMDE_FLOAT32_C( 755.10) },
|
||||
{ SIMDE_FLOAT32_C( 999.49), SIMDE_FLOAT32_C( 808.42), SIMDE_FLOAT32_C( -550.69), SIMDE_FLOAT32_C( 755.10) },
|
||||
{ SIMDE_FLOAT32_C(-486032.00), SIMDE_FLOAT32_C(777004.81), SIMDE_FLOAT32_C(-303309.06), SIMDE_FLOAT32_C(-122069.46) } },
|
||||
{ { SIMDE_FLOAT32_C( 316.95), SIMDE_FLOAT32_C( 30.33), SIMDE_FLOAT32_C( 448.55), SIMDE_FLOAT32_C( -478.68) },
|
||||
{ SIMDE_FLOAT32_C( -465.32), SIMDE_FLOAT32_C( -429.53), SIMDE_FLOAT32_C( 856.79), SIMDE_FLOAT32_C( -324.39) },
|
||||
{ SIMDE_FLOAT32_C( -465.32), SIMDE_FLOAT32_C( -429.53), SIMDE_FLOAT32_C( 856.79), SIMDE_FLOAT32_C( -324.39) },
|
||||
{ SIMDE_FLOAT32_C(-147948.50), SIMDE_FLOAT32_C(-13457.17), SIMDE_FLOAT32_C(385169.94), SIMDE_FLOAT32_C(154954.62) } },
|
||||
{ { SIMDE_FLOAT32_C( -404.93), SIMDE_FLOAT32_C( -322.42), SIMDE_FLOAT32_C( 198.39), SIMDE_FLOAT32_C( -16.18) },
|
||||
{ SIMDE_FLOAT32_C( -300.14), SIMDE_FLOAT32_C( 744.61), SIMDE_FLOAT32_C( 342.27), SIMDE_FLOAT32_C( -505.90) },
|
||||
{ SIMDE_FLOAT32_C( -300.14), SIMDE_FLOAT32_C( 744.61), SIMDE_FLOAT32_C( 342.27), SIMDE_FLOAT32_C( -505.90) },
|
||||
{ SIMDE_FLOAT32_C(121235.55), SIMDE_FLOAT32_C(-239332.55), SIMDE_FLOAT32_C( 68245.21), SIMDE_FLOAT32_C( 7679.56) } },
|
||||
{ { SIMDE_FLOAT32_C( -560.16), SIMDE_FLOAT32_C( -586.90), SIMDE_FLOAT32_C( -54.15), SIMDE_FLOAT32_C( -277.30) },
|
||||
{ SIMDE_FLOAT32_C( -912.30), SIMDE_FLOAT32_C( -170.24), SIMDE_FLOAT32_C( -166.55), SIMDE_FLOAT32_C( -308.02) },
|
||||
{ SIMDE_FLOAT32_C( -912.30), SIMDE_FLOAT32_C( -170.24), SIMDE_FLOAT32_C( -166.55), SIMDE_FLOAT32_C( -308.02) },
|
||||
{ SIMDE_FLOAT32_C(510121.62), SIMDE_FLOAT32_C( 99743.62), SIMDE_FLOAT32_C( 8852.13), SIMDE_FLOAT32_C( 85105.92) } },
|
||||
{ { SIMDE_FLOAT32_C( 547.49), SIMDE_FLOAT32_C( -51.58), SIMDE_FLOAT32_C( -417.07), SIMDE_FLOAT32_C( -866.44) },
|
||||
{ SIMDE_FLOAT32_C( 143.24), SIMDE_FLOAT32_C( 483.80), SIMDE_FLOAT32_C( -548.74), SIMDE_FLOAT32_C( -665.65) },
|
||||
{ SIMDE_FLOAT32_C( 143.24), SIMDE_FLOAT32_C( 483.80), SIMDE_FLOAT32_C( -548.74), SIMDE_FLOAT32_C( -665.65) },
|
||||
{ SIMDE_FLOAT32_C( 78565.71), SIMDE_FLOAT32_C(-24470.60), SIMDE_FLOAT32_C(228314.25), SIMDE_FLOAT32_C(576080.19) } },
|
||||
};
|
||||
|
||||
for (size_t i = 0 ; i < (sizeof(test_vec) / sizeof(test_vec[0])) ; i++) {
|
||||
simde_v128_t a = simde_wasm_v128_load(test_vec[i].a);
|
||||
simde_v128_t b = simde_wasm_v128_load(test_vec[i].b);
|
||||
simde_v128_t c = simde_wasm_v128_load(test_vec[i].b);
|
||||
simde_v128_t r = simde_wasm_f32x4_relaxed_madd(a, b, c);
|
||||
simde_test_wasm_f32x4_assert_equal(r, simde_wasm_v128_load(test_vec[i].r), 1);
|
||||
}
|
||||
return 0;
|
||||
#else
|
||||
simde_float32 inputs[8 * 2 * (sizeof(simde_v128_t) / sizeof(simde_float32))];
|
||||
simde_test_wasm_f32x4_random_full(8, 2, inputs, -SIMDE_FLOAT32_C(1000.0), SIMDE_FLOAT32_C(1000.0), HEDLEY_STATIC_CAST(SimdeTestVecFloatType, SIMDE_TEST_VEC_FLOAT_NAN | SIMDE_TEST_VEC_FLOAT_EQUAL));
|
||||
fputc('\n', stdout);
|
||||
for (size_t i = 0 ; i < 8 ; i++) {
|
||||
simde_v128_t
|
||||
a = simde_test_wasm_f32x4_random_full_extract(2, inputs, i, 0),
|
||||
b = simde_test_wasm_f32x4_random_full_extract(2, inputs, i, 1),
|
||||
c = simde_test_wasm_f32x4_random_full_extract(2, inputs, i, 1),
|
||||
r;
|
||||
|
||||
r = simde_wasm_f32x4_relaxed_madd(a, b, c);
|
||||
|
||||
simde_test_wasm_f32x4_write(3, a, SIMDE_TEST_VEC_POS_FIRST);
|
||||
simde_test_wasm_f32x4_write(3, b, SIMDE_TEST_VEC_POS_MIDDLE);
|
||||
simde_test_wasm_f32x4_write(3, c, SIMDE_TEST_VEC_POS_MIDDLE);
|
||||
simde_test_wasm_f32x4_write(3, r, SIMDE_TEST_VEC_POS_LAST);
|
||||
}
|
||||
return 1;
|
||||
#endif
|
||||
}
|
||||
|
||||
static int
|
||||
test_simde_wasm_f64x2_relaxed_madd(SIMDE_MUNIT_TEST_ARGS) {
|
||||
#if 1
|
||||
SIMDE_TEST_STRUCT_MODIFIERS struct {
|
||||
simde_float64 a[sizeof(simde_v128_t) / sizeof(simde_float64)];
|
||||
simde_float64 b[sizeof(simde_v128_t) / sizeof(simde_float64)];
|
||||
simde_float64 c[sizeof(simde_v128_t) / sizeof(simde_float64)];
|
||||
simde_float64 r[sizeof(simde_v128_t) / sizeof(simde_float64)];
|
||||
} test_vec[] = {
|
||||
#if !defined(SIMDE_FAST_MATH)
|
||||
{ { SIMDE_MATH_NAN, SIMDE_FLOAT64_C( 695.24) },
|
||||
{ SIMDE_FLOAT64_C( -758.15), SIMDE_MATH_NAN },
|
||||
{ SIMDE_FLOAT64_C( -758.15), SIMDE_MATH_NAN },
|
||||
{ SIMDE_MATH_NAN, SIMDE_MATH_NAN } },
|
||||
{ { SIMDE_MATH_NAN, SIMDE_FLOAT64_C( -844.22) },
|
||||
{ SIMDE_MATH_NAN, SIMDE_FLOAT64_C( 363.37) },
|
||||
{ SIMDE_MATH_NAN, SIMDE_FLOAT64_C( 363.37) },
|
||||
{ SIMDE_MATH_NAN, SIMDE_FLOAT64_C(-306400.85) } },
|
||||
#endif
|
||||
{ { SIMDE_FLOAT64_C( 509.66), SIMDE_FLOAT64_C( -400.49) },
|
||||
{ SIMDE_FLOAT64_C( 163.04), SIMDE_FLOAT64_C( -942.79) },
|
||||
{ SIMDE_FLOAT64_C( 163.04), SIMDE_FLOAT64_C( -942.79) },
|
||||
{ SIMDE_FLOAT64_C( 83258.01), SIMDE_FLOAT64_C(376635.18) } },
|
||||
{ { SIMDE_FLOAT64_C( 604.83), SIMDE_FLOAT64_C( -31.05) },
|
||||
{ SIMDE_FLOAT64_C( -523.11), SIMDE_FLOAT64_C( 762.22) },
|
||||
{ SIMDE_FLOAT64_C( -523.11), SIMDE_FLOAT64_C( 762.22) },
|
||||
{ SIMDE_FLOAT64_C(-316915.73), SIMDE_FLOAT64_C(-22904.71) } },
|
||||
{ { SIMDE_FLOAT64_C( 387.14), SIMDE_FLOAT64_C( 293.35) },
|
||||
{ SIMDE_FLOAT64_C( -114.01), SIMDE_FLOAT64_C( 60.86) },
|
||||
{ SIMDE_FLOAT64_C( -114.01), SIMDE_FLOAT64_C( 60.86) },
|
||||
{ SIMDE_FLOAT64_C(-44251.84), SIMDE_FLOAT64_C( 17914.14) } },
|
||||
{ { SIMDE_FLOAT64_C( 711.99), SIMDE_FLOAT64_C( 494.07) },
|
||||
{ SIMDE_FLOAT64_C( -456.08), SIMDE_FLOAT64_C( -781.46) },
|
||||
{ SIMDE_FLOAT64_C( -456.08), SIMDE_FLOAT64_C( -781.46) },
|
||||
{ SIMDE_FLOAT64_C(-325180.48), SIMDE_FLOAT64_C(-386877.40) } },
|
||||
{ { SIMDE_FLOAT64_C( -231.37), SIMDE_FLOAT64_C( -589.48) },
|
||||
{ SIMDE_FLOAT64_C( -349.94), SIMDE_FLOAT64_C( -420.17) },
|
||||
{ SIMDE_FLOAT64_C( -349.94), SIMDE_FLOAT64_C( -420.17) },
|
||||
{ SIMDE_FLOAT64_C( 80615.68), SIMDE_FLOAT64_C(247261.64) } },
|
||||
{ { SIMDE_FLOAT64_C( -293.55), SIMDE_FLOAT64_C( 337.68) },
|
||||
{ SIMDE_FLOAT64_C( -803.44), SIMDE_FLOAT64_C( -266.96) },
|
||||
{ SIMDE_FLOAT64_C( -803.44), SIMDE_FLOAT64_C( -266.96) },
|
||||
{ SIMDE_FLOAT64_C(235046.37), SIMDE_FLOAT64_C(-90414.01) } },
|
||||
};
|
||||
|
||||
for (size_t i = 0 ; i < (sizeof(test_vec) / sizeof(test_vec[0])) ; i++) {
|
||||
simde_v128_t a = simde_wasm_v128_load(test_vec[i].a);
|
||||
simde_v128_t b = simde_wasm_v128_load(test_vec[i].b);
|
||||
simde_v128_t c = simde_wasm_v128_load(test_vec[i].c);
|
||||
simde_v128_t r = simde_wasm_f64x2_relaxed_madd(a, b, c);
|
||||
simde_test_wasm_f64x2_assert_equal(r, simde_wasm_v128_load(test_vec[i].r), 1);
|
||||
}
|
||||
return 0;
|
||||
#else
|
||||
simde_float64 inputs[8 * 2 * (sizeof(simde_v128_t) / sizeof(simde_float64))];
|
||||
simde_test_wasm_f64x2_random_full(8, 2, inputs, -SIMDE_FLOAT64_C(1000.0), SIMDE_FLOAT64_C(1000.0), HEDLEY_STATIC_CAST(SimdeTestVecFloatType, SIMDE_TEST_VEC_FLOAT_NAN));
|
||||
fputc('\n', stdout);
|
||||
for (size_t i = 0 ; i < 8 ; i++) {
|
||||
simde_v128_t
|
||||
a = simde_test_wasm_f64x2_random_full_extract(2, inputs, i, 0),
|
||||
b = simde_test_wasm_f64x2_random_full_extract(2, inputs, i, 1),
|
||||
c = simde_test_wasm_f64x2_random_full_extract(2, inputs, i, 1),
|
||||
r;
|
||||
|
||||
r = simde_wasm_f64x2_relaxed_madd(a, b, c);
|
||||
|
||||
simde_test_wasm_f64x2_write(3, a, SIMDE_TEST_VEC_POS_FIRST);
|
||||
simde_test_wasm_f64x2_write(3, b, SIMDE_TEST_VEC_POS_MIDDLE);
|
||||
simde_test_wasm_f64x2_write(3, c, SIMDE_TEST_VEC_POS_MIDDLE);
|
||||
simde_test_wasm_f64x2_write(3, r, SIMDE_TEST_VEC_POS_LAST);
|
||||
}
|
||||
return 1;
|
||||
#endif
|
||||
}
|
||||
|
||||
SIMDE_TEST_FUNC_LIST_BEGIN
|
||||
SIMDE_TEST_FUNC_LIST_ENTRY(wasm_f32x4_relaxed_madd)
|
||||
SIMDE_TEST_FUNC_LIST_ENTRY(wasm_f64x2_relaxed_madd)
|
||||
SIMDE_TEST_FUNC_LIST_END
|
||||
|
||||
#include "test-relaxed-simd-footer.h"
|
||||
146
thirdparty/simde/test/wasm/relaxed-simd/max.c
vendored
Normal file
146
thirdparty/simde/test/wasm/relaxed-simd/max.c
vendored
Normal file
|
|
@ -0,0 +1,146 @@
|
|||
/* Copyright (c) 2021 Evan Nemerson <evan@nemerson.com>
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person
|
||||
* obtaining a copy of this software and associated documentation
|
||||
* files (the "Software"), to deal in the Software without
|
||||
* restriction, including without limitation the rights to use, copy,
|
||||
* modify, merge, publish, distribute, sublicense, and/or sell copies
|
||||
* of the Software, and to permit persons to whom the Software is
|
||||
* furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be
|
||||
* included in all copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
|
||||
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
|
||||
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
|
||||
* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
|
||||
* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
|
||||
* SOFTWARE.
|
||||
*/
|
||||
|
||||
#define SIMDE_TEST_WASM_RELAXED_SIMD_INSN max
|
||||
#include "../../../simde/wasm/relaxed-simd.h"
|
||||
#include "test-relaxed-simd.h"
|
||||
|
||||
static int
|
||||
test_simde_wasm_f32x4_relaxed_max(SIMDE_MUNIT_TEST_ARGS) {
|
||||
#if 1
|
||||
SIMDE_TEST_STRUCT_MODIFIERS struct {
|
||||
simde_float32 a[sizeof(simde_v128_t) / sizeof(simde_float32)];
|
||||
simde_float32 b[sizeof(simde_v128_t) / sizeof(simde_float32)];
|
||||
simde_float32 r[sizeof(simde_v128_t) / sizeof(simde_float32)];
|
||||
} test_vec[] = {
|
||||
{ { SIMDE_FLOAT32_C( -920.07), SIMDE_FLOAT32_C( 830.32), SIMDE_FLOAT32_C( -196.85), SIMDE_FLOAT32_C( 291.81) },
|
||||
{ SIMDE_FLOAT32_C( -289.04), SIMDE_FLOAT32_C( 49.93), SIMDE_FLOAT32_C( -928.55), SIMDE_FLOAT32_C( 69.77) },
|
||||
{ SIMDE_FLOAT32_C( -289.04), SIMDE_FLOAT32_C( 830.32), SIMDE_FLOAT32_C( -196.85), SIMDE_FLOAT32_C( 291.81) } },
|
||||
{ { SIMDE_FLOAT32_C( -679.01), SIMDE_FLOAT32_C( 273.37), SIMDE_FLOAT32_C( -532.77), SIMDE_FLOAT32_C( 127.55) },
|
||||
{ SIMDE_FLOAT32_C( 100.92), SIMDE_FLOAT32_C( -536.72), SIMDE_FLOAT32_C( -535.51), SIMDE_FLOAT32_C( -444.83) },
|
||||
{ SIMDE_FLOAT32_C( 100.92), SIMDE_FLOAT32_C( 273.37), SIMDE_FLOAT32_C( -532.77), SIMDE_FLOAT32_C( 127.55) } },
|
||||
{ { SIMDE_FLOAT32_C( -370.35), SIMDE_FLOAT32_C( 910.66), SIMDE_FLOAT32_C( -449.76), SIMDE_FLOAT32_C( 756.97) },
|
||||
{ SIMDE_FLOAT32_C( -168.50), SIMDE_FLOAT32_C( 242.88), SIMDE_FLOAT32_C( -696.72), SIMDE_FLOAT32_C( 663.79) },
|
||||
{ SIMDE_FLOAT32_C( -168.50), SIMDE_FLOAT32_C( 910.66), SIMDE_FLOAT32_C( -449.76), SIMDE_FLOAT32_C( 756.97) } },
|
||||
{ { SIMDE_FLOAT32_C( -777.21), SIMDE_FLOAT32_C( -561.66), SIMDE_FLOAT32_C( 225.28), SIMDE_FLOAT32_C( 30.10) },
|
||||
{ SIMDE_FLOAT32_C( -535.78), SIMDE_FLOAT32_C( -546.75), SIMDE_FLOAT32_C( 345.48), SIMDE_FLOAT32_C( 708.52) },
|
||||
{ SIMDE_FLOAT32_C( -535.78), SIMDE_FLOAT32_C( -546.75), SIMDE_FLOAT32_C( 345.48), SIMDE_FLOAT32_C( 708.52) } },
|
||||
{ { SIMDE_FLOAT32_C( 940.56), SIMDE_FLOAT32_C( 303.87), SIMDE_FLOAT32_C( 810.53), SIMDE_FLOAT32_C( -526.94) },
|
||||
{ SIMDE_FLOAT32_C( 611.43), SIMDE_FLOAT32_C( 797.37), SIMDE_FLOAT32_C( 432.36), SIMDE_FLOAT32_C( 709.89) },
|
||||
{ SIMDE_FLOAT32_C( 940.56), SIMDE_FLOAT32_C( 797.37), SIMDE_FLOAT32_C( 810.53), SIMDE_FLOAT32_C( 709.89) } },
|
||||
{ { SIMDE_FLOAT32_C( -157.18), SIMDE_FLOAT32_C( -402.78), SIMDE_FLOAT32_C( -362.67), SIMDE_FLOAT32_C( -944.01) },
|
||||
{ SIMDE_FLOAT32_C( 106.70), SIMDE_FLOAT32_C( -208.07), SIMDE_FLOAT32_C( 277.04), SIMDE_FLOAT32_C( 374.11) },
|
||||
{ SIMDE_FLOAT32_C( 106.70), SIMDE_FLOAT32_C( -208.07), SIMDE_FLOAT32_C( 277.04), SIMDE_FLOAT32_C( 374.11) } },
|
||||
{ { SIMDE_FLOAT32_C( -402.16), SIMDE_FLOAT32_C( 227.84), SIMDE_FLOAT32_C( -493.53), SIMDE_FLOAT32_C( 869.48) },
|
||||
{ SIMDE_FLOAT32_C( 903.71), SIMDE_FLOAT32_C( -712.51), SIMDE_FLOAT32_C( -864.99), SIMDE_FLOAT32_C( -151.96) },
|
||||
{ SIMDE_FLOAT32_C( 903.71), SIMDE_FLOAT32_C( 227.84), SIMDE_FLOAT32_C( -493.53), SIMDE_FLOAT32_C( 869.48) } }
|
||||
};
|
||||
|
||||
for (size_t i = 0 ; i < (sizeof(test_vec) / sizeof(test_vec[0])) ; i++) {
|
||||
simde_v128_t a = simde_wasm_v128_load(test_vec[i].a);
|
||||
simde_v128_t b = simde_wasm_v128_load(test_vec[i].b);
|
||||
simde_v128_t r = simde_wasm_f32x4_relaxed_max(a, b);
|
||||
simde_test_wasm_f32x4_assert_equal(r, simde_wasm_v128_load(test_vec[i].r), INT_MAX);
|
||||
}
|
||||
return 0;
|
||||
#else
|
||||
fputc('\n', stdout);
|
||||
simde_float32 inputs[8 * 2 * (sizeof(simde_v128_t) / sizeof(simde_float32))];
|
||||
simde_test_wasm_f32x4_random_full(8, 2, inputs, -SIMDE_FLOAT32_C(1000.0), SIMDE_FLOAT32_C(1000.0), HEDLEY_STATIC_CAST(SimdeTestVecFloatType, SIMDE_TEST_VEC_FLOAT_NAN | SIMDE_TEST_VEC_FLOAT_EQUAL));
|
||||
for (size_t i = 0 ; i < 8 ; i++) {
|
||||
simde_v128_t
|
||||
a = simde_test_wasm_f32x4_random_full_extract(2, inputs, i, 0),
|
||||
b = simde_test_wasm_f32x4_random_full_extract(2, inputs, i, 1),
|
||||
r;
|
||||
|
||||
r = simde_wasm_f32x4_relaxed_max(a, b);
|
||||
|
||||
simde_test_wasm_f32x4_write(3, a, SIMDE_TEST_VEC_POS_FIRST);
|
||||
simde_test_wasm_f32x4_write(3, b, SIMDE_TEST_VEC_POS_MIDDLE);
|
||||
simde_test_wasm_f32x4_write(3, r, SIMDE_TEST_VEC_POS_LAST);
|
||||
}
|
||||
return 1;
|
||||
#endif
|
||||
}
|
||||
|
||||
static int
|
||||
test_simde_wasm_f64x2_relaxed_max(SIMDE_MUNIT_TEST_ARGS) {
|
||||
#if 1
|
||||
SIMDE_TEST_STRUCT_MODIFIERS struct {
|
||||
simde_float64 a[sizeof(simde_v128_t) / sizeof(simde_float64)];
|
||||
simde_float64 b[sizeof(simde_v128_t) / sizeof(simde_float64)];
|
||||
simde_float64 r[sizeof(simde_v128_t) / sizeof(simde_float64)];
|
||||
} test_vec[] = {
|
||||
{ { SIMDE_FLOAT64_C( 523.06), SIMDE_FLOAT64_C( -600.30) },
|
||||
{ SIMDE_FLOAT64_C( 212.57), SIMDE_FLOAT64_C( -725.13) },
|
||||
{ SIMDE_FLOAT64_C( 523.06), SIMDE_FLOAT64_C( -600.30) } },
|
||||
{ { SIMDE_FLOAT64_C( 630.42), SIMDE_FLOAT64_C( -507.35) },
|
||||
{ SIMDE_FLOAT64_C( 28.88), SIMDE_FLOAT64_C( -240.00) },
|
||||
{ SIMDE_FLOAT64_C( 630.42), SIMDE_FLOAT64_C( -240.00) } },
|
||||
{ { SIMDE_FLOAT64_C( 373.65), SIMDE_FLOAT64_C( 213.86) },
|
||||
{ SIMDE_FLOAT64_C( -611.53), SIMDE_FLOAT64_C( 707.90) },
|
||||
{ SIMDE_FLOAT64_C( 373.65), SIMDE_FLOAT64_C( 707.90) } },
|
||||
{ { SIMDE_FLOAT64_C( 339.86), SIMDE_FLOAT64_C( -860.05) },
|
||||
{ SIMDE_FLOAT64_C( 213.55), SIMDE_FLOAT64_C( -405.72) },
|
||||
{ SIMDE_FLOAT64_C( 339.86), SIMDE_FLOAT64_C( -405.72) } },
|
||||
{ { SIMDE_FLOAT64_C( -478.66), SIMDE_FLOAT64_C( -629.72) },
|
||||
{ SIMDE_FLOAT64_C( 841.82), SIMDE_FLOAT64_C( 793.27) },
|
||||
{ SIMDE_FLOAT64_C( 841.82), SIMDE_FLOAT64_C( 793.27) } },
|
||||
{ { SIMDE_FLOAT64_C( -262.99), SIMDE_FLOAT64_C( 802.55) },
|
||||
{ SIMDE_FLOAT64_C( -938.61), SIMDE_FLOAT64_C( 323.51) },
|
||||
{ SIMDE_FLOAT64_C( -262.99), SIMDE_FLOAT64_C( 802.55) } }
|
||||
};
|
||||
|
||||
for (size_t i = 0 ; i < (sizeof(test_vec) / sizeof(test_vec[0])) ; i++) {
|
||||
simde_v128_t a = simde_wasm_v128_load(test_vec[i].a);
|
||||
simde_v128_t b = simde_wasm_v128_load(test_vec[i].b);
|
||||
simde_v128_t r = simde_wasm_f64x2_relaxed_max(a, b);
|
||||
simde_test_wasm_f64x2_assert_equal(r, simde_wasm_v128_load(test_vec[i].r), 3);
|
||||
}
|
||||
return 0;
|
||||
#else
|
||||
fputc('\n', stdout);
|
||||
simde_float64 inputs[8 * 2 * (sizeof(simde_v128_t) / sizeof(simde_float64))];
|
||||
simde_test_wasm_f64x2_random_full(8, 2, inputs, -SIMDE_FLOAT64_C(1000.0), SIMDE_FLOAT64_C(1000.0), HEDLEY_STATIC_CAST(SimdeTestVecFloatType, SIMDE_TEST_VEC_FLOAT_NAN));
|
||||
for (size_t i = 0 ; i < 8 ; i++) {
|
||||
simde_v128_t
|
||||
a = simde_test_wasm_f64x2_random_full_extract(2, inputs, i, 0),
|
||||
b = simde_test_wasm_f64x2_random_full_extract(2, inputs, i, 1),
|
||||
r;
|
||||
|
||||
r = simde_wasm_f64x2_relaxed_max(a, b);
|
||||
|
||||
simde_test_wasm_f64x2_write(3, a, SIMDE_TEST_VEC_POS_FIRST);
|
||||
simde_test_wasm_f64x2_write(3, b, SIMDE_TEST_VEC_POS_MIDDLE);
|
||||
simde_test_wasm_f64x2_write(3, r, SIMDE_TEST_VEC_POS_LAST);
|
||||
}
|
||||
return 1;
|
||||
#endif
|
||||
}
|
||||
|
||||
SIMDE_TEST_FUNC_LIST_BEGIN
|
||||
SIMDE_TEST_FUNC_LIST_ENTRY(wasm_f32x4_relaxed_max)
|
||||
SIMDE_TEST_FUNC_LIST_ENTRY(wasm_f64x2_relaxed_max)
|
||||
SIMDE_TEST_FUNC_LIST_END
|
||||
|
||||
#include "test-relaxed-simd-footer.h"
|
||||
|
|
@ -1,7 +1,9 @@
|
|||
simde_test_wasm_relaxed_simd_tests = [
|
||||
'blend',
|
||||
'fma',
|
||||
'fms',
|
||||
'laneselect',
|
||||
'madd',
|
||||
'max',
|
||||
'min',
|
||||
'nmadd',
|
||||
'swizzle',
|
||||
'trunc',
|
||||
]
|
||||
|
|
@ -28,7 +30,7 @@ foreach name : simde_test_wasm_relaxed_simd_tests
|
|||
include_directories: simde_include_dir,
|
||||
dependencies: simde_deps)
|
||||
|
||||
test('wasm_relexad_simd/' + name + '/' + emul + '/' + lang, x,
|
||||
test('wasm_relaxed_simd/' + name + '/' + emul + '/' + lang, x,
|
||||
protocol: 'tap',
|
||||
# Emscripten tests must be run from builddir
|
||||
workdir: meson.current_build_dir())
|
||||
|
|
|
|||
146
thirdparty/simde/test/wasm/relaxed-simd/min.c
vendored
Normal file
146
thirdparty/simde/test/wasm/relaxed-simd/min.c
vendored
Normal file
|
|
@ -0,0 +1,146 @@
|
|||
/* Copyright (c) 2021 Evan Nemerson <evan@nemerson.com>
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person
|
||||
* obtaining a copy of this software and associated documentation
|
||||
* files (the "Software"), to deal in the Software without
|
||||
* restriction, including without limitation the rights to use, copy,
|
||||
* modify, merge, publish, distribute, sublicense, and/or sell copies
|
||||
* of the Software, and to permit persons to whom the Software is
|
||||
* furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be
|
||||
* included in all copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
|
||||
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
|
||||
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
|
||||
* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
|
||||
* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
|
||||
* SOFTWARE.
|
||||
*/
|
||||
|
||||
#define SIMDE_TEST_WASM_RELAXED_SIMD_INSN min
|
||||
#include "../../../simde/wasm/relaxed-simd.h"
|
||||
#include "test-relaxed-simd.h"
|
||||
|
||||
static int
|
||||
test_simde_wasm_f32x4_relaxed_min(SIMDE_MUNIT_TEST_ARGS) {
|
||||
#if 1
|
||||
SIMDE_TEST_STRUCT_MODIFIERS struct {
|
||||
simde_float32 a[sizeof(simde_v128_t) / sizeof(simde_float32)];
|
||||
simde_float32 b[sizeof(simde_v128_t) / sizeof(simde_float32)];
|
||||
simde_float32 r[sizeof(simde_v128_t) / sizeof(simde_float32)];
|
||||
} test_vec[] = {
|
||||
{ { SIMDE_FLOAT32_C( -384.73), SIMDE_FLOAT32_C( -820.97), SIMDE_FLOAT32_C( 258.75), SIMDE_FLOAT32_C( -90.51) },
|
||||
{ SIMDE_FLOAT32_C( 635.11), SIMDE_FLOAT32_C( -21.53), SIMDE_FLOAT32_C( -197.11), SIMDE_FLOAT32_C( 959.39) },
|
||||
{ SIMDE_FLOAT32_C( -384.73), SIMDE_FLOAT32_C( -820.97), SIMDE_FLOAT32_C( -197.11), SIMDE_FLOAT32_C( -90.51) } },
|
||||
{ { SIMDE_FLOAT32_C( 756.93), SIMDE_FLOAT32_C( -403.83), SIMDE_FLOAT32_C( -535.40), SIMDE_FLOAT32_C( 581.16) },
|
||||
{ SIMDE_FLOAT32_C( 575.10), SIMDE_FLOAT32_C( -784.62), SIMDE_FLOAT32_C( 826.27), SIMDE_FLOAT32_C( -290.44) },
|
||||
{ SIMDE_FLOAT32_C( 575.10), SIMDE_FLOAT32_C( -784.62), SIMDE_FLOAT32_C( -535.40), SIMDE_FLOAT32_C( -290.44) } },
|
||||
{ { SIMDE_FLOAT32_C( -580.63), SIMDE_FLOAT32_C( 400.60), SIMDE_FLOAT32_C( -825.33), SIMDE_FLOAT32_C( 395.98) },
|
||||
{ SIMDE_FLOAT32_C( 903.08), SIMDE_FLOAT32_C( 523.68), SIMDE_FLOAT32_C( -270.81), SIMDE_FLOAT32_C( -996.64) },
|
||||
{ SIMDE_FLOAT32_C( -580.63), SIMDE_FLOAT32_C( 400.60), SIMDE_FLOAT32_C( -825.33), SIMDE_FLOAT32_C( -996.64) } },
|
||||
{ { SIMDE_FLOAT32_C( -450.06), SIMDE_FLOAT32_C( -799.96), SIMDE_FLOAT32_C( 54.34), SIMDE_FLOAT32_C( 646.36) },
|
||||
{ SIMDE_FLOAT32_C( -396.89), SIMDE_FLOAT32_C( -93.21), SIMDE_FLOAT32_C( -282.13), SIMDE_FLOAT32_C( -348.89) },
|
||||
{ SIMDE_FLOAT32_C( -450.06), SIMDE_FLOAT32_C( -799.96), SIMDE_FLOAT32_C( -282.13), SIMDE_FLOAT32_C( -348.89) } },
|
||||
{ { SIMDE_FLOAT32_C( 449.36), SIMDE_FLOAT32_C( -932.70), SIMDE_FLOAT32_C( 504.25), SIMDE_FLOAT32_C( 630.70) },
|
||||
{ SIMDE_FLOAT32_C( 6.05), SIMDE_FLOAT32_C( 284.22), SIMDE_FLOAT32_C( -492.84), SIMDE_FLOAT32_C( -857.28) },
|
||||
{ SIMDE_FLOAT32_C( 6.05), SIMDE_FLOAT32_C( -932.70), SIMDE_FLOAT32_C( -492.84), SIMDE_FLOAT32_C( -857.28) } },
|
||||
{ { SIMDE_FLOAT32_C( -734.85), SIMDE_FLOAT32_C( 291.38), SIMDE_FLOAT32_C( 910.86), SIMDE_FLOAT32_C( -655.45) },
|
||||
{ SIMDE_FLOAT32_C( 848.95), SIMDE_FLOAT32_C( -550.13), SIMDE_FLOAT32_C( 91.62), SIMDE_FLOAT32_C( 71.10) },
|
||||
{ SIMDE_FLOAT32_C( -734.85), SIMDE_FLOAT32_C( -550.13), SIMDE_FLOAT32_C( 91.62), SIMDE_FLOAT32_C( -655.45) } },
|
||||
{ { SIMDE_FLOAT32_C( 983.19), SIMDE_FLOAT32_C( 944.04), SIMDE_FLOAT32_C( -663.05), SIMDE_FLOAT32_C( 678.96) },
|
||||
{ SIMDE_FLOAT32_C( -656.24), SIMDE_FLOAT32_C( -618.32), SIMDE_FLOAT32_C( 677.11), SIMDE_FLOAT32_C( -741.86) },
|
||||
{ SIMDE_FLOAT32_C( -656.24), SIMDE_FLOAT32_C( -618.32), SIMDE_FLOAT32_C( -663.05), SIMDE_FLOAT32_C( -741.86) } }
|
||||
};
|
||||
|
||||
for (size_t i = 0 ; i < (sizeof(test_vec) / sizeof(test_vec[0])) ; i++) {
|
||||
simde_v128_t a = simde_wasm_v128_load(test_vec[i].a);
|
||||
simde_v128_t b = simde_wasm_v128_load(test_vec[i].b);
|
||||
simde_v128_t r = simde_wasm_f32x4_relaxed_min(a, b);
|
||||
simde_test_wasm_f32x4_assert_equal(r, simde_wasm_v128_load(test_vec[i].r), INT_MAX);
|
||||
}
|
||||
return 0;
|
||||
#else
|
||||
fputc('\n', stdout);
|
||||
simde_float32 inputs[8 * 2 * (sizeof(simde_v128_t) / sizeof(simde_float32))];
|
||||
simde_test_wasm_f32x4_random_full(8, 2, inputs, -SIMDE_FLOAT32_C(1000.0), SIMDE_FLOAT32_C(1000.0), HEDLEY_STATIC_CAST(SimdeTestVecFloatType, SIMDE_TEST_VEC_FLOAT_NAN | SIMDE_TEST_VEC_FLOAT_EQUAL));
|
||||
for (size_t i = 0 ; i < 8 ; i++) {
|
||||
simde_v128_t
|
||||
a = simde_test_wasm_f32x4_random_full_extract(2, inputs, i, 0),
|
||||
b = simde_test_wasm_f32x4_random_full_extract(2, inputs, i, 1),
|
||||
r;
|
||||
|
||||
r = simde_wasm_f32x4_relaxed_min(a, b);
|
||||
|
||||
simde_test_wasm_f32x4_write(3, a, SIMDE_TEST_VEC_POS_FIRST);
|
||||
simde_test_wasm_f32x4_write(3, b, SIMDE_TEST_VEC_POS_MIDDLE);
|
||||
simde_test_wasm_f32x4_write(3, r, SIMDE_TEST_VEC_POS_LAST);
|
||||
}
|
||||
return 1;
|
||||
#endif
|
||||
}
|
||||
|
||||
static int
|
||||
test_simde_wasm_f64x2_relaxed_min(SIMDE_MUNIT_TEST_ARGS) {
|
||||
#if 1
|
||||
SIMDE_TEST_STRUCT_MODIFIERS struct {
|
||||
simde_float64 a[sizeof(simde_v128_t) / sizeof(simde_float64)];
|
||||
simde_float64 b[sizeof(simde_v128_t) / sizeof(simde_float64)];
|
||||
simde_float64 r[sizeof(simde_v128_t) / sizeof(simde_float64)];
|
||||
} test_vec[] = {
|
||||
{ { SIMDE_FLOAT64_C( -79.92), SIMDE_FLOAT64_C( 907.35) },
|
||||
{ SIMDE_FLOAT64_C( -343.94), SIMDE_FLOAT64_C( 358.40) },
|
||||
{ SIMDE_FLOAT64_C( -343.94), SIMDE_FLOAT64_C( 358.40) } },
|
||||
{ { SIMDE_FLOAT64_C( 906.87), SIMDE_FLOAT64_C( 964.34) },
|
||||
{ SIMDE_FLOAT64_C( 672.12), SIMDE_FLOAT64_C( 69.90) },
|
||||
{ SIMDE_FLOAT64_C( 672.12), SIMDE_FLOAT64_C( 69.90) } },
|
||||
{ { SIMDE_FLOAT64_C( 891.24), SIMDE_FLOAT64_C( 43.61) },
|
||||
{ SIMDE_FLOAT64_C( 586.69), SIMDE_FLOAT64_C( 866.82) },
|
||||
{ SIMDE_FLOAT64_C( 586.69), SIMDE_FLOAT64_C( 43.61) } },
|
||||
{ { SIMDE_FLOAT64_C( 147.11), SIMDE_FLOAT64_C( -721.67) },
|
||||
{ SIMDE_FLOAT64_C( 40.13), SIMDE_FLOAT64_C( 931.62) },
|
||||
{ SIMDE_FLOAT64_C( 40.13), SIMDE_FLOAT64_C( -721.67) } },
|
||||
{ { SIMDE_FLOAT64_C( 114.93), SIMDE_FLOAT64_C( -695.95) },
|
||||
{ SIMDE_FLOAT64_C( -532.17), SIMDE_FLOAT64_C( -145.28) },
|
||||
{ SIMDE_FLOAT64_C( -532.17), SIMDE_FLOAT64_C( -695.95) } },
|
||||
{ { SIMDE_FLOAT64_C( 230.71), SIMDE_FLOAT64_C( -792.59) },
|
||||
{ SIMDE_FLOAT64_C( 541.02), SIMDE_FLOAT64_C( 155.01) },
|
||||
{ SIMDE_FLOAT64_C( 230.71), SIMDE_FLOAT64_C( -792.59) } }
|
||||
};
|
||||
|
||||
for (size_t i = 0 ; i < (sizeof(test_vec) / sizeof(test_vec[0])) ; i++) {
|
||||
simde_v128_t a = simde_wasm_v128_load(test_vec[i].a);
|
||||
simde_v128_t b = simde_wasm_v128_load(test_vec[i].b);
|
||||
simde_v128_t r = simde_wasm_f64x2_relaxed_min(a, b);
|
||||
simde_test_wasm_f64x2_assert_equal(r, simde_wasm_v128_load(test_vec[i].r), INT_MAX);
|
||||
}
|
||||
return 0;
|
||||
#else
|
||||
fputc('\n', stdout);
|
||||
simde_float64 inputs[8 * 2 * (sizeof(simde_v128_t) / sizeof(simde_float64))];
|
||||
simde_test_wasm_f64x2_random_full(8, 2, inputs, -SIMDE_FLOAT64_C(1000.0), SIMDE_FLOAT64_C(1000.0), HEDLEY_STATIC_CAST(SimdeTestVecFloatType, SIMDE_TEST_VEC_FLOAT_NAN));
|
||||
for (size_t i = 0 ; i < 8 ; i++) {
|
||||
simde_v128_t
|
||||
a = simde_test_wasm_f64x2_random_full_extract(2, inputs, i, 0),
|
||||
b = simde_test_wasm_f64x2_random_full_extract(2, inputs, i, 1),
|
||||
r;
|
||||
|
||||
r = simde_wasm_f64x2_relaxed_min(a, b);
|
||||
|
||||
simde_test_wasm_f64x2_write(3, a, SIMDE_TEST_VEC_POS_FIRST);
|
||||
simde_test_wasm_f64x2_write(3, b, SIMDE_TEST_VEC_POS_MIDDLE);
|
||||
simde_test_wasm_f64x2_write(3, r, SIMDE_TEST_VEC_POS_LAST);
|
||||
}
|
||||
return 1;
|
||||
#endif
|
||||
}
|
||||
|
||||
SIMDE_TEST_FUNC_LIST_BEGIN
|
||||
SIMDE_TEST_FUNC_LIST_ENTRY(wasm_f32x4_relaxed_min)
|
||||
SIMDE_TEST_FUNC_LIST_ENTRY(wasm_f64x2_relaxed_min)
|
||||
SIMDE_TEST_FUNC_LIST_END
|
||||
|
||||
#include "test-relaxed-simd-footer.h"
|
||||
183
thirdparty/simde/test/wasm/relaxed-simd/nmadd.c
vendored
Normal file
183
thirdparty/simde/test/wasm/relaxed-simd/nmadd.c
vendored
Normal file
|
|
@ -0,0 +1,183 @@
|
|||
/* Copyright (c) 2021 Evan Nemerson <evan@nemerson.com>
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person
|
||||
* obtaining a copy of this software and associated documentation
|
||||
* files (the "Software"), to deal in the Software without
|
||||
* restriction, including without limitation the rights to use, copy,
|
||||
* modify, merge, publish, distribute, sublicense, and/or sell copies
|
||||
* of the Software, and to permit persons to whom the Software is
|
||||
* furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be
|
||||
* included in all copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
|
||||
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
|
||||
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
|
||||
* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
|
||||
* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
|
||||
* SOFTWARE.
|
||||
*/
|
||||
|
||||
#define SIMDE_TEST_WASM_RELAXED_SIMD_INSN nmadd
|
||||
#include "../../../simde/wasm/relaxed-simd.h"
|
||||
#include "test-relaxed-simd.h"
|
||||
|
||||
static int
|
||||
test_simde_wasm_f32x4_relaxed_nmadd(SIMDE_MUNIT_TEST_ARGS) {
|
||||
#if 1
|
||||
SIMDE_TEST_STRUCT_MODIFIERS struct {
|
||||
simde_float32 a[sizeof(simde_v128_t) / sizeof(simde_float32)];
|
||||
simde_float32 b[sizeof(simde_v128_t) / sizeof(simde_float32)];
|
||||
simde_float32 c[sizeof(simde_v128_t) / sizeof(simde_float32)];
|
||||
simde_float32 r[sizeof(simde_v128_t) / sizeof(simde_float32)];
|
||||
} test_vec[] = {
|
||||
#if !defined(SIMDE_FAST_MATH)
|
||||
{ { SIMDE_MATH_NANF, SIMDE_FLOAT32_C( 545.32), SIMDE_MATH_NANF, SIMDE_FLOAT32_C( 291.74) },
|
||||
{ SIMDE_FLOAT32_C( -401.62), SIMDE_MATH_NANF, SIMDE_MATH_NANF, SIMDE_FLOAT32_C( 291.74) },
|
||||
{ SIMDE_FLOAT32_C( -401.62), SIMDE_MATH_NANF, SIMDE_MATH_NANF, SIMDE_FLOAT32_C( 291.74) },
|
||||
{ SIMDE_MATH_NANF, SIMDE_MATH_NANF, SIMDE_MATH_NANF, SIMDE_FLOAT32_C(-84820.48) } },
|
||||
#endif
|
||||
{ { SIMDE_FLOAT32_C( 173.47), SIMDE_FLOAT32_C( 46.49), SIMDE_FLOAT32_C( -845.82), SIMDE_FLOAT32_C( -7.33) },
|
||||
{ SIMDE_FLOAT32_C( -984.71), SIMDE_FLOAT32_C( 707.30), SIMDE_FLOAT32_C( 807.44), SIMDE_FLOAT32_C( -705.38) },
|
||||
{ SIMDE_FLOAT32_C( -984.71), SIMDE_FLOAT32_C( 707.30), SIMDE_FLOAT32_C( 807.44), SIMDE_FLOAT32_C( -705.38) },
|
||||
{ SIMDE_FLOAT32_C(169832.94), SIMDE_FLOAT32_C(-32175.08), SIMDE_FLOAT32_C(683756.38), SIMDE_FLOAT32_C( -5875.82) } },
|
||||
{ { SIMDE_FLOAT32_C( -897.96), SIMDE_FLOAT32_C( -320.99), SIMDE_FLOAT32_C( 222.19), SIMDE_FLOAT32_C( 329.67) },
|
||||
{ SIMDE_FLOAT32_C( 480.55), SIMDE_FLOAT32_C( -189.47), SIMDE_FLOAT32_C( 641.89), SIMDE_FLOAT32_C( 962.95) },
|
||||
{ SIMDE_FLOAT32_C( 480.55), SIMDE_FLOAT32_C( -189.47), SIMDE_FLOAT32_C( 641.89), SIMDE_FLOAT32_C( 962.95) },
|
||||
{ SIMDE_FLOAT32_C(431995.22), SIMDE_FLOAT32_C(-61007.45), SIMDE_FLOAT32_C(-141979.66), SIMDE_FLOAT32_C(-316492.78) } },
|
||||
{ { SIMDE_FLOAT32_C( 364.91), SIMDE_FLOAT32_C( -180.05), SIMDE_FLOAT32_C( 832.13), SIMDE_FLOAT32_C( 436.64) },
|
||||
{ SIMDE_FLOAT32_C( -923.59), SIMDE_FLOAT32_C( -999.35), SIMDE_FLOAT32_C( -851.40), SIMDE_FLOAT32_C( 622.08) },
|
||||
{ SIMDE_FLOAT32_C( -923.59), SIMDE_FLOAT32_C( -999.35), SIMDE_FLOAT32_C( -851.40), SIMDE_FLOAT32_C( 622.08) },
|
||||
{ SIMDE_FLOAT32_C(336103.66), SIMDE_FLOAT32_C(-180932.31), SIMDE_FLOAT32_C(707624.12), SIMDE_FLOAT32_C(-271002.94) } },
|
||||
{ { SIMDE_FLOAT32_C( -647.47), SIMDE_FLOAT32_C( -384.76), SIMDE_FLOAT32_C( 680.63), SIMDE_FLOAT32_C( 383.43) },
|
||||
{ SIMDE_FLOAT32_C( -623.98), SIMDE_FLOAT32_C( -691.43), SIMDE_FLOAT32_C( -32.70), SIMDE_FLOAT32_C( -59.91) },
|
||||
{ SIMDE_FLOAT32_C( -623.98), SIMDE_FLOAT32_C( -691.43), SIMDE_FLOAT32_C( -32.70), SIMDE_FLOAT32_C( -59.91) },
|
||||
{ SIMDE_FLOAT32_C(-404632.28), SIMDE_FLOAT32_C(-266726.03), SIMDE_FLOAT32_C( 22223.90), SIMDE_FLOAT32_C( 22911.38) } },
|
||||
{ { SIMDE_FLOAT32_C( 460.16), SIMDE_FLOAT32_C( 699.08), SIMDE_FLOAT32_C( 46.84), SIMDE_FLOAT32_C( -276.12) },
|
||||
{ SIMDE_FLOAT32_C( 209.70), SIMDE_FLOAT32_C( 62.34), SIMDE_FLOAT32_C( -423.14), SIMDE_FLOAT32_C( -232.76) },
|
||||
{ SIMDE_FLOAT32_C( 209.70), SIMDE_FLOAT32_C( 62.34), SIMDE_FLOAT32_C( -423.14), SIMDE_FLOAT32_C( -232.76) },
|
||||
{ SIMDE_FLOAT32_C(-96285.85), SIMDE_FLOAT32_C(-43518.31), SIMDE_FLOAT32_C( 19396.74), SIMDE_FLOAT32_C(-64502.45) } },
|
||||
{ { SIMDE_FLOAT32_C( -628.34), SIMDE_FLOAT32_C( 631.71), SIMDE_FLOAT32_C( 358.07), SIMDE_FLOAT32_C( -740.27) },
|
||||
{ SIMDE_FLOAT32_C( -615.72), SIMDE_FLOAT32_C( 348.27), SIMDE_FLOAT32_C( 757.89), SIMDE_FLOAT32_C( -603.25) },
|
||||
{ SIMDE_FLOAT32_C( -615.72), SIMDE_FLOAT32_C( 348.27), SIMDE_FLOAT32_C( 757.89), SIMDE_FLOAT32_C( -603.25) },
|
||||
{ SIMDE_FLOAT32_C(-387497.22), SIMDE_FLOAT32_C(-219657.38), SIMDE_FLOAT32_C(-270619.78), SIMDE_FLOAT32_C(-447171.12) } },
|
||||
{ { SIMDE_FLOAT32_C( -516.74), SIMDE_FLOAT32_C( -975.11), SIMDE_FLOAT32_C( -307.68), SIMDE_FLOAT32_C( 814.78) },
|
||||
{ SIMDE_FLOAT32_C( -592.82), SIMDE_FLOAT32_C( 636.65), SIMDE_FLOAT32_C( -416.13), SIMDE_FLOAT32_C( -499.03) },
|
||||
{ SIMDE_FLOAT32_C( -592.82), SIMDE_FLOAT32_C( 636.65), SIMDE_FLOAT32_C( -416.13), SIMDE_FLOAT32_C( -499.03) },
|
||||
{ SIMDE_FLOAT32_C(-306926.62), SIMDE_FLOAT32_C(621440.44), SIMDE_FLOAT32_C(-128451.01), SIMDE_FLOAT32_C(406100.66) } },
|
||||
};
|
||||
|
||||
for (size_t i = 0 ; i < (sizeof(test_vec) / sizeof(test_vec[0])) ; i++) {
|
||||
simde_v128_t a = simde_wasm_v128_load(test_vec[i].a);
|
||||
simde_v128_t b = simde_wasm_v128_load(test_vec[i].b);
|
||||
simde_v128_t c = simde_wasm_v128_load(test_vec[i].b);
|
||||
simde_v128_t r = simde_wasm_f32x4_relaxed_nmadd(a, b, c);
|
||||
simde_test_wasm_f32x4_assert_equal(r, simde_wasm_v128_load(test_vec[i].r), 1);
|
||||
}
|
||||
return 0;
|
||||
#else
|
||||
simde_float32 inputs[8 * 2 * (sizeof(simde_v128_t) / sizeof(simde_float32))];
|
||||
simde_test_wasm_f32x4_random_full(8, 2, inputs, -SIMDE_FLOAT32_C(1000.0), SIMDE_FLOAT32_C(1000.0), HEDLEY_STATIC_CAST(SimdeTestVecFloatType, SIMDE_TEST_VEC_FLOAT_NAN | SIMDE_TEST_VEC_FLOAT_EQUAL));
|
||||
fputc('\n', stdout);
|
||||
for (size_t i = 0 ; i < 8 ; i++) {
|
||||
simde_v128_t
|
||||
a = simde_test_wasm_f32x4_random_full_extract(2, inputs, i, 0),
|
||||
b = simde_test_wasm_f32x4_random_full_extract(2, inputs, i, 1),
|
||||
c = simde_test_wasm_f32x4_random_full_extract(2, inputs, i, 1),
|
||||
r;
|
||||
|
||||
r = simde_wasm_f32x4_relaxed_nmadd(a, b, c);
|
||||
|
||||
simde_test_wasm_f32x4_write(3, a, SIMDE_TEST_VEC_POS_FIRST);
|
||||
simde_test_wasm_f32x4_write(3, b, SIMDE_TEST_VEC_POS_MIDDLE);
|
||||
simde_test_wasm_f32x4_write(3, c, SIMDE_TEST_VEC_POS_MIDDLE);
|
||||
simde_test_wasm_f32x4_write(3, r, SIMDE_TEST_VEC_POS_LAST);
|
||||
}
|
||||
return 1;
|
||||
#endif
|
||||
}
|
||||
|
||||
static int
|
||||
test_simde_wasm_f64x2_relaxed_nmadd(SIMDE_MUNIT_TEST_ARGS) {
|
||||
#if 1
|
||||
SIMDE_TEST_STRUCT_MODIFIERS struct {
|
||||
simde_float64 a[sizeof(simde_v128_t) / sizeof(simde_float64)];
|
||||
simde_float64 b[sizeof(simde_v128_t) / sizeof(simde_float64)];
|
||||
simde_float64 c[sizeof(simde_v128_t) / sizeof(simde_float64)];
|
||||
simde_float64 r[sizeof(simde_v128_t) / sizeof(simde_float64)];
|
||||
} test_vec[] = {
|
||||
#if !defined(SIMDE_FAST_MATH)
|
||||
{ { SIMDE_MATH_NAN, SIMDE_FLOAT64_C( 947.03) },
|
||||
{ SIMDE_FLOAT64_C( 46.26), SIMDE_MATH_NAN },
|
||||
{ SIMDE_FLOAT64_C( 46.26), SIMDE_MATH_NAN },
|
||||
{ SIMDE_MATH_NAN, SIMDE_MATH_NAN } },
|
||||
{ { SIMDE_MATH_NAN, SIMDE_FLOAT64_C( 395.95) },
|
||||
{ SIMDE_MATH_NAN, SIMDE_FLOAT64_C( 410.70) },
|
||||
{ SIMDE_MATH_NAN, SIMDE_FLOAT64_C( 410.70) },
|
||||
{ SIMDE_MATH_NAN, SIMDE_FLOAT64_C(-162205.96) } },
|
||||
#endif
|
||||
{ { SIMDE_FLOAT64_C( -705.54), SIMDE_FLOAT64_C( 240.18) },
|
||||
{ SIMDE_FLOAT64_C( 850.34), SIMDE_FLOAT64_C( -268.62) },
|
||||
{ SIMDE_FLOAT64_C( 850.34), SIMDE_FLOAT64_C( -268.62) },
|
||||
{ SIMDE_FLOAT64_C(600799.22), SIMDE_FLOAT64_C( 64248.53) } },
|
||||
{ { SIMDE_FLOAT64_C( -540.18), SIMDE_FLOAT64_C( -439.41) },
|
||||
{ SIMDE_FLOAT64_C( -815.99), SIMDE_FLOAT64_C( 725.32) },
|
||||
{ SIMDE_FLOAT64_C( -815.99), SIMDE_FLOAT64_C( 725.32) },
|
||||
{ SIMDE_FLOAT64_C(-441597.47), SIMDE_FLOAT64_C(319438.18) } },
|
||||
{ { SIMDE_FLOAT64_C( -121.51), SIMDE_FLOAT64_C( -187.20) },
|
||||
{ SIMDE_FLOAT64_C( 834.54), SIMDE_FLOAT64_C( 779.49) },
|
||||
{ SIMDE_FLOAT64_C( 834.54), SIMDE_FLOAT64_C( 779.49) },
|
||||
{ SIMDE_FLOAT64_C(102239.50), SIMDE_FLOAT64_C(146700.02) } },
|
||||
{ { SIMDE_FLOAT64_C( -553.07), SIMDE_FLOAT64_C( -219.01) },
|
||||
{ SIMDE_FLOAT64_C( -682.33), SIMDE_FLOAT64_C( -81.13) },
|
||||
{ SIMDE_FLOAT64_C( -682.33), SIMDE_FLOAT64_C( -81.13) },
|
||||
{ SIMDE_FLOAT64_C(-378058.58), SIMDE_FLOAT64_C(-17849.41) } },
|
||||
{ { SIMDE_FLOAT64_C( 223.30), SIMDE_FLOAT64_C( 664.04) },
|
||||
{ SIMDE_FLOAT64_C( -188.97), SIMDE_FLOAT64_C( 941.25) },
|
||||
{ SIMDE_FLOAT64_C( -188.97), SIMDE_FLOAT64_C( 941.25) },
|
||||
{ SIMDE_FLOAT64_C( 42008.03), SIMDE_FLOAT64_C(-624086.40) } },
|
||||
{ { SIMDE_FLOAT64_C( -463.27), SIMDE_FLOAT64_C( 754.60) },
|
||||
{ SIMDE_FLOAT64_C( 261.15), SIMDE_FLOAT64_C( -326.00) },
|
||||
{ SIMDE_FLOAT64_C( 261.15), SIMDE_FLOAT64_C( -326.00) },
|
||||
{ SIMDE_FLOAT64_C(121244.11), SIMDE_FLOAT64_C(245673.60) } },
|
||||
};
|
||||
|
||||
for (size_t i = 0 ; i < (sizeof(test_vec) / sizeof(test_vec[0])) ; i++) {
|
||||
simde_v128_t a = simde_wasm_v128_load(test_vec[i].a);
|
||||
simde_v128_t b = simde_wasm_v128_load(test_vec[i].b);
|
||||
simde_v128_t c = simde_wasm_v128_load(test_vec[i].c);
|
||||
simde_v128_t r = simde_wasm_f64x2_relaxed_nmadd(a, b, c);
|
||||
simde_test_wasm_f64x2_assert_equal(r, simde_wasm_v128_load(test_vec[i].r), 1);
|
||||
}
|
||||
return 0;
|
||||
#else
|
||||
simde_float64 inputs[8 * 2 * (sizeof(simde_v128_t) / sizeof(simde_float64))];
|
||||
simde_test_wasm_f64x2_random_full(8, 2, inputs, -SIMDE_FLOAT64_C(1000.0), SIMDE_FLOAT64_C(1000.0), HEDLEY_STATIC_CAST(SimdeTestVecFloatType, SIMDE_TEST_VEC_FLOAT_NAN));
|
||||
fputc('\n', stdout);
|
||||
for (size_t i = 0 ; i < 8 ; i++) {
|
||||
simde_v128_t
|
||||
a = simde_test_wasm_f64x2_random_full_extract(2, inputs, i, 0),
|
||||
b = simde_test_wasm_f64x2_random_full_extract(2, inputs, i, 1),
|
||||
c = simde_test_wasm_f64x2_random_full_extract(2, inputs, i, 1),
|
||||
r;
|
||||
|
||||
r = simde_wasm_f64x2_relaxed_nmadd(a, b, c);
|
||||
|
||||
simde_test_wasm_f64x2_write(3, a, SIMDE_TEST_VEC_POS_FIRST);
|
||||
simde_test_wasm_f64x2_write(3, b, SIMDE_TEST_VEC_POS_MIDDLE);
|
||||
simde_test_wasm_f64x2_write(3, c, SIMDE_TEST_VEC_POS_MIDDLE);
|
||||
simde_test_wasm_f64x2_write(3, r, SIMDE_TEST_VEC_POS_LAST);
|
||||
}
|
||||
return 1;
|
||||
#endif
|
||||
}
|
||||
|
||||
SIMDE_TEST_FUNC_LIST_BEGIN
|
||||
SIMDE_TEST_FUNC_LIST_ENTRY(wasm_f32x4_relaxed_nmadd)
|
||||
SIMDE_TEST_FUNC_LIST_ENTRY(wasm_f64x2_relaxed_nmadd)
|
||||
SIMDE_TEST_FUNC_LIST_END
|
||||
|
||||
#include "test-relaxed-simd-footer.h"
|
||||
|
|
@ -26,7 +26,7 @@
|
|||
#include "test-relaxed-simd.h"
|
||||
|
||||
static int
|
||||
test_simde_wasm_i8x16_swizzle_relaxed(SIMDE_MUNIT_TEST_ARGS) {
|
||||
test_simde_wasm_i8x16_relaxed_swizzle(SIMDE_MUNIT_TEST_ARGS) {
|
||||
#if 1
|
||||
SIMDE_TEST_STRUCT_MODIFIERS struct {
|
||||
int8_t a[sizeof(simde_v128_t) / sizeof(int8_t)];
|
||||
|
|
@ -86,7 +86,7 @@ test_simde_wasm_i8x16_swizzle_relaxed(SIMDE_MUNIT_TEST_ARGS) {
|
|||
for (size_t i = 0 ; i < (sizeof(test_vec) / sizeof(test_vec[0])) ; i++) {
|
||||
simde_v128_t a = simde_wasm_v128_load(test_vec[i].a);
|
||||
simde_v128_t b = simde_wasm_v128_load(test_vec[i].b);
|
||||
simde_v128_t r = simde_wasm_i8x16_swizzle_relaxed(a, b);
|
||||
simde_v128_t r = simde_wasm_i8x16_relaxed_swizzle(a, b);
|
||||
simde_test_wasm_i8x16_assert_equal(r, simde_wasm_v128_load(test_vec[i].r));
|
||||
}
|
||||
return 0;
|
||||
|
|
@ -98,7 +98,7 @@ test_simde_wasm_i8x16_swizzle_relaxed(SIMDE_MUNIT_TEST_ARGS) {
|
|||
b = simde_wasm_v128_and(simde_test_wasm_i8x16_random(), simde_wasm_i8x16_splat(15)),
|
||||
r;
|
||||
|
||||
r = simde_wasm_i8x16_swizzle_relaxed(a, b);
|
||||
r = simde_wasm_i8x16_relaxed_swizzle(a, b);
|
||||
|
||||
simde_test_wasm_i8x16_write(3, a, SIMDE_TEST_VEC_POS_FIRST);
|
||||
simde_test_wasm_i8x16_write(3, b, SIMDE_TEST_VEC_POS_MIDDLE);
|
||||
|
|
@ -109,7 +109,7 @@ test_simde_wasm_i8x16_swizzle_relaxed(SIMDE_MUNIT_TEST_ARGS) {
|
|||
}
|
||||
|
||||
SIMDE_TEST_FUNC_LIST_BEGIN
|
||||
SIMDE_TEST_FUNC_LIST_ENTRY(wasm_i8x16_swizzle_relaxed)
|
||||
SIMDE_TEST_FUNC_LIST_ENTRY(wasm_i8x16_relaxed_swizzle)
|
||||
SIMDE_TEST_FUNC_LIST_END
|
||||
|
||||
#include "test-relaxed-simd-footer.h"
|
||||
|
|
|
|||
32
thirdparty/simde/test/wasm/relaxed-simd/trunc.c
vendored
32
thirdparty/simde/test/wasm/relaxed-simd/trunc.c
vendored
|
|
@ -26,7 +26,7 @@
|
|||
#include "test-relaxed-simd.h"
|
||||
|
||||
static int
|
||||
test_simde_wasm_i32x4_trunc_f32x4(SIMDE_MUNIT_TEST_ARGS) {
|
||||
test_simde_wasm_i32x4_relaxed_trunc_f32x4(SIMDE_MUNIT_TEST_ARGS) {
|
||||
#if 1
|
||||
SIMDE_TEST_STRUCT_MODIFIERS struct {
|
||||
simde_float32 a[sizeof(simde_v128_t) / sizeof(simde_float32)];
|
||||
|
|
@ -52,7 +52,7 @@ test_simde_wasm_i32x4_trunc_f32x4(SIMDE_MUNIT_TEST_ARGS) {
|
|||
|
||||
for (size_t i = 0 ; i < (sizeof(test_vec) / sizeof(test_vec[0])) ; i++) {
|
||||
simde_v128_t a = simde_wasm_v128_load(test_vec[i].a);
|
||||
simde_v128_t r = simde_wasm_i32x4_trunc_f32x4(a);
|
||||
simde_v128_t r = simde_wasm_i32x4_relaxed_trunc_f32x4(a);
|
||||
simde_test_wasm_i32x4_assert_equal(r, simde_wasm_v128_load(test_vec[i].r));
|
||||
}
|
||||
return 0;
|
||||
|
|
@ -63,7 +63,7 @@ test_simde_wasm_i32x4_trunc_f32x4(SIMDE_MUNIT_TEST_ARGS) {
|
|||
a = simde_test_wasm_f32x4_random(HEDLEY_STATIC_CAST(simde_float32, INT32_MIN), HEDLEY_STATIC_CAST(simde_float32, INT32_MAX)),
|
||||
r;
|
||||
|
||||
r = simde_wasm_i32x4_trunc_f32x4(a);
|
||||
r = simde_wasm_i32x4_relaxed_trunc_f32x4(a);
|
||||
|
||||
simde_test_wasm_f32x4_write(3, a, SIMDE_TEST_VEC_POS_FIRST);
|
||||
simde_test_wasm_i32x4_write(3, r, SIMDE_TEST_VEC_POS_LAST);
|
||||
|
|
@ -73,7 +73,7 @@ test_simde_wasm_i32x4_trunc_f32x4(SIMDE_MUNIT_TEST_ARGS) {
|
|||
}
|
||||
|
||||
static int
|
||||
test_simde_wasm_u32x4_trunc_f32x4(SIMDE_MUNIT_TEST_ARGS) {
|
||||
test_simde_wasm_u32x4_relaxed_trunc_f32x4(SIMDE_MUNIT_TEST_ARGS) {
|
||||
#if 1
|
||||
SIMDE_TEST_STRUCT_MODIFIERS struct {
|
||||
simde_float32 a[sizeof(simde_v128_t) / sizeof(simde_float32)];
|
||||
|
|
@ -99,7 +99,7 @@ test_simde_wasm_u32x4_trunc_f32x4(SIMDE_MUNIT_TEST_ARGS) {
|
|||
|
||||
for (size_t i = 0 ; i < (sizeof(test_vec) / sizeof(test_vec[0])) ; i++) {
|
||||
simde_v128_t a = simde_wasm_v128_load(test_vec[i].a);
|
||||
simde_v128_t r = simde_wasm_u32x4_trunc_f32x4(a);
|
||||
simde_v128_t r = simde_wasm_u32x4_relaxed_trunc_f32x4(a);
|
||||
simde_test_wasm_u32x4_assert_equal(r, simde_wasm_v128_load(test_vec[i].r));
|
||||
}
|
||||
return 0;
|
||||
|
|
@ -110,7 +110,7 @@ test_simde_wasm_u32x4_trunc_f32x4(SIMDE_MUNIT_TEST_ARGS) {
|
|||
a = simde_test_wasm_f32x4_random(SIMDE_FLOAT32_C(0.0), HEDLEY_STATIC_CAST(simde_float32, UINT32_MAX)),
|
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r;
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r = simde_wasm_u32x4_trunc_f32x4(a);
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r = simde_wasm_u32x4_relaxed_trunc_f32x4(a);
|
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simde_test_wasm_f32x4_write(3, a, SIMDE_TEST_VEC_POS_FIRST);
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simde_test_wasm_u32x4_write(3, r, SIMDE_TEST_VEC_POS_LAST);
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@ -120,7 +120,7 @@ test_simde_wasm_u32x4_trunc_f32x4(SIMDE_MUNIT_TEST_ARGS) {
|
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}
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||||
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||||
static int
|
||||
test_simde_wasm_i32x4_trunc_f64x2_zero(SIMDE_MUNIT_TEST_ARGS) {
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test_simde_wasm_i32x4_relaxed_trunc_f64x2_zero(SIMDE_MUNIT_TEST_ARGS) {
|
||||
#if 1
|
||||
SIMDE_TEST_STRUCT_MODIFIERS struct {
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||||
simde_float64 a[sizeof(simde_v128_t) / sizeof(simde_float64)];
|
||||
|
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@ -146,7 +146,7 @@ test_simde_wasm_i32x4_trunc_f64x2_zero(SIMDE_MUNIT_TEST_ARGS) {
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|||
|
||||
for (size_t i = 0 ; i < (sizeof(test_vec) / sizeof(test_vec[0])) ; i++) {
|
||||
simde_v128_t a = simde_wasm_v128_load(test_vec[i].a);
|
||||
simde_v128_t r = simde_wasm_i32x4_trunc_f64x2_zero(a);
|
||||
simde_v128_t r = simde_wasm_i32x4_relaxed_trunc_f64x2_zero(a);
|
||||
simde_test_wasm_i32x4_assert_equal(r, simde_wasm_v128_load(test_vec[i].r));
|
||||
}
|
||||
return 0;
|
||||
|
|
@ -157,7 +157,7 @@ test_simde_wasm_i32x4_trunc_f64x2_zero(SIMDE_MUNIT_TEST_ARGS) {
|
|||
a = simde_test_wasm_f64x2_random(HEDLEY_STATIC_CAST(simde_float64, INT32_MIN), HEDLEY_STATIC_CAST(simde_float64, INT32_MAX)),
|
||||
r;
|
||||
|
||||
r = simde_wasm_i32x4_trunc_f64x2_zero(a);
|
||||
r = simde_wasm_i32x4_relaxed_trunc_f64x2_zero(a);
|
||||
|
||||
simde_test_wasm_f64x2_write(3, a, SIMDE_TEST_VEC_POS_FIRST);
|
||||
simde_test_wasm_i32x4_write(3, r, SIMDE_TEST_VEC_POS_LAST);
|
||||
|
|
@ -167,7 +167,7 @@ test_simde_wasm_i32x4_trunc_f64x2_zero(SIMDE_MUNIT_TEST_ARGS) {
|
|||
}
|
||||
|
||||
static int
|
||||
test_simde_wasm_u32x4_trunc_f64x2_zero(SIMDE_MUNIT_TEST_ARGS) {
|
||||
test_simde_wasm_u32x4_relaxed_trunc_f64x2_zero(SIMDE_MUNIT_TEST_ARGS) {
|
||||
#if 1
|
||||
SIMDE_TEST_STRUCT_MODIFIERS struct {
|
||||
simde_float64 a[sizeof(simde_v128_t) / sizeof(simde_float64)];
|
||||
|
|
@ -193,7 +193,7 @@ test_simde_wasm_u32x4_trunc_f64x2_zero(SIMDE_MUNIT_TEST_ARGS) {
|
|||
|
||||
for (size_t i = 0 ; i < (sizeof(test_vec) / sizeof(test_vec[0])) ; i++) {
|
||||
simde_v128_t a = simde_wasm_v128_load(test_vec[i].a);
|
||||
simde_v128_t r = simde_wasm_u32x4_trunc_f64x2_zero(a);
|
||||
simde_v128_t r = simde_wasm_u32x4_relaxed_trunc_f64x2_zero(a);
|
||||
simde_test_wasm_u32x4_assert_equal(r, simde_wasm_v128_load(test_vec[i].r));
|
||||
}
|
||||
return 0;
|
||||
|
|
@ -204,7 +204,7 @@ test_simde_wasm_u32x4_trunc_f64x2_zero(SIMDE_MUNIT_TEST_ARGS) {
|
|||
a = simde_test_wasm_f64x2_random(SIMDE_FLOAT64_C(0.0), HEDLEY_STATIC_CAST(simde_float64, UINT32_MAX)),
|
||||
r;
|
||||
|
||||
r = simde_wasm_u32x4_trunc_f64x2_zero(a);
|
||||
r = simde_wasm_u32x4_relaxed_trunc_f64x2_zero(a);
|
||||
|
||||
simde_test_wasm_f64x2_write(3, a, SIMDE_TEST_VEC_POS_FIRST);
|
||||
simde_test_wasm_u32x4_write(3, r, SIMDE_TEST_VEC_POS_LAST);
|
||||
|
|
@ -214,10 +214,10 @@ test_simde_wasm_u32x4_trunc_f64x2_zero(SIMDE_MUNIT_TEST_ARGS) {
|
|||
}
|
||||
|
||||
SIMDE_TEST_FUNC_LIST_BEGIN
|
||||
SIMDE_TEST_FUNC_LIST_ENTRY(wasm_i32x4_trunc_f32x4)
|
||||
SIMDE_TEST_FUNC_LIST_ENTRY(wasm_u32x4_trunc_f32x4)
|
||||
SIMDE_TEST_FUNC_LIST_ENTRY(wasm_i32x4_trunc_f64x2_zero)
|
||||
SIMDE_TEST_FUNC_LIST_ENTRY(wasm_u32x4_trunc_f64x2_zero)
|
||||
SIMDE_TEST_FUNC_LIST_ENTRY(wasm_i32x4_relaxed_trunc_f32x4)
|
||||
SIMDE_TEST_FUNC_LIST_ENTRY(wasm_u32x4_relaxed_trunc_f32x4)
|
||||
SIMDE_TEST_FUNC_LIST_ENTRY(wasm_i32x4_relaxed_trunc_f64x2_zero)
|
||||
SIMDE_TEST_FUNC_LIST_ENTRY(wasm_u32x4_relaxed_trunc_f64x2_zero)
|
||||
SIMDE_TEST_FUNC_LIST_END
|
||||
|
||||
#include "test-relaxed-simd-footer.h"
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue