Update googletest to 1.18.0 and SIMDe to 0.8.2.
Googletest 1.18 asks for CMake 3.13 or newer, so configuring the tests no longer warns that CMake compatibility below 3.10 is deprecated. Co-authored-by: Cursor <cursoragent@cursor.com>
This commit is contained in:
parent
e4e666f459
commit
3f10e05176
912 changed files with 224964 additions and 11502 deletions
259
thirdparty/simde/test/x86/avx512/cast.c
vendored
259
thirdparty/simde/test/x86/avx512/cast.c
vendored
|
|
@ -568,6 +568,132 @@ test_simde_mm512_castsi512_ps(SIMDE_MUNIT_TEST_ARGS) {
|
|||
return 0;
|
||||
}
|
||||
|
||||
#if defined(SIMDE_FLOAT16_IS_SCALAR)
|
||||
static int
|
||||
test_simde_mm512_castph_si512(SIMDE_MUNIT_TEST_ARGS) {
|
||||
#if 1
|
||||
const struct {
|
||||
const simde_float16 a[32];
|
||||
const int16_t r[32];
|
||||
} test_vec[8] = {
|
||||
{ { SIMDE_FLOAT16_VALUE( 81.88), SIMDE_FLOAT16_VALUE( 72.62), SIMDE_FLOAT16_VALUE( 86.75), SIMDE_FLOAT16_VALUE( -53.62),
|
||||
SIMDE_FLOAT16_VALUE( 38.16), SIMDE_FLOAT16_VALUE( 87.44), SIMDE_FLOAT16_VALUE( -49.56), SIMDE_FLOAT16_VALUE( 6.37),
|
||||
SIMDE_FLOAT16_VALUE( 82.31), SIMDE_FLOAT16_VALUE( 18.30), SIMDE_FLOAT16_VALUE( -78.00), SIMDE_FLOAT16_VALUE( 34.69),
|
||||
SIMDE_FLOAT16_VALUE( 41.22), SIMDE_FLOAT16_VALUE( -20.08), SIMDE_FLOAT16_VALUE( -74.31), SIMDE_FLOAT16_VALUE( 76.62),
|
||||
SIMDE_FLOAT16_VALUE( -77.81), SIMDE_FLOAT16_VALUE( 69.19), SIMDE_FLOAT16_VALUE( 55.66), SIMDE_FLOAT16_VALUE( 77.94),
|
||||
SIMDE_FLOAT16_VALUE( 48.94), SIMDE_FLOAT16_VALUE( 79.69), SIMDE_FLOAT16_VALUE( 49.06), SIMDE_FLOAT16_VALUE( -40.88),
|
||||
SIMDE_FLOAT16_VALUE( -9.36), SIMDE_FLOAT16_VALUE( 31.91), SIMDE_FLOAT16_VALUE( 46.59), SIMDE_FLOAT16_VALUE( -91.81),
|
||||
SIMDE_FLOAT16_VALUE( -64.38), SIMDE_FLOAT16_VALUE( -42.81), SIMDE_FLOAT16_VALUE( 27.16), SIMDE_FLOAT16_VALUE( -82.50) },
|
||||
{ INT16_C( 21790), INT16_C( 21642), INT16_C( 21868), -INT16_C( 11596), INT16_C( 20677), INT16_C( 21879), -INT16_C( 11726), INT16_C( 18015),
|
||||
INT16_C( 21797), INT16_C( 19603), -INT16_C( 11040), INT16_C( 20566), INT16_C( 20775), -INT16_C( 13051), -INT16_C( 11099), INT16_C( 21706),
|
||||
-INT16_C( 11043), INT16_C( 21587), INT16_C( 21237), INT16_C( 21727), INT16_C( 21022), INT16_C( 21755), INT16_C( 21026), -INT16_C( 12004),
|
||||
-INT16_C( 14162), INT16_C( 20474), INT16_C( 20947), -INT16_C( 10819), -INT16_C( 11258), -INT16_C( 11942), INT16_C( 20170), -INT16_C( 10968) } },
|
||||
{ { SIMDE_FLOAT16_VALUE( -70.19), SIMDE_FLOAT16_VALUE( 13.92), SIMDE_FLOAT16_VALUE( -36.09), SIMDE_FLOAT16_VALUE( 68.00),
|
||||
SIMDE_FLOAT16_VALUE( 1.34), SIMDE_FLOAT16_VALUE( 14.35), SIMDE_FLOAT16_VALUE( -25.66), SIMDE_FLOAT16_VALUE( -16.38),
|
||||
SIMDE_FLOAT16_VALUE( -67.38), SIMDE_FLOAT16_VALUE( -3.65), SIMDE_FLOAT16_VALUE( -81.69), SIMDE_FLOAT16_VALUE( 73.88),
|
||||
SIMDE_FLOAT16_VALUE( 76.25), SIMDE_FLOAT16_VALUE( -55.97), SIMDE_FLOAT16_VALUE( 50.50), SIMDE_FLOAT16_VALUE( 98.44),
|
||||
SIMDE_FLOAT16_VALUE( -86.75), SIMDE_FLOAT16_VALUE( 6.14), SIMDE_FLOAT16_VALUE( 76.38), SIMDE_FLOAT16_VALUE( 62.16),
|
||||
SIMDE_FLOAT16_VALUE( -14.17), SIMDE_FLOAT16_VALUE( 25.45), SIMDE_FLOAT16_VALUE( -78.69), SIMDE_FLOAT16_VALUE( 76.50),
|
||||
SIMDE_FLOAT16_VALUE( -42.66), SIMDE_FLOAT16_VALUE( 67.88), SIMDE_FLOAT16_VALUE( 84.62), SIMDE_FLOAT16_VALUE( -7.02),
|
||||
SIMDE_FLOAT16_VALUE( -74.88), SIMDE_FLOAT16_VALUE( 11.78), SIMDE_FLOAT16_VALUE( 10.51), SIMDE_FLOAT16_VALUE( -45.09) },
|
||||
{ -INT16_C( 11165), INT16_C( 19190), -INT16_C( 12157), INT16_C( 21568), INT16_C( 15708), INT16_C( 19245), -INT16_C( 12694), -INT16_C( 13288),
|
||||
-INT16_C( 11210), -INT16_C( 15539), -INT16_C( 10981), INT16_C( 21662), INT16_C( 21700), -INT16_C( 11521), INT16_C( 21072), INT16_C( 22055),
|
||||
-INT16_C( 10900), INT16_C( 17956), INT16_C( 21702), INT16_C( 21445), -INT16_C( 13546), INT16_C( 20061), -INT16_C( 11029), INT16_C( 21704),
|
||||
-INT16_C( 11947), INT16_C( 21566), INT16_C( 21834), -INT16_C( 14587), -INT16_C( 11090), INT16_C( 18916), INT16_C( 18753), -INT16_C( 11869) } },
|
||||
{ { SIMDE_FLOAT16_VALUE( -74.31), SIMDE_FLOAT16_VALUE( 74.44), SIMDE_FLOAT16_VALUE( -77.12), SIMDE_FLOAT16_VALUE( 27.05),
|
||||
SIMDE_FLOAT16_VALUE( -11.22), SIMDE_FLOAT16_VALUE( -2.76), SIMDE_FLOAT16_VALUE( -89.31), SIMDE_FLOAT16_VALUE( 21.42),
|
||||
SIMDE_FLOAT16_VALUE( 93.56), SIMDE_FLOAT16_VALUE( -71.00), SIMDE_FLOAT16_VALUE( -4.73), SIMDE_FLOAT16_VALUE( 69.88),
|
||||
SIMDE_FLOAT16_VALUE( -26.97), SIMDE_FLOAT16_VALUE( -54.25), SIMDE_FLOAT16_VALUE( 68.31), SIMDE_FLOAT16_VALUE( -13.75),
|
||||
SIMDE_FLOAT16_VALUE( 51.91), SIMDE_FLOAT16_VALUE( 44.72), SIMDE_FLOAT16_VALUE( -51.59), SIMDE_FLOAT16_VALUE( -62.25),
|
||||
SIMDE_FLOAT16_VALUE( -29.81), SIMDE_FLOAT16_VALUE( -30.27), SIMDE_FLOAT16_VALUE( -85.81), SIMDE_FLOAT16_VALUE( 27.53),
|
||||
SIMDE_FLOAT16_VALUE( -62.38), SIMDE_FLOAT16_VALUE( 98.81), SIMDE_FLOAT16_VALUE( -79.50), SIMDE_FLOAT16_VALUE( -37.25),
|
||||
SIMDE_FLOAT16_VALUE( 10.62), SIMDE_FLOAT16_VALUE( 31.02), SIMDE_FLOAT16_VALUE( 17.66), SIMDE_FLOAT16_VALUE( 36.31) },
|
||||
{ -INT16_C( 11099), INT16_C( 21671), -INT16_C( 11054), INT16_C( 20163), -INT16_C( 13924), -INT16_C( 15995), -INT16_C( 10859), INT16_C( 19803),
|
||||
INT16_C( 21977), -INT16_C( 11152), -INT16_C( 15173), INT16_C( 21598), -INT16_C( 12610), -INT16_C( 11576), INT16_C( 21573), -INT16_C( 13600),
|
||||
INT16_C( 21117), INT16_C( 20887), -INT16_C( 11661), -INT16_C( 11320), -INT16_C( 12428), -INT16_C( 12399), -INT16_C( 10915), INT16_C( 20194),
|
||||
-INT16_C( 11316), INT16_C( 22061), -INT16_C( 11016), -INT16_C( 12120), INT16_C( 18767), INT16_C( 20417), INT16_C( 19562), INT16_C( 20618) } },
|
||||
{ { SIMDE_FLOAT16_VALUE( 5.45), SIMDE_FLOAT16_VALUE( 40.53), SIMDE_FLOAT16_VALUE( -36.62), SIMDE_FLOAT16_VALUE( 94.25),
|
||||
SIMDE_FLOAT16_VALUE( -62.22), SIMDE_FLOAT16_VALUE( -25.97), SIMDE_FLOAT16_VALUE( 15.66), SIMDE_FLOAT16_VALUE( -68.62),
|
||||
SIMDE_FLOAT16_VALUE( 3.03), SIMDE_FLOAT16_VALUE( -89.06), SIMDE_FLOAT16_VALUE( -98.75), SIMDE_FLOAT16_VALUE( 76.06),
|
||||
SIMDE_FLOAT16_VALUE( -43.31), SIMDE_FLOAT16_VALUE( 69.56), SIMDE_FLOAT16_VALUE( -37.69), SIMDE_FLOAT16_VALUE( -91.38),
|
||||
SIMDE_FLOAT16_VALUE( 14.28), SIMDE_FLOAT16_VALUE( 10.74), SIMDE_FLOAT16_VALUE( -53.66), SIMDE_FLOAT16_VALUE( 84.44),
|
||||
SIMDE_FLOAT16_VALUE( 80.50), SIMDE_FLOAT16_VALUE( -39.47), SIMDE_FLOAT16_VALUE( 11.99), SIMDE_FLOAT16_VALUE( -81.88),
|
||||
SIMDE_FLOAT16_VALUE( -40.62), SIMDE_FLOAT16_VALUE( 32.50), SIMDE_FLOAT16_VALUE( -19.16), SIMDE_FLOAT16_VALUE( 70.00),
|
||||
SIMDE_FLOAT16_VALUE( -36.47), SIMDE_FLOAT16_VALUE( 98.50), SIMDE_FLOAT16_VALUE( 6.33), SIMDE_FLOAT16_VALUE( 69.00) },
|
||||
{ INT16_C( 17779), INT16_C( 20753), -INT16_C( 12140), INT16_C( 21988), -INT16_C( 11321), -INT16_C( 12674), INT16_C( 19412), -INT16_C( 11190),
|
||||
INT16_C( 16911), -INT16_C( 10863), -INT16_C( 10708), INT16_C( 21697), -INT16_C( 11926), INT16_C( 21593), -INT16_C( 12106), -INT16_C( 10826),
|
||||
INT16_C( 19236), INT16_C( 18783), -INT16_C( 11595), INT16_C( 21831), INT16_C( 21768), -INT16_C( 12049), INT16_C( 18943), -INT16_C( 10978),
|
||||
-INT16_C( 12012), INT16_C( 20496), -INT16_C( 13110), INT16_C( 21600), -INT16_C( 12145), INT16_C( 22056), INT16_C( 18004), INT16_C( 21584) } },
|
||||
{ { SIMDE_FLOAT16_VALUE( 39.03), SIMDE_FLOAT16_VALUE( 69.69), SIMDE_FLOAT16_VALUE( 63.22), SIMDE_FLOAT16_VALUE( 76.81),
|
||||
SIMDE_FLOAT16_VALUE( -56.28), SIMDE_FLOAT16_VALUE( -21.12), SIMDE_FLOAT16_VALUE( -91.81), SIMDE_FLOAT16_VALUE( 46.75),
|
||||
SIMDE_FLOAT16_VALUE( -10.19), SIMDE_FLOAT16_VALUE( -90.56), SIMDE_FLOAT16_VALUE( 22.81), SIMDE_FLOAT16_VALUE( 46.50),
|
||||
SIMDE_FLOAT16_VALUE( 79.00), SIMDE_FLOAT16_VALUE( 85.12), SIMDE_FLOAT16_VALUE( 55.09), SIMDE_FLOAT16_VALUE( -6.73),
|
||||
SIMDE_FLOAT16_VALUE( -4.13), SIMDE_FLOAT16_VALUE( -98.56), SIMDE_FLOAT16_VALUE( -22.27), SIMDE_FLOAT16_VALUE( -23.66),
|
||||
SIMDE_FLOAT16_VALUE( -38.03), SIMDE_FLOAT16_VALUE( 89.75), SIMDE_FLOAT16_VALUE( -5.55), SIMDE_FLOAT16_VALUE( 21.38),
|
||||
SIMDE_FLOAT16_VALUE( 22.23), SIMDE_FLOAT16_VALUE( 75.31), SIMDE_FLOAT16_VALUE( -8.63), SIMDE_FLOAT16_VALUE( 85.75),
|
||||
SIMDE_FLOAT16_VALUE( 73.75), SIMDE_FLOAT16_VALUE( 97.69), SIMDE_FLOAT16_VALUE( 54.75), SIMDE_FLOAT16_VALUE( 12.82) },
|
||||
{ INT16_C( 20705), INT16_C( 21595), INT16_C( 21479), INT16_C( 21709), -INT16_C( 11511), -INT16_C( 12984), -INT16_C( 10819), INT16_C( 20952),
|
||||
-INT16_C( 14056), -INT16_C( 10839), INT16_C( 19892), INT16_C( 20944), INT16_C( 21744), INT16_C( 21842), INT16_C( 21219), -INT16_C( 14661),
|
||||
-INT16_C( 15327), -INT16_C( 10711), -INT16_C( 12911), -INT16_C( 12822), -INT16_C( 12095), INT16_C( 21916), -INT16_C( 14963), INT16_C( 19800),
|
||||
INT16_C( 19855), INT16_C( 21685), -INT16_C( 14255), INT16_C( 21852), INT16_C( 21660), INT16_C( 22043), INT16_C( 21208), INT16_C( 19049) } },
|
||||
{ { SIMDE_FLOAT16_VALUE( 67.38), SIMDE_FLOAT16_VALUE( 17.95), SIMDE_FLOAT16_VALUE( -10.36), SIMDE_FLOAT16_VALUE( -88.88),
|
||||
SIMDE_FLOAT16_VALUE( 96.81), SIMDE_FLOAT16_VALUE( -2.17), SIMDE_FLOAT16_VALUE( 57.88), SIMDE_FLOAT16_VALUE( -13.36),
|
||||
SIMDE_FLOAT16_VALUE( 7.26), SIMDE_FLOAT16_VALUE( -19.31), SIMDE_FLOAT16_VALUE( -66.88), SIMDE_FLOAT16_VALUE( -13.75),
|
||||
SIMDE_FLOAT16_VALUE( -34.19), SIMDE_FLOAT16_VALUE( 88.25), SIMDE_FLOAT16_VALUE( 79.50), SIMDE_FLOAT16_VALUE( 61.69),
|
||||
SIMDE_FLOAT16_VALUE( 89.69), SIMDE_FLOAT16_VALUE( -42.75), SIMDE_FLOAT16_VALUE( -61.97), SIMDE_FLOAT16_VALUE( -48.34),
|
||||
SIMDE_FLOAT16_VALUE( -53.03), SIMDE_FLOAT16_VALUE( 32.47), SIMDE_FLOAT16_VALUE( 73.00), SIMDE_FLOAT16_VALUE( 69.19),
|
||||
SIMDE_FLOAT16_VALUE( 7.76), SIMDE_FLOAT16_VALUE( -35.62), SIMDE_FLOAT16_VALUE( 54.94), SIMDE_FLOAT16_VALUE( -18.45),
|
||||
SIMDE_FLOAT16_VALUE( -37.91), SIMDE_FLOAT16_VALUE( 9.69), SIMDE_FLOAT16_VALUE( 94.38), SIMDE_FLOAT16_VALUE( -70.50) },
|
||||
{ INT16_C( 21558), INT16_C( 19581), -INT16_C( 14034), -INT16_C( 10866), INT16_C( 22029), -INT16_C( 16297), INT16_C( 21308), -INT16_C( 13650),
|
||||
INT16_C( 18243), -INT16_C( 13100), -INT16_C( 11218), -INT16_C( 13600), -INT16_C( 12218), INT16_C( 21892), INT16_C( 21752), INT16_C( 21430),
|
||||
INT16_C( 21915), -INT16_C( 11944), -INT16_C( 11329), -INT16_C( 11765), -INT16_C( 11615), INT16_C( 20495), INT16_C( 21648), INT16_C( 21587),
|
||||
INT16_C( 18371), -INT16_C( 12172), INT16_C( 21214), -INT16_C( 13155), -INT16_C( 12099), INT16_C( 18648), INT16_C( 21990), -INT16_C( 11160) } },
|
||||
{ { SIMDE_FLOAT16_VALUE( -72.38), SIMDE_FLOAT16_VALUE( -16.00), SIMDE_FLOAT16_VALUE( -59.41), SIMDE_FLOAT16_VALUE( -75.50),
|
||||
SIMDE_FLOAT16_VALUE( 81.81), SIMDE_FLOAT16_VALUE( 98.44), SIMDE_FLOAT16_VALUE( 11.12), SIMDE_FLOAT16_VALUE( -10.92),
|
||||
SIMDE_FLOAT16_VALUE( -20.86), SIMDE_FLOAT16_VALUE( 44.25), SIMDE_FLOAT16_VALUE( 75.31), SIMDE_FLOAT16_VALUE( 44.94),
|
||||
SIMDE_FLOAT16_VALUE( 32.50), SIMDE_FLOAT16_VALUE( 54.84), SIMDE_FLOAT16_VALUE( 6.64), SIMDE_FLOAT16_VALUE( 22.19),
|
||||
SIMDE_FLOAT16_VALUE( -87.88), SIMDE_FLOAT16_VALUE( 44.66), SIMDE_FLOAT16_VALUE( 73.81), SIMDE_FLOAT16_VALUE( -40.94),
|
||||
SIMDE_FLOAT16_VALUE( -22.86), SIMDE_FLOAT16_VALUE( 46.88), SIMDE_FLOAT16_VALUE( -71.75), SIMDE_FLOAT16_VALUE( 84.88),
|
||||
SIMDE_FLOAT16_VALUE( -88.75), SIMDE_FLOAT16_VALUE( 83.25), SIMDE_FLOAT16_VALUE( -33.56), SIMDE_FLOAT16_VALUE( -26.66),
|
||||
SIMDE_FLOAT16_VALUE( -7.09), SIMDE_FLOAT16_VALUE( -39.19), SIMDE_FLOAT16_VALUE( 2.83), SIMDE_FLOAT16_VALUE( 20.56) },
|
||||
{ -INT16_C( 11130), -INT16_C( 13312), -INT16_C( 11411), -INT16_C( 11080), INT16_C( 21789), INT16_C( 22055), INT16_C( 18831), -INT16_C( 13962),
|
||||
-INT16_C( 13001), INT16_C( 20872), INT16_C( 21685), INT16_C( 20894), INT16_C( 20496), INT16_C( 21211), INT16_C( 18084), INT16_C( 19852),
|
||||
-INT16_C( 10882), INT16_C( 20885), INT16_C( 21661), -INT16_C( 12002), -INT16_C( 12873), INT16_C( 20956), -INT16_C( 11140), INT16_C( 21838),
|
||||
-INT16_C( 10868), INT16_C( 21812), -INT16_C( 12238), -INT16_C( 12630), -INT16_C( 14569), -INT16_C( 12058), INT16_C( 16809), INT16_C( 19748) } },
|
||||
{ { SIMDE_FLOAT16_VALUE( 44.81), SIMDE_FLOAT16_VALUE( 43.41), SIMDE_FLOAT16_VALUE( 45.03), SIMDE_FLOAT16_VALUE( 26.62),
|
||||
SIMDE_FLOAT16_VALUE( 41.88), SIMDE_FLOAT16_VALUE( -43.84), SIMDE_FLOAT16_VALUE( -84.31), SIMDE_FLOAT16_VALUE( -79.00),
|
||||
SIMDE_FLOAT16_VALUE( -99.56), SIMDE_FLOAT16_VALUE( 91.06), SIMDE_FLOAT16_VALUE( 65.94), SIMDE_FLOAT16_VALUE( 32.94),
|
||||
SIMDE_FLOAT16_VALUE( 45.88), SIMDE_FLOAT16_VALUE( -27.41), SIMDE_FLOAT16_VALUE( -44.88), SIMDE_FLOAT16_VALUE( 58.00),
|
||||
SIMDE_FLOAT16_VALUE( -82.75), SIMDE_FLOAT16_VALUE( -71.06), SIMDE_FLOAT16_VALUE( -82.94), SIMDE_FLOAT16_VALUE( -5.60),
|
||||
SIMDE_FLOAT16_VALUE( 75.81), SIMDE_FLOAT16_VALUE( -54.69), SIMDE_FLOAT16_VALUE( -20.70), SIMDE_FLOAT16_VALUE( 87.06),
|
||||
SIMDE_FLOAT16_VALUE( -71.44), SIMDE_FLOAT16_VALUE( 45.72), SIMDE_FLOAT16_VALUE( -39.56), SIMDE_FLOAT16_VALUE( 21.45),
|
||||
SIMDE_FLOAT16_VALUE( -93.50), SIMDE_FLOAT16_VALUE( 63.28), SIMDE_FLOAT16_VALUE( -58.00), SIMDE_FLOAT16_VALUE( 51.34) },
|
||||
{ INT16_C( 20890), INT16_C( 20845), INT16_C( 20897), INT16_C( 20136), INT16_C( 20796), -INT16_C( 11909), -INT16_C( 10939), -INT16_C( 11024),
|
||||
-INT16_C( 10695), INT16_C( 21937), INT16_C( 21535), INT16_C( 20510), INT16_C( 20924), -INT16_C( 12582), -INT16_C( 11876), INT16_C( 21312),
|
||||
-INT16_C( 10964), -INT16_C( 11151), -INT16_C( 10961), -INT16_C( 14950), INT16_C( 21693), -INT16_C( 11562), -INT16_C( 13011), INT16_C( 21873),
|
||||
-INT16_C( 11145), INT16_C( 20919), -INT16_C( 12046), INT16_C( 19805), -INT16_C( 10792), INT16_C( 21481), -INT16_C( 11456), INT16_C( 21099) } }
|
||||
};
|
||||
|
||||
for (size_t i = 0 ; i < (sizeof(test_vec) / sizeof(test_vec[0])); i++) {
|
||||
simde__m512i r = simde_mm512_castph_si512(simde_mm512_loadu_ph(test_vec[i].a));
|
||||
simde_test_x86_assert_equal_i16x32(r, simde_mm512_loadu_epi16(test_vec[i].r));
|
||||
}
|
||||
|
||||
return 0;
|
||||
#else
|
||||
fputc('\n', stdout);
|
||||
for (int i = 0 ; i < 8 ; i++) {
|
||||
simde__m512h a = simde_test_x86_random_f16x32(SIMDE_FLOAT16_VALUE(-100), SIMDE_FLOAT16_VALUE(simde_float16, 100));
|
||||
simde__m512i r = simde_mm512_castph_si512(a);
|
||||
|
||||
simde_test_x86_write_f16x32(2, a, SIMDE_TEST_VEC_POS_FIRST);
|
||||
simde_test_x86_write_i16x32(2, r, SIMDE_TEST_VEC_POS_LAST);
|
||||
}
|
||||
return 1;
|
||||
#endif
|
||||
}
|
||||
#endif
|
||||
|
||||
static int
|
||||
test_simde_mm512_castpd_ps (SIMDE_MUNIT_TEST_ARGS) {
|
||||
#if 1
|
||||
|
|
@ -788,6 +914,133 @@ test_simde_mm512_castsi512_pd(SIMDE_MUNIT_TEST_ARGS) {
|
|||
return 0;
|
||||
}
|
||||
|
||||
#if defined(SIMDE_FLOAT16_IS_SCALAR)
|
||||
static int
|
||||
test_simde_mm512_castsi512_ph (SIMDE_MUNIT_TEST_ARGS) {
|
||||
#if 1
|
||||
static const struct {
|
||||
const int16_t a[32];
|
||||
const simde_float16 r[32];
|
||||
} test_vec[] = {
|
||||
{ { -INT16_C( 11185), -INT16_C( 11108), -INT16_C( 11547), -INT16_C( 10812), INT16_C( 21985), -INT16_C( 14208), INT16_C( 19419), -INT16_C( 11168),
|
||||
-INT16_C( 11753), INT16_C( 21190), -INT16_C( 11701), INT16_C( 21114), -INT16_C( 13960), -INT16_C( 15585), -INT16_C( 11688), -INT16_C( 11169),
|
||||
INT16_C( 20825), INT16_C( 21104), -INT16_C( 10901), -INT16_C( 12715), INT16_C( 21132), -INT16_C( 12780), INT16_C( 21924), INT16_C( 20438),
|
||||
-INT16_C( 12468), INT16_C( 15647), -INT16_C( 10876), -INT16_C( 11329), -INT16_C( 14286), -INT16_C( 11248), -INT16_C( 11523), INT16_C( 19885) },
|
||||
{ SIMDE_FLOAT16_VALUE( -68.94), SIMDE_FLOAT16_VALUE( -73.75), SIMDE_FLOAT16_VALUE( -55.16), SIMDE_FLOAT16_VALUE( -92.25),
|
||||
SIMDE_FLOAT16_VALUE( 94.06), SIMDE_FLOAT16_VALUE( -9.00), SIMDE_FLOAT16_VALUE( 15.71), SIMDE_FLOAT16_VALUE( -70.00),
|
||||
SIMDE_FLOAT16_VALUE( -48.72), SIMDE_FLOAT16_VALUE( 54.19), SIMDE_FLOAT16_VALUE( -50.34), SIMDE_FLOAT16_VALUE( 51.81),
|
||||
SIMDE_FLOAT16_VALUE( -10.94), SIMDE_FLOAT16_VALUE( -3.56), SIMDE_FLOAT16_VALUE( -50.75), SIMDE_FLOAT16_VALUE( -69.94),
|
||||
SIMDE_FLOAT16_VALUE( 42.78), SIMDE_FLOAT16_VALUE( 51.50), SIMDE_FLOAT16_VALUE( -86.69), SIMDE_FLOAT16_VALUE( -25.33),
|
||||
SIMDE_FLOAT16_VALUE( 52.38), SIMDE_FLOAT16_VALUE( -24.31), SIMDE_FLOAT16_VALUE( 90.25), SIMDE_FLOAT16_VALUE( 31.34),
|
||||
SIMDE_FLOAT16_VALUE( -29.19), SIMDE_FLOAT16_VALUE( 1.28), SIMDE_FLOAT16_VALUE( -88.25), SIMDE_FLOAT16_VALUE( -61.97),
|
||||
SIMDE_FLOAT16_VALUE( -8.39), SIMDE_FLOAT16_VALUE( -65.00), SIMDE_FLOAT16_VALUE( -55.91), SIMDE_FLOAT16_VALUE( 22.70) } },
|
||||
{ { -INT16_C( 12072), -INT16_C( 13943), INT16_C( 20379), -INT16_C( 11882), INT16_C( 21759), -INT16_C( 11588), -INT16_C( 13475), -INT16_C( 11187),
|
||||
-INT16_C( 10693), INT16_C( 20574), INT16_C( 21808), -INT16_C( 14002), -INT16_C( 11190), -INT16_C( 11204), INT16_C( 19677), INT16_C( 21666),
|
||||
INT16_C( 21820), INT16_C( 20506), -INT16_C( 11674), INT16_C( 20613), -INT16_C( 10824), -INT16_C( 11362), -INT16_C( 12272), -INT16_C( 13011),
|
||||
INT16_C( 20747), -INT16_C( 13008), INT16_C( 19541), -INT16_C( 11199), INT16_C( 19232), INT16_C( 21421), INT16_C( 21205), INT16_C( 21688) },
|
||||
{ SIMDE_FLOAT16_VALUE( -38.75), SIMDE_FLOAT16_VALUE( -11.07), SIMDE_FLOAT16_VALUE( 30.42), SIMDE_FLOAT16_VALUE( -44.69),
|
||||
SIMDE_FLOAT16_VALUE( 79.94), SIMDE_FLOAT16_VALUE( -53.88), SIMDE_FLOAT16_VALUE( -14.73), SIMDE_FLOAT16_VALUE( -68.81),
|
||||
SIMDE_FLOAT16_VALUE( -99.69), SIMDE_FLOAT16_VALUE( 34.94), SIMDE_FLOAT16_VALUE( 83.00), SIMDE_FLOAT16_VALUE( -10.61),
|
||||
SIMDE_FLOAT16_VALUE( -68.62), SIMDE_FLOAT16_VALUE( -67.75), SIMDE_FLOAT16_VALUE( 19.45), SIMDE_FLOAT16_VALUE( 74.12),
|
||||
SIMDE_FLOAT16_VALUE( 83.75), SIMDE_FLOAT16_VALUE( 32.81), SIMDE_FLOAT16_VALUE( -51.19), SIMDE_FLOAT16_VALUE( 36.16),
|
||||
SIMDE_FLOAT16_VALUE( -91.50), SIMDE_FLOAT16_VALUE( -60.94), SIMDE_FLOAT16_VALUE( -32.50), SIMDE_FLOAT16_VALUE( -20.70),
|
||||
SIMDE_FLOAT16_VALUE( 40.34), SIMDE_FLOAT16_VALUE( -20.75), SIMDE_FLOAT16_VALUE( 17.33), SIMDE_FLOAT16_VALUE( -68.06),
|
||||
SIMDE_FLOAT16_VALUE( 14.25), SIMDE_FLOAT16_VALUE( 61.41), SIMDE_FLOAT16_VALUE( 54.66), SIMDE_FLOAT16_VALUE( 75.50) } },
|
||||
{ { -INT16_C( 11723), -INT16_C( 13450), -INT16_C( 11181), -INT16_C( 11172), INT16_C( 20429), INT16_C( 19461), -INT16_C( 12079), INT16_C( 20450),
|
||||
-INT16_C( 11744), -INT16_C( 11536), -INT16_C( 11023), -INT16_C( 13208), -INT16_C( 12849), INT16_C( 20748), -INT16_C( 11921), -INT16_C( 12049),
|
||||
-INT16_C( 12620), INT16_C( 17751), INT16_C( 22027), -INT16_C( 13163), INT16_C( 20877), -INT16_C( 12165), INT16_C( 21407), -INT16_C( 13411),
|
||||
INT16_C( 20845), -INT16_C( 12947), INT16_C( 19503), -INT16_C( 11957), -INT16_C( 11383), -INT16_C( 12504), -INT16_C( 11219), -INT16_C( 14088) },
|
||||
{ SIMDE_FLOAT16_VALUE( -49.66), SIMDE_FLOAT16_VALUE( -14.92), SIMDE_FLOAT16_VALUE( -69.19), SIMDE_FLOAT16_VALUE( -69.75),
|
||||
SIMDE_FLOAT16_VALUE( 31.20), SIMDE_FLOAT16_VALUE( 16.08), SIMDE_FLOAT16_VALUE( -38.53), SIMDE_FLOAT16_VALUE( 31.53),
|
||||
SIMDE_FLOAT16_VALUE( -49.00), SIMDE_FLOAT16_VALUE( -55.50), SIMDE_FLOAT16_VALUE( -79.06), SIMDE_FLOAT16_VALUE( -17.62),
|
||||
SIMDE_FLOAT16_VALUE( -23.23), SIMDE_FLOAT16_VALUE( 40.38), SIMDE_FLOAT16_VALUE( -43.47), SIMDE_FLOAT16_VALUE( -39.47),
|
||||
SIMDE_FLOAT16_VALUE( -26.81), SIMDE_FLOAT16_VALUE( 5.34), SIMDE_FLOAT16_VALUE( 96.69), SIMDE_FLOAT16_VALUE( -18.33),
|
||||
SIMDE_FLOAT16_VALUE( 44.41), SIMDE_FLOAT16_VALUE( -35.84), SIMDE_FLOAT16_VALUE( 60.97), SIMDE_FLOAT16_VALUE( -15.23),
|
||||
SIMDE_FLOAT16_VALUE( 43.41), SIMDE_FLOAT16_VALUE( -21.70), SIMDE_FLOAT16_VALUE( 16.73), SIMDE_FLOAT16_VALUE( -42.34),
|
||||
SIMDE_FLOAT16_VALUE( -60.28), SIMDE_FLOAT16_VALUE( -28.62), SIMDE_FLOAT16_VALUE( -66.81), SIMDE_FLOAT16_VALUE( -9.94) } },
|
||||
{ { INT16_C( 21263), -INT16_C( 12159), INT16_C( 19734), -INT16_C( 13782), INT16_C( 21761), INT16_C( 21789), -INT16_C( 10995), -INT16_C( 11185),
|
||||
-INT16_C( 11109), -INT16_C( 11396), INT16_C( 19131), INT16_C( 16937), INT16_C( 21768), INT16_C( 21600), INT16_C( 21491), -INT16_C( 11830),
|
||||
-INT16_C( 12756), INT16_C( 21384), INT16_C( 20588), -INT16_C( 11004), -INT16_C( 11079), -INT16_C( 15529), INT16_C( 17536), INT16_C( 21566),
|
||||
INT16_C( 21674), -INT16_C( 11028), -INT16_C( 11096), -INT16_C( 10917), -INT16_C( 14495), -INT16_C( 11990), INT16_C( 17510), -INT16_C( 11683) },
|
||||
{ SIMDE_FLOAT16_VALUE( 56.47), SIMDE_FLOAT16_VALUE( -36.03), SIMDE_FLOAT16_VALUE( 20.34), SIMDE_FLOAT16_VALUE( -12.33),
|
||||
SIMDE_FLOAT16_VALUE( 80.06), SIMDE_FLOAT16_VALUE( 81.81), SIMDE_FLOAT16_VALUE( -80.81), SIMDE_FLOAT16_VALUE( -68.94),
|
||||
SIMDE_FLOAT16_VALUE( -73.69), SIMDE_FLOAT16_VALUE( -59.88), SIMDE_FLOAT16_VALUE( 13.46), SIMDE_FLOAT16_VALUE( 3.08),
|
||||
SIMDE_FLOAT16_VALUE( 80.50), SIMDE_FLOAT16_VALUE( 70.00), SIMDE_FLOAT16_VALUE( 63.59), SIMDE_FLOAT16_VALUE( -46.31),
|
||||
SIMDE_FLOAT16_VALUE( -24.69), SIMDE_FLOAT16_VALUE( 60.25), SIMDE_FLOAT16_VALUE( 35.38), SIMDE_FLOAT16_VALUE( -80.25),
|
||||
SIMDE_FLOAT16_VALUE( -75.56), SIMDE_FLOAT16_VALUE( -3.67), SIMDE_FLOAT16_VALUE( 4.50), SIMDE_FLOAT16_VALUE( 67.88),
|
||||
SIMDE_FLOAT16_VALUE( 74.62), SIMDE_FLOAT16_VALUE( -78.75), SIMDE_FLOAT16_VALUE( -74.50), SIMDE_FLOAT16_VALUE( -85.69),
|
||||
SIMDE_FLOAT16_VALUE( -7.38), SIMDE_FLOAT16_VALUE( -41.31), SIMDE_FLOAT16_VALUE( 4.40), SIMDE_FLOAT16_VALUE( -50.91) } },
|
||||
{ { INT16_C( 19883), -INT16_C( 11084), INT16_C( 20632), INT16_C( 16763), -INT16_C( 10793), INT16_C( 21246), INT16_C( 20538), -INT16_C( 11214),
|
||||
INT16_C( 22017), -INT16_C( 11625), INT16_C( 20607), INT16_C( 21705), -INT16_C( 10964), -INT16_C( 18637), -INT16_C( 11172), -INT16_C( 14482),
|
||||
-INT16_C( 12026), INT16_C( 21530), INT16_C( 18984), -INT16_C( 13344), -INT16_C( 12095), -INT16_C( 10957), -INT16_C( 11779), -INT16_C( 11283),
|
||||
-INT16_C( 11330), -INT16_C( 12903), -INT16_C( 11741), INT16_C( 20394), INT16_C( 20618), INT16_C( 21226), INT16_C( 21756), -INT16_C( 11999) },
|
||||
{ SIMDE_FLOAT16_VALUE( 22.67), SIMDE_FLOAT16_VALUE( -75.25), SIMDE_FLOAT16_VALUE( 36.75), SIMDE_FLOAT16_VALUE( 2.74),
|
||||
SIMDE_FLOAT16_VALUE( -93.44), SIMDE_FLOAT16_VALUE( 55.94), SIMDE_FLOAT16_VALUE( 33.81), SIMDE_FLOAT16_VALUE( -67.12),
|
||||
SIMDE_FLOAT16_VALUE( 96.06), SIMDE_FLOAT16_VALUE( -52.72), SIMDE_FLOAT16_VALUE( 35.97), SIMDE_FLOAT16_VALUE( 76.56),
|
||||
SIMDE_FLOAT16_VALUE( -82.75), SIMDE_FLOAT16_VALUE( -0.45), SIMDE_FLOAT16_VALUE( -69.75), SIMDE_FLOAT16_VALUE( -7.43),
|
||||
SIMDE_FLOAT16_VALUE( -40.19), SIMDE_FLOAT16_VALUE( 65.62), SIMDE_FLOAT16_VALUE( 12.31), SIMDE_FLOAT16_VALUE( -15.75),
|
||||
SIMDE_FLOAT16_VALUE( -38.03), SIMDE_FLOAT16_VALUE( -83.19), SIMDE_FLOAT16_VALUE( -47.91), SIMDE_FLOAT16_VALUE( -63.41),
|
||||
SIMDE_FLOAT16_VALUE( -61.94), SIMDE_FLOAT16_VALUE( -22.39), SIMDE_FLOAT16_VALUE( -49.09), SIMDE_FLOAT16_VALUE( 30.66),
|
||||
SIMDE_FLOAT16_VALUE( 36.31), SIMDE_FLOAT16_VALUE( 55.31), SIMDE_FLOAT16_VALUE( 79.75), SIMDE_FLOAT16_VALUE( -41.03) } },
|
||||
{ { INT16_C( 21761), INT16_C( 19487), INT16_C( 21430), INT16_C( 21866), -INT16_C( 12572), -INT16_C( 15235), -INT16_C( 11000), -INT16_C( 12321),
|
||||
INT16_C( 20825), INT16_C( 21230), -INT16_C( 11555), INT16_C( 21377), -INT16_C( 11872), -INT16_C( 12760), -INT16_C( 11795), INT16_C( 19304),
|
||||
-INT16_C( 11424), INT16_C( 21519), INT16_C( 22065), INT16_C( 16886), INT16_C( 21788), -INT16_C( 11749), INT16_C( 20722), -INT16_C( 11004),
|
||||
INT16_C( 20273), INT16_C( 21928), INT16_C( 21070), -INT16_C( 12194), INT16_C( 20922), INT16_C( 20364), INT16_C( 19970), INT16_C( 20087) },
|
||||
{ SIMDE_FLOAT16_VALUE( 80.06), SIMDE_FLOAT16_VALUE( 16.48), SIMDE_FLOAT16_VALUE( 61.69), SIMDE_FLOAT16_VALUE( 86.62),
|
||||
SIMDE_FLOAT16_VALUE( -27.56), SIMDE_FLOAT16_VALUE( -4.49), SIMDE_FLOAT16_VALUE( -80.50), SIMDE_FLOAT16_VALUE( -31.48),
|
||||
SIMDE_FLOAT16_VALUE( 42.78), SIMDE_FLOAT16_VALUE( 55.44), SIMDE_FLOAT16_VALUE( -54.91), SIMDE_FLOAT16_VALUE( 60.03),
|
||||
SIMDE_FLOAT16_VALUE( -45.00), SIMDE_FLOAT16_VALUE( -24.62), SIMDE_FLOAT16_VALUE( -47.41), SIMDE_FLOAT16_VALUE( 14.81),
|
||||
SIMDE_FLOAT16_VALUE( -59.00), SIMDE_FLOAT16_VALUE( 64.94), SIMDE_FLOAT16_VALUE( 99.06), SIMDE_FLOAT16_VALUE( 2.98),
|
||||
SIMDE_FLOAT16_VALUE( 81.75), SIMDE_FLOAT16_VALUE( -48.84), SIMDE_FLOAT16_VALUE( 39.56), SIMDE_FLOAT16_VALUE( -80.25),
|
||||
SIMDE_FLOAT16_VALUE( 28.77), SIMDE_FLOAT16_VALUE( 90.50), SIMDE_FLOAT16_VALUE( 50.44), SIMDE_FLOAT16_VALUE( -34.94),
|
||||
SIMDE_FLOAT16_VALUE( 45.81), SIMDE_FLOAT16_VALUE( 30.19), SIMDE_FLOAT16_VALUE( 24.03), SIMDE_FLOAT16_VALUE( 25.86) } },
|
||||
{ { -INT16_C( 11605), -INT16_C( 13533), INT16_C( 19004), INT16_C( 19654), INT16_C( 21780), INT16_C( 20477), INT16_C( 21882), INT16_C( 19969),
|
||||
-INT16_C( 13747), -INT16_C( 11211), -INT16_C( 13318), INT16_C( 20813), INT16_C( 18440), INT16_C( 20629), -INT16_C( 11943), INT16_C( 21026),
|
||||
INT16_C( 15933), -INT16_C( 11913), -INT16_C( 11778), -INT16_C( 13267), INT16_C( 18286), INT16_C( 21946), INT16_C( 16932), -INT16_C( 11270),
|
||||
INT16_C( 21794), -INT16_C( 11824), INT16_C( 15626), INT16_C( 20219), INT16_C( 21819), -INT16_C( 11093), -INT16_C( 11833), -INT16_C( 11174) },
|
||||
{ SIMDE_FLOAT16_VALUE( -53.34), SIMDE_FLOAT16_VALUE( -14.27), SIMDE_FLOAT16_VALUE( 12.47), SIMDE_FLOAT16_VALUE( 19.09),
|
||||
SIMDE_FLOAT16_VALUE( 81.25), SIMDE_FLOAT16_VALUE( 31.95), SIMDE_FLOAT16_VALUE( 87.62), SIMDE_FLOAT16_VALUE( 24.02),
|
||||
SIMDE_FLOAT16_VALUE( -12.60), SIMDE_FLOAT16_VALUE( -67.31), SIMDE_FLOAT16_VALUE( -15.95), SIMDE_FLOAT16_VALUE( 42.41),
|
||||
SIMDE_FLOAT16_VALUE( 8.06), SIMDE_FLOAT16_VALUE( 36.66), SIMDE_FLOAT16_VALUE( -42.78), SIMDE_FLOAT16_VALUE( 49.06),
|
||||
SIMDE_FLOAT16_VALUE( 1.56), SIMDE_FLOAT16_VALUE( -43.72), SIMDE_FLOAT16_VALUE( -47.94), SIMDE_FLOAT16_VALUE( -16.70),
|
||||
SIMDE_FLOAT16_VALUE( 7.43), SIMDE_FLOAT16_VALUE( 91.62), SIMDE_FLOAT16_VALUE( 3.07), SIMDE_FLOAT16_VALUE( -63.81),
|
||||
SIMDE_FLOAT16_VALUE( 82.12), SIMDE_FLOAT16_VALUE( -46.50), SIMDE_FLOAT16_VALUE( 1.26), SIMDE_FLOAT16_VALUE( 27.92),
|
||||
SIMDE_FLOAT16_VALUE( 83.69), SIMDE_FLOAT16_VALUE( -74.69), SIMDE_FLOAT16_VALUE( -46.22), SIMDE_FLOAT16_VALUE( -69.62) } },
|
||||
{ { INT16_C( 18819), INT16_C( 21540), INT16_C( 21039), -INT16_C( 14403), -INT16_C( 16599), INT16_C( 20642), -INT16_C( 10949), INT16_C( 21850),
|
||||
INT16_C( 21596), INT16_C( 13681), INT16_C( 20225), -INT16_C( 12916), -INT16_C( 11296), INT16_C( 21844), -INT16_C( 11118), INT16_C( 20690),
|
||||
-INT16_C( 11440), -INT16_C( 12988), -INT16_C( 11038), INT16_C( 21022), -INT16_C( 12452), INT16_C( 20027), INT16_C( 21842), -INT16_C( 11798),
|
||||
INT16_C( 21735), -INT16_C( 13617), INT16_C( 21770), INT16_C( 21444), INT16_C( 18902), -INT16_C( 11238), INT16_C( 21960), -INT16_C( 11051) },
|
||||
{ SIMDE_FLOAT16_VALUE( 11.02), SIMDE_FLOAT16_VALUE( 66.25), SIMDE_FLOAT16_VALUE( 49.47), SIMDE_FLOAT16_VALUE( -7.74),
|
||||
SIMDE_FLOAT16_VALUE( -1.79), SIMDE_FLOAT16_VALUE( 37.06), SIMDE_FLOAT16_VALUE( -83.69), SIMDE_FLOAT16_VALUE( 85.62),
|
||||
SIMDE_FLOAT16_VALUE( 69.75), SIMDE_FLOAT16_VALUE( 0.34), SIMDE_FLOAT16_VALUE( 28.02), SIMDE_FLOAT16_VALUE( -22.19),
|
||||
SIMDE_FLOAT16_VALUE( -63.00), SIMDE_FLOAT16_VALUE( 85.25), SIMDE_FLOAT16_VALUE( -73.12), SIMDE_FLOAT16_VALUE( 38.56),
|
||||
SIMDE_FLOAT16_VALUE( -58.50), SIMDE_FLOAT16_VALUE( -21.06), SIMDE_FLOAT16_VALUE( -78.12), SIMDE_FLOAT16_VALUE( 48.94),
|
||||
SIMDE_FLOAT16_VALUE( -29.44), SIMDE_FLOAT16_VALUE( 24.92), SIMDE_FLOAT16_VALUE( 85.12), SIMDE_FLOAT16_VALUE( -47.31),
|
||||
SIMDE_FLOAT16_VALUE( 78.44), SIMDE_FLOAT16_VALUE( -13.62), SIMDE_FLOAT16_VALUE( 80.62), SIMDE_FLOAT16_VALUE( 62.12),
|
||||
SIMDE_FLOAT16_VALUE( 11.67), SIMDE_FLOAT16_VALUE( -65.62), SIMDE_FLOAT16_VALUE( 92.50), SIMDE_FLOAT16_VALUE( -77.31) } }
|
||||
};
|
||||
|
||||
for (size_t i = 0 ; i < (sizeof(test_vec) / sizeof(test_vec[0])) ; i++) {
|
||||
simde__m512i a = simde_mm512_loadu_epi16(test_vec[i].a);
|
||||
simde__m512h r = simde_mm512_castsi512_ph(a);
|
||||
simde_test_x86_assert_equal_f16x32(r, simde_mm512_loadu_ph(test_vec[i].r), 1);
|
||||
}
|
||||
|
||||
return 0;
|
||||
#else
|
||||
fputc('\n', stdout);
|
||||
for (int i = 0 ; i < 8 ; i++) {
|
||||
simde__m512h r = simde_test_x86_random_f16x32(SIMDE_FLOAT16_VALUE(-100), SIMDE_FLOAT16_VALUE(100));
|
||||
simde__m512i a = simde_mm512_castph_si512(r);
|
||||
|
||||
simde_test_x86_write_i16x32(2, a, SIMDE_TEST_VEC_POS_FIRST);
|
||||
simde_test_x86_write_f16x32(2, r, SIMDE_TEST_VEC_POS_LAST);
|
||||
}
|
||||
return 1;
|
||||
#endif
|
||||
}
|
||||
#endif
|
||||
|
||||
static int
|
||||
test_simde_mm512_castsi128_si512(SIMDE_MUNIT_TEST_ARGS) {
|
||||
const struct {
|
||||
|
|
@ -1257,6 +1510,9 @@ SIMDE_TEST_FUNC_LIST_BEGIN
|
|||
SIMDE_TEST_FUNC_LIST_ENTRY(mm512_castps_pd)
|
||||
SIMDE_TEST_FUNC_LIST_ENTRY(mm512_castpd_ps)
|
||||
SIMDE_TEST_FUNC_LIST_ENTRY(mm512_castps_si512)
|
||||
#if defined(SIMDE_FLOAT16_IS_SCALAR)
|
||||
SIMDE_TEST_FUNC_LIST_ENTRY(mm512_castph_si512)
|
||||
#endif
|
||||
SIMDE_TEST_FUNC_LIST_ENTRY(mm512_castps128_ps512)
|
||||
SIMDE_TEST_FUNC_LIST_ENTRY(mm512_castps256_ps512)
|
||||
SIMDE_TEST_FUNC_LIST_ENTRY(mm512_castps512_ps128)
|
||||
|
|
@ -1267,6 +1523,9 @@ SIMDE_TEST_FUNC_LIST_BEGIN
|
|||
SIMDE_TEST_FUNC_LIST_ENTRY(mm512_castsi256_si512)
|
||||
SIMDE_TEST_FUNC_LIST_ENTRY(mm512_castsi512_ps)
|
||||
SIMDE_TEST_FUNC_LIST_ENTRY(mm512_castsi512_pd)
|
||||
#if defined(SIMDE_FLOAT16_IS_SCALAR)
|
||||
SIMDE_TEST_FUNC_LIST_ENTRY(mm512_castsi512_ph)
|
||||
#endif
|
||||
SIMDE_TEST_FUNC_LIST_END
|
||||
|
||||
#include <test/x86/avx512/test-avx512-footer.h>
|
||||
|
|
|
|||
3575
thirdparty/simde/test/x86/avx512/cmp.c
vendored
3575
thirdparty/simde/test/x86/avx512/cmp.c
vendored
File diff suppressed because it is too large
Load diff
223
thirdparty/simde/test/x86/avx512/cmpeq.c
vendored
223
thirdparty/simde/test/x86/avx512/cmpeq.c
vendored
|
|
@ -493,6 +493,227 @@ test_simde_mm512_mask_cmpeq_epi8_mask (SIMDE_MUNIT_TEST_ARGS) {
|
|||
#endif
|
||||
}
|
||||
|
||||
static int
|
||||
test_simde_mm512_cmpeq_epu16_mask (SIMDE_MUNIT_TEST_ARGS) {
|
||||
#if 1
|
||||
static const struct {
|
||||
const uint16_t a[32];
|
||||
const uint16_t b[32];
|
||||
const simde__mmask32 r;
|
||||
} test_vec[] = {
|
||||
{ { UINT16_C(30564), UINT16_C(64050), UINT16_C(40987), UINT16_C(53280), UINT16_C(24199), UINT16_C(35800), UINT16_C(51595), UINT16_C(14813),
|
||||
UINT16_C(41579), UINT16_C(54980), UINT16_C(17791), UINT16_C(15149), UINT16_C(32414), UINT16_C(54252), UINT16_C(10540), UINT16_C(37066),
|
||||
UINT16_C(64673), UINT16_C(48266), UINT16_C(43933), UINT16_C( 9357), UINT16_C(25865), UINT16_C(38063), UINT16_C(35887), UINT16_C(39629),
|
||||
UINT16_C(37422), UINT16_C(44656), UINT16_C(40407), UINT16_C(30185), UINT16_C(54556), UINT16_C(18504), UINT16_C( 4863), UINT16_C(41177) },
|
||||
{ UINT16_C(25359), UINT16_C(44124), UINT16_C(59662), UINT16_C( 6096), UINT16_C(32591), UINT16_C(32427), UINT16_C(30987), UINT16_C(14872),
|
||||
UINT16_C(41579), UINT16_C(54980), UINT16_C(53542), UINT16_C(16984), UINT16_C(41126), UINT16_C(42378), UINT16_C(25523), UINT16_C(49733),
|
||||
UINT16_C(64673), UINT16_C(48266), UINT16_C(16011), UINT16_C(56045), UINT16_C(25865), UINT16_C(38063), UINT16_C(28689), UINT16_C( 7170),
|
||||
UINT16_C(60153), UINT16_C( 8191), UINT16_C(40407), UINT16_C(30185), UINT16_C(60407), UINT16_C(43527), UINT16_C(19791), UINT16_C( 5740) },
|
||||
UINT32_C( 204669696) },
|
||||
{ { UINT16_C(55320), UINT16_C(54613), UINT16_C(44401), UINT16_C(33438), UINT16_C(40990), UINT16_C( 6047), UINT16_C(40587), UINT16_C(17974),
|
||||
UINT16_C(38901), UINT16_C(60584), UINT16_C(45186), UINT16_C(53655), UINT16_C( 1021), UINT16_C(60647), UINT16_C(54238), UINT16_C(63078),
|
||||
UINT16_C(48043), UINT16_C( 7372), UINT16_C(27241), UINT16_C(34719), UINT16_C(15882), UINT16_C(38302), UINT16_C(54492), UINT16_C(53724),
|
||||
UINT16_C(33899), UINT16_C(60861), UINT16_C(21556), UINT16_C(12735), UINT16_C(42584), UINT16_C(13853), UINT16_C(33913), UINT16_C( 9516) },
|
||||
{ UINT16_C(55320), UINT16_C(54613), UINT16_C(57442), UINT16_C(27951), UINT16_C(52510), UINT16_C(64002), UINT16_C(40587), UINT16_C(17974),
|
||||
UINT16_C(38901), UINT16_C(60584), UINT16_C(47581), UINT16_C(13769), UINT16_C( 1021), UINT16_C(60647), UINT16_C(54238), UINT16_C(63078),
|
||||
UINT16_C(48043), UINT16_C( 7372), UINT16_C(33312), UINT16_C(15968), UINT16_C(15882), UINT16_C(38302), UINT16_C(54492), UINT16_C(53724),
|
||||
UINT16_C(63373), UINT16_C(27451), UINT16_C(21556), UINT16_C(12735), UINT16_C( 3307), UINT16_C(21993), UINT16_C(33913), UINT16_C( 9516) },
|
||||
UINT32_C(3438539715) },
|
||||
{ { UINT16_C(34772), UINT16_C( 9093), UINT16_C(48874), UINT16_C(11028), UINT16_C( 4802), UINT16_C(20687), UINT16_C( 2569), UINT16_C(47803),
|
||||
UINT16_C(23311), UINT16_C(64202), UINT16_C(45927), UINT16_C( 2895), UINT16_C(20378), UINT16_C(49216), UINT16_C(26529), UINT16_C(29959),
|
||||
UINT16_C(36079), UINT16_C(55704), UINT16_C(44362), UINT16_C( 3076), UINT16_C(54207), UINT16_C(51292), UINT16_C( 6109), UINT16_C(60546),
|
||||
UINT16_C(19571), UINT16_C(56038), UINT16_C(14079), UINT16_C(39398), UINT16_C( 9861), UINT16_C( 9818), UINT16_C(24973), UINT16_C(31899) },
|
||||
{ UINT16_C(13293), UINT16_C(14165), UINT16_C(23008), UINT16_C(40771), UINT16_C(41004), UINT16_C( 2664), UINT16_C(60087), UINT16_C(10998),
|
||||
UINT16_C(56631), UINT16_C(13829), UINT16_C(45927), UINT16_C( 2895), UINT16_C(20378), UINT16_C(49216), UINT16_C(22923), UINT16_C(30747),
|
||||
UINT16_C(36079), UINT16_C(55704), UINT16_C(44362), UINT16_C( 3076), UINT16_C(54207), UINT16_C(51292), UINT16_C(63327), UINT16_C(38516),
|
||||
UINT16_C(31188), UINT16_C(59340), UINT16_C(40036), UINT16_C(30079), UINT16_C(15814), UINT16_C(20756), UINT16_C(24973), UINT16_C(31899) },
|
||||
UINT32_C(3225369600) },
|
||||
{ { UINT16_C(40043), UINT16_C(64864), UINT16_C(24592), UINT16_C(28487), UINT16_C(48215), UINT16_C(11013), UINT16_C(53813), UINT16_C(39442),
|
||||
UINT16_C(37230), UINT16_C(13583), UINT16_C( 9166), UINT16_C(25734), UINT16_C(20562), UINT16_C(62087), UINT16_C( 5832), UINT16_C(13147),
|
||||
UINT16_C(48050), UINT16_C(49969), UINT16_C(30748), UINT16_C(29490), UINT16_C(14388), UINT16_C(27295), UINT16_C(45322), UINT16_C(30724),
|
||||
UINT16_C( 4931), UINT16_C( 4525), UINT16_C(13367), UINT16_C(35190), UINT16_C(64900), UINT16_C(19579), UINT16_C(55059), UINT16_C(50816) },
|
||||
{ UINT16_C(40043), UINT16_C(64864), UINT16_C(47913), UINT16_C(24098), UINT16_C(48215), UINT16_C(11013), UINT16_C(52338), UINT16_C(46454),
|
||||
UINT16_C( 9183), UINT16_C( 5831), UINT16_C(15703), UINT16_C(56224), UINT16_C( 6970), UINT16_C(19752), UINT16_C( 5832), UINT16_C(13147),
|
||||
UINT16_C(40025), UINT16_C(33331), UINT16_C(30748), UINT16_C(29490), UINT16_C(14388), UINT16_C(27295), UINT16_C(45322), UINT16_C(30724),
|
||||
UINT16_C( 1506), UINT16_C(14954), UINT16_C(13367), UINT16_C(35190), UINT16_C(15654), UINT16_C( 6346), UINT16_C(56805), UINT16_C(16029) },
|
||||
UINT32_C( 217890867) },
|
||||
{ { UINT16_C(41254), UINT16_C(15645), UINT16_C(26186), UINT16_C(48838), UINT16_C( 1061), UINT16_C( 2066), UINT16_C(32010), UINT16_C(19522),
|
||||
UINT16_C(22407), UINT16_C(44489), UINT16_C(37781), UINT16_C(31430), UINT16_C(25456), UINT16_C(60089), UINT16_C(31284), UINT16_C(23484),
|
||||
UINT16_C(55835), UINT16_C(26008), UINT16_C(24128), UINT16_C(26148), UINT16_C(13922), UINT16_C(27758), UINT16_C(45235), UINT16_C(15289),
|
||||
UINT16_C(33287), UINT16_C(40168), UINT16_C(44565), UINT16_C(34071), UINT16_C(53266), UINT16_C(18032), UINT16_C(11338), UINT16_C(26017) },
|
||||
{ UINT16_C(41254), UINT16_C(15645), UINT16_C(26186), UINT16_C(48838), UINT16_C( 6949), UINT16_C(55654), UINT16_C( 8139), UINT16_C(53780),
|
||||
UINT16_C(22407), UINT16_C(44489), UINT16_C(37781), UINT16_C(31430), UINT16_C(44118), UINT16_C(40963), UINT16_C(31284), UINT16_C(23484),
|
||||
UINT16_C(53470), UINT16_C(30246), UINT16_C(54207), UINT16_C(58736), UINT16_C(13922), UINT16_C(27758), UINT16_C(45235), UINT16_C(15289),
|
||||
UINT16_C(64206), UINT16_C(31054), UINT16_C(44565), UINT16_C(34071), UINT16_C(53266), UINT16_C(18032), UINT16_C(11338), UINT16_C(26017) },
|
||||
UINT32_C(4243640079) },
|
||||
{ { UINT16_C(41958), UINT16_C(54513), UINT16_C(44922), UINT16_C(28813), UINT16_C( 6529), UINT16_C(20231), UINT16_C(21779), UINT16_C(38089),
|
||||
UINT16_C(65503), UINT16_C( 5482), UINT16_C(57657), UINT16_C( 6180), UINT16_C( 4445), UINT16_C(43478), UINT16_C( 2341), UINT16_C( 2997),
|
||||
UINT16_C(42669), UINT16_C(10208), UINT16_C(27989), UINT16_C(54935), UINT16_C(40582), UINT16_C(39462), UINT16_C(61428), UINT16_C(54062),
|
||||
UINT16_C(39150), UINT16_C(10473), UINT16_C( 3449), UINT16_C(54848), UINT16_C( 5662), UINT16_C(17280), UINT16_C(13600), UINT16_C(52559) },
|
||||
{ UINT16_C(41958), UINT16_C(54513), UINT16_C(44922), UINT16_C(28813), UINT16_C(11817), UINT16_C( 7613), UINT16_C(21779), UINT16_C(38089),
|
||||
UINT16_C(55939), UINT16_C(64819), UINT16_C(29927), UINT16_C( 1491), UINT16_C( 4445), UINT16_C(43478), UINT16_C(39049), UINT16_C(25975),
|
||||
UINT16_C(42669), UINT16_C(10208), UINT16_C(40694), UINT16_C( 8326), UINT16_C(40582), UINT16_C(39462), UINT16_C(11822), UINT16_C(45813),
|
||||
UINT16_C(10248), UINT16_C(61359), UINT16_C( 3449), UINT16_C(54848), UINT16_C(16086), UINT16_C(24529), UINT16_C(13600), UINT16_C(52559) },
|
||||
UINT32_C(3425906895) },
|
||||
{ { UINT16_C(34809), UINT16_C(50635), UINT16_C( 2250), UINT16_C(63919), UINT16_C(42039), UINT16_C(16299), UINT16_C(23244), UINT16_C(26927),
|
||||
UINT16_C( 9436), UINT16_C(45712), UINT16_C(24930), UINT16_C(14353), UINT16_C(54698), UINT16_C(24533), UINT16_C(54576), UINT16_C(10506),
|
||||
UINT16_C(54620), UINT16_C(10222), UINT16_C(40413), UINT16_C( 5152), UINT16_C(52033), UINT16_C( 3668), UINT16_C(33573), UINT16_C( 375),
|
||||
UINT16_C( 1959), UINT16_C( 2484), UINT16_C(50536), UINT16_C( 4929), UINT16_C( 5787), UINT16_C(52082), UINT16_C(31979), UINT16_C(18676) },
|
||||
{ UINT16_C(34809), UINT16_C(50635), UINT16_C(36736), UINT16_C(49475), UINT16_C(38746), UINT16_C(32719), UINT16_C(23244), UINT16_C(26927),
|
||||
UINT16_C( 9436), UINT16_C(45712), UINT16_C(24930), UINT16_C(14353), UINT16_C(54698), UINT16_C(24533), UINT16_C(54576), UINT16_C(10506),
|
||||
UINT16_C(49974), UINT16_C(46646), UINT16_C(31058), UINT16_C(44152), UINT16_C(52033), UINT16_C( 3668), UINT16_C(44174), UINT16_C(56299),
|
||||
UINT16_C( 1959), UINT16_C( 2484), UINT16_C(50536), UINT16_C( 4929), UINT16_C( 5787), UINT16_C(52082), UINT16_C(16931), UINT16_C(23124) },
|
||||
UINT32_C(1060175811) },
|
||||
{ { UINT16_C(34820), UINT16_C( 5381), UINT16_C(12496), UINT16_C(24127), UINT16_C(11228), UINT16_C(48441), UINT16_C(52192), UINT16_C(41367),
|
||||
UINT16_C( 1829), UINT16_C(48002), UINT16_C(28886), UINT16_C(64007), UINT16_C(23731), UINT16_C(47444), UINT16_C(25831), UINT16_C(60177),
|
||||
UINT16_C( 5869), UINT16_C(48384), UINT16_C(16455), UINT16_C( 8987), UINT16_C(21611), UINT16_C(19424), UINT16_C(30751), UINT16_C(17900),
|
||||
UINT16_C(28543), UINT16_C(21760), UINT16_C( 2015), UINT16_C(37455), UINT16_C(41827), UINT16_C(19019), UINT16_C(23816), UINT16_C(62774) },
|
||||
{ UINT16_C(13939), UINT16_C(47794), UINT16_C(52598), UINT16_C(57822), UINT16_C(11228), UINT16_C(48441), UINT16_C( 6454), UINT16_C(46470),
|
||||
UINT16_C( 1829), UINT16_C(48002), UINT16_C(23181), UINT16_C(61946), UINT16_C(18174), UINT16_C( 1595), UINT16_C(25831), UINT16_C(60177),
|
||||
UINT16_C( 5869), UINT16_C(48384), UINT16_C(44922), UINT16_C(39680), UINT16_C(21611), UINT16_C(19424), UINT16_C(30751), UINT16_C(17900),
|
||||
UINT16_C(28543), UINT16_C(21760), UINT16_C( 2015), UINT16_C(37455), UINT16_C(41827), UINT16_C(19019), UINT16_C(23816), UINT16_C(62774) },
|
||||
UINT32_C(4294165296) },
|
||||
};
|
||||
|
||||
for (size_t i = 0 ; i < (sizeof(test_vec) / sizeof(test_vec[0])) ; i++) {
|
||||
simde__m512i a = simde_mm512_loadu_si512(test_vec[i].a);
|
||||
simde__m512i b = simde_mm512_loadu_si512(test_vec[i].b);
|
||||
simde__mmask32 r = simde_mm512_cmpeq_epu16_mask(a, b);
|
||||
simde_assert_equal_mmask32(r, test_vec[i].r);
|
||||
}
|
||||
|
||||
return 0;
|
||||
#else
|
||||
fputc('\n', stdout);
|
||||
for (int i = 0 ; i < 8 ; i++) {
|
||||
simde__m512i a = simde_test_x86_random_u16x32();
|
||||
simde__m512i b = simde_mm512_mask_blend_epi32(simde_test_x86_random_mmask32(), a, simde_test_x86_random_u16x32());
|
||||
simde__mmask32 r = simde_mm512_cmpeq_epu16_mask(a, b);
|
||||
|
||||
simde_test_x86_write_u16x32(2, a, SIMDE_TEST_VEC_POS_FIRST);
|
||||
simde_test_x86_write_u16x32(2, b, SIMDE_TEST_VEC_POS_MIDDLE);
|
||||
simde_test_x86_write_mmask32(2, r, SIMDE_TEST_VEC_POS_LAST);
|
||||
}
|
||||
return 1;
|
||||
#endif
|
||||
}
|
||||
|
||||
static int
|
||||
test_simde_mm512_mask_cmpeq_epu16_mask (SIMDE_MUNIT_TEST_ARGS) {
|
||||
#if 1
|
||||
static const struct {
|
||||
const simde__mmask32 k1;
|
||||
const uint16_t a[32];
|
||||
const uint16_t b[32];
|
||||
const simde__mmask32 r;
|
||||
} test_vec[] = {
|
||||
{ UINT32_C(3813746624),
|
||||
{ UINT16_C(32444), UINT16_C(23510), UINT16_C( 5513), UINT16_C( 8521), UINT16_C(14710), UINT16_C(36248), UINT16_C(37951), UINT16_C(20859),
|
||||
UINT16_C(20398), UINT16_C(47447), UINT16_C(55612), UINT16_C(12503), UINT16_C(45628), UINT16_C(64564), UINT16_C(34265), UINT16_C(38367),
|
||||
UINT16_C(46339), UINT16_C(36080), UINT16_C(15050), UINT16_C(16814), UINT16_C(18035), UINT16_C(46030), UINT16_C(18906), UINT16_C(35076),
|
||||
UINT16_C(23704), UINT16_C(54594), UINT16_C( 6453), UINT16_C(28933), UINT16_C(14796), UINT16_C(42350), UINT16_C(19903), UINT16_C(49723) },
|
||||
{ UINT16_C(32444), UINT16_C(23510), UINT16_C(64869), UINT16_C(55566), UINT16_C(14710), UINT16_C(36248), UINT16_C(37951), UINT16_C(20859),
|
||||
UINT16_C(59884), UINT16_C( 8851), UINT16_C(38914), UINT16_C(52883), UINT16_C( 466), UINT16_C(37236), UINT16_C(34265), UINT16_C(38367),
|
||||
UINT16_C(41690), UINT16_C(16415), UINT16_C(15050), UINT16_C(16814), UINT16_C(18035), UINT16_C(46030), UINT16_C(43061), UINT16_C( 8942),
|
||||
UINT16_C(33169), UINT16_C(37700), UINT16_C( 6453), UINT16_C(28933), UINT16_C(14796), UINT16_C(42350), UINT16_C(53381), UINT16_C(24442) },
|
||||
UINT32_C( 537919680) },
|
||||
{ UINT32_C(3539318983),
|
||||
{ UINT16_C(63069), UINT16_C(37634), UINT16_C(61598), UINT16_C(12213), UINT16_C(63857), UINT16_C(35522), UINT16_C( 9424), UINT16_C(43382),
|
||||
UINT16_C(62202), UINT16_C(32721), UINT16_C(19394), UINT16_C(13791), UINT16_C(32485), UINT16_C(44103), UINT16_C(15415), UINT16_C(38014),
|
||||
UINT16_C(32818), UINT16_C(53287), UINT16_C(56432), UINT16_C(57855), UINT16_C(49621), UINT16_C(42604), UINT16_C(58086), UINT16_C(57423),
|
||||
UINT16_C( 8660), UINT16_C(38752), UINT16_C(16236), UINT16_C(20940), UINT16_C( 5053), UINT16_C(62718), UINT16_C(31823), UINT16_C(33161) },
|
||||
{ UINT16_C(45309), UINT16_C(27985), UINT16_C(20621), UINT16_C(25167), UINT16_C(47889), UINT16_C(63240), UINT16_C(22685), UINT16_C(29144),
|
||||
UINT16_C(62202), UINT16_C(32721), UINT16_C(54391), UINT16_C(13367), UINT16_C(13799), UINT16_C(13865), UINT16_C(45745), UINT16_C(44727),
|
||||
UINT16_C( 2146), UINT16_C(61212), UINT16_C(56432), UINT16_C(57855), UINT16_C(49621), UINT16_C(42604), UINT16_C(14770), UINT16_C(11060),
|
||||
UINT16_C(15729), UINT16_C(59409), UINT16_C(18449), UINT16_C(63773), UINT16_C(18045), UINT16_C(11823), UINT16_C(59384), UINT16_C(23261) },
|
||||
UINT32_C( 3407872) },
|
||||
{ UINT32_C(2326961252),
|
||||
{ UINT16_C( 5110), UINT16_C(43341), UINT16_C(33101), UINT16_C(48852), UINT16_C(58814), UINT16_C(53415), UINT16_C(50221), UINT16_C(43721),
|
||||
UINT16_C(63498), UINT16_C( 729), UINT16_C(46815), UINT16_C(53084), UINT16_C(42671), UINT16_C( 4887), UINT16_C(51522), UINT16_C(14749),
|
||||
UINT16_C(60124), UINT16_C(10722), UINT16_C(46699), UINT16_C(10984), UINT16_C(36764), UINT16_C(51706), UINT16_C(50003), UINT16_C(23924),
|
||||
UINT16_C(19899), UINT16_C(39775), UINT16_C(47875), UINT16_C(45674), UINT16_C(33122), UINT16_C(42181), UINT16_C(25162), UINT16_C( 9949) },
|
||||
{ UINT16_C( 5110), UINT16_C(43341), UINT16_C(33101), UINT16_C(48852), UINT16_C(58814), UINT16_C(53415), UINT16_C(50221), UINT16_C(43721),
|
||||
UINT16_C(63498), UINT16_C( 729), UINT16_C(46815), UINT16_C(53084), UINT16_C(42671), UINT16_C( 4887), UINT16_C(30072), UINT16_C(50256),
|
||||
UINT16_C(41013), UINT16_C(43900), UINT16_C(46699), UINT16_C(10984), UINT16_C(38969), UINT16_C(55225), UINT16_C(50003), UINT16_C(23924),
|
||||
UINT16_C(19899), UINT16_C(39775), UINT16_C(47875), UINT16_C(45674), UINT16_C( 9100), UINT16_C( 1167), UINT16_C(25162), UINT16_C( 9949) },
|
||||
UINT32_C(2323651684) },
|
||||
{ UINT32_C(3690477218),
|
||||
{ UINT16_C(45774), UINT16_C(46771), UINT16_C(58594), UINT16_C(59707), UINT16_C(24331), UINT16_C(36993), UINT16_C( 3284), UINT16_C(24822),
|
||||
UINT16_C(34096), UINT16_C(51557), UINT16_C(11877), UINT16_C(59031), UINT16_C( 4211), UINT16_C( 5439), UINT16_C(14150), UINT16_C( 5361),
|
||||
UINT16_C(42217), UINT16_C(52427), UINT16_C( 1672), UINT16_C(37813), UINT16_C(13925), UINT16_C(14628), UINT16_C( 6722), UINT16_C(29338),
|
||||
UINT16_C(65439), UINT16_C( 1339), UINT16_C(53805), UINT16_C(41195), UINT16_C(10978), UINT16_C(10421), UINT16_C(42593), UINT16_C(19261) },
|
||||
{ UINT16_C(45774), UINT16_C(46771), UINT16_C(58594), UINT16_C(59707), UINT16_C(35330), UINT16_C(17580), UINT16_C(18084), UINT16_C(17591),
|
||||
UINT16_C(34096), UINT16_C(51557), UINT16_C(13509), UINT16_C(42770), UINT16_C( 4211), UINT16_C( 5439), UINT16_C(14150), UINT16_C( 5361),
|
||||
UINT16_C( 8469), UINT16_C( 9100), UINT16_C(62189), UINT16_C(61334), UINT16_C(17021), UINT16_C( 8500), UINT16_C(60297), UINT16_C(52837),
|
||||
UINT16_C(65439), UINT16_C( 1339), UINT16_C(53805), UINT16_C(41195), UINT16_C( 6683), UINT16_C(35328), UINT16_C( 2599), UINT16_C(15427) },
|
||||
UINT32_C( 184562178) },
|
||||
{ UINT32_C(1040840129),
|
||||
{ UINT16_C(15671), UINT16_C(49248), UINT16_C(50472), UINT16_C( 1423), UINT16_C(53364), UINT16_C(22184), UINT16_C(61987), UINT16_C(16279),
|
||||
UINT16_C(38668), UINT16_C(13257), UINT16_C( 3233), UINT16_C(52591), UINT16_C(52955), UINT16_C(40167), UINT16_C(61635), UINT16_C(64219),
|
||||
UINT16_C(15149), UINT16_C(21947), UINT16_C(18944), UINT16_C(29786), UINT16_C( 538), UINT16_C(15819), UINT16_C(25332), UINT16_C( 124),
|
||||
UINT16_C(17913), UINT16_C(39475), UINT16_C(41553), UINT16_C(11368), UINT16_C(20336), UINT16_C(13257), UINT16_C(42047), UINT16_C(27694) },
|
||||
{ UINT16_C(59871), UINT16_C(57281), UINT16_C(50472), UINT16_C( 1423), UINT16_C(53364), UINT16_C(22184), UINT16_C( 1921), UINT16_C(31251),
|
||||
UINT16_C(17996), UINT16_C(40468), UINT16_C(31977), UINT16_C(22986), UINT16_C(37835), UINT16_C( 2701), UINT16_C(61635), UINT16_C(64219),
|
||||
UINT16_C(15149), UINT16_C(21947), UINT16_C(19027), UINT16_C(28964), UINT16_C( 538), UINT16_C(15819), UINT16_C(25332), UINT16_C( 124),
|
||||
UINT16_C(17913), UINT16_C(39475), UINT16_C(41553), UINT16_C(11368), UINT16_C(44286), UINT16_C(13771), UINT16_C(42047), UINT16_C(27694) },
|
||||
UINT32_C( 234995712) },
|
||||
{ UINT32_C(4114417292),
|
||||
{ UINT16_C(49333), UINT16_C(27359), UINT16_C(17239), UINT16_C(13420), UINT16_C( 3259), UINT16_C(45306), UINT16_C( 6519), UINT16_C(30065),
|
||||
UINT16_C(15558), UINT16_C(11690), UINT16_C(63101), UINT16_C(63033), UINT16_C( 6968), UINT16_C(50370), UINT16_C(65314), UINT16_C(55225),
|
||||
UINT16_C(39104), UINT16_C( 5953), UINT16_C(44763), UINT16_C(38731), UINT16_C(17850), UINT16_C(12615), UINT16_C(47198), UINT16_C( 9382),
|
||||
UINT16_C(20980), UINT16_C(29266), UINT16_C(35655), UINT16_C(32872), UINT16_C(11174), UINT16_C(51268), UINT16_C(65066), UINT16_C(60063) },
|
||||
{ UINT16_C(49333), UINT16_C(27359), UINT16_C(19599), UINT16_C(18697), UINT16_C(20625), UINT16_C(61563), UINT16_C( 8457), UINT16_C(64788),
|
||||
UINT16_C(15558), UINT16_C(11690), UINT16_C(63101), UINT16_C(63033), UINT16_C( 6968), UINT16_C(50370), UINT16_C( 124), UINT16_C( 4888),
|
||||
UINT16_C( 6625), UINT16_C(28805), UINT16_C(36454), UINT16_C(63417), UINT16_C(13534), UINT16_C(59367), UINT16_C(64598), UINT16_C(51429),
|
||||
UINT16_C(20980), UINT16_C(29266), UINT16_C(35655), UINT16_C(32872), UINT16_C(19515), UINT16_C(46941), UINT16_C(65066), UINT16_C(60063) },
|
||||
UINT32_C(3305113088) },
|
||||
{ UINT32_C(3169605597),
|
||||
{ UINT16_C(54155), UINT16_C(57763), UINT16_C(35023), UINT16_C(12970), UINT16_C(11485), UINT16_C( 2438), UINT16_C(29417), UINT16_C( 9273),
|
||||
UINT16_C(38590), UINT16_C( 3035), UINT16_C(42507), UINT16_C(39224), UINT16_C(55029), UINT16_C(54158), UINT16_C(31277), UINT16_C(47247),
|
||||
UINT16_C(12877), UINT16_C( 7578), UINT16_C(17595), UINT16_C(38991), UINT16_C(54640), UINT16_C(22945), UINT16_C(55879), UINT16_C( 1405),
|
||||
UINT16_C(22896), UINT16_C(31504), UINT16_C(18943), UINT16_C(62485), UINT16_C(41759), UINT16_C(19655), UINT16_C(22045), UINT16_C(27140) },
|
||||
{ UINT16_C(54155), UINT16_C(57763), UINT16_C(35023), UINT16_C(12970), UINT16_C(32171), UINT16_C(62124), UINT16_C(10840), UINT16_C(51448),
|
||||
UINT16_C( 2179), UINT16_C(33348), UINT16_C(42507), UINT16_C(39224), UINT16_C(55029), UINT16_C(54158), UINT16_C(31277), UINT16_C(47247),
|
||||
UINT16_C(12877), UINT16_C( 7578), UINT16_C(17595), UINT16_C(38991), UINT16_C(54640), UINT16_C(22945), UINT16_C(30571), UINT16_C(61147),
|
||||
UINT16_C( 8064), UINT16_C(53616), UINT16_C(59256), UINT16_C(29762), UINT16_C(41759), UINT16_C(19655), UINT16_C(22045), UINT16_C(27140) },
|
||||
UINT32_C(2955695117) },
|
||||
{ UINT32_C( 831190646),
|
||||
{ UINT16_C( 2615), UINT16_C(41796), UINT16_C( 8065), UINT16_C( 401), UINT16_C( 575), UINT16_C(47059), UINT16_C( 5609), UINT16_C( 3628),
|
||||
UINT16_C(47379), UINT16_C(54215), UINT16_C(40650), UINT16_C(59122), UINT16_C(21463), UINT16_C(19940), UINT16_C(28233), UINT16_C(32894),
|
||||
UINT16_C(49784), UINT16_C(64035), UINT16_C(46561), UINT16_C( 8443), UINT16_C(52919), UINT16_C(41176), UINT16_C( 1251), UINT16_C(63406),
|
||||
UINT16_C(30141), UINT16_C(35018), UINT16_C(48148), UINT16_C(60270), UINT16_C(21007), UINT16_C(22584), UINT16_C(46785), UINT16_C(14808) },
|
||||
{ UINT16_C( 2615), UINT16_C(41796), UINT16_C( 8065), UINT16_C( 401), UINT16_C( 575), UINT16_C(47059), UINT16_C( 5609), UINT16_C( 3628),
|
||||
UINT16_C(47379), UINT16_C(54215), UINT16_C( 2654), UINT16_C(27946), UINT16_C(21463), UINT16_C(19940), UINT16_C(28233), UINT16_C(32894),
|
||||
UINT16_C(35481), UINT16_C(19178), UINT16_C(25785), UINT16_C(47026), UINT16_C(52919), UINT16_C(41176), UINT16_C(28784), UINT16_C(39967),
|
||||
UINT16_C(47890), UINT16_C(28891), UINT16_C( 1733), UINT16_C( 8669), UINT16_C(41576), UINT16_C(33087), UINT16_C(38463), UINT16_C(55569) },
|
||||
UINT32_C( 62070) },
|
||||
};
|
||||
|
||||
for (size_t i = 0 ; i < (sizeof(test_vec) / sizeof(test_vec[0])) ; i++) {
|
||||
simde__m512i a = simde_mm512_loadu_si512(test_vec[i].a);
|
||||
simde__m512i b = simde_mm512_loadu_si512(test_vec[i].b);
|
||||
simde__mmask32 r = simde_mm512_mask_cmpeq_epu16_mask(test_vec[i].k1, a, b);
|
||||
simde_assert_equal_mmask32(r, test_vec[i].r);
|
||||
}
|
||||
|
||||
return 0;
|
||||
#else
|
||||
fputc('\n', stdout);
|
||||
for (int i = 0 ; i < 8 ; i++) {
|
||||
simde__mmask32 k1 = simde_test_x86_random_mmask32();
|
||||
simde__m512i a = simde_test_x86_random_u16x32();
|
||||
simde__m512i b = simde_mm512_mask_blend_epi32(simde_test_x86_random_mmask32(), a, simde_test_x86_random_u16x32());
|
||||
simde__mmask32 r = simde_mm512_mask_cmpeq_epu16_mask(k1, a, b);
|
||||
|
||||
simde_test_x86_write_mmask32(2, k1, SIMDE_TEST_VEC_POS_FIRST);
|
||||
simde_test_x86_write_u16x32(2, a, SIMDE_TEST_VEC_POS_MIDDLE);
|
||||
simde_test_x86_write_u16x32(2, b, SIMDE_TEST_VEC_POS_MIDDLE);
|
||||
simde_test_x86_write_mmask32(2, r, SIMDE_TEST_VEC_POS_LAST);
|
||||
}
|
||||
return 1;
|
||||
#endif
|
||||
}
|
||||
|
||||
static int
|
||||
test_simde_mm512_cmpeq_epi32_mask(SIMDE_MUNIT_TEST_ARGS) {
|
||||
const struct {
|
||||
|
|
@ -1024,6 +1245,8 @@ test_simde_mm512_cmpeq_pd_mask (SIMDE_MUNIT_TEST_ARGS) {
|
|||
SIMDE_TEST_FUNC_LIST_BEGIN
|
||||
SIMDE_TEST_FUNC_LIST_ENTRY(mm512_cmpeq_epi8_mask)
|
||||
SIMDE_TEST_FUNC_LIST_ENTRY(mm512_mask_cmpeq_epi8_mask)
|
||||
SIMDE_TEST_FUNC_LIST_ENTRY(mm512_cmpeq_epu16_mask)
|
||||
SIMDE_TEST_FUNC_LIST_ENTRY(mm512_mask_cmpeq_epu16_mask)
|
||||
SIMDE_TEST_FUNC_LIST_ENTRY(mm512_cmpeq_epi32_mask)
|
||||
SIMDE_TEST_FUNC_LIST_ENTRY(mm512_mask_cmpeq_epi32_mask)
|
||||
SIMDE_TEST_FUNC_LIST_ENTRY(mm512_cmpeq_epi64_mask)
|
||||
|
|
|
|||
106
thirdparty/simde/test/x86/avx512/cmpgt.c
vendored
106
thirdparty/simde/test/x86/avx512/cmpgt.c
vendored
|
|
@ -593,6 +593,111 @@ test_simde_mm512_cmpgt_epu8_mask(SIMDE_MUNIT_TEST_ARGS) {
|
|||
return 0;
|
||||
}
|
||||
|
||||
static int
|
||||
test_simde_mm512_cmpgt_epi16_mask(SIMDE_MUNIT_TEST_ARGS) {
|
||||
#if 1
|
||||
const struct {
|
||||
const int16_t a[32];
|
||||
const int16_t b[32];
|
||||
simde__mmask32 r;
|
||||
} test_vec[8] = {
|
||||
{ { -INT16_C( 12416), -INT16_C( 31684), -INT16_C( 9444), -INT16_C( 3036), INT16_C( 5455), -INT16_C( 18578), -INT16_C( 19372), -INT16_C( 29883),
|
||||
INT16_C( 9857), -INT16_C( 17502), INT16_C( 19793), -INT16_C( 12525), -INT16_C( 20895), -INT16_C( 25812), -INT16_C( 2096), INT16_C( 20572),
|
||||
-INT16_C( 26426), -INT16_C( 7468), -INT16_C( 1676), -INT16_C( 15402), INT16_C( 17422), INT16_C( 25211), -INT16_C( 16136), INT16_C( 31214),
|
||||
-INT16_C( 28442), INT16_C( 14388), INT16_C( 18653), INT16_C( 15879), INT16_C( 13302), -INT16_C( 14631), INT16_C( 13610), -INT16_C( 4073) },
|
||||
{ -INT16_C( 5170), INT16_C( 17107), -INT16_C( 22044), -INT16_C( 3579), -INT16_C( 32530), -INT16_C( 6571), INT16_C( 17216), INT16_C( 10080),
|
||||
-INT16_C( 27437), -INT16_C( 20385), INT16_C( 26332), -INT16_C( 11282), -INT16_C( 14439), -INT16_C( 15463), -INT16_C( 20227), -INT16_C( 13389),
|
||||
-INT16_C( 31076), -INT16_C( 32755), INT16_C( 4656), INT16_C( 7795), -INT16_C( 14189), -INT16_C( 11516), INT16_C( 25611), -INT16_C( 8454),
|
||||
INT16_C( 23033), -INT16_C( 10866), INT16_C( 31935), INT16_C( 22696), INT16_C( 16963), INT16_C( 16411), -INT16_C( 12302), -INT16_C( 29173) },
|
||||
UINT32_C(3266560796) },
|
||||
{ { INT16_C( 6229), -INT16_C( 31473), -INT16_C( 32213), -INT16_C( 16733), -INT16_C( 22454), INT16_C( 21905), -INT16_C( 29684), INT16_C( 1331),
|
||||
-INT16_C( 15899), -INT16_C( 23077), -INT16_C( 31939), -INT16_C( 32515), INT16_C( 6597), -INT16_C( 18239), -INT16_C( 13080), INT16_C( 15686),
|
||||
INT16_C( 21989), INT16_C( 4291), INT16_C( 26327), INT16_C( 8654), INT16_C( 24334), INT16_C( 7030), -INT16_C( 22037), -INT16_C( 12000),
|
||||
-INT16_C( 1174), -INT16_C( 22666), INT16_C( 29567), INT16_C( 17448), -INT16_C( 5748), INT16_C( 29948), INT16_C( 17333), -INT16_C( 25934) },
|
||||
{ INT16_C( 30104), INT16_C( 28842), INT16_C( 30939), -INT16_C( 5487), INT16_C( 2264), -INT16_C( 15611), INT16_C( 9649), INT16_C( 7316),
|
||||
INT16_C( 2593), -INT16_C( 24381), -INT16_C( 5250), INT16_C( 2788), -INT16_C( 7724), -INT16_C( 30081), INT16_C( 12580), -INT16_C( 17372),
|
||||
-INT16_C( 12378), -INT16_C( 32468), -INT16_C( 16825), INT16_C( 8043), INT16_C( 28870), INT16_C( 30691), INT16_C( 30614), -INT16_C( 18541),
|
||||
INT16_C( 22402), INT16_C( 87), INT16_C( 15170), INT16_C( 5898), -INT16_C( 30436), INT16_C( 16545), -INT16_C( 14918), INT16_C( 24829) },
|
||||
UINT32_C(2089792032) },
|
||||
{ { INT16_C( 10644), -INT16_C( 8990), INT16_C( 19943), -INT16_C( 20997), -INT16_C( 8514), INT16_C( 21541), -INT16_C( 18346), -INT16_C( 10229),
|
||||
INT16_C( 25103), INT16_C( 21208), -INT16_C( 7523), -INT16_C( 17815), INT16_C( 2668), INT16_C( 9978), -INT16_C( 2097), INT16_C( 25735),
|
||||
INT16_C( 26913), INT16_C( 2112), INT16_C( 15286), INT16_C( 29878), -INT16_C( 9446), INT16_C( 28872), -INT16_C( 11373), -INT16_C( 23736),
|
||||
INT16_C( 8245), -INT16_C( 11275), INT16_C( 24066), INT16_C( 28301), -INT16_C( 30872), INT16_C( 14229), INT16_C( 7295), -INT16_C( 24421) },
|
||||
{ -INT16_C( 9339), INT16_C( 15272), INT16_C( 24087), INT16_C( 12720), INT16_C( 30777), -INT16_C( 12895), -INT16_C( 5812), -INT16_C( 32400),
|
||||
INT16_C( 25865), INT16_C( 2900), -INT16_C( 7741), INT16_C( 11130), INT16_C( 3945), -INT16_C( 6046), -INT16_C( 469), -INT16_C( 20344),
|
||||
INT16_C( 12505), -INT16_C( 3861), -INT16_C( 25713), -INT16_C( 14303), -INT16_C( 15852), INT16_C( 24725), INT16_C( 1451), -INT16_C( 19231),
|
||||
INT16_C( 13930), INT16_C( 11712), INT16_C( 14871), -INT16_C( 32680), -INT16_C( 17591), INT16_C( 29800), -INT16_C( 3911), -INT16_C( 28124) },
|
||||
UINT32_C(3426723489) },
|
||||
{ { INT16_C( 3873), -INT16_C( 20349), -INT16_C( 23381), -INT16_C( 16520), INT16_C( 3687), INT16_C( 4639), INT16_C( 19), INT16_C( 32455),
|
||||
-INT16_C( 30922), INT16_C( 20139), INT16_C( 1217), INT16_C( 2766), INT16_C( 14271), INT16_C( 30846), -INT16_C( 24025), INT16_C( 18442),
|
||||
-INT16_C( 29263), INT16_C( 23800), INT16_C( 28978), -INT16_C( 26341), INT16_C( 14975), -INT16_C( 27989), INT16_C( 29243), INT16_C( 28944),
|
||||
-INT16_C( 17159), -INT16_C( 17729), -INT16_C( 28992), INT16_C( 32708), INT16_C( 17093), -INT16_C( 4873), INT16_C( 484), -INT16_C( 27083) },
|
||||
{ INT16_C( 11663), -INT16_C( 15886), INT16_C( 3742), INT16_C( 7514), INT16_C( 1352), -INT16_C( 31824), -INT16_C( 16264), INT16_C( 29173),
|
||||
-INT16_C( 19332), INT16_C( 15404), -INT16_C( 4030), INT16_C( 1979), -INT16_C( 19917), INT16_C( 6132), INT16_C( 10676), INT16_C( 17325),
|
||||
-INT16_C( 24490), -INT16_C( 2812), INT16_C( 24238), -INT16_C( 2542), -INT16_C( 15773), -INT16_C( 9350), INT16_C( 28547), -INT16_C( 179),
|
||||
INT16_C( 31011), INT16_C( 26172), -INT16_C( 2199), -INT16_C( 25491), INT16_C( 25002), INT16_C( 24244), INT16_C( 24970), -INT16_C( 7775) },
|
||||
UINT32_C( 148291312) },
|
||||
{ { -INT16_C( 23295), -INT16_C( 20522), -INT16_C( 6141), INT16_C( 26278), INT16_C( 8363), INT16_C( 11842), -INT16_C( 28785), -INT16_C( 19923),
|
||||
INT16_C( 26888), INT16_C( 28952), -INT16_C( 31135), INT16_C( 2830), -INT16_C( 15641), INT16_C( 29289), INT16_C( 2595), INT16_C( 9555),
|
||||
INT16_C( 10671), -INT16_C( 19756), INT16_C( 31249), -INT16_C( 17384), INT16_C( 23194), INT16_C( 10730), INT16_C( 6377), -INT16_C( 3620),
|
||||
-INT16_C( 2943), -INT16_C( 7581), INT16_C( 29050), INT16_C( 25325), INT16_C( 22067), INT16_C( 22228), INT16_C( 10080), INT16_C( 3963) },
|
||||
{ INT16_C( 20560), INT16_C( 25025), -INT16_C( 9526), INT16_C( 25886), INT16_C( 2100), INT16_C( 7822), INT16_C( 27168), -INT16_C( 24049),
|
||||
INT16_C( 29279), -INT16_C( 9852), INT16_C( 29411), INT16_C( 5691), INT16_C( 4040), INT16_C( 10605), -INT16_C( 6090), -INT16_C( 31176),
|
||||
-INT16_C( 1480), INT16_C( 1000), INT16_C( 1748), INT16_C( 2152), -INT16_C( 2546), INT16_C( 12070), INT16_C( 13921), -INT16_C( 16175),
|
||||
INT16_C( 21928), -INT16_C( 29543), -INT16_C( 10809), -INT16_C( 28510), INT16_C( 4068), INT16_C( 7097), -INT16_C( 3592), INT16_C( 12449) },
|
||||
UINT32_C(2123752124) },
|
||||
{ { -INT16_C( 30229), -INT16_C( 16589), -INT16_C( 25713), -INT16_C( 24888), -INT16_C( 4462), -INT16_C( 3123), -INT16_C( 25052), -INT16_C( 12877),
|
||||
INT16_C( 19699), -INT16_C( 17575), -INT16_C( 1247), INT16_C( 1611), INT16_C( 1035), INT16_C( 801), -INT16_C( 15627), -INT16_C( 7885),
|
||||
INT16_C( 26444), -INT16_C( 9312), INT16_C( 26626), -INT16_C( 27527), INT16_C( 18007), INT16_C( 31623), INT16_C( 15076), -INT16_C( 10168),
|
||||
-INT16_C( 24185), -INT16_C( 22381), -INT16_C( 8547), -INT16_C( 22354), -INT16_C( 12318), -INT16_C( 10325), -INT16_C( 8558), -INT16_C( 8520) },
|
||||
{ INT16_C( 22853), INT16_C( 18617), INT16_C( 13249), INT16_C( 6364), INT16_C( 25721), INT16_C( 24212), -INT16_C( 9058), INT16_C( 9526),
|
||||
-INT16_C( 13954), INT16_C( 7118), INT16_C( 31911), -INT16_C( 30269), INT16_C( 28236), -INT16_C( 8608), INT16_C( 6476), -INT16_C( 27972),
|
||||
INT16_C( 30066), INT16_C( 13274), -INT16_C( 18776), INT16_C( 8780), -INT16_C( 8166), -INT16_C( 18048), -INT16_C( 18756), INT16_C( 15070),
|
||||
-INT16_C( 21377), INT16_C( 9813), INT16_C( 6185), INT16_C( 30127), INT16_C( 3974), -INT16_C( 11437), INT16_C( 3880), -INT16_C( 26011) },
|
||||
UINT32_C(2692000000) },
|
||||
{ { INT16_C( 16260), INT16_C( 11726), INT16_C( 6901), INT16_C( 4175), -INT16_C( 12294), -INT16_C( 18743), -INT16_C( 22651), INT16_C( 1265),
|
||||
INT16_C( 18004), INT16_C( 32042), -INT16_C( 9889), -INT16_C( 6670), INT16_C( 17896), INT16_C( 4536), INT16_C( 7508), -INT16_C( 10069),
|
||||
INT16_C( 31068), INT16_C( 20997), INT16_C( 21651), -INT16_C( 29342), INT16_C( 11043), -INT16_C( 22460), INT16_C( 13778), INT16_C( 9900),
|
||||
-INT16_C( 10629), -INT16_C( 9565), -INT16_C( 27217), -INT16_C( 26432), INT16_C( 30938), INT16_C( 11945), INT16_C( 21654), -INT16_C( 3577) },
|
||||
{ INT16_C( 3278), INT16_C( 24900), -INT16_C( 22943), -INT16_C( 31505), INT16_C( 13265), -INT16_C( 23507), -INT16_C( 9880), -INT16_C( 7222),
|
||||
INT16_C( 28336), INT16_C( 24510), INT16_C( 32259), -INT16_C( 8457), -INT16_C( 24330), -INT16_C( 29684), INT16_C( 5109), -INT16_C( 15489),
|
||||
-INT16_C( 15584), -INT16_C( 32476), INT16_C( 4970), INT16_C( 15109), INT16_C( 12870), -INT16_C( 20769), -INT16_C( 22004), -INT16_C( 17262),
|
||||
INT16_C( 20504), INT16_C( 6939), INT16_C( 5070), -INT16_C( 15111), INT16_C( 1715), -INT16_C( 22447), -INT16_C( 12263), INT16_C( 14699) },
|
||||
UINT32_C(1892154029) },
|
||||
{ { -INT16_C( 28525), -INT16_C( 582), -INT16_C( 16221), -INT16_C( 5575), INT16_C( 6386), -INT16_C( 360), INT16_C( 10946), -INT16_C( 9542),
|
||||
-INT16_C( 10630), INT16_C( 18678), -INT16_C( 4119), -INT16_C( 25587), INT16_C( 24309), INT16_C( 3909), -INT16_C( 20434), -INT16_C( 16056),
|
||||
INT16_C( 832), -INT16_C( 6977), -INT16_C( 1853), -INT16_C( 18994), INT16_C( 26128), -INT16_C( 11340), INT16_C( 28305), INT16_C( 2989),
|
||||
-INT16_C( 23740), INT16_C( 11604), INT16_C( 24979), -INT16_C( 30518), INT16_C( 4031), -INT16_C( 4713), -INT16_C( 8001), INT16_C( 174) },
|
||||
{ INT16_C( 28131), -INT16_C( 22812), -INT16_C( 19867), INT16_C( 30299), INT16_C( 3864), -INT16_C( 22199), -INT16_C( 2434), -INT16_C( 15691),
|
||||
INT16_C( 2458), INT16_C( 11760), -INT16_C( 17814), INT16_C( 10677), INT16_C( 19913), -INT16_C( 30698), -INT16_C( 15315), INT16_C( 4232),
|
||||
INT16_C( 27698), -INT16_C( 26698), INT16_C( 4382), INT16_C( 14093), INT16_C( 22049), -INT16_C( 24608), -INT16_C( 27315), -INT16_C( 6303),
|
||||
INT16_C( 20894), INT16_C( 2068), -INT16_C( 14069), -INT16_C( 11215), INT16_C( 18198), INT16_C( 17245), -INT16_C( 6900), INT16_C( 15955) },
|
||||
UINT32_C( 116537078) },
|
||||
};
|
||||
|
||||
for (size_t i = 0 ; i < (sizeof(test_vec) / sizeof(test_vec[0])); i++) {
|
||||
simde__m512i a = simde_mm512_loadu_epi16(test_vec[i].a);
|
||||
simde__m512i b = simde_mm512_loadu_epi16(test_vec[i].b);
|
||||
simde__mmask32 r = simde_mm512_cmpgt_epi16_mask(a, b);
|
||||
simde_assert_equal_mmask32(r, test_vec[i].r);
|
||||
}
|
||||
|
||||
return 0;
|
||||
#else
|
||||
fputc('\n', stdout);
|
||||
for (int i = 0 ; i < 8 ; i++) {
|
||||
simde__m512i a = simde_test_x86_random_i16x32();
|
||||
simde__m512i b = simde_test_x86_random_i16x32();
|
||||
simde__mmask32 r = simde_mm512_cmpgt_epi16_mask(a, b);
|
||||
|
||||
simde_test_x86_write_i16x32(2, a, SIMDE_TEST_VEC_POS_FIRST);
|
||||
simde_test_x86_write_i16x32(2, b, SIMDE_TEST_VEC_POS_MIDDLE);
|
||||
simde_test_x86_write_mmask32(2, r, SIMDE_TEST_VEC_POS_LAST);
|
||||
}
|
||||
return 1;
|
||||
#endif
|
||||
}
|
||||
|
||||
static int
|
||||
test_simde_mm512_cmpgt_epi32_mask(SIMDE_MUNIT_TEST_ARGS) {
|
||||
const struct {
|
||||
|
|
@ -970,6 +1075,7 @@ test_simde_mm512_mask_cmpgt_epi64_mask(SIMDE_MUNIT_TEST_ARGS) {
|
|||
SIMDE_TEST_FUNC_LIST_BEGIN
|
||||
SIMDE_TEST_FUNC_LIST_ENTRY(mm512_cmpgt_epi8_mask)
|
||||
SIMDE_TEST_FUNC_LIST_ENTRY(mm512_cmpgt_epu8_mask)
|
||||
SIMDE_TEST_FUNC_LIST_ENTRY(mm512_cmpgt_epi16_mask)
|
||||
SIMDE_TEST_FUNC_LIST_ENTRY(mm512_cmpgt_epi32_mask)
|
||||
SIMDE_TEST_FUNC_LIST_ENTRY(mm512_mask_cmpgt_epi32_mask)
|
||||
SIMDE_TEST_FUNC_LIST_ENTRY(mm512_cmpgt_epi64_mask)
|
||||
|
|
|
|||
107
thirdparty/simde/test/x86/avx512/compress.c
vendored
107
thirdparty/simde/test/x86/avx512/compress.c
vendored
|
|
@ -1376,6 +1376,112 @@ test_simde_mm512_maskz_compress_ps (SIMDE_MUNIT_TEST_ARGS) {
|
|||
#endif
|
||||
}
|
||||
|
||||
static int
|
||||
test_simde_mm512_mask_compressstoreu_epi16 (SIMDE_MUNIT_TEST_ARGS) {
|
||||
#if 1
|
||||
static const struct {
|
||||
const simde__mmask32 k;
|
||||
const int16_t a[32];
|
||||
const int16_t r[32];
|
||||
} test_vec[] = {
|
||||
{ UINT32_C(3294332254),
|
||||
{ INT16_C( 3308), INT16_C( 3388), -INT16_C( 5688), INT16_C( 20582), INT16_C( 20128), INT16_C( 12949), INT16_C( 31670), -INT16_C( 19522),
|
||||
INT16_C( 4048), -INT16_C( 31842), -INT16_C( 1740), -INT16_C( 30794), INT16_C( 1097), -INT16_C( 22667), -INT16_C( 12151), INT16_C( 30060),
|
||||
-INT16_C( 22308), -INT16_C( 23422), -INT16_C( 5742), INT16_C( 13044), -INT16_C( 30409), -INT16_C( 4508), INT16_C( 8708), -INT16_C( 11103),
|
||||
INT16_C( 16177), INT16_C( 25943), INT16_C( 3640), -INT16_C( 32020), INT16_C( 24850), -INT16_C( 25815), -INT16_C( 27343), INT16_C( 3344) },
|
||||
{ INT16_C( 3388), -INT16_C( 5688), INT16_C( 20582), INT16_C( 20128), INT16_C( 31670), INT16_C( 4048), -INT16_C( 1740), INT16_C( 30060),
|
||||
-INT16_C( 22308), -INT16_C( 23422), INT16_C( 13044), -INT16_C( 30409), INT16_C( 8708), INT16_C( 3640), -INT16_C( 27343), INT16_C( 3344),
|
||||
INT16_C( 0), INT16_C( 0), INT16_C( 0), INT16_C( 0), INT16_C( 0), INT16_C( 0), INT16_C( 0), INT16_C( 0),
|
||||
INT16_C( 0), INT16_C( 0), INT16_C( 0), INT16_C( 0), INT16_C( 0), INT16_C( 0), INT16_C( 0), INT16_C( 0) } },
|
||||
{ UINT32_C(3501298238),
|
||||
{ -INT16_C( 22917), -INT16_C( 19710), INT16_C( 26159), INT16_C( 13473), INT16_C( 17032), -INT16_C( 18168), INT16_C( 24705), -INT16_C( 17890),
|
||||
INT16_C( 2926), -INT16_C( 32708), INT16_C( 25964), -INT16_C( 25061), INT16_C( 11259), INT16_C( 14763), INT16_C( 23997), INT16_C( 14601),
|
||||
INT16_C( 2819), INT16_C( 13036), -INT16_C( 29327), -INT16_C( 1690), INT16_C( 28623), INT16_C( 20658), -INT16_C( 12081), INT16_C( 15626),
|
||||
INT16_C( 18139), INT16_C( 18621), -INT16_C( 10068), -INT16_C( 22554), -INT16_C( 28413), -INT16_C( 16160), -INT16_C( 5650), -INT16_C( 3591) },
|
||||
{ -INT16_C( 19710), INT16_C( 26159), INT16_C( 13473), INT16_C( 17032), -INT16_C( 18168), -INT16_C( 32708), INT16_C( 11259), INT16_C( 14601),
|
||||
INT16_C( 2819), INT16_C( 28623), INT16_C( 20658), INT16_C( 15626), -INT16_C( 28413), -INT16_C( 5650), -INT16_C( 3591), INT16_C( 0),
|
||||
INT16_C( 0), INT16_C( 0), INT16_C( 0), INT16_C( 0), INT16_C( 0), INT16_C( 0), INT16_C( 0), INT16_C( 0),
|
||||
INT16_C( 0), INT16_C( 0), INT16_C( 0), INT16_C( 0), INT16_C( 0), INT16_C( 0), INT16_C( 0), INT16_C( 0) } },
|
||||
{ UINT32_C(1696916980),
|
||||
{ -INT16_C( 30094), INT16_C( 16734), INT16_C( 4345), -INT16_C( 14190), -INT16_C( 25376), -INT16_C( 17403), -INT16_C( 15645), -INT16_C( 28924),
|
||||
-INT16_C( 5478), -INT16_C( 25290), INT16_C( 5755), INT16_C( 27230), INT16_C( 22527), -INT16_C( 3237), INT16_C( 32573), -INT16_C( 20648),
|
||||
-INT16_C( 18934), INT16_C( 1009), -INT16_C( 31802), -INT16_C( 22836), -INT16_C( 12001), INT16_C( 610), INT16_C( 26260), INT16_C( 11921),
|
||||
-INT16_C( 14512), -INT16_C( 13108), INT16_C( 10973), -INT16_C( 9162), -INT16_C( 28287), -INT16_C( 16689), INT16_C( 10001), INT16_C( 7022) },
|
||||
{ INT16_C( 4345), -INT16_C( 25376), -INT16_C( 17403), -INT16_C( 15645), -INT16_C( 28924), -INT16_C( 5478), INT16_C( 5755), -INT16_C( 3237),
|
||||
INT16_C( 32573), -INT16_C( 20648), -INT16_C( 31802), INT16_C( 610), -INT16_C( 14512), INT16_C( 10973), -INT16_C( 16689), INT16_C( 10001),
|
||||
INT16_C( 0), INT16_C( 0), INT16_C( 0), INT16_C( 0), INT16_C( 0), INT16_C( 0), INT16_C( 0), INT16_C( 0),
|
||||
INT16_C( 0), INT16_C( 0), INT16_C( 0), INT16_C( 0), INT16_C( 0), INT16_C( 0), INT16_C( 0), INT16_C( 0) } },
|
||||
{ UINT32_C(2736676829),
|
||||
{ -INT16_C( 5406), INT16_C( 330), -INT16_C( 21316), INT16_C( 20484), -INT16_C( 27373), INT16_C( 25470), INT16_C( 19037), INT16_C( 14895),
|
||||
INT16_C( 25972), -INT16_C( 2537), -INT16_C( 6409), INT16_C( 2228), INT16_C( 8718), -INT16_C( 5341), INT16_C( 16769), INT16_C( 25487),
|
||||
-INT16_C( 9940), -INT16_C( 6043), INT16_C( 27013), -INT16_C( 26568), -INT16_C( 18690), INT16_C( 23548), INT16_C( 11009), INT16_C( 30102),
|
||||
-INT16_C( 21103), -INT16_C( 30613), INT16_C( 8339), -INT16_C( 24176), -INT16_C( 19646), -INT16_C( 15219), INT16_C( 7412), INT16_C( 8231) },
|
||||
{ -INT16_C( 5406), -INT16_C( 21316), INT16_C( 20484), -INT16_C( 27373), INT16_C( 19037), INT16_C( 14895), INT16_C( 25972), -INT16_C( 2537),
|
||||
-INT16_C( 6409), INT16_C( 2228), INT16_C( 8718), INT16_C( 16769), -INT16_C( 6043), INT16_C( 27013), -INT16_C( 26568), -INT16_C( 18690),
|
||||
-INT16_C( 21103), -INT16_C( 30613), -INT16_C( 15219), INT16_C( 8231), INT16_C( 0), INT16_C( 0), INT16_C( 0), INT16_C( 0),
|
||||
INT16_C( 0), INT16_C( 0), INT16_C( 0), INT16_C( 0), INT16_C( 0), INT16_C( 0), INT16_C( 0), INT16_C( 0) } },
|
||||
{ UINT32_C(2047380725),
|
||||
{ INT16_C( 16629), -INT16_C( 3053), INT16_C( 4087), -INT16_C( 1969), -INT16_C( 6854), -INT16_C( 13459), -INT16_C( 9838), INT16_C( 9811),
|
||||
-INT16_C( 7175), INT16_C( 15303), INT16_C( 21654), -INT16_C( 29697), INT16_C( 10096), INT16_C( 26027), -INT16_C( 19277), -INT16_C( 22048),
|
||||
-INT16_C( 3084), -INT16_C( 5219), -INT16_C( 5118), INT16_C( 15587), INT16_C( 20946), INT16_C( 25608), INT16_C( 23338), INT16_C( 9098),
|
||||
INT16_C( 21055), -INT16_C( 10914), INT16_C( 24230), INT16_C( 5984), INT16_C( 3205), INT16_C( 14460), INT16_C( 23744), -INT16_C( 19231) },
|
||||
{ INT16_C( 16629), INT16_C( 4087), -INT16_C( 6854), -INT16_C( 13459), -INT16_C( 9838), INT16_C( 9811), INT16_C( 21654), -INT16_C( 29697),
|
||||
-INT16_C( 22048), INT16_C( 15587), -INT16_C( 10914), INT16_C( 5984), INT16_C( 3205), INT16_C( 14460), INT16_C( 23744), INT16_C( 0),
|
||||
INT16_C( 0), INT16_C( 0), INT16_C( 0), INT16_C( 0), INT16_C( 0), INT16_C( 0), INT16_C( 0), INT16_C( 0),
|
||||
INT16_C( 0), INT16_C( 0), INT16_C( 0), INT16_C( 0), INT16_C( 0), INT16_C( 0), INT16_C( 0), INT16_C( 0) } },
|
||||
{ UINT32_C(1369472591),
|
||||
{ -INT16_C( 31893), INT16_C( 15758), -INT16_C( 26924), -INT16_C( 351), INT16_C( 11505), INT16_C( 12321), -INT16_C( 32642), INT16_C( 9222),
|
||||
INT16_C( 26334), INT16_C( 25403), -INT16_C( 18318), INT16_C( 12955), INT16_C( 32020), INT16_C( 25831), -INT16_C( 30725), INT16_C( 26293),
|
||||
INT16_C( 17162), -INT16_C( 8285), INT16_C( 17881), -INT16_C( 13347), -INT16_C( 143), -INT16_C( 4101), INT16_C( 383), INT16_C( 23827),
|
||||
INT16_C( 20328), -INT16_C( 9536), INT16_C( 23303), INT16_C( 6925), -INT16_C( 2856), -INT16_C( 11137), INT16_C( 13691), -INT16_C( 31430) },
|
||||
{ -INT16_C( 31893), INT16_C( 15758), -INT16_C( 26924), -INT16_C( 351), -INT16_C( 32642), INT16_C( 25403), -INT16_C( 18318), INT16_C( 12955),
|
||||
INT16_C( 32020), INT16_C( 25831), -INT16_C( 30725), -INT16_C( 4101), INT16_C( 23827), INT16_C( 20328), -INT16_C( 2856), INT16_C( 13691),
|
||||
INT16_C( 0), INT16_C( 0), INT16_C( 0), INT16_C( 0), INT16_C( 0), INT16_C( 0), INT16_C( 0), INT16_C( 0),
|
||||
INT16_C( 0), INT16_C( 0), INT16_C( 0), INT16_C( 0), INT16_C( 0), INT16_C( 0), INT16_C( 0), INT16_C( 0) } },
|
||||
{ UINT32_C(1382342264),
|
||||
{ INT16_C( 16931), -INT16_C( 27619), INT16_C( 6209), -INT16_C( 16253), -INT16_C( 27110), -INT16_C( 32227), -INT16_C( 8731), -INT16_C( 5028),
|
||||
INT16_C( 26936), INT16_C( 4360), -INT16_C( 30883), -INT16_C( 10011), INT16_C( 8124), INT16_C( 13662), -INT16_C( 15619), INT16_C( 8327),
|
||||
-INT16_C( 23548), INT16_C( 17844), INT16_C( 14268), -INT16_C( 10747), INT16_C( 8910), -INT16_C( 19624), -INT16_C( 18945), INT16_C( 14496),
|
||||
-INT16_C( 22498), INT16_C( 31817), INT16_C( 11823), -INT16_C( 5036), -INT16_C( 19891), INT16_C( 19233), -INT16_C( 22411), INT16_C( 31083) },
|
||||
{ -INT16_C( 16253), -INT16_C( 27110), -INT16_C( 32227), -INT16_C( 8731), INT16_C( 4360), -INT16_C( 30883), -INT16_C( 10011), INT16_C( 8124),
|
||||
-INT16_C( 15619), INT16_C( 8327), INT16_C( 14268), -INT16_C( 19624), -INT16_C( 18945), INT16_C( 31817), -INT16_C( 19891), -INT16_C( 22411),
|
||||
INT16_C( 0), INT16_C( 0), INT16_C( 0), INT16_C( 0), INT16_C( 0), INT16_C( 0), INT16_C( 0), INT16_C( 0),
|
||||
INT16_C( 0), INT16_C( 0), INT16_C( 0), INT16_C( 0), INT16_C( 0), INT16_C( 0), INT16_C( 0), INT16_C( 0) } },
|
||||
{ UINT32_C( 146743372),
|
||||
{ -INT16_C( 15273), INT16_C( 9695), INT16_C( 14311), -INT16_C( 6439), INT16_C( 31212), INT16_C( 2846), INT16_C( 26401), INT16_C( 20615),
|
||||
-INT16_C( 9323), -INT16_C( 7364), INT16_C( 23950), INT16_C( 814), -INT16_C( 26363), INT16_C( 20860), INT16_C( 15289), INT16_C( 4442),
|
||||
INT16_C( 14592), -INT16_C( 6346), INT16_C( 3952), INT16_C( 24013), -INT16_C( 4984), -INT16_C( 22168), -INT16_C( 4269), -INT16_C( 5638),
|
||||
INT16_C( 14026), INT16_C( 22732), -INT16_C( 1388), -INT16_C( 26277), -INT16_C( 10093), INT16_C( 19947), INT16_C( 17683), INT16_C( 4958) },
|
||||
{ INT16_C( 14311), -INT16_C( 6439), INT16_C( 26401), INT16_C( 20860), INT16_C( 14592), -INT16_C( 6346), INT16_C( 3952), INT16_C( 24013),
|
||||
-INT16_C( 4984), -INT16_C( 22168), -INT16_C( 5638), -INT16_C( 26277), INT16_C( 0), INT16_C( 0), INT16_C( 0), INT16_C( 0),
|
||||
INT16_C( 0), INT16_C( 0), INT16_C( 0), INT16_C( 0), INT16_C( 0), INT16_C( 0), INT16_C( 0), INT16_C( 0),
|
||||
INT16_C( 0), INT16_C( 0), INT16_C( 0), INT16_C( 0), INT16_C( 0), INT16_C( 0), INT16_C( 0), INT16_C( 0) } },
|
||||
};
|
||||
|
||||
for (size_t i = 0 ; i < (sizeof(test_vec) / sizeof(test_vec[0])) ; i++) {
|
||||
simde__m512i a = simde_mm512_loadu_epi16(test_vec[i].a);
|
||||
simde__m512i r = simde_mm512_setzero_si512();
|
||||
simde_mm512_mask_compressstoreu_epi16(&r, test_vec[i].k, a);
|
||||
simde_assert_m512i_i16(r, ==, simde_mm512_loadu_epi16(test_vec[i].r));
|
||||
}
|
||||
|
||||
return 0;
|
||||
#else
|
||||
fputc('\n', stdout);
|
||||
for (int i = 0 ; i < 8 ; i++) {
|
||||
simde__mmask32 k = simde_test_x86_random_mmask32();
|
||||
simde__m512i a = simde_test_x86_random_i16x32();
|
||||
simde__m512i r = simde_mm512_setzero_si512();
|
||||
simde_mm512_mask_compressstoreu_epi16(&r, k, a);
|
||||
|
||||
simde_test_x86_write_mmask32(2, k, SIMDE_TEST_VEC_POS_FIRST);
|
||||
simde_test_x86_write_i16x32(2, a, SIMDE_TEST_VEC_POS_MIDDLE);
|
||||
simde_test_x86_write_i16x32(2, r, SIMDE_TEST_VEC_POS_LAST);
|
||||
}
|
||||
return 1;
|
||||
#endif
|
||||
}
|
||||
|
||||
static int
|
||||
test_simde_mm512_mask_compress_epi32 (SIMDE_MUNIT_TEST_ARGS) {
|
||||
#if 1
|
||||
|
|
@ -1871,6 +1977,7 @@ SIMDE_TEST_FUNC_LIST_BEGIN
|
|||
SIMDE_TEST_FUNC_LIST_ENTRY(mm512_mask_compress_ps)
|
||||
SIMDE_TEST_FUNC_LIST_ENTRY(mm512_mask_compressstoreu_ps)
|
||||
SIMDE_TEST_FUNC_LIST_ENTRY(mm512_maskz_compress_ps)
|
||||
SIMDE_TEST_FUNC_LIST_ENTRY(mm512_mask_compressstoreu_epi16)
|
||||
SIMDE_TEST_FUNC_LIST_ENTRY(mm512_mask_compress_epi32)
|
||||
SIMDE_TEST_FUNC_LIST_ENTRY(mm512_mask_compressstoreu_epi32)
|
||||
SIMDE_TEST_FUNC_LIST_ENTRY(mm512_maskz_compress_epi32)
|
||||
|
|
|
|||
360
thirdparty/simde/test/x86/avx512/cvt.c
vendored
360
thirdparty/simde/test/x86/avx512/cvt.c
vendored
|
|
@ -716,6 +716,67 @@ test_simde_mm512_maskz_cvtepi16_epi8(SIMDE_MUNIT_TEST_ARGS) {
|
|||
return 0;
|
||||
}
|
||||
|
||||
static int
|
||||
test_simde_mm512_cvtepi16_epi32(SIMDE_MUNIT_TEST_ARGS) {
|
||||
#if 1
|
||||
const struct {
|
||||
int16_t a[16];
|
||||
int32_t r[16];
|
||||
} test_vec[8] = {
|
||||
{ { INT16_C( 11473), -INT16_C( 24916), INT16_C( 28320), INT16_C( 26158), -INT16_C( 7038), INT16_C( 18438), INT16_C( 16807), -INT16_C( 25518),
|
||||
-INT16_C( 2083), INT16_C( 25639), INT16_C( 13124), INT16_C( 17659), -INT16_C( 12304), -INT16_C( 22808), -INT16_C( 23567), -INT16_C( 15722) },
|
||||
{ INT32_C( 11473), -INT32_C( 24916), INT32_C( 28320), INT32_C( 26158), -INT32_C( 7038), INT32_C( 18438), INT32_C( 16807), -INT32_C( 25518),
|
||||
-INT32_C( 2083), INT32_C( 25639), INT32_C( 13124), INT32_C( 17659), -INT32_C( 12304), -INT32_C( 22808), -INT32_C( 23567), -INT32_C( 15722) } },
|
||||
{ { INT16_C( 17360), INT16_C( 28768), -INT16_C( 28751), INT16_C( 13526), -INT16_C( 9101), INT16_C( 6780), -INT16_C( 12771), -INT16_C( 1353),
|
||||
-INT16_C( 8507), INT16_C( 2655), INT16_C( 23058), INT16_C( 590), INT16_C( 13865), INT16_C( 6824), INT16_C( 16090), -INT16_C( 21796) },
|
||||
{ INT32_C( 17360), INT32_C( 28768), -INT32_C( 28751), INT32_C( 13526), -INT32_C( 9101), INT32_C( 6780), -INT32_C( 12771), -INT32_C( 1353),
|
||||
-INT32_C( 8507), INT32_C( 2655), INT32_C( 23058), INT32_C( 590), INT32_C( 13865), INT32_C( 6824), INT32_C( 16090), -INT32_C( 21796) } },
|
||||
{ { INT16_C( 15745), INT16_C( 13082), -INT16_C( 3636), INT16_C( 16231), -INT16_C( 7219), -INT16_C( 5287), INT16_C( 4273), INT16_C( 30693),
|
||||
INT16_C( 17647), INT16_C( 385), -INT16_C( 12385), -INT16_C( 14333), -INT16_C( 21754), -INT16_C( 7965), -INT16_C( 16407), INT16_C( 27530) },
|
||||
{ INT32_C( 15745), INT32_C( 13082), -INT32_C( 3636), INT32_C( 16231), -INT32_C( 7219), -INT32_C( 5287), INT32_C( 4273), INT32_C( 30693),
|
||||
INT32_C( 17647), INT32_C( 385), -INT32_C( 12385), -INT32_C( 14333), -INT32_C( 21754), -INT32_C( 7965), -INT32_C( 16407), INT32_C( 27530) } },
|
||||
{ { -INT16_C( 23300), -INT16_C( 14178), INT16_C( 1429), INT16_C( 25351), INT16_C( 25064), -INT16_C( 26290), INT16_C( 13169), INT16_C( 24592),
|
||||
-INT16_C( 28296), INT16_C( 5985), INT16_C( 25697), INT16_C( 26591), -INT16_C( 15857), -INT16_C( 1721), -INT16_C( 11902), INT16_C( 32356) },
|
||||
{ -INT32_C( 23300), -INT32_C( 14178), INT32_C( 1429), INT32_C( 25351), INT32_C( 25064), -INT32_C( 26290), INT32_C( 13169), INT32_C( 24592),
|
||||
-INT32_C( 28296), INT32_C( 5985), INT32_C( 25697), INT32_C( 26591), -INT32_C( 15857), -INT32_C( 1721), -INT32_C( 11902), INT32_C( 32356) } },
|
||||
{ { INT16_C( 629), INT16_C( 2887), INT16_C( 19975), -INT16_C( 4242), -INT16_C( 17233), INT16_C( 8584), -INT16_C( 26129), INT16_C( 26497),
|
||||
-INT16_C( 7382), -INT16_C( 29826), INT16_C( 24135), INT16_C( 22514), INT16_C( 14624), -INT16_C( 23984), -INT16_C( 19446), -INT16_C( 32735) },
|
||||
{ INT32_C( 629), INT32_C( 2887), INT32_C( 19975), -INT32_C( 4242), -INT32_C( 17233), INT32_C( 8584), -INT32_C( 26129), INT32_C( 26497),
|
||||
-INT32_C( 7382), -INT32_C( 29826), INT32_C( 24135), INT32_C( 22514), INT32_C( 14624), -INT32_C( 23984), -INT32_C( 19446), -INT32_C( 32735) } },
|
||||
{ { INT16_C( 26806), -INT16_C( 17013), -INT16_C( 1610), INT16_C( 26284), INT16_C( 13493), -INT16_C( 23417), INT16_C( 2253), -INT16_C( 2036),
|
||||
-INT16_C( 29973), INT16_C( 13187), INT16_C( 30440), INT16_C( 2442), -INT16_C( 9553), -INT16_C( 17749), -INT16_C( 13170), INT16_C( 17466) },
|
||||
{ INT32_C( 26806), -INT32_C( 17013), -INT32_C( 1610), INT32_C( 26284), INT32_C( 13493), -INT32_C( 23417), INT32_C( 2253), -INT32_C( 2036),
|
||||
-INT32_C( 29973), INT32_C( 13187), INT32_C( 30440), INT32_C( 2442), -INT32_C( 9553), -INT32_C( 17749), -INT32_C( 13170), INT32_C( 17466) } },
|
||||
{ { -INT16_C( 15052), -INT16_C( 5375), -INT16_C( 21058), INT16_C( 29521), -INT16_C( 10015), -INT16_C( 20713), INT16_C( 9184), -INT16_C( 13145),
|
||||
INT16_C( 10926), -INT16_C( 26881), -INT16_C( 30304), INT16_C( 20639), INT16_C( 19299), -INT16_C( 3830), INT16_C( 17431), INT16_C( 19509) },
|
||||
{ -INT32_C( 15052), -INT32_C( 5375), -INT32_C( 21058), INT32_C( 29521), -INT32_C( 10015), -INT32_C( 20713), INT32_C( 9184), -INT32_C( 13145),
|
||||
INT32_C( 10926), -INT32_C( 26881), -INT32_C( 30304), INT32_C( 20639), INT32_C( 19299), -INT32_C( 3830), INT32_C( 17431), INT32_C( 19509) } },
|
||||
{ { INT16_C( 13833), -INT16_C( 14537), -INT16_C( 30493), -INT16_C( 15302), INT16_C( 20832), INT16_C( 16499), INT16_C( 6773), INT16_C( 8972),
|
||||
INT16_C( 2885), -INT16_C( 6727), INT16_C( 22932), -INT16_C( 2251), INT16_C( 16292), -INT16_C( 17432), INT16_C( 7555), -INT16_C( 29689) },
|
||||
{ INT32_C( 13833), -INT32_C( 14537), -INT32_C( 30493), -INT32_C( 15302), INT32_C( 20832), INT32_C( 16499), INT32_C( 6773), INT32_C( 8972),
|
||||
INT32_C( 2885), -INT32_C( 6727), INT32_C( 22932), -INT32_C( 2251), INT32_C( 16292), -INT32_C( 17432), INT32_C( 7555), -INT32_C( 29689) } },
|
||||
};
|
||||
|
||||
for (size_t i = 0 ; i < (sizeof(test_vec) / sizeof(test_vec[0])); i++) {
|
||||
simde__m256i a = simde_mm256_loadu_epi16(test_vec[i].a);
|
||||
simde__m512i r = simde_mm512_cvtepi16_epi32(a);
|
||||
simde_test_x86_assert_equal_i32x16(r, simde_mm512_loadu_epi32(test_vec[i].r));
|
||||
}
|
||||
|
||||
return 0;
|
||||
#else
|
||||
fputc('\n', stdout);
|
||||
for (int i = 0 ; i < 8 ; i++) {
|
||||
simde__m256i a = simde_test_x86_random_i16x16();
|
||||
simde__m512i r = simde_mm512_cvtepi16_epi32(a);
|
||||
|
||||
simde_test_x86_write_i16x16(2, a, SIMDE_TEST_VEC_POS_FIRST);
|
||||
simde_test_x86_write_i32x16(2, r, SIMDE_TEST_VEC_POS_LAST);
|
||||
}
|
||||
return 1;
|
||||
#endif
|
||||
}
|
||||
|
||||
static int
|
||||
test_simde_mm512_cvtepi8_epi16(SIMDE_MUNIT_TEST_ARGS) {
|
||||
const struct {
|
||||
|
|
@ -860,6 +921,83 @@ test_simde_mm512_cvtepi8_epi16(SIMDE_MUNIT_TEST_ARGS) {
|
|||
return 0;
|
||||
}
|
||||
|
||||
static int
|
||||
test_simde_mm512_cvtepi32_ps (SIMDE_MUNIT_TEST_ARGS) {
|
||||
#if 1
|
||||
static const struct {
|
||||
const int32_t a[16];
|
||||
const simde_float32 r[16];
|
||||
} test_vec[] = {
|
||||
{ { -INT32_C( 306772899), -INT32_C( 67271131), -INT32_C( 861816948), INT32_C( 1650063263), -INT32_C( 965362418), INT32_C( 1647322575), INT32_C( 278105299), INT32_C( 223924400),
|
||||
-INT32_C( 84275243), INT32_C( 569833365), INT32_C( 1324259247), -INT32_C( 1649326194), -INT32_C( 731699707), INT32_C( 506893131), -INT32_C( 819017185), INT32_C( 1876723354) },
|
||||
{ SIMDE_FLOAT32_C(-306772896.00), SIMDE_FLOAT32_C(-67271128.00), SIMDE_FLOAT32_C(-861816960.00), SIMDE_FLOAT32_C(1650063232.00),
|
||||
SIMDE_FLOAT32_C(-965362432.00), SIMDE_FLOAT32_C(1647322624.00), SIMDE_FLOAT32_C(278105312.00), SIMDE_FLOAT32_C(223924400.00),
|
||||
SIMDE_FLOAT32_C(-84275240.00), SIMDE_FLOAT32_C(569833344.00), SIMDE_FLOAT32_C(1324259200.00), SIMDE_FLOAT32_C(-1649326208.00),
|
||||
SIMDE_FLOAT32_C(-731699712.00), SIMDE_FLOAT32_C(506893120.00), SIMDE_FLOAT32_C(-819017216.00), SIMDE_FLOAT32_C(1876723328.00) } },
|
||||
{ { INT32_C( 728422293), INT32_C( 2102157518), -INT32_C( 2033435913), -INT32_C( 2027717246), -INT32_C( 279214429), INT32_C( 940413465), -INT32_C( 167232420), INT32_C( 1483138242),
|
||||
-INT32_C( 1971072837), INT32_C( 654823216), -INT32_C( 1934765302), -INT32_C( 200028080), INT32_C( 1877175894), INT32_C( 1554575360), -INT32_C( 279728084), INT32_C( 1346877844) },
|
||||
{ SIMDE_FLOAT32_C(728422272.00), SIMDE_FLOAT32_C(2102157568.00), SIMDE_FLOAT32_C(-2033435904.00), SIMDE_FLOAT32_C(-2027717248.00),
|
||||
SIMDE_FLOAT32_C(-279214432.00), SIMDE_FLOAT32_C(940413440.00), SIMDE_FLOAT32_C(-167232416.00), SIMDE_FLOAT32_C(1483138304.00),
|
||||
SIMDE_FLOAT32_C(-1971072896.00), SIMDE_FLOAT32_C(654823232.00), SIMDE_FLOAT32_C(-1934765312.00), SIMDE_FLOAT32_C(-200028080.00),
|
||||
SIMDE_FLOAT32_C(1877175936.00), SIMDE_FLOAT32_C(1554575360.00), SIMDE_FLOAT32_C(-279728096.00), SIMDE_FLOAT32_C(1346877824.00) } },
|
||||
{ { -INT32_C( 1176843639), -INT32_C( 1545543271), INT32_C( 87002805), -INT32_C( 1241955746), -INT32_C( 1322984271), -INT32_C( 116470579), INT32_C( 300441980), -INT32_C( 1553912038),
|
||||
-INT32_C( 1822671879), -INT32_C( 784974820), INT32_C( 701982410), INT32_C( 1507774632), INT32_C( 2047541933), INT32_C( 1265834447), -INT32_C( 1805886342), -INT32_C( 2059944565) },
|
||||
{ SIMDE_FLOAT32_C(-1176843648.00), SIMDE_FLOAT32_C(-1545543296.00), SIMDE_FLOAT32_C(87002808.00), SIMDE_FLOAT32_C(-1241955712.00),
|
||||
SIMDE_FLOAT32_C(-1322984320.00), SIMDE_FLOAT32_C(-116470576.00), SIMDE_FLOAT32_C(300441984.00), SIMDE_FLOAT32_C(-1553912064.00),
|
||||
SIMDE_FLOAT32_C(-1822671872.00), SIMDE_FLOAT32_C(-784974848.00), SIMDE_FLOAT32_C(701982400.00), SIMDE_FLOAT32_C(1507774592.00),
|
||||
SIMDE_FLOAT32_C(2047541888.00), SIMDE_FLOAT32_C(1265834496.00), SIMDE_FLOAT32_C(-1805886336.00), SIMDE_FLOAT32_C(-2059944576.00) } },
|
||||
{ { INT32_C( 353932280), -INT32_C( 1696182577), INT32_C( 1573109172), INT32_C( 1001824654), INT32_C( 1924514211), INT32_C( 1421748442), INT32_C( 283646596), -INT32_C( 795533352),
|
||||
-INT32_C( 2098877006), -INT32_C( 1340289797), INT32_C( 386785161), INT32_C( 592626560), INT32_C( 1603667845), -INT32_C( 1263250384), INT32_C( 1187290222), INT32_C( 1847024060) },
|
||||
{ SIMDE_FLOAT32_C(353932288.00), SIMDE_FLOAT32_C(-1696182528.00), SIMDE_FLOAT32_C(1573109120.00), SIMDE_FLOAT32_C(1001824640.00),
|
||||
SIMDE_FLOAT32_C(1924514176.00), SIMDE_FLOAT32_C(1421748480.00), SIMDE_FLOAT32_C(283646592.00), SIMDE_FLOAT32_C(-795533376.00),
|
||||
SIMDE_FLOAT32_C(-2098877056.00), SIMDE_FLOAT32_C(-1340289792.00), SIMDE_FLOAT32_C(386785152.00), SIMDE_FLOAT32_C(592626560.00),
|
||||
SIMDE_FLOAT32_C(1603667840.00), SIMDE_FLOAT32_C(-1263250432.00), SIMDE_FLOAT32_C(1187290240.00), SIMDE_FLOAT32_C(1847024000.00) } },
|
||||
{ { INT32_C( 49347590), INT32_C( 1387400392), INT32_C( 1802092523), INT32_C( 126860418), -INT32_C( 211343933), -INT32_C( 408413319), INT32_C( 1932422327), -INT32_C( 857586234),
|
||||
INT32_C( 181326401), -INT32_C( 899907361), -INT32_C( 1036597953), INT32_C( 1170851201), INT32_C( 1664626922), INT32_C( 55238731), INT32_C( 326531149), -INT32_C( 2139971) },
|
||||
{ SIMDE_FLOAT32_C(49347592.00), SIMDE_FLOAT32_C(1387400448.00), SIMDE_FLOAT32_C(1802092544.00), SIMDE_FLOAT32_C(126860416.00),
|
||||
SIMDE_FLOAT32_C(-211343936.00), SIMDE_FLOAT32_C(-408413312.00), SIMDE_FLOAT32_C(1932422272.00), SIMDE_FLOAT32_C(-857586240.00),
|
||||
SIMDE_FLOAT32_C(181326400.00), SIMDE_FLOAT32_C(-899907392.00), SIMDE_FLOAT32_C(-1036597952.00), SIMDE_FLOAT32_C(1170851200.00),
|
||||
SIMDE_FLOAT32_C(1664626944.00), SIMDE_FLOAT32_C(55238732.00), SIMDE_FLOAT32_C(326531136.00), SIMDE_FLOAT32_C(-2139971.00) } },
|
||||
{ { INT32_C( 168406571), INT32_C( 1859413294), -INT32_C( 1406137814), -INT32_C( 1175324209), INT32_C( 1964779818), INT32_C( 1467508490), -INT32_C( 1653936161), INT32_C( 1922844999),
|
||||
INT32_C( 645703159), INT32_C( 882135306), INT32_C( 736150619), -INT32_C( 404434499), INT32_C( 89981435), INT32_C( 1197266280), INT32_C( 216319684), INT32_C( 125730831) },
|
||||
{ SIMDE_FLOAT32_C(168406576.00), SIMDE_FLOAT32_C(1859413248.00), SIMDE_FLOAT32_C(-1406137856.00), SIMDE_FLOAT32_C(-1175324160.00),
|
||||
SIMDE_FLOAT32_C(1964779776.00), SIMDE_FLOAT32_C(1467508480.00), SIMDE_FLOAT32_C(-1653936128.00), SIMDE_FLOAT32_C(1922845056.00),
|
||||
SIMDE_FLOAT32_C(645703168.00), SIMDE_FLOAT32_C(882135296.00), SIMDE_FLOAT32_C(736150592.00), SIMDE_FLOAT32_C(-404434496.00),
|
||||
SIMDE_FLOAT32_C(89981432.00), SIMDE_FLOAT32_C(1197266304.00), SIMDE_FLOAT32_C(216319680.00), SIMDE_FLOAT32_C(125730832.00) } },
|
||||
{ { INT32_C( 791542565), -INT32_C( 1486569140), INT32_C( 1121076357), INT32_C( 288012054), INT32_C( 538347448), INT32_C( 560427612), INT32_C( 1194150968), -INT32_C( 229725236),
|
||||
-INT32_C( 232686682), -INT32_C( 1046837956), -INT32_C( 536580918), -INT32_C( 604951005), INT32_C( 301664181), -INT32_C( 1322097799), INT32_C( 2079874991), -INT32_C( 1318238453) },
|
||||
{ SIMDE_FLOAT32_C(791542592.00), SIMDE_FLOAT32_C(-1486569088.00), SIMDE_FLOAT32_C(1121076352.00), SIMDE_FLOAT32_C(288012064.00),
|
||||
SIMDE_FLOAT32_C(538347456.00), SIMDE_FLOAT32_C(560427584.00), SIMDE_FLOAT32_C(1194150912.00), SIMDE_FLOAT32_C(-229725232.00),
|
||||
SIMDE_FLOAT32_C(-232686688.00), SIMDE_FLOAT32_C(-1046837952.00), SIMDE_FLOAT32_C(-536580928.00), SIMDE_FLOAT32_C(-604950976.00),
|
||||
SIMDE_FLOAT32_C(301664192.00), SIMDE_FLOAT32_C(-1322097792.00), SIMDE_FLOAT32_C(2079874944.00), SIMDE_FLOAT32_C(-1318238464.00) } },
|
||||
{ { -INT32_C( 5992510), -INT32_C( 557826540), -INT32_C( 826358614), -INT32_C( 1482051598), INT32_C( 800695734), -INT32_C( 1209996536), INT32_C( 1446173003), -INT32_C( 502816736),
|
||||
INT32_C( 1138862895), -INT32_C( 1809669399), INT32_C( 1499652198), INT32_C( 1174408080), -INT32_C( 1200178768), -INT32_C( 261138779), INT32_C( 1330029103), INT32_C( 1899121986) },
|
||||
{ SIMDE_FLOAT32_C(-5992510.00), SIMDE_FLOAT32_C(-557826560.00), SIMDE_FLOAT32_C(-826358592.00), SIMDE_FLOAT32_C(-1482051584.00),
|
||||
SIMDE_FLOAT32_C(800695744.00), SIMDE_FLOAT32_C(-1209996544.00), SIMDE_FLOAT32_C(1446173056.00), SIMDE_FLOAT32_C(-502816736.00),
|
||||
SIMDE_FLOAT32_C(1138862848.00), SIMDE_FLOAT32_C(-1809669376.00), SIMDE_FLOAT32_C(1499652224.00), SIMDE_FLOAT32_C(1174408064.00),
|
||||
SIMDE_FLOAT32_C(-1200178816.00), SIMDE_FLOAT32_C(-261138784.00), SIMDE_FLOAT32_C(1330029056.00), SIMDE_FLOAT32_C(1899122048.00) } },
|
||||
};
|
||||
|
||||
for (size_t i = 0 ; i < (sizeof(test_vec) / sizeof(test_vec[0])) ; i++) {
|
||||
simde__m512i a = simde_mm512_loadu_epi32(test_vec[i].a);
|
||||
simde__m512 r = simde_mm512_cvtepi32_ps(a);
|
||||
simde_test_x86_assert_equal_f32x16(r, simde_mm512_loadu_ps(test_vec[i].r), 1);
|
||||
}
|
||||
|
||||
return 0;
|
||||
#else
|
||||
fputc('\n', stdout);
|
||||
for (int i = 0 ; i < 8 ; i++) {
|
||||
simde__m512i a = simde_test_x86_random_i32x16();
|
||||
simde__m512 r = simde_mm512_cvtepi32_ps(a);
|
||||
|
||||
simde_test_x86_write_i32x16(2, a, SIMDE_TEST_VEC_POS_FIRST);
|
||||
simde_test_x86_write_f32x16(2, r, SIMDE_TEST_VEC_POS_LAST);
|
||||
}
|
||||
return 1;
|
||||
#endif
|
||||
}
|
||||
|
||||
static int
|
||||
test_simde_mm512_cvtepi64_epi32 (SIMDE_MUNIT_TEST_ARGS) {
|
||||
#if 1
|
||||
|
|
@ -913,6 +1051,67 @@ test_simde_mm512_cvtepi64_epi32 (SIMDE_MUNIT_TEST_ARGS) {
|
|||
#endif
|
||||
}
|
||||
|
||||
static int
|
||||
test_simde_mm512_cvtepu16_epi32(SIMDE_MUNIT_TEST_ARGS) {
|
||||
#if 1
|
||||
const struct {
|
||||
uint16_t a[16];
|
||||
int32_t r[16];
|
||||
} test_vec[8] = {
|
||||
{ { UINT16_C(56444), UINT16_C(17934), UINT16_C( 7652), UINT16_C(55248), UINT16_C(25465), UINT16_C(47543), UINT16_C( 2382), UINT16_C(41535),
|
||||
UINT16_C( 7355), UINT16_C(49718), UINT16_C( 7009), UINT16_C( 754), UINT16_C( 9751), UINT16_C(15009), UINT16_C(59135), UINT16_C(31807) },
|
||||
{ INT32_C( 56444), INT32_C( 17934), INT32_C( 7652), INT32_C( 55248), INT32_C( 25465), INT32_C( 47543), INT32_C( 2382), INT32_C( 41535),
|
||||
INT32_C( 7355), INT32_C( 49718), INT32_C( 7009), INT32_C( 754), INT32_C( 9751), INT32_C( 15009), INT32_C( 59135), INT32_C( 31807) } },
|
||||
{ { UINT16_C(20162), UINT16_C(42690), UINT16_C(37483), UINT16_C(58494), UINT16_C(13813), UINT16_C(17309), UINT16_C(56639), UINT16_C(64229),
|
||||
UINT16_C( 7161), UINT16_C(23229), UINT16_C(44855), UINT16_C(20060), UINT16_C(65238), UINT16_C(54664), UINT16_C(51172), UINT16_C(42833) },
|
||||
{ INT32_C( 20162), INT32_C( 42690), INT32_C( 37483), INT32_C( 58494), INT32_C( 13813), INT32_C( 17309), INT32_C( 56639), INT32_C( 64229),
|
||||
INT32_C( 7161), INT32_C( 23229), INT32_C( 44855), INT32_C( 20060), INT32_C( 65238), INT32_C( 54664), INT32_C( 51172), INT32_C( 42833) } },
|
||||
{ { UINT16_C( 4885), UINT16_C(32845), UINT16_C(52133), UINT16_C(39524), UINT16_C( 513), UINT16_C(16606), UINT16_C(50143), UINT16_C(55354),
|
||||
UINT16_C(63455), UINT16_C( 5683), UINT16_C(36775), UINT16_C(32100), UINT16_C(60557), UINT16_C(29266), UINT16_C(42163), UINT16_C(51481) },
|
||||
{ INT32_C( 4885), INT32_C( 32845), INT32_C( 52133), INT32_C( 39524), INT32_C( 513), INT32_C( 16606), INT32_C( 50143), INT32_C( 55354),
|
||||
INT32_C( 63455), INT32_C( 5683), INT32_C( 36775), INT32_C( 32100), INT32_C( 60557), INT32_C( 29266), INT32_C( 42163), INT32_C( 51481) } },
|
||||
{ { UINT16_C(26295), UINT16_C(23881), UINT16_C(44594), UINT16_C(13303), UINT16_C(54704), UINT16_C(36723), UINT16_C(44441), UINT16_C(30823),
|
||||
UINT16_C(39589), UINT16_C(19598), UINT16_C(61994), UINT16_C(47049), UINT16_C( 7134), UINT16_C(37161), UINT16_C(17087), UINT16_C(30554) },
|
||||
{ INT32_C( 26295), INT32_C( 23881), INT32_C( 44594), INT32_C( 13303), INT32_C( 54704), INT32_C( 36723), INT32_C( 44441), INT32_C( 30823),
|
||||
INT32_C( 39589), INT32_C( 19598), INT32_C( 61994), INT32_C( 47049), INT32_C( 7134), INT32_C( 37161), INT32_C( 17087), INT32_C( 30554) } },
|
||||
{ { UINT16_C(42153), UINT16_C(56276), UINT16_C(52050), UINT16_C( 526), UINT16_C(33185), UINT16_C(14993), UINT16_C(63534), UINT16_C(54194),
|
||||
UINT16_C(16531), UINT16_C(48415), UINT16_C(59442), UINT16_C( 4212), UINT16_C(40452), UINT16_C(50081), UINT16_C(64736), UINT16_C(35130) },
|
||||
{ INT32_C( 42153), INT32_C( 56276), INT32_C( 52050), INT32_C( 526), INT32_C( 33185), INT32_C( 14993), INT32_C( 63534), INT32_C( 54194),
|
||||
INT32_C( 16531), INT32_C( 48415), INT32_C( 59442), INT32_C( 4212), INT32_C( 40452), INT32_C( 50081), INT32_C( 64736), INT32_C( 35130) } },
|
||||
{ { UINT16_C( 3744), UINT16_C(62052), UINT16_C(29402), UINT16_C(31732), UINT16_C(34291), UINT16_C( 8885), UINT16_C(26493), UINT16_C( 4341),
|
||||
UINT16_C( 5543), UINT16_C(55757), UINT16_C(17149), UINT16_C( 489), UINT16_C(35552), UINT16_C(49349), UINT16_C(65414), UINT16_C( 9802) },
|
||||
{ INT32_C( 3744), INT32_C( 62052), INT32_C( 29402), INT32_C( 31732), INT32_C( 34291), INT32_C( 8885), INT32_C( 26493), INT32_C( 4341),
|
||||
INT32_C( 5543), INT32_C( 55757), INT32_C( 17149), INT32_C( 489), INT32_C( 35552), INT32_C( 49349), INT32_C( 65414), INT32_C( 9802) } },
|
||||
{ { UINT16_C(44558), UINT16_C(59416), UINT16_C( 3105), UINT16_C( 5219), UINT16_C( 6289), UINT16_C( 3894), UINT16_C(11391), UINT16_C( 9759),
|
||||
UINT16_C(60737), UINT16_C(16127), UINT16_C(59439), UINT16_C( 3904), UINT16_C( 1394), UINT16_C(63951), UINT16_C( 6404), UINT16_C( 4639) },
|
||||
{ INT32_C( 44558), INT32_C( 59416), INT32_C( 3105), INT32_C( 5219), INT32_C( 6289), INT32_C( 3894), INT32_C( 11391), INT32_C( 9759),
|
||||
INT32_C( 60737), INT32_C( 16127), INT32_C( 59439), INT32_C( 3904), INT32_C( 1394), INT32_C( 63951), INT32_C( 6404), INT32_C( 4639) } },
|
||||
{ { UINT16_C(14536), UINT16_C(59898), UINT16_C(23876), UINT16_C(55037), UINT16_C(13429), UINT16_C(62693), UINT16_C( 1120), UINT16_C(41242),
|
||||
UINT16_C( 6641), UINT16_C( 8415), UINT16_C( 7937), UINT16_C(29743), UINT16_C(65316), UINT16_C(10605), UINT16_C(35864), UINT16_C(57403) },
|
||||
{ INT32_C( 14536), INT32_C( 59898), INT32_C( 23876), INT32_C( 55037), INT32_C( 13429), INT32_C( 62693), INT32_C( 1120), INT32_C( 41242),
|
||||
INT32_C( 6641), INT32_C( 8415), INT32_C( 7937), INT32_C( 29743), INT32_C( 65316), INT32_C( 10605), INT32_C( 35864), INT32_C( 57403) } },
|
||||
};
|
||||
|
||||
for (size_t i = 0 ; i < (sizeof(test_vec) / sizeof(test_vec[0])); i++) {
|
||||
simde__m256i a = simde_mm256_loadu_epi16(test_vec[i].a);
|
||||
simde__m512i r = simde_mm512_cvtepu16_epi32(a);
|
||||
simde_test_x86_assert_equal_i32x16(r, simde_mm512_loadu_epi32(test_vec[i].r));
|
||||
}
|
||||
|
||||
return 0;
|
||||
#else
|
||||
fputc('\n', stdout);
|
||||
for (int i = 0 ; i < 8 ; i++) {
|
||||
simde__m256i a = simde_test_x86_random_u16x16();
|
||||
simde__m512i r = simde_mm512_cvtepu16_epi32(a);
|
||||
|
||||
simde_test_x86_write_u16x16(2, a, SIMDE_TEST_VEC_POS_FIRST);
|
||||
simde_test_x86_write_i32x16(2, r, SIMDE_TEST_VEC_POS_LAST);
|
||||
}
|
||||
return 1;
|
||||
#endif
|
||||
}
|
||||
|
||||
static int
|
||||
test_simde_mm512_cvtepu32_ps (SIMDE_MUNIT_TEST_ARGS) {
|
||||
#if 1
|
||||
|
|
@ -990,6 +1189,162 @@ test_simde_mm512_cvtepu32_ps (SIMDE_MUNIT_TEST_ARGS) {
|
|||
#endif
|
||||
}
|
||||
|
||||
static int
|
||||
test_simde_mm512_cvtph_ps (SIMDE_MUNIT_TEST_ARGS) {
|
||||
#if 1
|
||||
static const struct {
|
||||
const uint16_t a[16];
|
||||
const simde_float32 r[16];
|
||||
} test_vec[] = {
|
||||
#if !defined(SIMDE_FAST_MATH)
|
||||
{ { UINT16_C(32632), UINT16_C(36683), UINT16_C(18546), UINT16_C(51187), UINT16_C(33803), UINT16_C(35143), UINT16_C(30623), UINT16_C(24534),
|
||||
UINT16_C(28431), UINT16_C(40447), UINT16_C(62650), UINT16_C(16359), UINT16_C(56775), UINT16_C(44943), UINT16_C(35557), UINT16_C(23914) },
|
||||
{ SIMDE_MATH_NANF, SIMDE_FLOAT32_C( -0.00), SIMDE_FLOAT32_C( 8.89), SIMDE_FLOAT32_C( -7.95),
|
||||
SIMDE_FLOAT32_C( -0.00), SIMDE_FLOAT32_C( -0.00), SIMDE_FLOAT32_C( 31216.00), SIMDE_FLOAT32_C( 501.50),
|
||||
SIMDE_FLOAT32_C( 7228.00), SIMDE_FLOAT32_C( -0.01), SIMDE_FLOAT32_C(-19360.00), SIMDE_FLOAT32_C( 1.98),
|
||||
SIMDE_FLOAT32_C( -369.75), SIMDE_FLOAT32_C( -0.12), SIMDE_FLOAT32_C( -0.00), SIMDE_FLOAT32_C( 346.50) } },
|
||||
{ { UINT16_C(41196), UINT16_C(59759), UINT16_C(45695), UINT16_C(58354), UINT16_C(33596), UINT16_C(15846), UINT16_C(18667), UINT16_C(49998),
|
||||
UINT16_C(64681), UINT16_C(65108), UINT16_C( 9617), UINT16_C( 795), UINT16_C(59525), UINT16_C(28506), UINT16_C( 3614), UINT16_C( 2659) },
|
||||
{ SIMDE_FLOAT32_C( -0.01), SIMDE_FLOAT32_C( -2782.00), SIMDE_FLOAT32_C( -0.20), SIMDE_FLOAT32_C( -1017.00),
|
||||
SIMDE_FLOAT32_C( -0.00), SIMDE_FLOAT32_C( 1.47), SIMDE_FLOAT32_C( 9.84), SIMDE_FLOAT32_C( -3.65),
|
||||
SIMDE_MATH_NANF, SIMDE_MATH_NANF, SIMDE_FLOAT32_C( 0.02), SIMDE_FLOAT32_C( 0.00),
|
||||
SIMDE_FLOAT32_C( -2314.00), SIMDE_FLOAT32_C( 7528.00), SIMDE_FLOAT32_C( 0.00), SIMDE_FLOAT32_C( 0.00) } },
|
||||
#endif
|
||||
{ { UINT16_C(20084), UINT16_C(63622), UINT16_C( 506), UINT16_C(38217), UINT16_C(42669), UINT16_C(23539), UINT16_C(51678), UINT16_C(24564),
|
||||
UINT16_C( 5252), UINT16_C(47129), UINT16_C(15484), UINT16_C(26255), UINT16_C(50293), UINT16_C(34953), UINT16_C(37361), UINT16_C(25911) },
|
||||
{ SIMDE_FLOAT32_C( 25.81), SIMDE_FLOAT32_C(-37056.00), SIMDE_FLOAT32_C( 0.00), SIMDE_FLOAT32_C( -0.00),
|
||||
SIMDE_FLOAT32_C( -0.03), SIMDE_FLOAT32_C( 254.38), SIMDE_FLOAT32_C( -11.73), SIMDE_FLOAT32_C( 509.00),
|
||||
SIMDE_FLOAT32_C( 0.00), SIMDE_FLOAT32_C( -0.51), SIMDE_FLOAT32_C( 1.12), SIMDE_FLOAT32_C( 1679.00),
|
||||
SIMDE_FLOAT32_C( -4.46), SIMDE_FLOAT32_C( -0.00), SIMDE_FLOAT32_C( -0.00), SIMDE_FLOAT32_C( 1335.00) } },
|
||||
{ { UINT16_C(48607), UINT16_C(55646), UINT16_C(42942), UINT16_C(27503), UINT16_C(25165), UINT16_C(11462), UINT16_C(47915), UINT16_C(44939),
|
||||
UINT16_C(42191), UINT16_C(19303), UINT16_C(63456), UINT16_C(21937), UINT16_C(15035), UINT16_C(44253), UINT16_C( 5579), UINT16_C(43538) },
|
||||
{ SIMDE_FLOAT32_C( -1.47), SIMDE_FLOAT32_C( -171.75), SIMDE_FLOAT32_C( -0.03), SIMDE_FLOAT32_C( 3806.00),
|
||||
SIMDE_FLOAT32_C( 806.50), SIMDE_FLOAT32_C( 0.07), SIMDE_FLOAT32_C( -0.90), SIMDE_FLOAT32_C( -0.12),
|
||||
SIMDE_FLOAT32_C( -0.02), SIMDE_FLOAT32_C( 14.80), SIMDE_FLOAT32_C(-32256.00), SIMDE_FLOAT32_C( 91.06),
|
||||
SIMDE_FLOAT32_C( 0.84), SIMDE_FLOAT32_C( -0.08), SIMDE_FLOAT32_C( 0.00), SIMDE_FLOAT32_C( -0.05) } },
|
||||
{ { UINT16_C(28882), UINT16_C(37252), UINT16_C(62231), UINT16_C(25852), UINT16_C(50005), UINT16_C(32912), UINT16_C( 7038), UINT16_C(19760),
|
||||
UINT16_C(38847), UINT16_C(41113), UINT16_C(19086), UINT16_C(18933), UINT16_C(54149), UINT16_C(20726), UINT16_C( 2280), UINT16_C(47867) },
|
||||
{ SIMDE_FLOAT32_C( 9872.00), SIMDE_FLOAT32_C( -0.00), SIMDE_FLOAT32_C(-14520.00), SIMDE_FLOAT32_C( 1276.00),
|
||||
SIMDE_FLOAT32_C( -3.67), SIMDE_FLOAT32_C( -0.00), SIMDE_FLOAT32_C( 0.00), SIMDE_FLOAT32_C( 20.75),
|
||||
SIMDE_FLOAT32_C( -0.00), SIMDE_FLOAT32_C( -0.01), SIMDE_FLOAT32_C( 13.11), SIMDE_FLOAT32_C( 11.91),
|
||||
SIMDE_FLOAT32_C( -60.16), SIMDE_FLOAT32_C( 39.69), SIMDE_FLOAT32_C( 0.00), SIMDE_FLOAT32_C( -0.87) } },
|
||||
{ { UINT16_C(46345), UINT16_C(31724), UINT16_C(57341), UINT16_C( 2114), UINT16_C(35427), UINT16_C( 913), UINT16_C(26625), UINT16_C( 4194),
|
||||
UINT16_C(25047), UINT16_C(37294), UINT16_C(38229), UINT16_C( 7632), UINT16_C(24690), UINT16_C(22476), UINT16_C(14058), UINT16_C(62644) },
|
||||
{ SIMDE_FLOAT32_C( -0.31), SIMDE_FLOAT32_C( 64896.00), SIMDE_FLOAT32_C( -511.25), SIMDE_FLOAT32_C( 0.00),
|
||||
SIMDE_FLOAT32_C( -0.00), SIMDE_FLOAT32_C( 0.00), SIMDE_FLOAT32_C( 2050.00), SIMDE_FLOAT32_C( 0.00),
|
||||
SIMDE_FLOAT32_C( 747.50), SIMDE_FLOAT32_C( -0.00), SIMDE_FLOAT32_C( -0.00), SIMDE_FLOAT32_C( 0.01),
|
||||
SIMDE_FLOAT32_C( 569.00), SIMDE_FLOAT32_C( 124.75), SIMDE_FLOAT32_C( 0.43), SIMDE_FLOAT32_C(-19264.00) } },
|
||||
{ { UINT16_C(54190), UINT16_C(11764), UINT16_C(59013), UINT16_C(49424), UINT16_C(63081), UINT16_C(22014), UINT16_C(19518), UINT16_C(59160),
|
||||
UINT16_C(27720), UINT16_C(55782), UINT16_C( 401), UINT16_C( 5852), UINT16_C(14057), UINT16_C( 2182), UINT16_C(59716), UINT16_C(61970) },
|
||||
{ SIMDE_FLOAT32_C( -61.44), SIMDE_FLOAT32_C( 0.09), SIMDE_FLOAT32_C( -1669.00), SIMDE_FLOAT32_C( -2.53),
|
||||
SIMDE_FLOAT32_C(-26256.00), SIMDE_FLOAT32_C( 95.88), SIMDE_FLOAT32_C( 16.97), SIMDE_FLOAT32_C( -1816.00),
|
||||
SIMDE_FLOAT32_C( 4384.00), SIMDE_FLOAT32_C( -188.75), SIMDE_FLOAT32_C( 0.00), SIMDE_FLOAT32_C( 0.00),
|
||||
SIMDE_FLOAT32_C( 0.43), SIMDE_FLOAT32_C( 0.00), SIMDE_FLOAT32_C( -2696.00), SIMDE_FLOAT32_C(-12432.00) } },
|
||||
{ { UINT16_C( 1724), UINT16_C(16672), UINT16_C(12524), UINT16_C(22018), UINT16_C( 295), UINT16_C(26027), UINT16_C(49997), UINT16_C(38477),
|
||||
UINT16_C(13103), UINT16_C(49519), UINT16_C(19508), UINT16_C( 7895), UINT16_C(23938), UINT16_C(50982), UINT16_C(14407), UINT16_C( 953) },
|
||||
{ SIMDE_FLOAT32_C( 0.00), SIMDE_FLOAT32_C( 2.56), SIMDE_FLOAT32_C( 0.15), SIMDE_FLOAT32_C( 96.12),
|
||||
SIMDE_FLOAT32_C( 0.00), SIMDE_FLOAT32_C( 1451.00), SIMDE_FLOAT32_C( -3.65), SIMDE_FLOAT32_C( -0.00),
|
||||
SIMDE_FLOAT32_C( 0.22), SIMDE_FLOAT32_C( -2.72), SIMDE_FLOAT32_C( 16.81), SIMDE_FLOAT32_C( 0.01),
|
||||
SIMDE_FLOAT32_C( 352.50), SIMDE_FLOAT32_C( -7.15), SIMDE_FLOAT32_C( 0.53), SIMDE_FLOAT32_C( 0.00) } },
|
||||
};
|
||||
|
||||
for (size_t i = 0 ; i < (sizeof(test_vec) / sizeof(test_vec[0])) ; i++) {
|
||||
simde__m256i a = simde_mm256_loadu_epi32(test_vec[i].a);
|
||||
simde__m512 r = simde_mm512_cvtph_ps(a);
|
||||
simde_test_x86_assert_equal_f32x16(r, simde_mm512_loadu_ps(test_vec[i].r), 1);
|
||||
}
|
||||
|
||||
return 0;
|
||||
#else
|
||||
fputc('\n', stdout);
|
||||
for (int i = 0 ; i < 8 ; i++) {
|
||||
simde__m256i a = simde_test_x86_random_u16x16();
|
||||
simde__m512 r = simde_mm512_cvtph_ps(a);
|
||||
|
||||
simde_test_x86_write_u16x16(2, a, SIMDE_TEST_VEC_POS_FIRST);
|
||||
simde_test_x86_write_f32x16(2, r, SIMDE_TEST_VEC_POS_LAST);
|
||||
}
|
||||
return 1;
|
||||
#endif
|
||||
}
|
||||
|
||||
static int
|
||||
test_simde_mm512_cvtps_epi32 (SIMDE_MUNIT_TEST_ARGS) {
|
||||
#if 1
|
||||
static const struct {
|
||||
const simde_float32 a[16];
|
||||
const int32_t r[16];
|
||||
} test_vec[] = {
|
||||
{ { SIMDE_FLOAT32_C( -664.31), SIMDE_FLOAT32_C( 46.87), SIMDE_FLOAT32_C( -293.16), SIMDE_FLOAT32_C( 296.83),
|
||||
SIMDE_FLOAT32_C( 133.30), SIMDE_FLOAT32_C( -856.99), SIMDE_FLOAT32_C( -918.09), SIMDE_FLOAT32_C( 891.16),
|
||||
SIMDE_FLOAT32_C( -796.45), SIMDE_FLOAT32_C( -376.63), SIMDE_FLOAT32_C( 772.49), SIMDE_FLOAT32_C( -594.73),
|
||||
SIMDE_FLOAT32_C( 306.50), SIMDE_FLOAT32_C( 620.07), SIMDE_FLOAT32_C( -54.46), SIMDE_FLOAT32_C( 57.44) },
|
||||
{ -INT32_C( 664), INT32_C( 47), -INT32_C( 293), INT32_C( 297), INT32_C( 133), -INT32_C( 857), -INT32_C( 918), INT32_C( 891),
|
||||
-INT32_C( 796), -INT32_C( 377), INT32_C( 772), -INT32_C( 595), INT32_C( 306), INT32_C( 620), -INT32_C( 54), INT32_C( 57) } },
|
||||
{ { SIMDE_FLOAT32_C( -873.70), SIMDE_FLOAT32_C( -956.33), SIMDE_FLOAT32_C( -412.63), SIMDE_FLOAT32_C( 232.64),
|
||||
SIMDE_FLOAT32_C( 228.03), SIMDE_FLOAT32_C( 396.65), SIMDE_FLOAT32_C( 283.06), SIMDE_FLOAT32_C( 677.47),
|
||||
SIMDE_FLOAT32_C( -618.05), SIMDE_FLOAT32_C( 365.83), SIMDE_FLOAT32_C( 689.36), SIMDE_FLOAT32_C( -939.18),
|
||||
SIMDE_FLOAT32_C( -776.84), SIMDE_FLOAT32_C( 26.86), SIMDE_FLOAT32_C( -820.35), SIMDE_FLOAT32_C( -441.16) },
|
||||
{ -INT32_C( 874), -INT32_C( 956), -INT32_C( 413), INT32_C( 233), INT32_C( 228), INT32_C( 397), INT32_C( 283), INT32_C( 677),
|
||||
-INT32_C( 618), INT32_C( 366), INT32_C( 689), -INT32_C( 939), -INT32_C( 777), INT32_C( 27), -INT32_C( 820), -INT32_C( 441) } },
|
||||
{ { SIMDE_FLOAT32_C( -926.28), SIMDE_FLOAT32_C( -113.51), SIMDE_FLOAT32_C( 855.67), SIMDE_FLOAT32_C( 207.03),
|
||||
SIMDE_FLOAT32_C( 29.50), SIMDE_FLOAT32_C( 937.58), SIMDE_FLOAT32_C( 98.19), SIMDE_FLOAT32_C( 233.05),
|
||||
SIMDE_FLOAT32_C( -439.05), SIMDE_FLOAT32_C( -129.32), SIMDE_FLOAT32_C( 638.32), SIMDE_FLOAT32_C( 867.44),
|
||||
SIMDE_FLOAT32_C( -509.26), SIMDE_FLOAT32_C( -416.14), SIMDE_FLOAT32_C( -75.12), SIMDE_FLOAT32_C( -382.95) },
|
||||
{ -INT32_C( 926), -INT32_C( 114), INT32_C( 856), INT32_C( 207), INT32_C( 30), INT32_C( 938), INT32_C( 98), INT32_C( 233),
|
||||
-INT32_C( 439), -INT32_C( 129), INT32_C( 638), INT32_C( 867), -INT32_C( 509), -INT32_C( 416), -INT32_C( 75), -INT32_C( 383) } },
|
||||
{ { SIMDE_FLOAT32_C( -372.47), SIMDE_FLOAT32_C( 512.25), SIMDE_FLOAT32_C( 849.68), SIMDE_FLOAT32_C( 855.56),
|
||||
SIMDE_FLOAT32_C( -91.10), SIMDE_FLOAT32_C( 132.74), SIMDE_FLOAT32_C( 533.03), SIMDE_FLOAT32_C( 290.85),
|
||||
SIMDE_FLOAT32_C( -501.43), SIMDE_FLOAT32_C( 222.39), SIMDE_FLOAT32_C( 351.67), SIMDE_FLOAT32_C( -278.27),
|
||||
SIMDE_FLOAT32_C( -750.75), SIMDE_FLOAT32_C( 531.32), SIMDE_FLOAT32_C( 280.57), SIMDE_FLOAT32_C( -677.03) },
|
||||
{ -INT32_C( 372), INT32_C( 512), INT32_C( 850), INT32_C( 856), -INT32_C( 91), INT32_C( 133), INT32_C( 533), INT32_C( 291),
|
||||
-INT32_C( 501), INT32_C( 222), INT32_C( 352), -INT32_C( 278), -INT32_C( 751), INT32_C( 531), INT32_C( 281), -INT32_C( 677) } },
|
||||
{ { SIMDE_FLOAT32_C( -582.19), SIMDE_FLOAT32_C( 136.24), SIMDE_FLOAT32_C( 530.00), SIMDE_FLOAT32_C( 447.31),
|
||||
SIMDE_FLOAT32_C( 73.82), SIMDE_FLOAT32_C( -371.81), SIMDE_FLOAT32_C( -319.64), SIMDE_FLOAT32_C( 634.77),
|
||||
SIMDE_FLOAT32_C( 498.87), SIMDE_FLOAT32_C( -681.32), SIMDE_FLOAT32_C( 502.21), SIMDE_FLOAT32_C( 989.61),
|
||||
SIMDE_FLOAT32_C( -97.45), SIMDE_FLOAT32_C( -572.91), SIMDE_FLOAT32_C( -393.34), SIMDE_FLOAT32_C( 530.08) },
|
||||
{ -INT32_C( 582), INT32_C( 136), INT32_C( 530), INT32_C( 447), INT32_C( 74), -INT32_C( 372), -INT32_C( 320), INT32_C( 635),
|
||||
INT32_C( 499), -INT32_C( 681), INT32_C( 502), INT32_C( 990), -INT32_C( 97), -INT32_C( 573), -INT32_C( 393), INT32_C( 530) } },
|
||||
{ { SIMDE_FLOAT32_C( 939.33), SIMDE_FLOAT32_C( -543.66), SIMDE_FLOAT32_C( 385.63), SIMDE_FLOAT32_C( -151.77),
|
||||
SIMDE_FLOAT32_C( 589.09), SIMDE_FLOAT32_C( -81.34), SIMDE_FLOAT32_C( -860.92), SIMDE_FLOAT32_C( -912.34),
|
||||
SIMDE_FLOAT32_C( -858.95), SIMDE_FLOAT32_C( 490.75), SIMDE_FLOAT32_C( -190.61), SIMDE_FLOAT32_C( -609.70),
|
||||
SIMDE_FLOAT32_C( 22.08), SIMDE_FLOAT32_C( -910.04), SIMDE_FLOAT32_C( -286.73), SIMDE_FLOAT32_C( 439.89) },
|
||||
{ INT32_C( 939), -INT32_C( 544), INT32_C( 386), -INT32_C( 152), INT32_C( 589), -INT32_C( 81), -INT32_C( 861), -INT32_C( 912),
|
||||
-INT32_C( 859), INT32_C( 491), -INT32_C( 191), -INT32_C( 610), INT32_C( 22), -INT32_C( 910), -INT32_C( 287), INT32_C( 440) } },
|
||||
{ { SIMDE_FLOAT32_C( 226.20), SIMDE_FLOAT32_C( -756.73), SIMDE_FLOAT32_C( -112.80), SIMDE_FLOAT32_C( -699.98),
|
||||
SIMDE_FLOAT32_C( -128.54), SIMDE_FLOAT32_C( 567.57), SIMDE_FLOAT32_C( 934.79), SIMDE_FLOAT32_C( -629.67),
|
||||
SIMDE_FLOAT32_C( 886.25), SIMDE_FLOAT32_C( 437.00), SIMDE_FLOAT32_C( -640.06), SIMDE_FLOAT32_C( -211.20),
|
||||
SIMDE_FLOAT32_C( 864.09), SIMDE_FLOAT32_C( -33.40), SIMDE_FLOAT32_C( -681.12), SIMDE_FLOAT32_C( 803.42) },
|
||||
{ INT32_C( 226), -INT32_C( 757), -INT32_C( 113), -INT32_C( 700), -INT32_C( 129), INT32_C( 568), INT32_C( 935), -INT32_C( 630),
|
||||
INT32_C( 886), INT32_C( 437), -INT32_C( 640), -INT32_C( 211), INT32_C( 864), -INT32_C( 33), -INT32_C( 681), INT32_C( 803) } },
|
||||
{ { SIMDE_FLOAT32_C( 422.95), SIMDE_FLOAT32_C( 704.51), SIMDE_FLOAT32_C( -348.34), SIMDE_FLOAT32_C( 12.03),
|
||||
SIMDE_FLOAT32_C( -376.83), SIMDE_FLOAT32_C( -209.26), SIMDE_FLOAT32_C( 99.69), SIMDE_FLOAT32_C( -235.78),
|
||||
SIMDE_FLOAT32_C( -718.51), SIMDE_FLOAT32_C( 909.08), SIMDE_FLOAT32_C( 154.52), SIMDE_FLOAT32_C( 303.57),
|
||||
SIMDE_FLOAT32_C( 999.03), SIMDE_FLOAT32_C( 867.79), SIMDE_FLOAT32_C( -256.54), SIMDE_FLOAT32_C( 225.23) },
|
||||
{ INT32_C( 423), INT32_C( 705), -INT32_C( 348), INT32_C( 12), -INT32_C( 377), -INT32_C( 209), INT32_C( 100), -INT32_C( 236),
|
||||
-INT32_C( 719), INT32_C( 909), INT32_C( 155), INT32_C( 304), INT32_C( 999), INT32_C( 868), -INT32_C( 257), INT32_C( 225) } }
|
||||
};
|
||||
|
||||
for (size_t i = 0 ; i < (sizeof(test_vec) / sizeof(test_vec[0])) ; i++) {
|
||||
simde__m512 a = simde_mm512_loadu_ps(test_vec[i].a);
|
||||
simde__m512i r = simde_mm512_cvtps_epi32(a);
|
||||
simde_test_x86_assert_equal_i32x16(r, simde_mm512_loadu_epi32(test_vec[i].r));
|
||||
}
|
||||
|
||||
return 0;
|
||||
#else
|
||||
fputc('\n', stdout);
|
||||
for (int i = 0 ; i < 8 ; i++) {
|
||||
simde__m512 a = simde_test_x86_random_f32x16(SIMDE_FLOAT32_C(-1000.0), SIMDE_FLOAT32_C(1000.0));
|
||||
simde__m512i r = simde_mm512_cvtps_epi32(a);
|
||||
|
||||
simde_test_x86_write_f32x16(2, a, SIMDE_TEST_VEC_POS_FIRST);
|
||||
simde_test_x86_write_i32x16(2, r, SIMDE_TEST_VEC_POS_LAST);
|
||||
}
|
||||
return 1;
|
||||
#endif
|
||||
}
|
||||
|
||||
SIMDE_TEST_FUNC_LIST_BEGIN
|
||||
SIMDE_TEST_FUNC_LIST_ENTRY(mm_cvtepi64_pd)
|
||||
SIMDE_TEST_FUNC_LIST_ENTRY(mm_mask_cvtepi64_pd)
|
||||
|
|
@ -998,8 +1353,13 @@ SIMDE_TEST_FUNC_LIST_BEGIN
|
|||
SIMDE_TEST_FUNC_LIST_ENTRY(mm512_cvtepi16_epi8)
|
||||
SIMDE_TEST_FUNC_LIST_ENTRY(mm512_mask_cvtepi16_epi8)
|
||||
SIMDE_TEST_FUNC_LIST_ENTRY(mm512_maskz_cvtepi16_epi8)
|
||||
SIMDE_TEST_FUNC_LIST_ENTRY(mm512_cvtepi16_epi32)
|
||||
SIMDE_TEST_FUNC_LIST_ENTRY(mm512_cvtepi32_ps)
|
||||
SIMDE_TEST_FUNC_LIST_ENTRY(mm512_cvtepi64_epi32)
|
||||
SIMDE_TEST_FUNC_LIST_ENTRY(mm512_cvtepu16_epi32)
|
||||
SIMDE_TEST_FUNC_LIST_ENTRY(mm512_cvtepu32_ps)
|
||||
SIMDE_TEST_FUNC_LIST_ENTRY(mm512_cvtph_ps)
|
||||
SIMDE_TEST_FUNC_LIST_ENTRY(mm512_cvtps_epi32)
|
||||
SIMDE_TEST_FUNC_LIST_END
|
||||
|
||||
#include <test/x86/avx512/test-avx512-footer.h>
|
||||
|
|
|
|||
226
thirdparty/simde/test/x86/avx512/cvts.c
vendored
226
thirdparty/simde/test/x86/avx512/cvts.c
vendored
|
|
@ -1221,6 +1221,134 @@ test_simde_mm512_mask_cvtsepi32_epi8(SIMDE_MUNIT_TEST_ARGS) {
|
|||
return 0;
|
||||
}
|
||||
|
||||
static int
|
||||
test_simde_mm512_mask_cvtsepi32_storeu_epi8(SIMDE_MUNIT_TEST_ARGS) {
|
||||
#if 1
|
||||
const struct {
|
||||
int8_t src[32];
|
||||
simde__mmask16 k;
|
||||
int32_t a[16];
|
||||
int8_t r[32];
|
||||
} test_vec[8] = {
|
||||
{ { -INT8_C( 19), INT8_C( 6), -INT8_C( 48), -INT8_C( 112), -INT8_C( 76), INT8_C( 80), INT8_C( 75), INT8_C( 70),
|
||||
-INT8_C( 8), INT8_C( 26), INT8_C( 120), INT8_C( 34), INT8_C( 64), -INT8_C( 123), INT8_C( 95), INT8_C( 121),
|
||||
INT8_C( 76), INT8_C( 97), INT8_C( 75), INT8_C( 116), INT8_C( 118), -INT8_C( 21), -INT8_C( 119), INT8_C( 97),
|
||||
-INT8_C( 116), INT8_C( 35), INT8_C( 39), -INT8_C( 72), INT8_C( 118), -INT8_C( 84), -INT8_C( 76), INT8_C( 100) },
|
||||
UINT16_C(33970),
|
||||
{ INT32_C( 1070884596), INT32_C( 626642093), INT32_C( 1319803374), INT32_C( 1588590099), -INT32_C( 196467093), -INT32_C( 1374169465), INT32_C( 1130007951), -INT32_C( 423162383),
|
||||
INT32_C( 539335539), INT32_C( 1430683495), INT32_C( 732164120), INT32_C( 1384797159), INT32_C( 4641913), INT32_C( 967728554), -INT32_C( 595850774), -INT32_C( 1983757546) },
|
||||
{ -INT8_C( 19), INT8_MAX, -INT8_C( 48), -INT8_C( 112), INT8_MIN, INT8_MIN, INT8_C( 75), INT8_MIN,
|
||||
-INT8_C( 8), INT8_C( 26), INT8_MAX, INT8_C( 34), INT8_C( 64), -INT8_C( 123), INT8_C( 95), INT8_MIN,
|
||||
INT8_C( 76), INT8_C( 97), INT8_C( 75), INT8_C( 116), INT8_C( 118), -INT8_C( 21), -INT8_C( 119), INT8_C( 97),
|
||||
-INT8_C( 116), INT8_C( 35), INT8_C( 39), -INT8_C( 72), INT8_C( 118), -INT8_C( 84), -INT8_C( 76), INT8_C( 100) } },
|
||||
{ { -INT8_C( 34), -INT8_C( 25), -INT8_C( 86), INT8_C( 69), INT8_C( 102), -INT8_C( 16), -INT8_C( 101), INT8_MAX,
|
||||
-INT8_C( 32), INT8_C( 62), -INT8_C( 86), -INT8_C( 57), -INT8_C( 111), INT8_C( 52), INT8_C( 25), INT8_C( 10),
|
||||
INT8_C( 8), INT8_C( 95), INT8_C( 10), -INT8_C( 77), -INT8_C( 68), -INT8_C( 71), -INT8_C( 20), -INT8_C( 89),
|
||||
-INT8_C( 62), INT8_C( 105), -INT8_C( 125), -INT8_C( 40), -INT8_C( 84), INT8_C( 69), INT8_C( 97), -INT8_C( 117) },
|
||||
UINT16_C( 2860),
|
||||
{ INT32_C( 1811649488), -INT32_C( 1129653230), -INT32_C( 1108264029), INT32_C( 1344076102), -INT32_C( 1727407700), INT32_C( 50514816), INT32_C( 88649379), INT32_C( 168850489),
|
||||
INT32_C( 427101191), -INT32_C( 1948901400), -INT32_C( 1589065893), INT32_C( 1844536768), -INT32_C( 1106838722), INT32_C( 1791035590), -INT32_C( 261158474), -INT32_C( 2047180931) },
|
||||
{ -INT8_C( 34), -INT8_C( 25), INT8_MIN, INT8_MAX, INT8_C( 102), INT8_MAX, -INT8_C( 101), INT8_MAX,
|
||||
INT8_MAX, INT8_MIN, -INT8_C( 86), INT8_MAX, -INT8_C( 111), INT8_C( 52), INT8_C( 25), INT8_C( 10),
|
||||
INT8_C( 8), INT8_C( 95), INT8_C( 10), -INT8_C( 77), -INT8_C( 68), -INT8_C( 71), -INT8_C( 20), -INT8_C( 89),
|
||||
-INT8_C( 62), INT8_C( 105), -INT8_C( 125), -INT8_C( 40), -INT8_C( 84), INT8_C( 69), INT8_C( 97), -INT8_C( 117) } },
|
||||
{ { -INT8_C( 117), INT8_C( 111), -INT8_C( 98), INT8_C( 115), -INT8_C( 113), INT8_C( 116), -INT8_C( 1), -INT8_C( 22),
|
||||
INT8_C( 59), INT8_C( 71), -INT8_C( 117), -INT8_C( 4), -INT8_C( 84), INT8_C( 124), INT8_C( 105), -INT8_C( 22),
|
||||
INT8_C( 119), INT8_C( 111), -INT8_C( 88), INT8_C( 62), INT8_C( 119), INT8_C( 105), -INT8_C( 88), INT8_C( 45),
|
||||
INT8_C( 114), INT8_C( 23), INT8_C( 29), -INT8_C( 16), -INT8_C( 106), INT8_C( 23), INT8_C( 117), INT8_C( 34) },
|
||||
UINT16_C( 4999),
|
||||
{ -INT32_C( 1803020651), -INT32_C( 1948466432), INT32_C( 671582399), INT32_C( 462913395), INT32_C( 1703218877), INT32_C( 1501361980), INT32_C( 1550914279), -INT32_C( 898566092),
|
||||
INT32_C( 241104910), INT32_C( 2073639611), INT32_C( 916693187), -INT32_C( 598656225), -INT32_C( 2059282871), -INT32_C( 1243628082), INT32_C( 68309200), INT32_C( 1456374344) },
|
||||
{ INT8_MIN, INT8_MIN, INT8_MAX, INT8_C( 115), -INT8_C( 113), INT8_C( 116), -INT8_C( 1), INT8_MIN,
|
||||
INT8_MAX, INT8_MAX, -INT8_C( 117), -INT8_C( 4), INT8_MIN, INT8_C( 124), INT8_C( 105), -INT8_C( 22),
|
||||
INT8_C( 119), INT8_C( 111), -INT8_C( 88), INT8_C( 62), INT8_C( 119), INT8_C( 105), -INT8_C( 88), INT8_C( 45),
|
||||
INT8_C( 114), INT8_C( 23), INT8_C( 29), -INT8_C( 16), -INT8_C( 106), INT8_C( 23), INT8_C( 117), INT8_C( 34) } },
|
||||
{ { INT8_C( 122), INT8_C( 45), INT8_C( 100), INT8_C( 53), INT8_C( 103), -INT8_C( 3), -INT8_C( 80), INT8_C( 42),
|
||||
-INT8_C( 99), INT8_C( 84), INT8_C( 96), -INT8_C( 67), -INT8_C( 113), -INT8_C( 78), -INT8_C( 103), -INT8_C( 40),
|
||||
-INT8_C( 120), -INT8_C( 37), INT8_C( 94), INT8_C( 86), -INT8_C( 104), INT8_C( 61), INT8_C( 12), INT8_C( 104),
|
||||
-INT8_C( 115), INT8_C( 30), INT8_C( 109), -INT8_C( 43), -INT8_C( 96), INT8_C( 59), INT8_C( 43), INT8_C( 26) },
|
||||
UINT16_C(36712),
|
||||
{ INT32_C( 9228367), INT32_C( 1532242426), -INT32_C( 2146573338), INT32_C( 425432507), -INT32_C( 128519188), -INT32_C( 921246884), -INT32_C( 486230344), INT32_C( 527592912),
|
||||
INT32_C( 924843581), INT32_C( 244478760), INT32_C( 311336790), INT32_C( 556525877), INT32_C( 957973213), INT32_C( 503459685), -INT32_C( 1258223899), -INT32_C( 1328253837) },
|
||||
{ INT8_C( 122), INT8_C( 45), INT8_C( 100), INT8_MAX, INT8_C( 103), INT8_MIN, INT8_MIN, INT8_C( 42),
|
||||
INT8_MAX, INT8_MAX, INT8_MAX, INT8_MAX, -INT8_C( 113), -INT8_C( 78), -INT8_C( 103), INT8_MIN,
|
||||
-INT8_C( 120), -INT8_C( 37), INT8_C( 94), INT8_C( 86), -INT8_C( 104), INT8_C( 61), INT8_C( 12), INT8_C( 104),
|
||||
-INT8_C( 115), INT8_C( 30), INT8_C( 109), -INT8_C( 43), -INT8_C( 96), INT8_C( 59), INT8_C( 43), INT8_C( 26) } },
|
||||
{ { INT8_C( 114), -INT8_C( 12), -INT8_C( 24), -INT8_C( 102), INT8_C( 103), INT8_C( 122), -INT8_C( 87), -INT8_C( 66),
|
||||
INT8_C( 26), INT8_C( 55), -INT8_C( 48), INT8_C( 79), INT8_C( 33), -INT8_C( 5), INT8_C( 112), -INT8_C( 2),
|
||||
INT8_C( 125), -INT8_C( 119), INT8_C( 55), -INT8_C( 29), -INT8_C( 72), INT8_C( 57), INT8_C( 1), -INT8_C( 99),
|
||||
INT8_C( 63), INT8_C( 2), INT8_C( 82), -INT8_C( 77), INT8_C( 118), INT8_C( 38), INT8_C( 99), -INT8_C( 23) },
|
||||
UINT16_C(19226),
|
||||
{ INT32_C( 751207043), INT32_C( 275046464), -INT32_C( 1626634961), -INT32_C( 1171748477), INT32_C( 1844699244), -INT32_C( 814796163), INT32_C( 1240852197), INT32_C( 1385435343),
|
||||
-INT32_C( 763405678), INT32_C( 1776476986), -INT32_C( 351736472), -INT32_C( 492490634), -INT32_C( 1924163568), -INT32_C( 1336098870), INT32_C( 1962496677), -INT32_C( 188314270) },
|
||||
{ INT8_C( 114), INT8_MAX, -INT8_C( 24), INT8_MIN, INT8_MAX, INT8_C( 122), -INT8_C( 87), -INT8_C( 66),
|
||||
INT8_MIN, INT8_MAX, -INT8_C( 48), INT8_MIN, INT8_C( 33), -INT8_C( 5), INT8_MAX, -INT8_C( 2),
|
||||
INT8_C( 125), -INT8_C( 119), INT8_C( 55), -INT8_C( 29), -INT8_C( 72), INT8_C( 57), INT8_C( 1), -INT8_C( 99),
|
||||
INT8_C( 63), INT8_C( 2), INT8_C( 82), -INT8_C( 77), INT8_C( 118), INT8_C( 38), INT8_C( 99), -INT8_C( 23) } },
|
||||
{ { -INT8_C( 24), INT8_C( 69), -INT8_C( 58), INT8_C( 34), INT8_C( 40), -INT8_C( 88), -INT8_C( 116), -INT8_C( 112),
|
||||
-INT8_C( 107), -INT8_C( 108), INT8_C( 123), INT8_C( 12), -INT8_C( 59), INT8_C( 32), -INT8_C( 18), -INT8_C( 43),
|
||||
-INT8_C( 72), INT8_C( 62), INT8_C( 99), -INT8_C( 125), -INT8_C( 3), -INT8_C( 65), INT8_C( 51), -INT8_C( 94),
|
||||
INT8_C( 17), INT8_C( 44), INT8_C( 22), INT8_C( 115), -INT8_C( 71), -INT8_C( 36), INT8_C( 103), -INT8_C( 95) },
|
||||
UINT16_C(11554),
|
||||
{ INT32_C( 1356155588), INT32_C( 1457810395), INT32_C( 1702340983), -INT32_C( 492621953), -INT32_C( 442392398), INT32_C( 1477555010), -INT32_C( 1909077210), INT32_C( 817583980),
|
||||
INT32_C( 2088800673), INT32_C( 1943234044), -INT32_C( 1915205106), INT32_C( 745503865), INT32_C( 1594954012), -INT32_C( 357096508), INT32_C( 1517874414), -INT32_C( 443861949) },
|
||||
{ -INT8_C( 24), INT8_MAX, -INT8_C( 58), INT8_C( 34), INT8_C( 40), INT8_MAX, -INT8_C( 116), -INT8_C( 112),
|
||||
INT8_MAX, -INT8_C( 108), INT8_MIN, INT8_MAX, -INT8_C( 59), INT8_MIN, -INT8_C( 18), -INT8_C( 43),
|
||||
-INT8_C( 72), INT8_C( 62), INT8_C( 99), -INT8_C( 125), -INT8_C( 3), -INT8_C( 65), INT8_C( 51), -INT8_C( 94),
|
||||
INT8_C( 17), INT8_C( 44), INT8_C( 22), INT8_C( 115), -INT8_C( 71), -INT8_C( 36), INT8_C( 103), -INT8_C( 95) } },
|
||||
{ { -INT8_C( 59), INT8_C( 11), INT8_C( 97), -INT8_C( 63), INT8_C( 112), INT8_C( 52), INT8_C( 52), INT8_MAX,
|
||||
INT8_C( 126), INT8_C( 12), INT8_C( 12), -INT8_C( 8), -INT8_C( 120), INT8_C( 124), INT8_C( 36), -INT8_C( 91),
|
||||
-INT8_C( 115), INT8_C( 53), INT8_C( 4), INT8_C( 81), INT8_C( 88), -INT8_C( 69), INT8_C( 59), INT8_C( 70),
|
||||
-INT8_C( 88), -INT8_C( 76), -INT8_C( 95), -INT8_C( 21), -INT8_C( 24), INT8_C( 44), -INT8_C( 48), -INT8_C( 83) },
|
||||
UINT16_C(12855),
|
||||
{ -INT32_C( 1570330514), INT32_C( 867099943), INT32_C( 28260317), -INT32_C( 533316388), -INT32_C( 912552051), INT32_C( 1987920853), -INT32_C( 6134481), -INT32_C( 2144216558),
|
||||
-INT32_C( 1457350526), INT32_C( 1524420733), -INT32_C( 480539641), INT32_C( 1455657416), -INT32_C( 165716192), -INT32_C( 781411166), INT32_C( 332467969), INT32_C( 1804796649) },
|
||||
{ INT8_MIN, INT8_MAX, INT8_MAX, -INT8_C( 63), INT8_MIN, INT8_MAX, INT8_C( 52), INT8_MAX,
|
||||
INT8_C( 126), INT8_MAX, INT8_C( 12), -INT8_C( 8), INT8_MIN, INT8_MIN, INT8_C( 36), -INT8_C( 91),
|
||||
-INT8_C( 115), INT8_C( 53), INT8_C( 4), INT8_C( 81), INT8_C( 88), -INT8_C( 69), INT8_C( 59), INT8_C( 70),
|
||||
-INT8_C( 88), -INT8_C( 76), -INT8_C( 95), -INT8_C( 21), -INT8_C( 24), INT8_C( 44), -INT8_C( 48), -INT8_C( 83) } },
|
||||
{ { -INT8_C( 102), -INT8_C( 75), INT8_C( 20), INT8_C( 23), -INT8_C( 123), -INT8_C( 16), INT8_C( 113), -INT8_C( 115),
|
||||
INT8_C( 124), -INT8_C( 52), INT8_C( 112), INT8_C( 69), INT8_C( 94), INT8_C( 52), -INT8_C( 101), INT8_C( 126),
|
||||
-INT8_C( 109), -INT8_C( 70), INT8_C( 116), INT8_C( 53), INT8_C( 86), -INT8_C( 31), INT8_C( 7), INT8_C( 87),
|
||||
-INT8_C( 16), -INT8_C( 40), INT8_C( 106), -INT8_C( 39), -INT8_C( 38), -INT8_C( 3), INT8_C( 68), INT8_C( 117) },
|
||||
UINT16_C(22706),
|
||||
{ -INT32_C( 28821620), INT32_C( 902481348), -INT32_C( 1519835126), INT32_C( 459275431), INT32_C( 956085553), INT32_C( 1980820492), INT32_C( 158591941), -INT32_C( 329177760),
|
||||
INT32_C( 569027164), INT32_C( 2035725679), -INT32_C( 2078359587), -INT32_C( 325026373), INT32_C( 1042652210), INT32_C( 1320433033), -INT32_C( 2141706464), -INT32_C( 1469204148) },
|
||||
{ -INT8_C( 102), INT8_MAX, INT8_C( 20), INT8_C( 23), INT8_MAX, INT8_MAX, INT8_C( 113), INT8_MIN,
|
||||
INT8_C( 124), -INT8_C( 52), INT8_C( 112), INT8_MIN, INT8_MAX, INT8_C( 52), INT8_MIN, INT8_C( 126),
|
||||
-INT8_C( 109), -INT8_C( 70), INT8_C( 116), INT8_C( 53), INT8_C( 86), -INT8_C( 31), INT8_C( 7), INT8_C( 87),
|
||||
-INT8_C( 16), -INT8_C( 40), INT8_C( 106), -INT8_C( 39), -INT8_C( 38), -INT8_C( 3), INT8_C( 68), INT8_C( 117) } },
|
||||
};
|
||||
|
||||
for (size_t i = 0 ; i < (sizeof(test_vec) / sizeof(test_vec[0])); i++) {
|
||||
simde__m512i a = simde_mm512_loadu_epi32(test_vec[i].a);
|
||||
int8_t dst[32];
|
||||
simde_memcpy(dst, test_vec[i].src, sizeof(dst));
|
||||
simde_mm512_mask_cvtsepi32_storeu_epi8(dst, test_vec[i].k, a);
|
||||
simde_test_x86_assert_equal_i8x32(simde_mm256_loadu_epi8(dst), simde_mm256_loadu_epi8(test_vec[i].r));
|
||||
}
|
||||
|
||||
return 0;
|
||||
#else
|
||||
fputc('\n', stdout);
|
||||
for (int i = 0 ; i < 8 ; i++) {
|
||||
simde__m256i src = simde_test_x86_random_i8x32();
|
||||
simde__mmask16 k = simde_test_x86_random_mmask16();
|
||||
simde__m512i a = simde_test_x86_random_i32x16();
|
||||
int8_t r[32];
|
||||
simde_memcpy(r, &src, sizeof(r));
|
||||
simde_mm512_mask_cvtsepi32_storeu_epi8(r, k, a);
|
||||
|
||||
simde_test_x86_write_i8x32(2, src, SIMDE_TEST_VEC_POS_FIRST);
|
||||
simde_test_x86_write_mmask16(2, k, SIMDE_TEST_VEC_POS_MIDDLE);
|
||||
simde_test_x86_write_i32x16(2, a, SIMDE_TEST_VEC_POS_MIDDLE);
|
||||
simde_test_x86_write_i8x32(2, simde_mm256_loadu_epi8(r), SIMDE_TEST_VEC_POS_LAST);
|
||||
}
|
||||
|
||||
return 1;
|
||||
#endif
|
||||
}
|
||||
|
||||
static int
|
||||
test_simde_mm512_maskz_cvtsepi32_epi8(SIMDE_MUNIT_TEST_ARGS) {
|
||||
const struct {
|
||||
|
|
@ -1512,6 +1640,102 @@ test_simde_mm512_mask_cvtsepi32_epi16(SIMDE_MUNIT_TEST_ARGS) {
|
|||
return 0;
|
||||
}
|
||||
|
||||
static int
|
||||
test_simde_mm512_mask_cvtsepi32_storeu_epi16(SIMDE_MUNIT_TEST_ARGS) {
|
||||
#if 1
|
||||
const struct {
|
||||
int16_t src[16];
|
||||
simde__mmask16 k;
|
||||
int32_t a[16];
|
||||
int16_t r[16];
|
||||
} test_vec[8] = {
|
||||
{ { -INT16_C( 21806), INT16_C( 23547), -INT16_C( 15173), -INT16_C( 30169), -INT16_C( 29679), INT16_C( 25421), -INT16_C( 5558), INT16_C( 19463),
|
||||
-INT16_C( 26305), -INT16_C( 11491), INT16_C( 15450), INT16_C( 824), -INT16_C( 11861), INT16_C( 4306), INT16_C( 26861), -INT16_C( 16387) },
|
||||
UINT16_C(63762),
|
||||
{ INT32_C( 1119735067), -INT32_C( 1529950377), INT32_C( 982456370), -INT32_C( 2116825500), -INT32_C( 625070431), INT32_C( 61565233), INT32_C( 2003540089), INT32_C( 1936751960),
|
||||
-INT32_C( 1581961910), INT32_C( 793150460), INT32_C( 6935963), INT32_C( 1149320355), -INT32_C( 1675739286), INT32_C( 580897193), -INT32_C( 1164375198), -INT32_C( 752023160) },
|
||||
{ -INT16_C( 21806), INT16_MIN, -INT16_C( 15173), -INT16_C( 30169), INT16_MIN, INT16_C( 25421), -INT16_C( 5558), INT16_C( 19463),
|
||||
INT16_MIN, -INT16_C( 11491), INT16_C( 15450), INT16_MAX, INT16_MIN, INT16_MAX, INT16_MIN, INT16_MIN } },
|
||||
{ { -INT16_C( 7625), INT16_C( 13172), -INT16_C( 17819), INT16_C( 98), -INT16_C( 13425), INT16_C( 12800), -INT16_C( 32248), INT16_C( 29303),
|
||||
-INT16_C( 27199), INT16_C( 27150), -INT16_C( 20897), -INT16_C( 15987), INT16_C( 9913), INT16_C( 16763), -INT16_C( 22480), INT16_C( 26388) },
|
||||
UINT16_C(35210),
|
||||
{ -INT32_C( 45879398), -INT32_C( 255274001), INT32_C( 2087899141), INT32_C( 1360147267), INT32_C( 738161054), -INT32_C( 1387153358), INT32_C( 240484858), -INT32_C( 2087198744),
|
||||
-INT32_C( 1115628594), -INT32_C( 1280489298), INT32_C( 1546657561), -INT32_C( 240303533), -INT32_C( 451105357), INT32_C( 1603431781), -INT32_C( 680597521), -INT32_C( 1806039610) },
|
||||
{ -INT16_C( 7625), INT16_MIN, -INT16_C( 17819), INT16_MAX, -INT16_C( 13425), INT16_C( 12800), -INT16_C( 32248), INT16_MIN,
|
||||
INT16_MIN, INT16_C( 27150), -INT16_C( 20897), INT16_MIN, INT16_C( 9913), INT16_C( 16763), -INT16_C( 22480), INT16_MIN } },
|
||||
{ { -INT16_C( 9504), -INT16_C( 29103), -INT16_C( 221), INT16_C( 15426), INT16_C( 29214), INT16_C( 29080), INT16_C( 17844), INT16_C( 26466),
|
||||
INT16_C( 32498), INT16_C( 22604), -INT16_C( 8468), -INT16_C( 9289), INT16_C( 9669), -INT16_C( 29774), INT16_C( 3371), INT16_C( 2847) },
|
||||
UINT16_C(28903),
|
||||
{ -INT32_C( 596702566), -INT32_C( 565277114), INT32_C( 1646527231), -INT32_C( 1243605399), INT32_C( 647220334), INT32_C( 1514887335), INT32_C( 40335075), INT32_C( 477253250),
|
||||
-INT32_C( 1611079079), INT32_C( 1870546544), -INT32_C( 1311661496), INT32_C( 661041848), INT32_C( 642644350), INT32_C( 880842833), -INT32_C( 1858672881), -INT32_C( 1901221835) },
|
||||
{ INT16_MIN, INT16_MIN, INT16_MAX, INT16_C( 15426), INT16_C( 29214), INT16_MAX, INT16_MAX, INT16_MAX,
|
||||
INT16_C( 32498), INT16_C( 22604), -INT16_C( 8468), -INT16_C( 9289), INT16_MAX, INT16_MAX, INT16_MIN, INT16_C( 2847) } },
|
||||
{ { -INT16_C( 23158), -INT16_C( 1490), -INT16_C( 21269), INT16_C( 13162), INT16_C( 15182), INT16_C( 1764), INT16_C( 19181), INT16_C( 27693),
|
||||
INT16_C( 31299), -INT16_C( 27502), INT16_C( 4627), INT16_C( 8904), -INT16_C( 263), INT16_C( 11955), INT16_C( 24742), INT16_C( 12733) },
|
||||
UINT16_C(60165),
|
||||
{ -INT32_C( 1785204693), INT32_C( 131196195), INT32_C( 424787691), -INT32_C( 1131178966), -INT32_C( 254892504), INT32_C( 2079246280), -INT32_C( 1277455114), -INT32_C( 241246011),
|
||||
-INT32_C( 209308208), INT32_C( 100292378), INT32_C( 1075727126), INT32_C( 134066911), INT32_C( 569887576), -INT32_C( 1986206317), INT32_C( 1060927610), INT32_C( 691067480) },
|
||||
{ INT16_MIN, -INT16_C( 1490), INT16_MAX, INT16_C( 13162), INT16_C( 15182), INT16_C( 1764), INT16_C( 19181), INT16_C( 27693),
|
||||
INT16_MIN, INT16_MAX, INT16_C( 4627), INT16_MAX, -INT16_C( 263), INT16_MIN, INT16_MAX, INT16_MAX } },
|
||||
{ { -INT16_C( 18673), INT16_C( 10524), INT16_C( 5902), INT16_C( 9262), INT16_C( 19810), INT16_C( 16997), INT16_C( 25343), INT16_C( 22345),
|
||||
INT16_C( 16685), -INT16_C( 16264), INT16_C( 5414), -INT16_C( 24503), -INT16_C( 31347), -INT16_C( 6688), INT16_C( 4191), INT16_C( 28174) },
|
||||
UINT16_C(11207),
|
||||
{ -INT32_C( 968698217), INT32_C( 1595122938), INT32_C( 817959654), -INT32_C( 495849623), -INT32_C( 101214289), INT32_C( 410944568), INT32_C( 2015944297), -INT32_C( 459018164),
|
||||
-INT32_C( 1062541882), INT32_C( 1881193865), INT32_C( 950067663), -INT32_C( 2145775152), -INT32_C( 528936536), -INT32_C( 460907), INT32_C( 578232789), -INT32_C( 687465967) },
|
||||
{ INT16_MIN, INT16_MAX, INT16_MAX, INT16_C( 9262), INT16_C( 19810), INT16_C( 16997), INT16_MAX, INT16_MIN,
|
||||
INT16_MIN, INT16_MAX, INT16_C( 5414), INT16_MIN, -INT16_C( 31347), INT16_MIN, INT16_C( 4191), INT16_C( 28174) } },
|
||||
{ { -INT16_C( 20225), -INT16_C( 30569), -INT16_C( 18579), INT16_C( 15608), -INT16_C( 26471), INT16_C( 26996), -INT16_C( 28759), INT16_C( 21225),
|
||||
INT16_C( 25248), INT16_C( 13874), INT16_C( 11098), INT16_C( 12085), -INT16_C( 21428), INT16_C( 23889), INT16_C( 22470), -INT16_C( 15052) },
|
||||
UINT16_C(51975),
|
||||
{ INT32_C( 1183020109), INT32_C( 635313328), INT32_C( 1874102405), INT32_C( 215045338), -INT32_C( 1086903414), -INT32_C( 1402240165), INT32_C( 335819232), INT32_C( 1155533814),
|
||||
INT32_C( 814375808), INT32_C( 72706175), -INT32_C( 898430480), -INT32_C( 388545186), -INT32_C( 878178704), INT32_C( 1920471954), INT32_C( 998734917), INT32_C( 125790087) },
|
||||
{ INT16_MAX, INT16_MAX, INT16_MAX, INT16_C( 15608), -INT16_C( 26471), INT16_C( 26996), -INT16_C( 28759), INT16_C( 21225),
|
||||
INT16_MAX, INT16_MAX, INT16_C( 11098), INT16_MIN, -INT16_C( 21428), INT16_C( 23889), INT16_MAX, INT16_MAX } },
|
||||
{ { INT16_C( 2506), INT16_C( 18744), -INT16_C( 29326), INT16_C( 25165), -INT16_C( 15977), -INT16_C( 2771), INT16_C( 1030), INT16_C( 30429),
|
||||
-INT16_C( 31470), -INT16_C( 23486), -INT16_C( 17767), -INT16_C( 8681), -INT16_C( 25034), -INT16_C( 17127), -INT16_C( 26363), -INT16_C( 12347) },
|
||||
UINT16_C(64930),
|
||||
{ INT32_C( 1703547928), -INT32_C( 1541004937), -INT32_C( 190305258), -INT32_C( 445007197), INT32_C( 1990136415), INT32_C( 169137648), INT32_C( 1470306706), INT32_C( 5522920),
|
||||
-INT32_C( 781852838), INT32_C( 393579520), INT32_C( 1527455160), INT32_C( 910197975), -INT32_C( 2018713705), INT32_C( 1200734388), -INT32_C( 1046596391), -INT32_C( 725486726) },
|
||||
{ INT16_C( 2506), INT16_MIN, -INT16_C( 29326), INT16_C( 25165), -INT16_C( 15977), INT16_MAX, INT16_C( 1030), INT16_MAX,
|
||||
INT16_MIN, -INT16_C( 23486), INT16_MAX, INT16_MAX, INT16_MIN, INT16_MAX, INT16_MIN, INT16_MIN } },
|
||||
{ { INT16_C( 10194), -INT16_C( 11611), INT16_C( 6835), INT16_C( 27625), -INT16_C( 3017), INT16_C( 3783), INT16_C( 1913), INT16_C( 4165),
|
||||
-INT16_C( 3609), -INT16_C( 25705), INT16_C( 10674), -INT16_C( 29726), -INT16_C( 32419), -INT16_C( 10419), INT16_C( 3700), INT16_C( 18091) },
|
||||
UINT16_C(20533),
|
||||
{ INT32_C( 40560664), INT32_C( 469147988), -INT32_C( 182292560), INT32_C( 400951679), -INT32_C( 2025809755), INT32_C( 1896389924), INT32_C( 545225845), -INT32_C( 613304894),
|
||||
-INT32_C( 237118563), INT32_C( 755815293), -INT32_C( 1037947069), -INT32_C( 572979144), -INT32_C( 983230047), INT32_C( 741764535), -INT32_C( 1404258838), INT32_C( 143113578) },
|
||||
{ INT16_MAX, -INT16_C( 11611), INT16_MIN, INT16_C( 27625), INT16_MIN, INT16_MAX, INT16_C( 1913), INT16_C( 4165),
|
||||
-INT16_C( 3609), -INT16_C( 25705), INT16_C( 10674), -INT16_C( 29726), INT16_MIN, -INT16_C( 10419), INT16_MIN, INT16_C( 18091) } },
|
||||
};
|
||||
|
||||
for (size_t i = 0 ; i < (sizeof(test_vec) / sizeof(test_vec[0])); i++) {
|
||||
simde__m512i a = simde_mm512_loadu_epi32(test_vec[i].a);
|
||||
int16_t dst[16];
|
||||
simde_memcpy(dst, test_vec[i].src, sizeof(dst));
|
||||
simde_mm512_mask_cvtsepi32_storeu_epi16(dst, test_vec[i].k, a);
|
||||
simde_test_x86_assert_equal_i16x16(simde_mm256_loadu_epi16(dst), simde_mm256_loadu_epi16(test_vec[i].r));
|
||||
}
|
||||
|
||||
return 0;
|
||||
#else
|
||||
fputc('\n', stdout);
|
||||
for (int i = 0 ; i < 8 ; i++) {
|
||||
simde__m256i src = simde_test_x86_random_i16x16();
|
||||
simde__mmask16 k = simde_test_x86_random_mmask16();
|
||||
simde__m512i a = simde_test_x86_random_i32x16();
|
||||
int16_t r[16];
|
||||
simde_memcpy(r, &src, sizeof(r));
|
||||
simde_mm512_mask_cvtsepi32_storeu_epi16(r, k, a);
|
||||
|
||||
simde_test_x86_write_i16x16(2, src, SIMDE_TEST_VEC_POS_FIRST);
|
||||
simde_test_x86_write_mmask16(2, k, SIMDE_TEST_VEC_POS_MIDDLE);
|
||||
simde_test_x86_write_i32x16(2, a, SIMDE_TEST_VEC_POS_MIDDLE);
|
||||
simde_test_x86_write_i16x16(2, simde_mm256_loadu_epi16(r), SIMDE_TEST_VEC_POS_LAST);
|
||||
}
|
||||
|
||||
return 1;
|
||||
#endif
|
||||
}
|
||||
|
||||
static int
|
||||
test_simde_mm512_maskz_cvtsepi32_epi16(SIMDE_MUNIT_TEST_ARGS) {
|
||||
const struct {
|
||||
|
|
@ -2363,9 +2587,11 @@ SIMDE_TEST_FUNC_LIST_BEGIN
|
|||
|
||||
SIMDE_TEST_FUNC_LIST_ENTRY(mm512_cvtsepi32_epi8)
|
||||
SIMDE_TEST_FUNC_LIST_ENTRY(mm512_mask_cvtsepi32_epi8)
|
||||
SIMDE_TEST_FUNC_LIST_ENTRY(mm512_mask_cvtsepi32_storeu_epi8)
|
||||
SIMDE_TEST_FUNC_LIST_ENTRY(mm512_maskz_cvtsepi32_epi8)
|
||||
SIMDE_TEST_FUNC_LIST_ENTRY(mm512_cvtsepi32_epi16)
|
||||
SIMDE_TEST_FUNC_LIST_ENTRY(mm512_mask_cvtsepi32_epi16)
|
||||
SIMDE_TEST_FUNC_LIST_ENTRY(mm512_mask_cvtsepi32_storeu_epi16)
|
||||
SIMDE_TEST_FUNC_LIST_ENTRY(mm512_maskz_cvtsepi32_epi16)
|
||||
|
||||
SIMDE_TEST_FUNC_LIST_ENTRY(mm512_cvtsepi64_epi8)
|
||||
|
|
|
|||
78
thirdparty/simde/test/x86/avx512/cvtt.c
vendored
78
thirdparty/simde/test/x86/avx512/cvtt.c
vendored
|
|
@ -201,10 +201,88 @@ test_simde_mm_maskz_cvttpd_epi64 (SIMDE_MUNIT_TEST_ARGS) {
|
|||
#endif
|
||||
}
|
||||
|
||||
static int
|
||||
test_simde_mm512_cvttps_epi32 (SIMDE_MUNIT_TEST_ARGS) {
|
||||
#if 1
|
||||
static const struct {
|
||||
const simde_float32 a[16];
|
||||
const int32_t r[16];
|
||||
} test_vec[] = {
|
||||
{ { SIMDE_FLOAT32_C( 729.57), SIMDE_FLOAT32_C( -785.48), SIMDE_FLOAT32_C( -245.56), SIMDE_FLOAT32_C( 741.78),
|
||||
SIMDE_FLOAT32_C( -900.88), SIMDE_FLOAT32_C( -418.95), SIMDE_FLOAT32_C( -554.45), SIMDE_FLOAT32_C( -819.65),
|
||||
SIMDE_FLOAT32_C( 260.27), SIMDE_FLOAT32_C( 953.13), SIMDE_FLOAT32_C( -926.11), SIMDE_FLOAT32_C( 341.73),
|
||||
SIMDE_FLOAT32_C( -339.95), SIMDE_FLOAT32_C( 886.92), SIMDE_FLOAT32_C( 452.88), SIMDE_FLOAT32_C( 215.16) },
|
||||
{ INT32_C( 729), -INT32_C( 785), -INT32_C( 245), INT32_C( 741), -INT32_C( 900), -INT32_C( 418), -INT32_C( 554), -INT32_C( 819),
|
||||
INT32_C( 260), INT32_C( 953), -INT32_C( 926), INT32_C( 341), -INT32_C( 339), INT32_C( 886), INT32_C( 452), INT32_C( 215) } },
|
||||
{ { SIMDE_FLOAT32_C( -840.48), SIMDE_FLOAT32_C( 618.54), SIMDE_FLOAT32_C( 980.39), SIMDE_FLOAT32_C( 428.66),
|
||||
SIMDE_FLOAT32_C( -251.24), SIMDE_FLOAT32_C( 397.38), SIMDE_FLOAT32_C( -975.80), SIMDE_FLOAT32_C( 766.05),
|
||||
SIMDE_FLOAT32_C( -458.73), SIMDE_FLOAT32_C( 215.13), SIMDE_FLOAT32_C( -841.38), SIMDE_FLOAT32_C( -638.70),
|
||||
SIMDE_FLOAT32_C( -411.92), SIMDE_FLOAT32_C( -220.19), SIMDE_FLOAT32_C( 165.38), SIMDE_FLOAT32_C( -682.35) },
|
||||
{ -INT32_C( 840), INT32_C( 618), INT32_C( 980), INT32_C( 428), -INT32_C( 251), INT32_C( 397), -INT32_C( 975), INT32_C( 766),
|
||||
-INT32_C( 458), INT32_C( 215), -INT32_C( 841), -INT32_C( 638), -INT32_C( 411), -INT32_C( 220), INT32_C( 165), -INT32_C( 682) } },
|
||||
{ { SIMDE_FLOAT32_C( -5.67), SIMDE_FLOAT32_C( 919.82), SIMDE_FLOAT32_C( -940.57), SIMDE_FLOAT32_C( 93.45),
|
||||
SIMDE_FLOAT32_C( -499.13), SIMDE_FLOAT32_C( -495.03), SIMDE_FLOAT32_C( 273.79), SIMDE_FLOAT32_C( 761.13),
|
||||
SIMDE_FLOAT32_C( -541.89), SIMDE_FLOAT32_C( 347.69), SIMDE_FLOAT32_C( 102.86), SIMDE_FLOAT32_C( 118.16),
|
||||
SIMDE_FLOAT32_C( 234.61), SIMDE_FLOAT32_C( -444.26), SIMDE_FLOAT32_C( -666.68), SIMDE_FLOAT32_C( 394.13) },
|
||||
{ -INT32_C( 5), INT32_C( 919), -INT32_C( 940), INT32_C( 93), -INT32_C( 499), -INT32_C( 495), INT32_C( 273), INT32_C( 761),
|
||||
-INT32_C( 541), INT32_C( 347), INT32_C( 102), INT32_C( 118), INT32_C( 234), -INT32_C( 444), -INT32_C( 666), INT32_C( 394) } },
|
||||
{ { SIMDE_FLOAT32_C( -825.71), SIMDE_FLOAT32_C( -686.29), SIMDE_FLOAT32_C( -177.21), SIMDE_FLOAT32_C( -76.96),
|
||||
SIMDE_FLOAT32_C( 711.09), SIMDE_FLOAT32_C( -153.01), SIMDE_FLOAT32_C( -310.91), SIMDE_FLOAT32_C( -747.64),
|
||||
SIMDE_FLOAT32_C( -937.88), SIMDE_FLOAT32_C( -152.29), SIMDE_FLOAT32_C( -386.34), SIMDE_FLOAT32_C( -349.81),
|
||||
SIMDE_FLOAT32_C( 627.52), SIMDE_FLOAT32_C( 779.04), SIMDE_FLOAT32_C( -32.16), SIMDE_FLOAT32_C( -378.15) },
|
||||
{ -INT32_C( 825), -INT32_C( 686), -INT32_C( 177), -INT32_C( 76), INT32_C( 711), -INT32_C( 153), -INT32_C( 310), -INT32_C( 747),
|
||||
-INT32_C( 937), -INT32_C( 152), -INT32_C( 386), -INT32_C( 349), INT32_C( 627), INT32_C( 779), -INT32_C( 32), -INT32_C( 378) } },
|
||||
{ { SIMDE_FLOAT32_C( 698.86), SIMDE_FLOAT32_C( 27.27), SIMDE_FLOAT32_C( 715.30), SIMDE_FLOAT32_C( -800.28),
|
||||
SIMDE_FLOAT32_C( 532.24), SIMDE_FLOAT32_C( -10.91), SIMDE_FLOAT32_C( 960.86), SIMDE_FLOAT32_C( 990.35),
|
||||
SIMDE_FLOAT32_C( -663.22), SIMDE_FLOAT32_C( 63.72), SIMDE_FLOAT32_C( 108.52), SIMDE_FLOAT32_C( 571.39),
|
||||
SIMDE_FLOAT32_C( 619.47), SIMDE_FLOAT32_C( 441.84), SIMDE_FLOAT32_C( -34.48), SIMDE_FLOAT32_C( 793.75) },
|
||||
{ INT32_C( 698), INT32_C( 27), INT32_C( 715), -INT32_C( 800), INT32_C( 532), -INT32_C( 10), INT32_C( 960), INT32_C( 990),
|
||||
-INT32_C( 663), INT32_C( 63), INT32_C( 108), INT32_C( 571), INT32_C( 619), INT32_C( 441), -INT32_C( 34), INT32_C( 793) } },
|
||||
{ { SIMDE_FLOAT32_C( 755.54), SIMDE_FLOAT32_C( 788.31), SIMDE_FLOAT32_C( -283.21), SIMDE_FLOAT32_C( 466.63),
|
||||
SIMDE_FLOAT32_C( -364.70), SIMDE_FLOAT32_C( 405.88), SIMDE_FLOAT32_C( 719.00), SIMDE_FLOAT32_C( -302.58),
|
||||
SIMDE_FLOAT32_C( -746.40), SIMDE_FLOAT32_C( -667.34), SIMDE_FLOAT32_C( 347.62), SIMDE_FLOAT32_C( 881.12),
|
||||
SIMDE_FLOAT32_C( -888.30), SIMDE_FLOAT32_C( -684.54), SIMDE_FLOAT32_C( -497.03), SIMDE_FLOAT32_C( 810.56) },
|
||||
{ INT32_C( 755), INT32_C( 788), -INT32_C( 283), INT32_C( 466), -INT32_C( 364), INT32_C( 405), INT32_C( 719), -INT32_C( 302),
|
||||
-INT32_C( 746), -INT32_C( 667), INT32_C( 347), INT32_C( 881), -INT32_C( 888), -INT32_C( 684), -INT32_C( 497), INT32_C( 810) } },
|
||||
{ { SIMDE_FLOAT32_C( 342.73), SIMDE_FLOAT32_C( -781.74), SIMDE_FLOAT32_C( -989.72), SIMDE_FLOAT32_C( -125.03),
|
||||
SIMDE_FLOAT32_C( 207.36), SIMDE_FLOAT32_C( 971.14), SIMDE_FLOAT32_C( -134.67), SIMDE_FLOAT32_C( 544.14),
|
||||
SIMDE_FLOAT32_C( 34.86), SIMDE_FLOAT32_C( 973.84), SIMDE_FLOAT32_C( 115.53), SIMDE_FLOAT32_C( -345.67),
|
||||
SIMDE_FLOAT32_C( 415.68), SIMDE_FLOAT32_C( -918.96), SIMDE_FLOAT32_C( -551.92), SIMDE_FLOAT32_C( 171.22) },
|
||||
{ INT32_C( 342), -INT32_C( 781), -INT32_C( 989), -INT32_C( 125), INT32_C( 207), INT32_C( 971), -INT32_C( 134), INT32_C( 544),
|
||||
INT32_C( 34), INT32_C( 973), INT32_C( 115), -INT32_C( 345), INT32_C( 415), -INT32_C( 918), -INT32_C( 551), INT32_C( 171) } },
|
||||
{ { SIMDE_FLOAT32_C( 869.36), SIMDE_FLOAT32_C( 164.87), SIMDE_FLOAT32_C( -362.14), SIMDE_FLOAT32_C( -495.34),
|
||||
SIMDE_FLOAT32_C( -429.24), SIMDE_FLOAT32_C( -643.14), SIMDE_FLOAT32_C( 202.08), SIMDE_FLOAT32_C( -175.65),
|
||||
SIMDE_FLOAT32_C( -310.49), SIMDE_FLOAT32_C( -450.30), SIMDE_FLOAT32_C( -294.53), SIMDE_FLOAT32_C( -198.79),
|
||||
SIMDE_FLOAT32_C( -134.84), SIMDE_FLOAT32_C( 208.44), SIMDE_FLOAT32_C( -388.23), SIMDE_FLOAT32_C( -792.11) },
|
||||
{ INT32_C( 869), INT32_C( 164), -INT32_C( 362), -INT32_C( 495), -INT32_C( 429), -INT32_C( 643), INT32_C( 202), -INT32_C( 175),
|
||||
-INT32_C( 310), -INT32_C( 450), -INT32_C( 294), -INT32_C( 198), -INT32_C( 134), INT32_C( 208), -INT32_C( 388), -INT32_C( 792) } },
|
||||
};
|
||||
|
||||
for (size_t i = 0 ; i < (sizeof(test_vec) / sizeof(test_vec[0])) ; i++) {
|
||||
simde__m512 a = simde_mm512_loadu_ps(test_vec[i].a);
|
||||
simde__m512i r = simde_mm512_cvttps_epi32(a);
|
||||
simde_test_x86_assert_equal_i32x16(r, simde_mm512_loadu_epi32(test_vec[i].r));
|
||||
}
|
||||
|
||||
return 0;
|
||||
#else
|
||||
fputc('\n', stdout);
|
||||
for (int i = 0 ; i < 8 ; i++) {
|
||||
simde__m512 a = simde_test_x86_random_f32x16(-SIMDE_FLOAT32_C(1000.0), SIMDE_FLOAT32_C(1000.0));
|
||||
simde__m512i r = simde_mm512_cvttps_epi32(a);
|
||||
|
||||
simde_test_x86_write_f32x16(2, a, SIMDE_TEST_VEC_POS_FIRST);
|
||||
simde_test_x86_write_i32x16(2, r, SIMDE_TEST_VEC_POS_LAST);
|
||||
}
|
||||
return 1;
|
||||
#endif
|
||||
}
|
||||
|
||||
SIMDE_TEST_FUNC_LIST_BEGIN
|
||||
SIMDE_TEST_FUNC_LIST_ENTRY(mm_cvttpd_epi64)
|
||||
SIMDE_TEST_FUNC_LIST_ENTRY(mm_mask_cvttpd_epi64)
|
||||
SIMDE_TEST_FUNC_LIST_ENTRY(mm_maskz_cvttpd_epi64)
|
||||
SIMDE_TEST_FUNC_LIST_ENTRY(mm512_cvttps_epi32)
|
||||
SIMDE_TEST_FUNC_LIST_END
|
||||
|
||||
#include <test/x86/avx512/test-avx512-footer.h>
|
||||
|
|
|
|||
165
thirdparty/simde/test/x86/avx512/cvtus.c
vendored
Normal file
165
thirdparty/simde/test/x86/avx512/cvtus.c
vendored
Normal file
|
|
@ -0,0 +1,165 @@
|
|||
/* SPDX-License-Identifier: MIT
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person
|
||||
* obtaining a copy of this software and associated documentation
|
||||
* files (the "Software"), to deal in the Software without
|
||||
* restriction, including without limitation the rights to use, copy,
|
||||
* modify, merge, publish, distribute, sublicense, and/or sell copies
|
||||
* of the Software, and to permit persons to whom the Software is
|
||||
* furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be
|
||||
* included in all copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
|
||||
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
|
||||
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
|
||||
* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
|
||||
* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
|
||||
* SOFTWARE.
|
||||
*
|
||||
* Copyright:
|
||||
* 2023 Michael R. Crusoe <crusoe@debian.org>
|
||||
*/
|
||||
|
||||
#define SIMDE_TEST_X86_AVX512_INSN cvtus
|
||||
|
||||
#include <test/x86/avx512/test-avx512.h>
|
||||
#include <simde/x86/avx512/set.h>
|
||||
#include <simde/x86/avx512/cvtus.h>
|
||||
|
||||
static int
|
||||
test_simde_mm512_mask_cvtusepi32_storeu_epi8(SIMDE_MUNIT_TEST_ARGS) {
|
||||
#if 1
|
||||
const struct {
|
||||
int8_t src[32];
|
||||
simde__mmask16 k;
|
||||
int32_t a[16];
|
||||
int8_t r[32];
|
||||
} test_vec[8] = {
|
||||
{ { INT8_C( 85), -INT8_C( 10), INT8_C( 115), -INT8_C( 9), -INT8_C( 42), -INT8_C( 127), INT8_C( 18), -INT8_C( 60),
|
||||
INT8_C( 44), INT8_C( 72), -INT8_C( 8), INT8_C( 57), INT8_C( 31), INT8_C( 33), -INT8_C( 3), INT8_C( 102),
|
||||
INT8_C( 107), INT8_C( 109), -INT8_C( 43), INT8_C( 36), -INT8_C( 38), -INT8_C( 14), INT8_C( 0), -INT8_C( 120),
|
||||
-INT8_C( 88), -INT8_C( 47), -INT8_C( 52), -INT8_C( 101), -INT8_C( 97), INT8_C( 18), INT8_MIN, -INT8_C( 12) },
|
||||
UINT16_C(62217),
|
||||
{ -INT32_C( 42672149), -INT32_C( 1689869917), -INT32_C( 675453478), -INT32_C( 1589368629), INT32_C( 1284710220), INT32_C( 1931295911), INT32_C( 1468382423), -INT32_C( 1672769872),
|
||||
INT32_C( 295288686), INT32_C( 1001250656), INT32_C( 269642309), -INT32_C( 558803054), INT32_C( 489309558), INT32_C( 1485850497), -INT32_C( 1280305917), INT32_C( 307231652) },
|
||||
{ -INT8_C( 1), -INT8_C( 10), INT8_C( 115), -INT8_C( 1), -INT8_C( 42), -INT8_C( 127), INT8_C( 18), -INT8_C( 60),
|
||||
-INT8_C( 1), -INT8_C( 1), -INT8_C( 8), INT8_C( 57), -INT8_C( 1), -INT8_C( 1), -INT8_C( 1), -INT8_C( 1),
|
||||
INT8_C( 107), INT8_C( 109), -INT8_C( 43), INT8_C( 36), -INT8_C( 38), -INT8_C( 14), INT8_C( 0), -INT8_C( 120),
|
||||
-INT8_C( 88), -INT8_C( 47), -INT8_C( 52), -INT8_C( 101), -INT8_C( 97), INT8_C( 18), INT8_MIN, -INT8_C( 12) } },
|
||||
{ { -INT8_C( 70), -INT8_C( 23), INT8_C( 35), INT8_C( 27), -INT8_C( 56), -INT8_C( 48), INT8_C( 86), INT8_C( 13),
|
||||
INT8_C( 58), INT8_C( 104), INT8_C( 30), -INT8_C( 52), -INT8_C( 65), -INT8_C( 49), -INT8_C( 86), INT8_C( 53),
|
||||
INT8_C( 20), -INT8_C( 44), INT8_C( 82), -INT8_C( 107), INT8_C( 27), -INT8_C( 30), -INT8_C( 18), INT8_C( 30),
|
||||
-INT8_C( 8), -INT8_C( 98), -INT8_C( 46), -INT8_C( 100), -INT8_C( 103), INT8_C( 33), -INT8_C( 82), INT8_C( 83) },
|
||||
UINT16_C(53514),
|
||||
{ -INT32_C( 995962002), -INT32_C( 30548768), INT32_C( 1406069929), INT32_C( 1948836386), INT32_C( 1716994936), INT32_C( 872697698), -INT32_C( 1722442261), INT32_C( 1600807152),
|
||||
INT32_C( 321063987), -INT32_C( 1844293399), INT32_C( 1608900669), INT32_C( 986910146), -INT32_C( 1281349039), INT32_C( 1692902521), INT32_C( 855456833), -INT32_C( 812554084) },
|
||||
{ -INT8_C( 70), -INT8_C( 1), INT8_C( 35), -INT8_C( 1), -INT8_C( 56), -INT8_C( 48), INT8_C( 86), INT8_C( 13),
|
||||
-INT8_C( 1), INT8_C( 104), INT8_C( 30), -INT8_C( 52), -INT8_C( 1), -INT8_C( 49), -INT8_C( 1), -INT8_C( 1),
|
||||
INT8_C( 20), -INT8_C( 44), INT8_C( 82), -INT8_C( 107), INT8_C( 27), -INT8_C( 30), -INT8_C( 18), INT8_C( 30),
|
||||
-INT8_C( 8), -INT8_C( 98), -INT8_C( 46), -INT8_C( 100), -INT8_C( 103), INT8_C( 33), -INT8_C( 82), INT8_C( 83) } },
|
||||
{ { INT8_C( 116), -INT8_C( 76), -INT8_C( 29), INT8_C( 93), INT8_C( 5), -INT8_C( 11), -INT8_C( 17), INT8_C( 66),
|
||||
-INT8_C( 43), -INT8_C( 43), -INT8_C( 95), -INT8_C( 105), -INT8_C( 30), INT8_C( 116), -INT8_C( 46), INT8_C( 51),
|
||||
-INT8_C( 97), INT8_C( 114), -INT8_C( 26), INT8_C( 24), INT8_C( 23), -INT8_C( 51), INT8_C( 125), INT8_C( 88),
|
||||
INT8_C( 10), INT8_C( 122), -INT8_C( 118), -INT8_C( 90), -INT8_C( 30), INT8_C( 27), INT8_C( 118), INT8_C( 87) },
|
||||
UINT16_C(22992),
|
||||
{ -INT32_C( 1538337356), -INT32_C( 1200020713), -INT32_C( 1943249990), INT32_C( 1979698063), INT32_C( 1631786724), -INT32_C( 103068306), INT32_C( 1762967283), -INT32_C( 909974507),
|
||||
-INT32_C( 798158663), -INT32_C( 293018061), -INT32_C( 780487358), INT32_C( 1682340224), -INT32_C( 20608625), -INT32_C( 889740842), INT32_C( 1949502303), -INT32_C( 1455556880) },
|
||||
{ INT8_C( 116), -INT8_C( 76), -INT8_C( 29), INT8_C( 93), -INT8_C( 1), -INT8_C( 11), -INT8_C( 1), -INT8_C( 1),
|
||||
-INT8_C( 1), -INT8_C( 43), -INT8_C( 95), -INT8_C( 1), -INT8_C( 1), INT8_C( 116), -INT8_C( 1), INT8_C( 51),
|
||||
-INT8_C( 97), INT8_C( 114), -INT8_C( 26), INT8_C( 24), INT8_C( 23), -INT8_C( 51), INT8_C( 125), INT8_C( 88),
|
||||
INT8_C( 10), INT8_C( 122), -INT8_C( 118), -INT8_C( 90), -INT8_C( 30), INT8_C( 27), INT8_C( 118), INT8_C( 87) } },
|
||||
{ { INT8_C( 6), -INT8_C( 85), INT8_C( 122), INT8_C( 58), -INT8_C( 111), INT8_C( 2), INT8_C( 40), -INT8_C( 45),
|
||||
-INT8_C( 73), -INT8_C( 94), -INT8_C( 92), INT8_C( 56), INT8_C( 28), -INT8_C( 21), -INT8_C( 100), -INT8_C( 85),
|
||||
INT8_C( 116), INT8_C( 98), -INT8_C( 87), INT8_C( 75), INT8_C( 3), -INT8_C( 96), INT8_C( 21), INT8_C( 98),
|
||||
-INT8_C( 84), INT8_C( 72), -INT8_C( 42), -INT8_C( 100), INT8_C( 62), INT8_C( 19), INT8_C( 69), INT8_C( 69) },
|
||||
UINT16_C(49086),
|
||||
{ -INT32_C( 1480437633), -INT32_C( 934708957), INT32_C( 1320379825), -INT32_C( 1162860783), -INT32_C( 2024033422), -INT32_C( 338688235), -INT32_C( 386003293), -INT32_C( 760693421),
|
||||
INT32_C( 813263373), -INT32_C( 1778859037), INT32_C( 971221800), INT32_C( 1173656531), INT32_C( 1540181830), -INT32_C( 112812714), -INT32_C( 2014037), INT32_C( 248613121) },
|
||||
{ INT8_C( 6), -INT8_C( 1), -INT8_C( 1), -INT8_C( 1), -INT8_C( 1), -INT8_C( 1), INT8_C( 40), -INT8_C( 1),
|
||||
-INT8_C( 1), -INT8_C( 1), -INT8_C( 1), -INT8_C( 1), -INT8_C( 1), -INT8_C( 1), -INT8_C( 100), -INT8_C( 1),
|
||||
INT8_C( 116), INT8_C( 98), -INT8_C( 87), INT8_C( 75), INT8_C( 3), -INT8_C( 96), INT8_C( 21), INT8_C( 98),
|
||||
-INT8_C( 84), INT8_C( 72), -INT8_C( 42), -INT8_C( 100), INT8_C( 62), INT8_C( 19), INT8_C( 69), INT8_C( 69) } },
|
||||
{ { -INT8_C( 13), INT8_C( 75), INT8_C( 63), -INT8_C( 41), INT8_C( 14), INT8_C( 55), INT8_C( 108), INT8_C( 54),
|
||||
-INT8_C( 29), INT8_C( 79), INT8_C( 112), -INT8_C( 74), -INT8_C( 30), INT8_C( 100), -INT8_C( 5), INT8_C( 40),
|
||||
-INT8_C( 77), -INT8_C( 56), -INT8_C( 125), INT8_C( 9), INT8_C( 101), -INT8_C( 55), INT8_C( 2), INT8_C( 17),
|
||||
INT8_C( 13), -INT8_C( 29), INT8_C( 16), INT8_C( 15), INT8_C( 109), -INT8_C( 31), INT8_C( 29), INT8_C( 96) },
|
||||
UINT16_C(23596),
|
||||
{ -INT32_C( 1550566857), -INT32_C( 504203407), INT32_C( 675664941), INT32_C( 2146564348), INT32_C( 55072257), INT32_C( 2011584103), -INT32_C( 2108075163), -INT32_C( 337672780),
|
||||
INT32_C( 831484864), INT32_C( 387088874), INT32_C( 1379882838), INT32_C( 1355952207), -INT32_C( 296543609), -INT32_C( 714720912), INT32_C( 1096335245), INT32_C( 70006596) },
|
||||
{ -INT8_C( 13), INT8_C( 75), -INT8_C( 1), -INT8_C( 1), INT8_C( 14), -INT8_C( 1), INT8_C( 108), INT8_C( 54),
|
||||
-INT8_C( 29), INT8_C( 79), -INT8_C( 1), -INT8_C( 1), -INT8_C( 1), INT8_C( 100), -INT8_C( 1), INT8_C( 40),
|
||||
-INT8_C( 77), -INT8_C( 56), -INT8_C( 125), INT8_C( 9), INT8_C( 101), -INT8_C( 55), INT8_C( 2), INT8_C( 17),
|
||||
INT8_C( 13), -INT8_C( 29), INT8_C( 16), INT8_C( 15), INT8_C( 109), -INT8_C( 31), INT8_C( 29), INT8_C( 96) } },
|
||||
{ { -INT8_C( 86), -INT8_C( 69), INT8_C( 53), -INT8_C( 108), INT8_C( 61), INT8_C( 71), -INT8_C( 85), -INT8_C( 109),
|
||||
-INT8_C( 98), -INT8_C( 22), -INT8_C( 27), -INT8_C( 19), INT8_C( 27), -INT8_C( 73), INT8_C( 61), -INT8_C( 94),
|
||||
-INT8_C( 46), -INT8_C( 112), -INT8_C( 112), INT8_C( 66), -INT8_C( 54), -INT8_C( 10), INT8_C( 24), INT8_C( 87),
|
||||
-INT8_C( 75), INT8_C( 112), -INT8_C( 104), -INT8_C( 6), -INT8_C( 89), -INT8_C( 60), -INT8_C( 2), INT8_C( 81) },
|
||||
UINT16_C(13440),
|
||||
{ -INT32_C( 1870938651), INT32_C( 897194576), INT32_C( 1173198087), -INT32_C( 925515977), INT32_C( 431922945), -INT32_C( 1903594250), INT32_C( 1817391214), INT32_C( 1721815937),
|
||||
-INT32_C( 520741744), INT32_C( 1024815414), INT32_C( 1048707590), -INT32_C( 1022994239), -INT32_C( 287521545), -INT32_C( 1501796808), INT32_C( 403951510), INT32_C( 847164322) },
|
||||
{ -INT8_C( 86), -INT8_C( 69), INT8_C( 53), -INT8_C( 108), INT8_C( 61), INT8_C( 71), -INT8_C( 85), -INT8_C( 1),
|
||||
-INT8_C( 98), -INT8_C( 22), -INT8_C( 1), -INT8_C( 19), -INT8_C( 1), -INT8_C( 1), INT8_C( 61), -INT8_C( 94),
|
||||
-INT8_C( 46), -INT8_C( 112), -INT8_C( 112), INT8_C( 66), -INT8_C( 54), -INT8_C( 10), INT8_C( 24), INT8_C( 87),
|
||||
-INT8_C( 75), INT8_C( 112), -INT8_C( 104), -INT8_C( 6), -INT8_C( 89), -INT8_C( 60), -INT8_C( 2), INT8_C( 81) } },
|
||||
{ { -INT8_C( 49), INT8_C( 117), INT8_C( 18), INT8_C( 5), -INT8_C( 26), INT8_C( 40), INT8_C( 67), -INT8_C( 20),
|
||||
INT8_C( 42), -INT8_C( 59), INT8_C( 42), -INT8_C( 20), INT8_C( 29), INT8_C( 48), -INT8_C( 81), INT8_C( 21),
|
||||
-INT8_C( 11), -INT8_C( 117), INT8_C( 3), INT8_C( 45), -INT8_C( 15), INT8_MAX, -INT8_C( 44), -INT8_C( 120),
|
||||
INT8_C( 79), -INT8_C( 25), -INT8_C( 96), -INT8_C( 15), -INT8_C( 102), INT8_C( 30), INT8_C( 36), INT8_C( 106) },
|
||||
UINT16_C(13971),
|
||||
{ -INT32_C( 1302431377), -INT32_C( 1871148698), INT32_C( 616666485), -INT32_C( 1380993366), -INT32_C( 1221746205), -INT32_C( 912360407), -INT32_C( 1847117459), INT32_C( 315128739),
|
||||
INT32_C( 1522870004), INT32_C( 619396527), INT32_C( 2101914834), INT32_C( 1160444002), -INT32_C( 1023584359), INT32_C( 1099668435), INT32_C( 2010280660), -INT32_C( 494232851) },
|
||||
{ -INT8_C( 1), -INT8_C( 1), INT8_C( 18), INT8_C( 5), -INT8_C( 1), INT8_C( 40), INT8_C( 67), -INT8_C( 1),
|
||||
INT8_C( 42), -INT8_C( 1), -INT8_C( 1), -INT8_C( 20), -INT8_C( 1), -INT8_C( 1), -INT8_C( 81), INT8_C( 21),
|
||||
-INT8_C( 11), -INT8_C( 117), INT8_C( 3), INT8_C( 45), -INT8_C( 15), INT8_MAX, -INT8_C( 44), -INT8_C( 120),
|
||||
INT8_C( 79), -INT8_C( 25), -INT8_C( 96), -INT8_C( 15), -INT8_C( 102), INT8_C( 30), INT8_C( 36), INT8_C( 106) } },
|
||||
{ { -INT8_C( 63), INT8_C( 79), INT8_C( 60), INT8_C( 112), -INT8_C( 116), INT8_C( 39), -INT8_C( 107), INT8_C( 94),
|
||||
-INT8_C( 45), -INT8_C( 35), -INT8_C( 37), INT8_C( 53), -INT8_C( 43), INT8_C( 6), INT8_C( 123), INT8_C( 110),
|
||||
INT8_C( 93), INT8_C( 120), INT8_C( 48), INT8_C( 49), INT8_C( 19), -INT8_C( 69), INT8_C( 114), -INT8_C( 24),
|
||||
INT8_C( 46), INT8_C( 68), INT8_C( 95), INT8_C( 27), -INT8_C( 33), -INT8_C( 23), -INT8_C( 3), -INT8_C( 96) },
|
||||
UINT16_C(14904),
|
||||
{ -INT32_C( 1520319472), -INT32_C( 24955613), -INT32_C( 452700054), -INT32_C( 144874809), INT32_C( 95646099), -INT32_C( 1203117735), -INT32_C( 90035972), -INT32_C( 650847544),
|
||||
-INT32_C( 1031891553), INT32_C( 901775818), INT32_C( 555402586), -INT32_C( 1172801497), INT32_C( 1119865833), -INT32_C( 1443231572), -INT32_C( 106718159), INT32_C( 382916471) },
|
||||
{ -INT8_C( 63), INT8_C( 79), INT8_C( 60), -INT8_C( 1), -INT8_C( 1), -INT8_C( 1), -INT8_C( 107), INT8_C( 94),
|
||||
-INT8_C( 45), -INT8_C( 1), -INT8_C( 37), -INT8_C( 1), -INT8_C( 1), -INT8_C( 1), INT8_C( 123), INT8_C( 110),
|
||||
INT8_C( 93), INT8_C( 120), INT8_C( 48), INT8_C( 49), INT8_C( 19), -INT8_C( 69), INT8_C( 114), -INT8_C( 24),
|
||||
INT8_C( 46), INT8_C( 68), INT8_C( 95), INT8_C( 27), -INT8_C( 33), -INT8_C( 23), -INT8_C( 3), -INT8_C( 96) } },
|
||||
};
|
||||
|
||||
for (size_t i = 0 ; i < (sizeof(test_vec) / sizeof(test_vec[0])); i++) {
|
||||
simde__m512i a = simde_mm512_loadu_epi32(test_vec[i].a);
|
||||
int8_t dst[32];
|
||||
simde_memcpy(dst, test_vec[i].src, sizeof(dst));
|
||||
simde_mm512_mask_cvtusepi32_storeu_epi8(dst, test_vec[i].k, a);
|
||||
simde_test_x86_assert_equal_i8x32(simde_mm256_loadu_epi8(dst), simde_mm256_loadu_epi8(test_vec[i].r));
|
||||
}
|
||||
|
||||
return 0;
|
||||
#else
|
||||
fputc('\n', stdout);
|
||||
for (int i = 0 ; i < 8 ; i++) {
|
||||
simde__m256i src = simde_test_x86_random_i8x32();
|
||||
simde__mmask16 k = simde_test_x86_random_mmask16();
|
||||
simde__m512i a = simde_test_x86_random_i32x16();
|
||||
int8_t r[32];
|
||||
simde_memcpy(r, &src, sizeof(r));
|
||||
simde_mm512_mask_cvtusepi32_storeu_epi8(r, k, a);
|
||||
|
||||
simde_test_x86_write_i8x32(2, src, SIMDE_TEST_VEC_POS_FIRST);
|
||||
simde_test_x86_write_mmask16(2, k, SIMDE_TEST_VEC_POS_MIDDLE);
|
||||
simde_test_x86_write_i32x16(2, a, SIMDE_TEST_VEC_POS_MIDDLE);
|
||||
simde_test_x86_write_i8x32(2, simde_mm256_loadu_epi8(r), SIMDE_TEST_VEC_POS_LAST);
|
||||
}
|
||||
|
||||
return 1;
|
||||
#endif
|
||||
}
|
||||
|
||||
SIMDE_TEST_FUNC_LIST_BEGIN
|
||||
SIMDE_TEST_FUNC_LIST_ENTRY(mm512_mask_cvtusepi32_storeu_epi8)
|
||||
SIMDE_TEST_FUNC_LIST_END
|
||||
|
||||
#include <test/x86/avx512/test-avx512-footer.h>
|
||||
82
thirdparty/simde/test/x86/avx512/dpbf16.c
vendored
82
thirdparty/simde/test/x86/avx512/dpbf16.c
vendored
|
|
@ -49,19 +49,19 @@ test_simde_mm_dpbf16_ps (SIMDE_MUNIT_TEST_ARGS) {
|
|||
};
|
||||
|
||||
for (size_t i = 0 ; i < (sizeof(test_vec) / sizeof(test_vec[0])) ; i++) {
|
||||
simde__m128 tmp;
|
||||
simde__m128 tmp, src, r;
|
||||
simde__m128bh a;
|
||||
simde__m128bh b;
|
||||
|
||||
simde__m128 src = simde_mm_loadu_ps(test_vec[i].src);
|
||||
src = simde_mm_loadu_ps(test_vec[i].src);
|
||||
|
||||
tmp = simde_mm_loadu_ps(test_vec[i].a);
|
||||
simde__m128bh a;
|
||||
simde_memcpy(&a, &tmp, sizeof(tmp));
|
||||
|
||||
tmp = simde_mm_loadu_ps(test_vec[i].b);
|
||||
simde__m128bh b;
|
||||
simde_memcpy(&b, &tmp, sizeof(tmp));
|
||||
|
||||
simde__m128 r = simde_mm_dpbf16_ps(src, a, b);
|
||||
r = simde_mm_dpbf16_ps(src, a, b);
|
||||
simde_test_x86_assert_equal_f32x4(r, simde_mm_loadu_ps(test_vec[i].r), 1);
|
||||
}
|
||||
|
||||
|
|
@ -141,19 +141,18 @@ test_simde_mm_mask_dpbf16_ps (SIMDE_MUNIT_TEST_ARGS) {
|
|||
};
|
||||
|
||||
for (size_t i = 0 ; i < (sizeof(test_vec) / sizeof(test_vec[0])) ; i++) {
|
||||
simde__m128 tmp;
|
||||
simde__m128 tmp, src, r;
|
||||
simde__m128bh a, b;
|
||||
|
||||
simde__m128 src = simde_mm_loadu_ps(test_vec[i].src);
|
||||
src = simde_mm_loadu_ps(test_vec[i].src);
|
||||
|
||||
tmp = simde_mm_loadu_ps(test_vec[i].a);
|
||||
simde__m128bh a;
|
||||
simde_memcpy(&a, &tmp, sizeof(tmp));
|
||||
|
||||
tmp = simde_mm_loadu_ps(test_vec[i].b);
|
||||
simde__m128bh b;
|
||||
simde_memcpy(&b, &tmp, sizeof(tmp));
|
||||
|
||||
simde__m128 r = simde_mm_mask_dpbf16_ps(src, test_vec[i].k, a, b);
|
||||
r = simde_mm_mask_dpbf16_ps(src, test_vec[i].k, a, b);
|
||||
simde_test_x86_assert_equal_f32x4(r, simde_mm_loadu_ps(test_vec[i].r), 1);
|
||||
}
|
||||
|
||||
|
|
@ -235,19 +234,18 @@ test_simde_mm_maskz_dpbf16_ps (SIMDE_MUNIT_TEST_ARGS) {
|
|||
};
|
||||
|
||||
for (size_t i = 0 ; i < (sizeof(test_vec) / sizeof(test_vec[0])) ; i++) {
|
||||
simde__m128 tmp;
|
||||
simde__m128 tmp, src, r;
|
||||
simde__m128bh a, b;
|
||||
|
||||
simde__m128 src = simde_mm_loadu_ps(test_vec[i].src);
|
||||
src = simde_mm_loadu_ps(test_vec[i].src);
|
||||
|
||||
tmp = simde_mm_loadu_ps(test_vec[i].a);
|
||||
simde__m128bh a;
|
||||
simde_memcpy(&a, &tmp, sizeof(tmp));
|
||||
|
||||
tmp = simde_mm_loadu_ps(test_vec[i].b);
|
||||
simde__m128bh b;
|
||||
simde_memcpy(&b, &tmp, sizeof(tmp));
|
||||
|
||||
simde__m128 r = simde_mm_maskz_dpbf16_ps(test_vec[i].k, src, a, b);
|
||||
r = simde_mm_maskz_dpbf16_ps(test_vec[i].k, src, a, b);
|
||||
simde_test_x86_assert_equal_f32x4(r, simde_mm_loadu_ps(test_vec[i].r), 1);
|
||||
}
|
||||
|
||||
|
|
@ -352,19 +350,18 @@ test_simde_mm256_dpbf16_ps (SIMDE_MUNIT_TEST_ARGS) {
|
|||
};
|
||||
|
||||
for (size_t i = 0 ; i < (sizeof(test_vec) / sizeof(test_vec[0])) ; i++) {
|
||||
simde__m256 tmp;
|
||||
simde__m256 tmp, src, r;
|
||||
simde__m256bh a, b;
|
||||
|
||||
simde__m256 src = simde_mm256_loadu_ps(test_vec[i].src);
|
||||
src = simde_mm256_loadu_ps(test_vec[i].src);
|
||||
|
||||
tmp = simde_mm256_loadu_ps(test_vec[i].a);
|
||||
simde__m256bh a;
|
||||
simde_memcpy(&a, &tmp, sizeof(tmp));
|
||||
|
||||
tmp = simde_mm256_loadu_ps(test_vec[i].b);
|
||||
simde__m256bh b;
|
||||
simde_memcpy(&b, &tmp, sizeof(tmp));
|
||||
|
||||
simde__m256 r = simde_mm256_dpbf16_ps(src, a, b);
|
||||
r = simde_mm256_dpbf16_ps(src, a, b);
|
||||
simde_test_x86_assert_equal_f32x8(r, simde_mm256_loadu_ps(test_vec[i].r), 1);
|
||||
}
|
||||
|
||||
|
|
@ -474,19 +471,18 @@ test_simde_mm256_mask_dpbf16_ps (SIMDE_MUNIT_TEST_ARGS) {
|
|||
};
|
||||
|
||||
for (size_t i = 0 ; i < (sizeof(test_vec) / sizeof(test_vec[0])) ; i++) {
|
||||
simde__m256 tmp;
|
||||
simde__m256 tmp, src, r;
|
||||
simde__m256bh a, b;
|
||||
|
||||
simde__m256 src = simde_mm256_loadu_ps(test_vec[i].src);
|
||||
src = simde_mm256_loadu_ps(test_vec[i].src);
|
||||
|
||||
tmp = simde_mm256_loadu_ps(test_vec[i].a);
|
||||
simde__m256bh a;
|
||||
simde_memcpy(&a, &tmp, sizeof(tmp));
|
||||
|
||||
tmp = simde_mm256_loadu_ps(test_vec[i].b);
|
||||
simde__m256bh b;
|
||||
simde_memcpy(&b, &tmp, sizeof(tmp));
|
||||
|
||||
simde__m256 r = simde_mm256_mask_dpbf16_ps(src, test_vec[i].k, a, b);
|
||||
r = simde_mm256_mask_dpbf16_ps(src, test_vec[i].k, a, b);
|
||||
simde_test_x86_assert_equal_f32x8(r, simde_mm256_loadu_ps(test_vec[i].r), 1);
|
||||
}
|
||||
|
||||
|
|
@ -600,19 +596,18 @@ test_simde_mm256_maskz_dpbf16_ps (SIMDE_MUNIT_TEST_ARGS) {
|
|||
};
|
||||
|
||||
for (size_t i = 0 ; i < (sizeof(test_vec) / sizeof(test_vec[0])) ; i++) {
|
||||
simde__m256 tmp;
|
||||
simde__m256 tmp, src, r;
|
||||
simde__m256bh a, b;
|
||||
|
||||
simde__m256 src = simde_mm256_loadu_ps(test_vec[i].src);
|
||||
src = simde_mm256_loadu_ps(test_vec[i].src);
|
||||
|
||||
tmp = simde_mm256_loadu_ps(test_vec[i].a);
|
||||
simde__m256bh a;
|
||||
simde_memcpy(&a, &tmp, sizeof(tmp));
|
||||
|
||||
tmp = simde_mm256_loadu_ps(test_vec[i].b);
|
||||
simde__m256bh b;
|
||||
simde_memcpy(&b, &tmp, sizeof(tmp));
|
||||
|
||||
simde__m256 r = simde_mm256_maskz_dpbf16_ps(test_vec[i].k, src, a, b);
|
||||
r = simde_mm256_maskz_dpbf16_ps(test_vec[i].k, src, a, b);
|
||||
simde_test_x86_assert_equal_f32x8(r, simde_mm256_loadu_ps(test_vec[i].r), 1);
|
||||
}
|
||||
|
||||
|
|
@ -781,19 +776,18 @@ test_simde_mm512_dpbf16_ps (SIMDE_MUNIT_TEST_ARGS) {
|
|||
};
|
||||
|
||||
for (size_t i = 0 ; i < (sizeof(test_vec) / sizeof(test_vec[0])) ; i++) {
|
||||
simde__m512 tmp;
|
||||
simde__m512 tmp, src, r;
|
||||
simde__m512bh a, b;
|
||||
|
||||
simde__m512 src = simde_mm512_loadu_ps(test_vec[i].src);
|
||||
src = simde_mm512_loadu_ps(test_vec[i].src);
|
||||
|
||||
tmp = simde_mm512_loadu_ps(test_vec[i].a);
|
||||
simde__m512bh a;
|
||||
simde_memcpy(&a, &tmp, sizeof(tmp));
|
||||
|
||||
tmp = simde_mm512_loadu_ps(test_vec[i].b);
|
||||
simde__m512bh b;
|
||||
simde_memcpy(&b, &tmp, sizeof(tmp));
|
||||
|
||||
simde__m512 r = simde_mm512_dpbf16_ps(src, a, b);
|
||||
r = simde_mm512_dpbf16_ps(src, a, b);
|
||||
simde_test_x86_assert_equal_f32x16(r, simde_mm512_loadu_ps(test_vec[i].r), 1);
|
||||
}
|
||||
|
||||
|
|
@ -967,19 +961,18 @@ test_simde_mm512_mask_dpbf16_ps (SIMDE_MUNIT_TEST_ARGS) {
|
|||
};
|
||||
|
||||
for (size_t i = 0 ; i < (sizeof(test_vec) / sizeof(test_vec[0])) ; i++) {
|
||||
simde__m512 tmp;
|
||||
simde__m512 tmp, src, r;
|
||||
simde__m512bh a, b;
|
||||
|
||||
simde__m512 src = simde_mm512_loadu_ps(test_vec[i].src);
|
||||
src = simde_mm512_loadu_ps(test_vec[i].src);
|
||||
|
||||
tmp = simde_mm512_loadu_ps(test_vec[i].a);
|
||||
simde__m512bh a;
|
||||
simde_memcpy(&a, &tmp, sizeof(tmp));
|
||||
|
||||
tmp = simde_mm512_loadu_ps(test_vec[i].b);
|
||||
simde__m512bh b;
|
||||
simde_memcpy(&b, &tmp, sizeof(tmp));
|
||||
|
||||
simde__m512 r = simde_mm512_mask_dpbf16_ps(src, test_vec[i].k, a, b);
|
||||
r = simde_mm512_mask_dpbf16_ps(src, test_vec[i].k, a, b);
|
||||
simde_test_x86_assert_equal_f32x16(r, simde_mm512_loadu_ps(test_vec[i].r), 1);
|
||||
}
|
||||
|
||||
|
|
@ -1157,19 +1150,18 @@ test_simde_mm512_maskz_dpbf16_ps (SIMDE_MUNIT_TEST_ARGS) {
|
|||
};
|
||||
|
||||
for (size_t i = 0 ; i < (sizeof(test_vec) / sizeof(test_vec[0])) ; i++) {
|
||||
simde__m512 tmp;
|
||||
simde__m512 tmp, src, r;
|
||||
simde__m512bh a, b;
|
||||
|
||||
simde__m512 src = simde_mm512_loadu_ps(test_vec[i].src);
|
||||
src = simde_mm512_loadu_ps(test_vec[i].src);
|
||||
|
||||
tmp = simde_mm512_loadu_ps(test_vec[i].a);
|
||||
simde__m512bh a;
|
||||
simde_memcpy(&a, &tmp, sizeof(tmp));
|
||||
|
||||
tmp = simde_mm512_loadu_ps(test_vec[i].b);
|
||||
simde__m512bh b;
|
||||
simde_memcpy(&b, &tmp, sizeof(tmp));
|
||||
|
||||
simde__m512 r = simde_mm512_maskz_dpbf16_ps(test_vec[i].k, src, a, b);
|
||||
r = simde_mm512_maskz_dpbf16_ps(test_vec[i].k, src, a, b);
|
||||
simde_test_x86_assert_equal_f32x16(r, simde_mm512_loadu_ps(test_vec[i].r), 1);
|
||||
}
|
||||
|
||||
|
|
|
|||
408
thirdparty/simde/test/x86/avx512/extract.c
vendored
408
thirdparty/simde/test/x86/avx512/extract.c
vendored
|
|
@ -23,6 +23,7 @@
|
|||
* Copyright:
|
||||
* 2020 Evan Nemerson <evan@nemerson.com>
|
||||
* 2020 Christopher Moore <moore@free.fr>
|
||||
* 2023 Michael R. Crusoe <crusoe@debian.org>
|
||||
*/
|
||||
|
||||
#define SIMDE_TEST_X86_AVX512_INSN extract
|
||||
|
|
@ -31,6 +32,74 @@
|
|||
#include <simde/x86/avx512/set.h>
|
||||
#include <simde/x86/avx512/extract.h>
|
||||
|
||||
static int
|
||||
test_simde_mm256_extractf32x4_ps(SIMDE_MUNIT_TEST_ARGS) {
|
||||
#if 1
|
||||
const struct {
|
||||
simde_float32 a[16];
|
||||
simde_float32 r0[8];
|
||||
simde_float32 r1[8];
|
||||
} test_vec[8] = {
|
||||
{ { SIMDE_FLOAT32_C( -570.03), SIMDE_FLOAT32_C( 423.11), SIMDE_FLOAT32_C( -393.19), SIMDE_FLOAT32_C( 843.13),
|
||||
SIMDE_FLOAT32_C( -89.57), SIMDE_FLOAT32_C( 858.49), SIMDE_FLOAT32_C( -463.54), SIMDE_FLOAT32_C( 442.40) },
|
||||
{ SIMDE_FLOAT32_C( -570.03), SIMDE_FLOAT32_C( 423.11), SIMDE_FLOAT32_C( -393.19), SIMDE_FLOAT32_C( 843.13) },
|
||||
{ SIMDE_FLOAT32_C( -89.57), SIMDE_FLOAT32_C( 858.49), SIMDE_FLOAT32_C( -463.54), SIMDE_FLOAT32_C( 442.40) } },
|
||||
{ { SIMDE_FLOAT32_C( -582.78), SIMDE_FLOAT32_C( 289.55), SIMDE_FLOAT32_C( -399.81), SIMDE_FLOAT32_C( 888.75),
|
||||
SIMDE_FLOAT32_C( -410.50), SIMDE_FLOAT32_C( -966.52), SIMDE_FLOAT32_C( 140.52), SIMDE_FLOAT32_C( 33.19) },
|
||||
{ SIMDE_FLOAT32_C( -582.78), SIMDE_FLOAT32_C( 289.55), SIMDE_FLOAT32_C( -399.81), SIMDE_FLOAT32_C( 888.75) },
|
||||
{ SIMDE_FLOAT32_C( -410.50), SIMDE_FLOAT32_C( -966.52), SIMDE_FLOAT32_C( 140.52), SIMDE_FLOAT32_C( 33.19) } },
|
||||
{ { SIMDE_FLOAT32_C( 367.98), SIMDE_FLOAT32_C( -814.08), SIMDE_FLOAT32_C( -588.81), SIMDE_FLOAT32_C( -661.15),
|
||||
SIMDE_FLOAT32_C( 856.72), SIMDE_FLOAT32_C( -526.07), SIMDE_FLOAT32_C( -509.65), SIMDE_FLOAT32_C( -47.59) },
|
||||
{ SIMDE_FLOAT32_C( 367.98), SIMDE_FLOAT32_C( -814.08), SIMDE_FLOAT32_C( -588.81), SIMDE_FLOAT32_C( -661.15) },
|
||||
{ SIMDE_FLOAT32_C( 856.72), SIMDE_FLOAT32_C( -526.07), SIMDE_FLOAT32_C( -509.65), SIMDE_FLOAT32_C( -47.59) } },
|
||||
{ { SIMDE_FLOAT32_C( 706.28), SIMDE_FLOAT32_C( 465.87), SIMDE_FLOAT32_C( -423.66), SIMDE_FLOAT32_C( -460.40),
|
||||
SIMDE_FLOAT32_C( 212.75), SIMDE_FLOAT32_C( -32.59), SIMDE_FLOAT32_C( 446.63), SIMDE_FLOAT32_C( 642.73) },
|
||||
{ SIMDE_FLOAT32_C( 706.28), SIMDE_FLOAT32_C( 465.87), SIMDE_FLOAT32_C( -423.66), SIMDE_FLOAT32_C( -460.40) },
|
||||
{ SIMDE_FLOAT32_C( 212.75), SIMDE_FLOAT32_C( -32.59), SIMDE_FLOAT32_C( 446.63), SIMDE_FLOAT32_C( 642.73) } },
|
||||
{ { SIMDE_FLOAT32_C( -609.48), SIMDE_FLOAT32_C( -946.56), SIMDE_FLOAT32_C( 485.86), SIMDE_FLOAT32_C( 300.96),
|
||||
SIMDE_FLOAT32_C( 911.93), SIMDE_FLOAT32_C( -977.68), SIMDE_FLOAT32_C( -256.65), SIMDE_FLOAT32_C( -670.85) },
|
||||
{ SIMDE_FLOAT32_C( -609.48), SIMDE_FLOAT32_C( -946.56), SIMDE_FLOAT32_C( 485.86), SIMDE_FLOAT32_C( 300.96) },
|
||||
{ SIMDE_FLOAT32_C( 911.93), SIMDE_FLOAT32_C( -977.68), SIMDE_FLOAT32_C( -256.65), SIMDE_FLOAT32_C( -670.85) } },
|
||||
{ { SIMDE_FLOAT32_C( 311.87), SIMDE_FLOAT32_C( 343.54), SIMDE_FLOAT32_C( -782.11), SIMDE_FLOAT32_C( 901.37),
|
||||
SIMDE_FLOAT32_C( 377.02), SIMDE_FLOAT32_C( 358.42), SIMDE_FLOAT32_C( -65.44), SIMDE_FLOAT32_C( -255.00) },
|
||||
{ SIMDE_FLOAT32_C( 311.87), SIMDE_FLOAT32_C( 343.54), SIMDE_FLOAT32_C( -782.11), SIMDE_FLOAT32_C( 901.37) },
|
||||
{ SIMDE_FLOAT32_C( 377.02), SIMDE_FLOAT32_C( 358.42), SIMDE_FLOAT32_C( -65.44), SIMDE_FLOAT32_C( -255.00) } },
|
||||
{ { SIMDE_FLOAT32_C( 544.34), SIMDE_FLOAT32_C( 345.75), SIMDE_FLOAT32_C( 83.86), SIMDE_FLOAT32_C( 401.06),
|
||||
SIMDE_FLOAT32_C( 819.68), SIMDE_FLOAT32_C( 574.20), SIMDE_FLOAT32_C( -646.53), SIMDE_FLOAT32_C( 525.96) },
|
||||
{ SIMDE_FLOAT32_C( 544.34), SIMDE_FLOAT32_C( 345.75), SIMDE_FLOAT32_C( 83.86), SIMDE_FLOAT32_C( 401.06) },
|
||||
{ SIMDE_FLOAT32_C( 819.68), SIMDE_FLOAT32_C( 574.20), SIMDE_FLOAT32_C( -646.53), SIMDE_FLOAT32_C( 525.96) } },
|
||||
{ { SIMDE_FLOAT32_C( 40.07), SIMDE_FLOAT32_C( -70.19), SIMDE_FLOAT32_C( -934.43), SIMDE_FLOAT32_C( -747.18),
|
||||
SIMDE_FLOAT32_C( 897.23), SIMDE_FLOAT32_C( 512.20), SIMDE_FLOAT32_C( 895.55), SIMDE_FLOAT32_C( -712.25) },
|
||||
{ SIMDE_FLOAT32_C( 40.07), SIMDE_FLOAT32_C( -70.19), SIMDE_FLOAT32_C( -934.43), SIMDE_FLOAT32_C( -747.18) },
|
||||
{ SIMDE_FLOAT32_C( 897.23), SIMDE_FLOAT32_C( 512.20), SIMDE_FLOAT32_C( 895.55), SIMDE_FLOAT32_C( -712.25) } },
|
||||
|
||||
};
|
||||
|
||||
for (size_t i = 0 ; i < (sizeof(test_vec) / sizeof(test_vec[0])); i++) {
|
||||
simde__m128 r;
|
||||
simde__m256 a = simde_mm256_loadu_ps(test_vec[i].a);
|
||||
r = simde_mm256_extractf32x4_ps(a, 0);
|
||||
simde_test_x86_assert_equal_f32x4(r, simde_mm_loadu_ps(test_vec[i].r0), 1);
|
||||
r = simde_mm256_extractf32x4_ps(a, 1);
|
||||
simde_test_x86_assert_equal_f32x4(r, simde_mm_loadu_ps(test_vec[i].r1), 1);
|
||||
}
|
||||
|
||||
return 0;
|
||||
#else
|
||||
fputc('\n', stdout);
|
||||
for (int i = 0 ; i < 8 ; i++) {
|
||||
simde__m256 a = simde_test_x86_random_f32x8(SIMDE_FLOAT32_C(-1000.0), SIMDE_FLOAT32_C(1000.0));
|
||||
simde__m128 r0 = simde_mm256_extractf32x4_ps(a, 0);
|
||||
simde__m128 r1 = simde_mm256_extractf32x4_ps(a, 1);
|
||||
|
||||
simde_test_x86_write_f32x8(2, a, SIMDE_TEST_VEC_POS_FIRST);
|
||||
simde_test_x86_write_f32x4(2, r0, SIMDE_TEST_VEC_POS_MIDDLE);
|
||||
simde_test_x86_write_f32x4(2, r1, SIMDE_TEST_VEC_POS_LAST);
|
||||
}
|
||||
return 1;
|
||||
#endif
|
||||
}
|
||||
|
||||
static int
|
||||
test_simde_mm512_extractf32x4_ps(SIMDE_MUNIT_TEST_ARGS) {
|
||||
const struct {
|
||||
|
|
@ -328,6 +397,105 @@ test_simde_mm512_maskz_extractf32x4_ps(SIMDE_MUNIT_TEST_ARGS) {
|
|||
return 0;
|
||||
}
|
||||
|
||||
static int
|
||||
test_simde_mm512_extractf32x8_ps(SIMDE_MUNIT_TEST_ARGS) {
|
||||
#if 1
|
||||
const struct {
|
||||
simde_float32 a[16];
|
||||
simde_float32 r0[8];
|
||||
simde_float32 r1[8];
|
||||
} test_vec[8] = {
|
||||
{ { SIMDE_FLOAT32_C( -912.95), SIMDE_FLOAT32_C( 306.91), SIMDE_FLOAT32_C( -167.78), SIMDE_FLOAT32_C( 996.72),
|
||||
SIMDE_FLOAT32_C( -677.32), SIMDE_FLOAT32_C( -693.43), SIMDE_FLOAT32_C( 773.51), SIMDE_FLOAT32_C( 890.73),
|
||||
SIMDE_FLOAT32_C( 407.16), SIMDE_FLOAT32_C( 411.07), SIMDE_FLOAT32_C( -686.96), SIMDE_FLOAT32_C( 165.05),
|
||||
SIMDE_FLOAT32_C( -183.16), SIMDE_FLOAT32_C( -543.66), SIMDE_FLOAT32_C( 960.76), SIMDE_FLOAT32_C( -123.22) },
|
||||
{ SIMDE_FLOAT32_C( -912.95), SIMDE_FLOAT32_C( 306.91), SIMDE_FLOAT32_C( -167.78), SIMDE_FLOAT32_C( 996.72),
|
||||
SIMDE_FLOAT32_C( -677.32), SIMDE_FLOAT32_C( -693.43), SIMDE_FLOAT32_C( 773.51), SIMDE_FLOAT32_C( 890.73) },
|
||||
{ SIMDE_FLOAT32_C( 407.16), SIMDE_FLOAT32_C( 411.07), SIMDE_FLOAT32_C( -686.96), SIMDE_FLOAT32_C( 165.05),
|
||||
SIMDE_FLOAT32_C( -183.16), SIMDE_FLOAT32_C( -543.66), SIMDE_FLOAT32_C( 960.76), SIMDE_FLOAT32_C( -123.22) } },
|
||||
{ { SIMDE_FLOAT32_C( -995.16), SIMDE_FLOAT32_C( -739.23), SIMDE_FLOAT32_C( -156.50), SIMDE_FLOAT32_C( -456.71),
|
||||
SIMDE_FLOAT32_C( 956.69), SIMDE_FLOAT32_C( -734.68), SIMDE_FLOAT32_C( 325.52), SIMDE_FLOAT32_C( -515.39),
|
||||
SIMDE_FLOAT32_C( -858.67), SIMDE_FLOAT32_C( -158.37), SIMDE_FLOAT32_C( 442.04), SIMDE_FLOAT32_C( -120.80),
|
||||
SIMDE_FLOAT32_C( -186.22), SIMDE_FLOAT32_C( 439.75), SIMDE_FLOAT32_C( 843.07), SIMDE_FLOAT32_C( -99.17) },
|
||||
{ SIMDE_FLOAT32_C( -995.16), SIMDE_FLOAT32_C( -739.23), SIMDE_FLOAT32_C( -156.50), SIMDE_FLOAT32_C( -456.71),
|
||||
SIMDE_FLOAT32_C( 956.69), SIMDE_FLOAT32_C( -734.68), SIMDE_FLOAT32_C( 325.52), SIMDE_FLOAT32_C( -515.39) },
|
||||
{ SIMDE_FLOAT32_C( -858.67), SIMDE_FLOAT32_C( -158.37), SIMDE_FLOAT32_C( 442.04), SIMDE_FLOAT32_C( -120.80),
|
||||
SIMDE_FLOAT32_C( -186.22), SIMDE_FLOAT32_C( 439.75), SIMDE_FLOAT32_C( 843.07), SIMDE_FLOAT32_C( -99.17) } },
|
||||
{ { SIMDE_FLOAT32_C( -253.35), SIMDE_FLOAT32_C( -324.72), SIMDE_FLOAT32_C( -102.45), SIMDE_FLOAT32_C( 69.33),
|
||||
SIMDE_FLOAT32_C( -18.15), SIMDE_FLOAT32_C( -328.94), SIMDE_FLOAT32_C( -39.94), SIMDE_FLOAT32_C( -610.99),
|
||||
SIMDE_FLOAT32_C( -917.87), SIMDE_FLOAT32_C( 273.10), SIMDE_FLOAT32_C( 554.07), SIMDE_FLOAT32_C( -101.03),
|
||||
SIMDE_FLOAT32_C( 729.44), SIMDE_FLOAT32_C( 514.83), SIMDE_FLOAT32_C( 775.75), SIMDE_FLOAT32_C( 734.28) },
|
||||
{ SIMDE_FLOAT32_C( -253.35), SIMDE_FLOAT32_C( -324.72), SIMDE_FLOAT32_C( -102.45), SIMDE_FLOAT32_C( 69.33),
|
||||
SIMDE_FLOAT32_C( -18.15), SIMDE_FLOAT32_C( -328.94), SIMDE_FLOAT32_C( -39.94), SIMDE_FLOAT32_C( -610.99) },
|
||||
{ SIMDE_FLOAT32_C( -917.87), SIMDE_FLOAT32_C( 273.10), SIMDE_FLOAT32_C( 554.07), SIMDE_FLOAT32_C( -101.03),
|
||||
SIMDE_FLOAT32_C( 729.44), SIMDE_FLOAT32_C( 514.83), SIMDE_FLOAT32_C( 775.75), SIMDE_FLOAT32_C( 734.28) } },
|
||||
{ { SIMDE_FLOAT32_C( 775.60), SIMDE_FLOAT32_C( -380.75), SIMDE_FLOAT32_C( -722.43), SIMDE_FLOAT32_C( 732.29),
|
||||
SIMDE_FLOAT32_C( -115.42), SIMDE_FLOAT32_C( 603.09), SIMDE_FLOAT32_C( -783.11), SIMDE_FLOAT32_C( 25.91),
|
||||
SIMDE_FLOAT32_C( -555.28), SIMDE_FLOAT32_C( 658.93), SIMDE_FLOAT32_C( 905.10), SIMDE_FLOAT32_C( 258.49),
|
||||
SIMDE_FLOAT32_C( 98.68), SIMDE_FLOAT32_C( 748.17), SIMDE_FLOAT32_C( -840.67), SIMDE_FLOAT32_C( 845.34) },
|
||||
{ SIMDE_FLOAT32_C( 775.60), SIMDE_FLOAT32_C( -380.75), SIMDE_FLOAT32_C( -722.43), SIMDE_FLOAT32_C( 732.29),
|
||||
SIMDE_FLOAT32_C( -115.42), SIMDE_FLOAT32_C( 603.09), SIMDE_FLOAT32_C( -783.11), SIMDE_FLOAT32_C( 25.91) },
|
||||
{ SIMDE_FLOAT32_C( -555.28), SIMDE_FLOAT32_C( 658.93), SIMDE_FLOAT32_C( 905.10), SIMDE_FLOAT32_C( 258.49),
|
||||
SIMDE_FLOAT32_C( 98.68), SIMDE_FLOAT32_C( 748.17), SIMDE_FLOAT32_C( -840.67), SIMDE_FLOAT32_C( 845.34) } },
|
||||
{ { SIMDE_FLOAT32_C( -576.54), SIMDE_FLOAT32_C( 56.88), SIMDE_FLOAT32_C( -85.33), SIMDE_FLOAT32_C( 405.31),
|
||||
SIMDE_FLOAT32_C( 727.94), SIMDE_FLOAT32_C( 874.73), SIMDE_FLOAT32_C( 794.32), SIMDE_FLOAT32_C( 810.07),
|
||||
SIMDE_FLOAT32_C( 147.83), SIMDE_FLOAT32_C( 348.39), SIMDE_FLOAT32_C( -290.97), SIMDE_FLOAT32_C( -122.73),
|
||||
SIMDE_FLOAT32_C( -136.78), SIMDE_FLOAT32_C( -515.22), SIMDE_FLOAT32_C( -388.45), SIMDE_FLOAT32_C( -361.18) },
|
||||
{ SIMDE_FLOAT32_C( -576.54), SIMDE_FLOAT32_C( 56.88), SIMDE_FLOAT32_C( -85.33), SIMDE_FLOAT32_C( 405.31),
|
||||
SIMDE_FLOAT32_C( 727.94), SIMDE_FLOAT32_C( 874.73), SIMDE_FLOAT32_C( 794.32), SIMDE_FLOAT32_C( 810.07) },
|
||||
{ SIMDE_FLOAT32_C( 147.83), SIMDE_FLOAT32_C( 348.39), SIMDE_FLOAT32_C( -290.97), SIMDE_FLOAT32_C( -122.73),
|
||||
SIMDE_FLOAT32_C( -136.78), SIMDE_FLOAT32_C( -515.22), SIMDE_FLOAT32_C( -388.45), SIMDE_FLOAT32_C( -361.18) } },
|
||||
{ { SIMDE_FLOAT32_C( 104.03), SIMDE_FLOAT32_C( -110.89), SIMDE_FLOAT32_C( -628.90), SIMDE_FLOAT32_C( 988.61),
|
||||
SIMDE_FLOAT32_C( -507.80), SIMDE_FLOAT32_C( -412.00), SIMDE_FLOAT32_C( 14.52), SIMDE_FLOAT32_C( -63.08),
|
||||
SIMDE_FLOAT32_C( -753.07), SIMDE_FLOAT32_C( -80.38), SIMDE_FLOAT32_C( -804.59), SIMDE_FLOAT32_C( 345.61),
|
||||
SIMDE_FLOAT32_C( -332.21), SIMDE_FLOAT32_C( -645.26), SIMDE_FLOAT32_C( 190.95), SIMDE_FLOAT32_C( 91.25) },
|
||||
{ SIMDE_FLOAT32_C( 104.03), SIMDE_FLOAT32_C( -110.89), SIMDE_FLOAT32_C( -628.90), SIMDE_FLOAT32_C( 988.61),
|
||||
SIMDE_FLOAT32_C( -507.80), SIMDE_FLOAT32_C( -412.00), SIMDE_FLOAT32_C( 14.52), SIMDE_FLOAT32_C( -63.08) },
|
||||
{ SIMDE_FLOAT32_C( -753.07), SIMDE_FLOAT32_C( -80.38), SIMDE_FLOAT32_C( -804.59), SIMDE_FLOAT32_C( 345.61),
|
||||
SIMDE_FLOAT32_C( -332.21), SIMDE_FLOAT32_C( -645.26), SIMDE_FLOAT32_C( 190.95), SIMDE_FLOAT32_C( 91.25) } },
|
||||
{ { SIMDE_FLOAT32_C( 411.62), SIMDE_FLOAT32_C( -894.38), SIMDE_FLOAT32_C( -503.45), SIMDE_FLOAT32_C( 139.56),
|
||||
SIMDE_FLOAT32_C( 980.35), SIMDE_FLOAT32_C( -709.13), SIMDE_FLOAT32_C( -50.38), SIMDE_FLOAT32_C( 128.18),
|
||||
SIMDE_FLOAT32_C( 639.26), SIMDE_FLOAT32_C( 658.66), SIMDE_FLOAT32_C( -994.55), SIMDE_FLOAT32_C( -497.52),
|
||||
SIMDE_FLOAT32_C( -856.57), SIMDE_FLOAT32_C( -383.00), SIMDE_FLOAT32_C( 141.29), SIMDE_FLOAT32_C( 247.46) },
|
||||
{ SIMDE_FLOAT32_C( 411.62), SIMDE_FLOAT32_C( -894.38), SIMDE_FLOAT32_C( -503.45), SIMDE_FLOAT32_C( 139.56),
|
||||
SIMDE_FLOAT32_C( 980.35), SIMDE_FLOAT32_C( -709.13), SIMDE_FLOAT32_C( -50.38), SIMDE_FLOAT32_C( 128.18) },
|
||||
{ SIMDE_FLOAT32_C( 639.26), SIMDE_FLOAT32_C( 658.66), SIMDE_FLOAT32_C( -994.55), SIMDE_FLOAT32_C( -497.52),
|
||||
SIMDE_FLOAT32_C( -856.57), SIMDE_FLOAT32_C( -383.00), SIMDE_FLOAT32_C( 141.29), SIMDE_FLOAT32_C( 247.46) } },
|
||||
{ { SIMDE_FLOAT32_C( 506.11), SIMDE_FLOAT32_C( 512.40), SIMDE_FLOAT32_C( 236.07), SIMDE_FLOAT32_C( 998.32),
|
||||
SIMDE_FLOAT32_C( -899.61), SIMDE_FLOAT32_C( -749.41), SIMDE_FLOAT32_C( -64.76), SIMDE_FLOAT32_C( -652.67),
|
||||
SIMDE_FLOAT32_C( 170.21), SIMDE_FLOAT32_C( 130.65), SIMDE_FLOAT32_C( 692.94), SIMDE_FLOAT32_C( 838.00),
|
||||
SIMDE_FLOAT32_C( 485.39), SIMDE_FLOAT32_C( -116.11), SIMDE_FLOAT32_C( -70.75), SIMDE_FLOAT32_C( -102.99) },
|
||||
{ SIMDE_FLOAT32_C( 506.11), SIMDE_FLOAT32_C( 512.40), SIMDE_FLOAT32_C( 236.07), SIMDE_FLOAT32_C( 998.32),
|
||||
SIMDE_FLOAT32_C( -899.61), SIMDE_FLOAT32_C( -749.41), SIMDE_FLOAT32_C( -64.76), SIMDE_FLOAT32_C( -652.67) },
|
||||
{ SIMDE_FLOAT32_C( 170.21), SIMDE_FLOAT32_C( 130.65), SIMDE_FLOAT32_C( 692.94), SIMDE_FLOAT32_C( 838.00),
|
||||
SIMDE_FLOAT32_C( 485.39), SIMDE_FLOAT32_C( -116.11), SIMDE_FLOAT32_C( -70.75), SIMDE_FLOAT32_C( -102.99) } },
|
||||
};
|
||||
|
||||
for (size_t i = 0 ; i < (sizeof(test_vec) / sizeof(test_vec[0])); i++) {
|
||||
simde__m256 r;
|
||||
simde__m512 a = simde_mm512_loadu_ps(test_vec[i].a);
|
||||
r = simde_mm512_extractf32x8_ps(a, 0);
|
||||
simde_assert_m256_close(r, simde_mm256_loadu_ps(test_vec[i].r0), 1);
|
||||
r = simde_mm512_extractf32x8_ps(a, 1);
|
||||
simde_assert_m256_close(r, simde_mm256_loadu_ps(test_vec[i].r1), 1);
|
||||
}
|
||||
return 0;
|
||||
#else
|
||||
fputc('\n', stdout);
|
||||
for (int i = 0 ; i < 8 ; i++) {
|
||||
simde__m512 a = simde_test_x86_random_f32x16(SIMDE_FLOAT32_C(-1000.0), SIMDE_FLOAT32_C(1000.0));
|
||||
simde__m256 r0 = simde_mm512_extractf32x8_ps(a, 0);
|
||||
simde__m256 r1 = simde_mm512_extractf32x8_ps(a, 1);
|
||||
|
||||
simde_test_x86_write_f32x16(2, a, SIMDE_TEST_VEC_POS_FIRST);
|
||||
simde_test_x86_write_f32x8(2, r0, SIMDE_TEST_VEC_POS_MIDDLE);
|
||||
simde_test_x86_write_f32x8(2, r1, SIMDE_TEST_VEC_POS_LAST);
|
||||
}
|
||||
return 1;
|
||||
#endif
|
||||
}
|
||||
|
||||
|
||||
static int
|
||||
test_simde_mm512_extractf64x4_pd(SIMDE_MUNIT_TEST_ARGS) {
|
||||
const struct {
|
||||
|
|
@ -912,6 +1080,241 @@ test_simde_mm512_maskz_extracti32x4_epi32(SIMDE_MUNIT_TEST_ARGS) {
|
|||
return 0;
|
||||
}
|
||||
|
||||
static int
|
||||
test_simde_mm512_extracti32x8_epi32(SIMDE_MUNIT_TEST_ARGS) {
|
||||
#if 1
|
||||
const struct {
|
||||
int32_t a[16];
|
||||
int32_t r0[8];
|
||||
int32_t r1[8];
|
||||
} test_vec[8] = {
|
||||
{ { -INT32_C( 1804325360), -INT32_C( 570715344), INT32_C( 762499502), -INT32_C( 299637426), INT32_C( 1850695491), INT32_C( 602882297), -INT32_C( 859204517), INT32_C( 755543325),
|
||||
INT32_C( 197229787), -INT32_C( 1091978225), -INT32_C( 605332595), -INT32_C( 2083910080), INT32_C( 1727076717), -INT32_C( 1266032551), -INT32_C( 1837084043), -INT32_C( 624981761) },
|
||||
{ -INT32_C( 1804325360), -INT32_C( 570715344), INT32_C( 762499502), -INT32_C( 299637426), INT32_C( 1850695491), INT32_C( 602882297), -INT32_C( 859204517), INT32_C( 755543325) },
|
||||
{ INT32_C( 197229787), -INT32_C( 1091978225), -INT32_C( 605332595), -INT32_C( 2083910080), INT32_C( 1727076717), -INT32_C( 1266032551), -INT32_C( 1837084043), -INT32_C( 624981761) } },
|
||||
{ { INT32_C( 350650629), -INT32_C( 875376835), INT32_C( 1789312554), INT32_C( 988639436), -INT32_C( 492773751), INT32_C( 865479358), INT32_C( 2093291132), -INT32_C( 1537833569),
|
||||
INT32_C( 1136147462), INT32_C( 890145547), INT32_C( 362788169), -INT32_C( 1353741275), INT32_C( 697430122), -INT32_C( 1772345318), -INT32_C( 586014146), -INT32_C( 1384027737) },
|
||||
{ INT32_C( 350650629), -INT32_C( 875376835), INT32_C( 1789312554), INT32_C( 988639436), -INT32_C( 492773751), INT32_C( 865479358), INT32_C( 2093291132), -INT32_C( 1537833569) },
|
||||
{ INT32_C( 1136147462), INT32_C( 890145547), INT32_C( 362788169), -INT32_C( 1353741275), INT32_C( 697430122), -INT32_C( 1772345318), -INT32_C( 586014146), -INT32_C( 1384027737) } },
|
||||
{ { -INT32_C( 1309656411), INT32_C( 250019781), -INT32_C( 651983180), INT32_C( 2106094354), INT32_C( 2108037731), -INT32_C( 2146237886), -INT32_C( 883022300), INT32_C( 880336783),
|
||||
-INT32_C( 555390695), INT32_C( 485280872), INT32_C( 1693782098), -INT32_C( 421429629), -INT32_C( 631011432), -INT32_C( 1369803126), INT32_C( 729462940), -INT32_C( 1319046504) },
|
||||
{ -INT32_C( 1309656411), INT32_C( 250019781), -INT32_C( 651983180), INT32_C( 2106094354), INT32_C( 2108037731), -INT32_C( 2146237886), -INT32_C( 883022300), INT32_C( 880336783) },
|
||||
{ -INT32_C( 555390695), INT32_C( 485280872), INT32_C( 1693782098), -INT32_C( 421429629), -INT32_C( 631011432), -INT32_C( 1369803126), INT32_C( 729462940), -INT32_C( 1319046504) } },
|
||||
{ { -INT32_C( 1013955237), INT32_C( 1675590673), INT32_C( 264820108), -INT32_C( 336221869), -INT32_C( 1144694735), INT32_C( 1802051535), INT32_C( 1889002456), INT32_C( 824309718),
|
||||
INT32_C( 1324724540), -INT32_C( 1162750930), -INT32_C( 53839447), INT32_C( 1424473891), -INT32_C( 418403304), -INT32_C( 1538098996), INT32_C( 840231260), INT32_C( 493041120) },
|
||||
{ -INT32_C( 1013955237), INT32_C( 1675590673), INT32_C( 264820108), -INT32_C( 336221869), -INT32_C( 1144694735), INT32_C( 1802051535), INT32_C( 1889002456), INT32_C( 824309718) },
|
||||
{ INT32_C( 1324724540), -INT32_C( 1162750930), -INT32_C( 53839447), INT32_C( 1424473891), -INT32_C( 418403304), -INT32_C( 1538098996), INT32_C( 840231260), INT32_C( 493041120) } },
|
||||
{ { INT32_C( 359356647), -INT32_C( 691069907), -INT32_C( 1177314922), INT32_C( 1896725081), INT32_C( 861412455), -INT32_C( 254301548), INT32_C( 1948445588), INT32_C( 126977568),
|
||||
INT32_C( 186449118), -INT32_C( 1344082919), -INT32_C( 563563131), -INT32_C( 699435665), INT32_C( 621389713), -INT32_C( 434708398), -INT32_C( 329631541), -INT32_C( 1644958530) },
|
||||
{ INT32_C( 359356647), -INT32_C( 691069907), -INT32_C( 1177314922), INT32_C( 1896725081), INT32_C( 861412455), -INT32_C( 254301548), INT32_C( 1948445588), INT32_C( 126977568) },
|
||||
{ INT32_C( 186449118), -INT32_C( 1344082919), -INT32_C( 563563131), -INT32_C( 699435665), INT32_C( 621389713), -INT32_C( 434708398), -INT32_C( 329631541), -INT32_C( 1644958530) } },
|
||||
{ { INT32_C( 27791592), -INT32_C( 2119136516), -INT32_C( 1352656833), INT32_C( 512077709), -INT32_C( 1455124649), INT32_C( 999250543), INT32_C( 1361570194), -INT32_C( 1091691819),
|
||||
INT32_C( 650090026), INT32_C( 1621651489), INT32_C( 370083976), INT32_C( 238327223), -INT32_C( 1816692700), INT32_C( 1708017362), INT32_C( 95876400), INT32_C( 985900048) },
|
||||
{ INT32_C( 27791592), -INT32_C( 2119136516), -INT32_C( 1352656833), INT32_C( 512077709), -INT32_C( 1455124649), INT32_C( 999250543), INT32_C( 1361570194), -INT32_C( 1091691819) },
|
||||
{ INT32_C( 650090026), INT32_C( 1621651489), INT32_C( 370083976), INT32_C( 238327223), -INT32_C( 1816692700), INT32_C( 1708017362), INT32_C( 95876400), INT32_C( 985900048) } },
|
||||
{ { INT32_C( 1533117242), INT32_C( 2075920883), -INT32_C( 929969391), -INT32_C( 2066233760), INT32_C( 286821950), INT32_C( 91678421), -INT32_C( 334877476), INT32_C( 170315472),
|
||||
INT32_C( 1147570001), -INT32_C( 1581309296), INT32_C( 1315590637), INT32_C( 1439842583), -INT32_C( 1536759089), -INT32_C( 1381376815), -INT32_C( 661015544), -INT32_C( 740049022) },
|
||||
{ INT32_C( 1533117242), INT32_C( 2075920883), -INT32_C( 929969391), -INT32_C( 2066233760), INT32_C( 286821950), INT32_C( 91678421), -INT32_C( 334877476), INT32_C( 170315472) },
|
||||
{ INT32_C( 1147570001), -INT32_C( 1581309296), INT32_C( 1315590637), INT32_C( 1439842583), -INT32_C( 1536759089), -INT32_C( 1381376815), -INT32_C( 661015544), -INT32_C( 740049022) } },
|
||||
{ { -INT32_C( 686339769), INT32_C( 1484379755), INT32_C( 1051124519), -INT32_C( 208373468), INT32_C( 882440803), -INT32_C( 538885673), INT32_C( 2008578805), -INT32_C( 2125817030),
|
||||
INT32_C( 1331192292), INT32_C( 1604833592), -INT32_C( 660713804), INT32_C( 718025415), INT32_C( 56583212), -INT32_C( 1679605595), -INT32_C( 183329861), INT32_C( 443964726) },
|
||||
{ -INT32_C( 686339769), INT32_C( 1484379755), INT32_C( 1051124519), -INT32_C( 208373468), INT32_C( 882440803), -INT32_C( 538885673), INT32_C( 2008578805), -INT32_C( 2125817030) },
|
||||
{ INT32_C( 1331192292), INT32_C( 1604833592), -INT32_C( 660713804), INT32_C( 718025415), INT32_C( 56583212), -INT32_C( 1679605595), -INT32_C( 183329861), INT32_C( 443964726) } },
|
||||
};
|
||||
|
||||
for (size_t i = 0 ; i < (sizeof(test_vec) / sizeof(test_vec[0])); i++) {
|
||||
simde__m256i r;
|
||||
simde__m512i a = simde_mm512_loadu_epi32(test_vec[i].a);
|
||||
r = simde_mm512_extracti32x8_epi32(a, 0);
|
||||
simde_test_x86_assert_equal_i32x8(r, simde_mm256_loadu_epi32(test_vec[i].r0));
|
||||
r = simde_mm512_extracti32x8_epi32(a, 1);
|
||||
simde_test_x86_assert_equal_i32x8(r, simde_mm256_loadu_epi32(test_vec[i].r1));
|
||||
}
|
||||
|
||||
return 0;
|
||||
#else
|
||||
fputc('\n', stdout);
|
||||
for (int i = 0 ; i < 8 ; i++) {
|
||||
simde__m512i a = simde_test_x86_random_i32x16();
|
||||
simde__m256i r0 = simde_mm512_extracti32x8_epi32(a, 0);
|
||||
simde__m256i r1 = simde_mm512_extracti32x8_epi32(a, 1);
|
||||
|
||||
simde_test_x86_write_i32x16(2, a, SIMDE_TEST_VEC_POS_FIRST);
|
||||
simde_test_x86_write_i32x8(2, r0, SIMDE_TEST_VEC_POS_MIDDLE);
|
||||
simde_test_x86_write_i32x8(2, r1, SIMDE_TEST_VEC_POS_LAST);
|
||||
}
|
||||
return 1;
|
||||
#endif
|
||||
}
|
||||
|
||||
static int
|
||||
test_simde_mm512_mask_extracti32x8_epi32(SIMDE_MUNIT_TEST_ARGS) {
|
||||
#if 1
|
||||
const struct {
|
||||
int32_t src[8];
|
||||
simde__mmask8 k;
|
||||
int32_t a[16];
|
||||
int32_t r0[8];
|
||||
int32_t r1[8];
|
||||
} test_vec[8] = {
|
||||
{ { INT32_C( 205706682), -INT32_C( 1911602219), -INT32_C( 905548319), -INT32_C( 843697944), -INT32_C( 1879053481), INT32_C( 1319689292), INT32_C( 1858541744), INT32_C( 1027469698) },
|
||||
UINT32_C( 198),
|
||||
{ -INT32_C( 1013167745), -INT32_C( 979097000), INT32_C( 1638755888), INT32_C( 263748132), INT32_C( 1432045433), INT32_C( 134654448), INT32_C( 1653306481), INT32_C( 824821938),
|
||||
INT32_C( 1777648913), INT32_C( 523147503), INT32_C( 713087750), -INT32_C( 818267818), INT32_C( 1881511296), -INT32_C( 1334236353), INT32_C( 1360135327), -INT32_C( 578602036) },
|
||||
{ INT32_C( 205706682), -INT32_C( 979097000), INT32_C( 1638755888), -INT32_C( 843697944), -INT32_C( 1879053481), INT32_C( 1319689292), INT32_C( 1653306481), INT32_C( 824821938) },
|
||||
{ INT32_C( 205706682), INT32_C( 523147503), INT32_C( 713087750), -INT32_C( 843697944), -INT32_C( 1879053481), INT32_C( 1319689292), INT32_C( 1360135327), -INT32_C( 578602036) } },
|
||||
{ { -INT32_C( 280594688), INT32_C( 370111504), -INT32_C( 1522430129), INT32_C( 1232436168), INT32_C( 1337563664), INT32_C( 1694446277), INT32_C( 45486646), INT32_C( 1323252045) },
|
||||
UINT32_C( 176),
|
||||
{ -INT32_C( 1715454683), -INT32_C( 588654772), -INT32_C( 1817932264), -INT32_C( 1650201341), -INT32_C( 647826521), INT32_C( 68208626), -INT32_C( 1236135299), INT32_C( 392601842),
|
||||
INT32_C( 716253149), INT32_C( 369531646), INT32_C( 749316648), INT32_C( 1070156952), INT32_C( 840444991), INT32_C( 1882597619), INT32_C( 757499963), INT32_C( 105155624) },
|
||||
{ -INT32_C( 280594688), INT32_C( 370111504), -INT32_C( 1522430129), INT32_C( 1232436168), -INT32_C( 647826521), INT32_C( 68208626), INT32_C( 45486646), INT32_C( 392601842) },
|
||||
{ -INT32_C( 280594688), INT32_C( 370111504), -INT32_C( 1522430129), INT32_C( 1232436168), INT32_C( 840444991), INT32_C( 1882597619), INT32_C( 45486646), INT32_C( 105155624) } },
|
||||
{ { -INT32_C( 1322191437), -INT32_C( 1194903921), INT32_C( 2028237024), -INT32_C( 55071299), -INT32_C( 869347111), INT32_C( 859596280), INT32_C( 375415533), -INT32_C( 1575180817) },
|
||||
UINT32_C( 154),
|
||||
{ -INT32_C( 2111155124), -INT32_C( 1939676645), INT32_C( 1934220230), INT32_C( 1649231250), -INT32_C( 648341132), -INT32_C( 1194946986), -INT32_C( 1800938257), INT32_C( 1143884536),
|
||||
-INT32_C( 1178183522), INT32_C( 4532538), -INT32_C( 1770746364), INT32_C( 1224327636), INT32_C( 807490778), -INT32_C( 773199902), -INT32_C( 1134194492), INT32_C( 2013369562) },
|
||||
{ -INT32_C( 1322191437), -INT32_C( 1939676645), INT32_C( 2028237024), INT32_C( 1649231250), -INT32_C( 648341132), INT32_C( 859596280), INT32_C( 375415533), INT32_C( 1143884536) },
|
||||
{ -INT32_C( 1322191437), INT32_C( 4532538), INT32_C( 2028237024), INT32_C( 1224327636), INT32_C( 807490778), INT32_C( 859596280), INT32_C( 375415533), INT32_C( 2013369562) } },
|
||||
{ { INT32_C( 657639404), -INT32_C( 198739984), -INT32_C( 628385018), INT32_C( 925008988), -INT32_C( 1167637544), -INT32_C( 292794326), -INT32_C( 1146359327), INT32_C( 1916054661) },
|
||||
UINT32_C( 115),
|
||||
{ -INT32_C( 580609690), INT32_C( 1558403264), INT32_C( 1740160483), INT32_C( 574615519), -INT32_C( 1488061865), INT32_C( 2005416838), -INT32_C( 1828895514), -INT32_C( 570003592),
|
||||
-INT32_C( 927241720), -INT32_C( 1507549246), INT32_C( 1007541596), INT32_C( 593382860), -INT32_C( 842290361), -INT32_C( 851160089), INT32_C( 257966487), -INT32_C( 1192401232) },
|
||||
{ -INT32_C( 580609690), INT32_C( 1558403264), -INT32_C( 628385018), INT32_C( 925008988), -INT32_C( 1488061865), INT32_C( 2005416838), -INT32_C( 1828895514), INT32_C( 1916054661) },
|
||||
{ -INT32_C( 927241720), -INT32_C( 1507549246), -INT32_C( 628385018), INT32_C( 925008988), -INT32_C( 842290361), -INT32_C( 851160089), INT32_C( 257966487), INT32_C( 1916054661) } },
|
||||
{ { -INT32_C( 1836996144), -INT32_C( 1539791544), INT32_C( 1340098178), -INT32_C( 630046829), -INT32_C( 777568790), INT32_C( 681569169), -INT32_C( 583467219), INT32_C( 899032421) },
|
||||
UINT32_C( 206),
|
||||
{ -INT32_C( 1139357929), INT32_C( 1178581760), -INT32_C( 623276389), INT32_C( 1053143808), INT32_C( 1171232346), INT32_C( 879949621), INT32_C( 1436110895), -INT32_C( 47984922),
|
||||
-INT32_C( 1766245738), -INT32_C( 1864566539), -INT32_C( 2022984314), -INT32_C( 1027264408), -INT32_C( 66612026), -INT32_C( 1154450805), -INT32_C( 1341076790), INT32_C( 783102872) },
|
||||
{ -INT32_C( 1836996144), INT32_C( 1178581760), -INT32_C( 623276389), INT32_C( 1053143808), -INT32_C( 777568790), INT32_C( 681569169), INT32_C( 1436110895), -INT32_C( 47984922) },
|
||||
{ -INT32_C( 1836996144), -INT32_C( 1864566539), -INT32_C( 2022984314), -INT32_C( 1027264408), -INT32_C( 777568790), INT32_C( 681569169), -INT32_C( 1341076790), INT32_C( 783102872) } },
|
||||
{ { INT32_C( 1657038445), -INT32_C( 437018529), -INT32_C( 1116971435), INT32_C( 1417621902), INT32_C( 1364232133), -INT32_C( 888372991), -INT32_C( 478471093), -INT32_C( 1122883505) },
|
||||
UINT32_C( 142),
|
||||
{ INT32_C( 2012028886), INT32_C( 1892471570), INT32_C( 1912506943), -INT32_C( 1875487991), INT32_C( 613517219), -INT32_C( 1351656301), -INT32_C( 44073), INT32_C( 999210085),
|
||||
-INT32_C( 290292773), -INT32_C( 1906409650), INT32_C( 318725385), INT32_C( 1403205040), INT32_C( 1350055101), INT32_C( 1744889745), -INT32_C( 1620508870), -INT32_C( 1763969349) },
|
||||
{ INT32_C( 1657038445), INT32_C( 1892471570), INT32_C( 1912506943), -INT32_C( 1875487991), INT32_C( 1364232133), -INT32_C( 888372991), -INT32_C( 478471093), INT32_C( 999210085) },
|
||||
{ INT32_C( 1657038445), -INT32_C( 1906409650), INT32_C( 318725385), INT32_C( 1403205040), INT32_C( 1364232133), -INT32_C( 888372991), -INT32_C( 478471093), -INT32_C( 1763969349) } },
|
||||
{ { -INT32_C( 1065054863), INT32_C( 357491468), -INT32_C( 265794240), INT32_C( 1061407618), -INT32_C( 1869562881), -INT32_C( 570847069), INT32_C( 1249730959), -INT32_C( 924821417) },
|
||||
UINT32_C( 229),
|
||||
{ INT32_C( 1223854181), INT32_C( 596117462), -INT32_C( 89753553), INT32_C( 2012931515), INT32_C( 85625461), -INT32_C( 459999357), -INT32_C( 868491660), INT32_C( 615646399),
|
||||
INT32_C( 1668064396), -INT32_C( 611912533), INT32_C( 668281964), -INT32_C( 2019635438), -INT32_C( 577914790), INT32_C( 616702384), -INT32_C( 1074660096), -INT32_C( 1897684223) },
|
||||
{ INT32_C( 1223854181), INT32_C( 357491468), -INT32_C( 89753553), INT32_C( 1061407618), -INT32_C( 1869562881), -INT32_C( 459999357), -INT32_C( 868491660), INT32_C( 615646399) },
|
||||
{ INT32_C( 1668064396), INT32_C( 357491468), INT32_C( 668281964), INT32_C( 1061407618), -INT32_C( 1869562881), INT32_C( 616702384), -INT32_C( 1074660096), -INT32_C( 1897684223) } },
|
||||
{ { -INT32_C( 219066553), -INT32_C( 1345489085), -INT32_C( 1227447388), -INT32_C( 868387470), -INT32_C( 576009683), -INT32_C( 335385364), INT32_C( 1806431081), -INT32_C( 570847594) },
|
||||
UINT32_C( 221),
|
||||
{ INT32_C( 1629540330), INT32_C( 1074122653), INT32_C( 447921061), -INT32_C( 1018658823), -INT32_C( 1783683799), INT32_C( 452893479), -INT32_C( 726636218), INT32_C( 1286704482),
|
||||
-INT32_C( 89206435), INT32_C( 1178252192), INT32_C( 1751182447), -INT32_C( 1809078165), -INT32_C( 181806130), -INT32_C( 1123014538), -INT32_C( 191774575), -INT32_C( 1421851826) },
|
||||
{ INT32_C( 1629540330), -INT32_C( 1345489085), INT32_C( 447921061), -INT32_C( 1018658823), -INT32_C( 1783683799), -INT32_C( 335385364), -INT32_C( 726636218), INT32_C( 1286704482) },
|
||||
{ -INT32_C( 89206435), -INT32_C( 1345489085), INT32_C( 1751182447), -INT32_C( 1809078165), -INT32_C( 181806130), -INT32_C( 335385364), -INT32_C( 191774575), -INT32_C( 1421851826) } },
|
||||
};
|
||||
|
||||
for (size_t i = 0 ; i < (sizeof(test_vec) / sizeof(test_vec[0])); i++) {
|
||||
simde__m256i r;
|
||||
simde__m256i src = simde_mm256_loadu_epi32(test_vec[i].src);
|
||||
simde__m512i a = simde_mm512_loadu_epi32(test_vec[i].a);
|
||||
r = simde_mm512_mask_extracti32x8_epi32(src, test_vec[i].k, a, 0);
|
||||
simde_test_x86_assert_equal_i32x8(r, simde_mm256_loadu_epi32(test_vec[i].r0));
|
||||
r = simde_mm512_mask_extracti32x8_epi32(src, test_vec[i].k, a, 1);
|
||||
simde_test_x86_assert_equal_i32x8(r, simde_mm256_loadu_epi32(test_vec[i].r1));
|
||||
}
|
||||
|
||||
return 0;
|
||||
#else
|
||||
fputc('\n', stdout);
|
||||
for (int i = 0 ; i < 8 ; i++) {
|
||||
simde__m256i src = simde_test_x86_random_i32x8();
|
||||
simde__mmask8 k = simde_test_x86_random_mmask8();
|
||||
simde__m512i a = simde_test_x86_random_i32x16();
|
||||
simde__m256i r0 = simde_mm512_mask_extracti32x8_epi32(src, k, a, 0);
|
||||
simde__m256i r1 = simde_mm512_mask_extracti32x8_epi32(src, k, a, 1);
|
||||
|
||||
simde_test_x86_write_i32x8(2, src, SIMDE_TEST_VEC_POS_FIRST);
|
||||
simde_test_x86_write_mmask32(2, k, SIMDE_TEST_VEC_POS_MIDDLE);
|
||||
simde_test_x86_write_i32x16(2, a, SIMDE_TEST_VEC_POS_MIDDLE);
|
||||
simde_test_x86_write_i32x8(2, r0, SIMDE_TEST_VEC_POS_MIDDLE);
|
||||
simde_test_x86_write_i32x8(2, r1, SIMDE_TEST_VEC_POS_LAST);
|
||||
}
|
||||
return 1;
|
||||
#endif
|
||||
}
|
||||
|
||||
static int
|
||||
test_simde_mm512_maskz_extracti32x8_epi32(SIMDE_MUNIT_TEST_ARGS) {
|
||||
#if 1
|
||||
const struct {
|
||||
simde__mmask8 k;
|
||||
int32_t a[16];
|
||||
int32_t r0[8];
|
||||
int32_t r1[8];
|
||||
} test_vec[8] = {
|
||||
{ UINT32_C( 254),
|
||||
{ INT32_C( 1730054307), INT32_C( 855222456), -INT32_C( 276221597), INT32_C( 1214899305), INT32_C( 56763023), INT32_C( 1991810899), INT32_C( 352178435), INT32_C( 1628673981),
|
||||
-INT32_C( 674746081), INT32_C( 1007272409), INT32_C( 1529582322), INT32_C( 111449463), INT32_C( 168363703), -INT32_C( 1451113819), INT32_C( 1371373203), INT32_C( 884133909) },
|
||||
{ INT32_C( 0), INT32_C( 855222456), -INT32_C( 276221597), INT32_C( 1214899305), INT32_C( 56763023), INT32_C( 1991810899), INT32_C( 352178435), INT32_C( 1628673981) },
|
||||
{ INT32_C( 0), INT32_C( 1007272409), INT32_C( 1529582322), INT32_C( 111449463), INT32_C( 168363703), -INT32_C( 1451113819), INT32_C( 1371373203), INT32_C( 884133909) } },
|
||||
{ UINT32_C( 1),
|
||||
{ INT32_C( 1004211066), -INT32_C( 1490151659), -INT32_C( 669087421), INT32_C( 881796141), -INT32_C( 254174930), -INT32_C( 1736211942), INT32_C( 279827520), INT32_C( 1237382),
|
||||
INT32_C( 37547501), INT32_C( 1202285060), INT32_C( 555731187), INT32_C( 441822956), INT32_C( 1644834376), -INT32_C( 235172175), -INT32_C( 385767326), INT32_C( 2011763594) },
|
||||
{ INT32_C( 1004211066), INT32_C( 0), INT32_C( 0), INT32_C( 0), INT32_C( 0), INT32_C( 0), INT32_C( 0), INT32_C( 0) },
|
||||
{ INT32_C( 37547501), INT32_C( 0), INT32_C( 0), INT32_C( 0), INT32_C( 0), INT32_C( 0), INT32_C( 0), INT32_C( 0) } },
|
||||
{ UINT32_C( 0),
|
||||
{ -INT32_C( 1895466715), -INT32_C( 360494046), INT32_C( 450339948), INT32_C( 660795897), -INT32_C( 1965505028), INT32_C( 1760348608), -INT32_C( 554510901), -INT32_C( 455120449),
|
||||
INT32_C( 91546850), -INT32_C( 1661995216), -INT32_C( 1799895397), -INT32_C( 1262806600), -INT32_C( 1640065826), INT32_C( 671558237), -INT32_C( 1089996544), INT32_C( 1168369251) },
|
||||
{ INT32_C( 0), INT32_C( 0), INT32_C( 0), INT32_C( 0), INT32_C( 0), INT32_C( 0), INT32_C( 0), INT32_C( 0) },
|
||||
{ INT32_C( 0), INT32_C( 0), INT32_C( 0), INT32_C( 0), INT32_C( 0), INT32_C( 0), INT32_C( 0), INT32_C( 0) } },
|
||||
{ UINT32_C( 202),
|
||||
{ INT32_C( 251283991), INT32_C( 11114298), INT32_C( 1740127566), -INT32_C( 1924764423), -INT32_C( 706026326), -INT32_C( 439020565), INT32_C( 4756506), INT32_C( 1338674487),
|
||||
INT32_C( 308135128), -INT32_C( 1458436261), INT32_C( 1024576324), -INT32_C( 490055881), INT32_C( 666350907), -INT32_C( 502494008), INT32_C( 1474450464), -INT32_C( 1180259103) },
|
||||
{ INT32_C( 0), INT32_C( 11114298), INT32_C( 0), -INT32_C( 1924764423), INT32_C( 0), INT32_C( 0), INT32_C( 4756506), INT32_C( 1338674487) },
|
||||
{ INT32_C( 0), -INT32_C( 1458436261), INT32_C( 0), -INT32_C( 490055881), INT32_C( 0), INT32_C( 0), INT32_C( 1474450464), -INT32_C( 1180259103) } },
|
||||
{ UINT32_C( 112),
|
||||
{ INT32_C( 197970692), -INT32_C( 1454410274), -INT32_C( 572486266), INT32_C( 203014743), INT32_C( 97796217), -INT32_C( 1608141236), INT32_C( 1149336984), INT32_C( 666188579),
|
||||
-INT32_C( 466452218), INT32_C( 2106426102), INT32_C( 1717202447), -INT32_C( 1435274448), -INT32_C( 5290061), -INT32_C( 1767909890), INT32_C( 1977295186), INT32_C( 1654493276) },
|
||||
{ INT32_C( 0), INT32_C( 0), INT32_C( 0), INT32_C( 0), INT32_C( 97796217), -INT32_C( 1608141236), INT32_C( 1149336984), INT32_C( 0) },
|
||||
{ INT32_C( 0), INT32_C( 0), INT32_C( 0), INT32_C( 0), -INT32_C( 5290061), -INT32_C( 1767909890), INT32_C( 1977295186), INT32_C( 0) } },
|
||||
{ UINT32_C( 17),
|
||||
{ INT32_C( 1359431631), INT32_C( 1113621716), INT32_C( 1383319519), -INT32_C( 2130305734), -INT32_C( 1585510964), -INT32_C( 957147483), -INT32_C( 2128451087), -INT32_C( 711818234),
|
||||
-INT32_C( 1608017461), -INT32_C( 35485922), -INT32_C( 2008066738), INT32_C( 1057641842), INT32_C( 14715227), -INT32_C( 1866017633), INT32_C( 1125247037), INT32_C( 941138796) },
|
||||
{ INT32_C( 1359431631), INT32_C( 0), INT32_C( 0), INT32_C( 0), -INT32_C( 1585510964), INT32_C( 0), INT32_C( 0), INT32_C( 0) },
|
||||
{ -INT32_C( 1608017461), INT32_C( 0), INT32_C( 0), INT32_C( 0), INT32_C( 14715227), INT32_C( 0), INT32_C( 0), INT32_C( 0) } },
|
||||
{ UINT32_C( 61),
|
||||
{ -INT32_C( 950282177), INT32_C( 269834426), -INT32_C( 41771353), INT32_C( 827900328), INT32_C( 1993431202), INT32_C( 112419102), INT32_C( 376632947), INT32_C( 1314105870),
|
||||
INT32_C( 1024831106), -INT32_C( 1370674682), INT32_C( 1890308040), INT32_C( 866255761), INT32_C( 2041148251), INT32_C( 1199529172), INT32_C( 1616834898), INT32_C( 514765212) },
|
||||
{ -INT32_C( 950282177), INT32_C( 0), -INT32_C( 41771353), INT32_C( 827900328), INT32_C( 1993431202), INT32_C( 112419102), INT32_C( 0), INT32_C( 0) },
|
||||
{ INT32_C( 1024831106), INT32_C( 0), INT32_C( 1890308040), INT32_C( 866255761), INT32_C( 2041148251), INT32_C( 1199529172), INT32_C( 0), INT32_C( 0) } },
|
||||
{ UINT32_C( 96),
|
||||
{ -INT32_C( 295281725), INT32_C( 2025198760), -INT32_C( 1039587393), INT32_C( 1008549065), INT32_C( 1091606245), INT32_C( 127096853), INT32_C( 1738798006), INT32_C( 1707590050),
|
||||
-INT32_C( 984404451), INT32_C( 37554754), -INT32_C( 87800271), INT32_C( 1731650178), -INT32_C( 1901574536), INT32_C( 1419066270), -INT32_C( 776194001), INT32_C( 372671481) },
|
||||
{ INT32_C( 0), INT32_C( 0), INT32_C( 0), INT32_C( 0), INT32_C( 0), INT32_C( 127096853), INT32_C( 1738798006), INT32_C( 0) },
|
||||
{ INT32_C( 0), INT32_C( 0), INT32_C( 0), INT32_C( 0), INT32_C( 0), INT32_C( 1419066270), -INT32_C( 776194001), INT32_C( 0) } },
|
||||
};
|
||||
|
||||
for (size_t i = 0 ; i < (sizeof(test_vec) / sizeof(test_vec[0])); i++) {
|
||||
simde__m256i r;
|
||||
simde__m512i a = simde_mm512_loadu_epi32(test_vec[i].a);
|
||||
r = simde_mm512_maskz_extracti32x8_epi32(test_vec[i].k, a, 0);
|
||||
simde_test_x86_assert_equal_i32x8(r, simde_mm256_loadu_epi32(test_vec[i].r0));
|
||||
r = simde_mm512_maskz_extracti32x8_epi32(test_vec[i].k, a, 1);
|
||||
simde_test_x86_assert_equal_i32x8(r, simde_mm256_loadu_epi32(test_vec[i].r1));
|
||||
}
|
||||
|
||||
return 0;
|
||||
#else
|
||||
fputc('\n', stdout);
|
||||
for (int i = 0 ; i < 8 ; i++) {
|
||||
simde__mmask8 k = simde_test_x86_random_mmask8();
|
||||
simde__m512i a = simde_test_x86_random_i32x16();
|
||||
simde__m256i r0 = simde_mm512_maskz_extracti32x8_epi32(k, a, 0);
|
||||
simde__m256i r1 = simde_mm512_maskz_extracti32x8_epi32(k, a, 1);
|
||||
|
||||
simde_test_x86_write_mmask32(2, k, SIMDE_TEST_VEC_POS_FIRST);
|
||||
simde_test_x86_write_i32x16(2, a, SIMDE_TEST_VEC_POS_MIDDLE);
|
||||
simde_test_x86_write_i32x8(2, r0, SIMDE_TEST_VEC_POS_MIDDLE);
|
||||
simde_test_x86_write_i32x8(2, r1, SIMDE_TEST_VEC_POS_LAST);
|
||||
}
|
||||
return 1;
|
||||
#endif
|
||||
}
|
||||
|
||||
static int
|
||||
test_simde_mm512_extracti64x4_epi64(SIMDE_MUNIT_TEST_ARGS) {
|
||||
const struct {
|
||||
|
|
@ -1200,15 +1603,20 @@ test_simde_mm512_maskz_extracti64x4_epi64(SIMDE_MUNIT_TEST_ARGS) {
|
|||
}
|
||||
|
||||
SIMDE_TEST_FUNC_LIST_BEGIN
|
||||
SIMDE_TEST_FUNC_LIST_ENTRY(mm256_extractf32x4_ps)
|
||||
SIMDE_TEST_FUNC_LIST_ENTRY(mm512_extractf32x4_ps)
|
||||
SIMDE_TEST_FUNC_LIST_ENTRY(mm512_mask_extractf32x4_ps)
|
||||
SIMDE_TEST_FUNC_LIST_ENTRY(mm512_maskz_extractf32x4_ps)
|
||||
SIMDE_TEST_FUNC_LIST_ENTRY(mm512_extractf32x8_ps)
|
||||
SIMDE_TEST_FUNC_LIST_ENTRY(mm512_extractf64x4_pd)
|
||||
SIMDE_TEST_FUNC_LIST_ENTRY(mm512_mask_extractf64x4_pd)
|
||||
SIMDE_TEST_FUNC_LIST_ENTRY(mm512_maskz_extractf64x4_pd)
|
||||
SIMDE_TEST_FUNC_LIST_ENTRY(mm512_extracti32x4_epi32)
|
||||
SIMDE_TEST_FUNC_LIST_ENTRY(mm512_mask_extracti32x4_epi32)
|
||||
SIMDE_TEST_FUNC_LIST_ENTRY(mm512_maskz_extracti32x4_epi32)
|
||||
SIMDE_TEST_FUNC_LIST_ENTRY(mm512_extracti32x8_epi32)
|
||||
SIMDE_TEST_FUNC_LIST_ENTRY(mm512_mask_extracti32x8_epi32)
|
||||
SIMDE_TEST_FUNC_LIST_ENTRY(mm512_maskz_extracti32x8_epi32)
|
||||
SIMDE_TEST_FUNC_LIST_ENTRY(mm512_extracti64x4_epi64)
|
||||
SIMDE_TEST_FUNC_LIST_ENTRY(mm512_mask_extracti64x4_epi64)
|
||||
SIMDE_TEST_FUNC_LIST_ENTRY(mm512_maskz_extracti64x4_epi64)
|
||||
|
|
|
|||
222
thirdparty/simde/test/x86/avx512/fpclass.c
vendored
Normal file
222
thirdparty/simde/test/x86/avx512/fpclass.c
vendored
Normal file
|
|
@ -0,0 +1,222 @@
|
|||
/* SPDX-License-Identifier: MIT
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person
|
||||
* obtaining a copy of this software and associated documentation
|
||||
* files (the "Software"), to deal in the Software without
|
||||
* restriction, including without limitation the rights to use, copy,
|
||||
* modify, merge, publish, distribute, sublicense, and/or sell copies
|
||||
* of the Software, and to permit persons to whom the Software is
|
||||
* furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be
|
||||
* included in all copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
|
||||
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
|
||||
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
|
||||
* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
|
||||
* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
|
||||
* SOFTWARE.
|
||||
*
|
||||
* Copyright:
|
||||
* 2023 Michael R. Crusoe <crusoe@debian.org>
|
||||
*/
|
||||
|
||||
#define SIMDE_TEST_X86_AVX512_INSN fpclass
|
||||
|
||||
#include <test/x86/avx512/test-avx512.h>
|
||||
#include <simde/x86/avx512/fpclass.h>
|
||||
|
||||
static int
|
||||
test_simde_mm256_fpclass_ps_mask (SIMDE_MUNIT_TEST_ARGS) {
|
||||
#if 1
|
||||
simde_float32 sNaNf = simde_uint32_as_float32(0xff800011),
|
||||
denormalf = simde_uint32_as_float32(0x007fffff);
|
||||
simde__m256 a = simde_mm256_set_ps(
|
||||
SIMDE_MATH_NANF , SIMDE_FLOAT32_C(0.0),
|
||||
-SIMDE_FLOAT32_C(0.0) , SIMDE_MATH_INFINITYF,
|
||||
-SIMDE_MATH_INFINITYF , denormalf,
|
||||
-SIMDE_FLOAT32_C(42.23), sNaNf);
|
||||
simde_assert_equal_mmask8(simde_mm256_fpclass_ps_mask(a, 0x01), 128);
|
||||
simde_assert_equal_mmask8(simde_mm256_fpclass_ps_mask(a, 0x02), 64);
|
||||
simde_assert_equal_mmask8(simde_mm256_fpclass_ps_mask(a, 0x04), 32);
|
||||
simde_assert_equal_mmask8(simde_mm256_fpclass_ps_mask(a, 0x08), 16);
|
||||
simde_assert_equal_mmask8(simde_mm256_fpclass_ps_mask(a, 0x10), 8);
|
||||
simde_assert_equal_mmask8(simde_mm256_fpclass_ps_mask(a, 0x20), 4);
|
||||
simde_assert_equal_mmask8(simde_mm256_fpclass_ps_mask(a, 0x40), 2);
|
||||
simde_assert_equal_mmask8(simde_mm256_fpclass_ps_mask(a, 0x80), 1);
|
||||
|
||||
return 0;
|
||||
#else
|
||||
fputc('\n', stdout);
|
||||
|
||||
simde_float32 sNaNf = simde_uint32_as_float32(0xff800011),
|
||||
denormalf = simde_uint32_as_float32(0x007fffff);
|
||||
simde__m256 a = simde_mm256_set_ps(
|
||||
SIMDE_MATH_NANF , SIMDE_FLOAT32_C(0.0),
|
||||
-SIMDE_FLOAT32_C(0.0) , SIMDE_MATH_INFINITYF,
|
||||
-SIMDE_MATH_INFINITYF , denormalf,
|
||||
-SIMDE_FLOAT32_C(42.23), sNaNf);
|
||||
simde__mmask8 r0 = simde_mm256_fpclass_ps_mask(a, SIMDE_MATH_FP_QNAN);
|
||||
simde__mmask8 r1 = simde_mm256_fpclass_ps_mask(a, SIMDE_MATH_FP_PZERO);
|
||||
simde__mmask8 r2 = simde_mm256_fpclass_ps_mask(a, SIMDE_MATH_FP_NZERO);
|
||||
simde__mmask8 r3 = simde_mm256_fpclass_ps_mask(a, SIMDE_MATH_FP_PINF);
|
||||
simde__mmask8 r4 = simde_mm256_fpclass_ps_mask(a, SIMDE_MATH_FP_NINF);
|
||||
simde__mmask8 r5 = simde_mm256_fpclass_ps_mask(a, SIMDE_MATH_FP_DENORMAL);
|
||||
simde__mmask8 r6 = simde_mm256_fpclass_ps_mask(a, SIMDE_MATH_FP_NEGATIVE);
|
||||
simde__mmask8 r7 = simde_mm256_fpclass_ps_mask(a, SIMDE_MATH_FP_SNAN);
|
||||
|
||||
simde_test_x86_write_f32x8(2, a, SIMDE_TEST_VEC_POS_FIRST);
|
||||
simde_test_x86_write_mmask8(2, r0, SIMDE_TEST_VEC_POS_MIDDLE);
|
||||
simde_test_x86_write_mmask8(2, r1, SIMDE_TEST_VEC_POS_MIDDLE);
|
||||
simde_test_x86_write_mmask8(2, r2, SIMDE_TEST_VEC_POS_MIDDLE);
|
||||
simde_test_x86_write_mmask8(2, r3, SIMDE_TEST_VEC_POS_MIDDLE);
|
||||
simde_test_x86_write_mmask8(2, r4, SIMDE_TEST_VEC_POS_MIDDLE);
|
||||
simde_test_x86_write_mmask8(2, r5, SIMDE_TEST_VEC_POS_MIDDLE);
|
||||
simde_test_x86_write_mmask8(2, r6, SIMDE_TEST_VEC_POS_MIDDLE);
|
||||
simde_test_x86_write_mmask8(2, r7, SIMDE_TEST_VEC_POS_LAST);
|
||||
return 1;
|
||||
#endif
|
||||
}
|
||||
|
||||
static int
|
||||
test_simde_mm512_fpclass_ph_mask (SIMDE_MUNIT_TEST_ARGS) {
|
||||
#if 1
|
||||
simde_float16 qNaN = SIMDE_NANHF,
|
||||
denormal = simde_uint16_as_float16(0x0001),
|
||||
pzero = simde_uint16_as_float16(0x0000),
|
||||
nzero = simde_uint16_as_float16(0x8000),
|
||||
pinfinity = SIMDE_INFINITYHF, //simde_uint16_as_float16(0x7C00),
|
||||
ninfinity = SIMDE_NINFINITYHF, //simde_uint16_as_float16(0xFC00),
|
||||
sNaN = simde_uint16_as_float16(0x7C01);
|
||||
simde__m512h a = simde_mm512_set_ph(
|
||||
SIMDE_FLOAT16_VALUE( 31.00), SIMDE_FLOAT16_VALUE( 30.00), SIMDE_FLOAT16_VALUE( 29.00), SIMDE_FLOAT16_VALUE( 28.00),
|
||||
SIMDE_FLOAT16_VALUE( 27.00), SIMDE_FLOAT16_VALUE( 26.00), SIMDE_FLOAT16_VALUE( 25.00), SIMDE_FLOAT16_VALUE( 24.00),
|
||||
SIMDE_FLOAT16_VALUE( 23.00), SIMDE_FLOAT16_VALUE( 22.00), SIMDE_FLOAT16_VALUE( 21.00), SIMDE_FLOAT16_VALUE( 20.00),
|
||||
SIMDE_FLOAT16_VALUE( 19.00), SIMDE_FLOAT16_VALUE( 18.00), SIMDE_FLOAT16_VALUE( 17.00), SIMDE_FLOAT16_VALUE( 16.00),
|
||||
SIMDE_FLOAT16_VALUE( 15.00), SIMDE_FLOAT16_VALUE( 14.00), SIMDE_FLOAT16_VALUE( 13.00), SIMDE_FLOAT16_VALUE( 12.00),
|
||||
SIMDE_FLOAT16_VALUE( 11.00), SIMDE_FLOAT16_VALUE( 10.00), SIMDE_FLOAT16_VALUE( 9.00), SIMDE_FLOAT16_VALUE( 8.00),
|
||||
qNaN , pzero,
|
||||
nzero , pinfinity,
|
||||
ninfinity , denormal,
|
||||
SIMDE_FLOAT16_VALUE(-42.23), sNaN);
|
||||
#if !defined(SIMDE_ARCH_ARM_CHECK) || !SIMDE_ARCH_ARM_CHECK(4, 0)
|
||||
simde_assert_equal_mmask32(simde_mm512_fpclass_ph_mask(a, 0x01), 128);
|
||||
// armel silently converts the signaling NaN to a quiet one???
|
||||
#endif
|
||||
simde_assert_equal_mmask32(simde_mm512_fpclass_ph_mask(a, 0x02), 64);
|
||||
simde_assert_equal_mmask32(simde_mm512_fpclass_ph_mask(a, 0x04), 32);
|
||||
simde_assert_equal_mmask32(simde_mm512_fpclass_ph_mask(a, 0x08), 16);
|
||||
simde_assert_equal_mmask32(simde_mm512_fpclass_ph_mask(a, 0x10), 8);
|
||||
simde_assert_equal_mmask32(simde_mm512_fpclass_ph_mask(a, 0x20), 4);
|
||||
simde_assert_equal_mmask32(simde_mm512_fpclass_ph_mask(a, 0x40), 2);
|
||||
#if !defined(SIMDE_ARCH_ARM_CHECK) || !SIMDE_ARCH_ARM_CHECK(4, 0)
|
||||
simde_assert_equal_mmask32(simde_mm512_fpclass_ph_mask(a, 0x80), 1);
|
||||
#endif
|
||||
|
||||
return 0;
|
||||
#else
|
||||
fputc('\n', stdout);
|
||||
|
||||
simde_float16 qNaN = simde_uint16_as_float16(0x7E00),
|
||||
denormal = simde_uint16_as_float16(0x0001),
|
||||
pzero = simde_uint16_as_float16(0x0000),
|
||||
nzero = simde_uint16_as_float16(0x8000),
|
||||
pinfinity = simde_uint16_as_float16(0x7C00),
|
||||
ninfinity = simde_uint16_as_float16(0xFC00),
|
||||
sNaN = simde_uint16_as_float16(0x7C01);
|
||||
simde__m512h a = simde_mm512_set_ph(
|
||||
SIMDE_FLOAT16_VALUE( 31.00), SIMDE_FLOAT16_VALUE( 30.00), SIMDE_FLOAT16_VALUE( 29.00), SIMDE_FLOAT16_VALUE( 28.00),
|
||||
SIMDE_FLOAT16_VALUE( 27.00), SIMDE_FLOAT16_VALUE( 26.00), SIMDE_FLOAT16_VALUE( 25.00), SIMDE_FLOAT16_VALUE( 24.00),
|
||||
SIMDE_FLOAT16_VALUE( 23.00), SIMDE_FLOAT16_VALUE( 22.00), SIMDE_FLOAT16_VALUE( 21.00), SIMDE_FLOAT16_VALUE( 20.00),
|
||||
SIMDE_FLOAT16_VALUE( 19.00), SIMDE_FLOAT16_VALUE( 18.00), SIMDE_FLOAT16_VALUE( 17.00), SIMDE_FLOAT16_VALUE( 16.00),
|
||||
SIMDE_FLOAT16_VALUE( 15.00), SIMDE_FLOAT16_VALUE( 14.00), SIMDE_FLOAT16_VALUE( 13.00), SIMDE_FLOAT16_VALUE( 12.00),
|
||||
SIMDE_FLOAT16_VALUE( 11.00), SIMDE_FLOAT16_VALUE( 10.00), SIMDE_FLOAT16_VALUE( 9.00), SIMDE_FLOAT16_VALUE( 8.00),
|
||||
qNaN , pzero,
|
||||
nzero , pinfinity,
|
||||
ninfinity , denormal,
|
||||
SIMDE_FLOAT16_VALUE(-42.23), sNaN);
|
||||
simde__mmask32 r0 = simde_mm512_fpclass_ph_mask(a, SIMDE_MATH_FP_QNAN);
|
||||
simde__mmask32 r1 = simde_mm512_fpclass_ph_mask(a, SIMDE_MATH_FP_PZERO);
|
||||
simde__mmask32 r2 = simde_mm512_fpclass_ph_mask(a, SIMDE_MATH_FP_NZERO);
|
||||
simde__mmask32 r3 = simde_mm512_fpclass_ph_mask(a, SIMDE_MATH_FP_PINF);
|
||||
simde__mmask32 r4 = simde_mm512_fpclass_ph_mask(a, SIMDE_MATH_FP_NINF);
|
||||
simde__mmask32 r5 = simde_mm512_fpclass_ph_mask(a, SIMDE_MATH_FP_DENORMAL);
|
||||
simde__mmask32 r6 = simde_mm512_fpclass_ph_mask(a, SIMDE_MATH_FP_NEGATIVE);
|
||||
simde__mmask32 r7 = simde_mm512_fpclass_ph_mask(a, SIMDE_MATH_FP_SNAN);
|
||||
|
||||
simde_test_x86_write_f16x32(2, a, SIMDE_TEST_VEC_POS_FIRST);
|
||||
simde_test_x86_write_mmask32(2, r0, SIMDE_TEST_VEC_POS_MIDDLE);
|
||||
simde_test_x86_write_mmask32(2, r1, SIMDE_TEST_VEC_POS_MIDDLE);
|
||||
simde_test_x86_write_mmask32(2, r2, SIMDE_TEST_VEC_POS_MIDDLE);
|
||||
simde_test_x86_write_mmask32(2, r3, SIMDE_TEST_VEC_POS_MIDDLE);
|
||||
simde_test_x86_write_mmask32(2, r4, SIMDE_TEST_VEC_POS_MIDDLE);
|
||||
simde_test_x86_write_mmask32(2, r5, SIMDE_TEST_VEC_POS_MIDDLE);
|
||||
simde_test_x86_write_mmask32(2, r6, SIMDE_TEST_VEC_POS_MIDDLE);
|
||||
simde_test_x86_write_mmask32(2, r7, SIMDE_TEST_VEC_POS_LAST);
|
||||
return 1;
|
||||
#endif
|
||||
}
|
||||
|
||||
|
||||
static int
|
||||
test_simde_mm512_fpclass_pd_mask (SIMDE_MUNIT_TEST_ARGS) {
|
||||
#if 1
|
||||
simde_float64 sNaNf = simde_uint64_as_float64(0x7FF0000000000001),
|
||||
denormalf = simde_uint64_as_float64(0x0000000000000001);
|
||||
simde__m512d a = simde_mm512_set_pd(
|
||||
SIMDE_MATH_NAN , SIMDE_FLOAT64_C(0.0),
|
||||
-SIMDE_FLOAT64_C(0.0) , SIMDE_MATH_INFINITY,
|
||||
-SIMDE_MATH_INFINITY , denormalf,
|
||||
-SIMDE_FLOAT64_C(42.23), sNaNf);
|
||||
simde_assert_equal_mmask8(simde_mm512_fpclass_pd_mask(a, 0x01), 128);
|
||||
simde_assert_equal_mmask8(simde_mm512_fpclass_pd_mask(a, 0x02), 64);
|
||||
simde_assert_equal_mmask8(simde_mm512_fpclass_pd_mask(a, 0x04), 32);
|
||||
simde_assert_equal_mmask8(simde_mm512_fpclass_pd_mask(a, 0x08), 16);
|
||||
simde_assert_equal_mmask8(simde_mm512_fpclass_pd_mask(a, 0x10), 8);
|
||||
simde_assert_equal_mmask8(simde_mm512_fpclass_pd_mask(a, 0x20), 4);
|
||||
simde_assert_equal_mmask8(simde_mm512_fpclass_pd_mask(a, 0x40), 2);
|
||||
simde_assert_equal_mmask8(simde_mm512_fpclass_pd_mask(a, 0x80), 1);
|
||||
|
||||
return 0;
|
||||
#else
|
||||
fputc('\n', stdout);
|
||||
|
||||
simde_float64 sNaNf = simde_uint64_as_float64(0x7FF0000000000001),
|
||||
denormalf = simde_uint64_as_float64(0x0000000000000001);
|
||||
simde__m512d a = simde_mm512_set_pd(
|
||||
SIMDE_MATH_NAN , SIMDE_FLOAT64_C(0.0),
|
||||
-SIMDE_FLOAT64_C(0.0) , SIMDE_MATH_INFINITY,
|
||||
-SIMDE_MATH_INFINITY , denormalf,
|
||||
-SIMDE_FLOAT64_C(42.23), sNaNf);
|
||||
simde__mmask8 r0 = simde_mm512_fpclass_pd_mask(a, SIMDE_MATH_FP_QNAN);
|
||||
simde__mmask8 r1 = simde_mm512_fpclass_pd_mask(a, SIMDE_MATH_FP_PZERO);
|
||||
simde__mmask8 r2 = simde_mm512_fpclass_pd_mask(a, SIMDE_MATH_FP_NZERO);
|
||||
simde__mmask8 r3 = simde_mm512_fpclass_pd_mask(a, SIMDE_MATH_FP_PINF);
|
||||
simde__mmask8 r4 = simde_mm512_fpclass_pd_mask(a, SIMDE_MATH_FP_NINF);
|
||||
simde__mmask8 r5 = simde_mm512_fpclass_pd_mask(a, SIMDE_MATH_FP_DENORMAL);
|
||||
simde__mmask8 r6 = simde_mm512_fpclass_pd_mask(a, SIMDE_MATH_FP_NEGATIVE);
|
||||
simde__mmask8 r7 = simde_mm512_fpclass_pd_mask(a, SIMDE_MATH_FP_SNAN);
|
||||
|
||||
simde_test_x86_write_f64x8(2, a, SIMDE_TEST_VEC_POS_FIRST);
|
||||
simde_test_x86_write_mmask8(2, r0, SIMDE_TEST_VEC_POS_MIDDLE);
|
||||
simde_test_x86_write_mmask8(2, r1, SIMDE_TEST_VEC_POS_MIDDLE);
|
||||
simde_test_x86_write_mmask8(2, r2, SIMDE_TEST_VEC_POS_MIDDLE);
|
||||
simde_test_x86_write_mmask8(2, r3, SIMDE_TEST_VEC_POS_MIDDLE);
|
||||
simde_test_x86_write_mmask8(2, r4, SIMDE_TEST_VEC_POS_MIDDLE);
|
||||
simde_test_x86_write_mmask8(2, r5, SIMDE_TEST_VEC_POS_MIDDLE);
|
||||
simde_test_x86_write_mmask8(2, r6, SIMDE_TEST_VEC_POS_MIDDLE);
|
||||
simde_test_x86_write_mmask8(2, r7, SIMDE_TEST_VEC_POS_LAST);
|
||||
return 1;
|
||||
#endif
|
||||
}
|
||||
|
||||
SIMDE_TEST_FUNC_LIST_BEGIN
|
||||
SIMDE_TEST_FUNC_LIST_ENTRY(mm256_fpclass_ps_mask)
|
||||
SIMDE_TEST_FUNC_LIST_ENTRY(mm512_fpclass_ph_mask)
|
||||
SIMDE_TEST_FUNC_LIST_ENTRY(mm512_fpclass_pd_mask)
|
||||
SIMDE_TEST_FUNC_LIST_END
|
||||
|
||||
#include <test/x86/avx512/test-avx512-footer.h>
|
||||
834
thirdparty/simde/test/x86/avx512/gather.c
vendored
Normal file
834
thirdparty/simde/test/x86/avx512/gather.c
vendored
Normal file
|
|
@ -0,0 +1,834 @@
|
|||
/* SPDX-License-Identifier: MIT
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person
|
||||
* obtaining a copy of this software and associated documentation
|
||||
* files (the "Software"), to deal in the Software without
|
||||
* restriction, including without limitation the rights to use, copy,
|
||||
* modify, merge, publish, distribute, sublicense, and/or sell copies
|
||||
* of the Software, and to permit persons to whom the Software is
|
||||
* furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be
|
||||
* included in all copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
|
||||
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
|
||||
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
|
||||
* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
|
||||
* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
|
||||
* SOFTWARE.
|
||||
*
|
||||
* Copyright:
|
||||
* 2023 Michael R. Crusoe <crusoe@debian.org>
|
||||
*/
|
||||
|
||||
#define SIMDE_TEST_X86_AVX512_INSN gather
|
||||
|
||||
#include <test/x86/avx512/test-avx512.h>
|
||||
#include <simde/x86/avx512/gather.h>
|
||||
|
||||
static simde_float32 f32_buffer[2048];
|
||||
|
||||
static int
|
||||
test_simde_mm512_i32gather_ps (SIMDE_MUNIT_TEST_ARGS) {
|
||||
#if 1
|
||||
static const struct {
|
||||
const int32_t vindex[16];
|
||||
const simde_float32 r[16];
|
||||
} test_vec[] = {
|
||||
{ { INT32_C( 91), INT32_C( 6), INT32_C( 243), INT32_C( 110), INT32_C( 160), INT32_C( 8), INT32_C( 28), INT32_C( 103),
|
||||
INT32_C( 208), INT32_C( 170), INT32_C( 227), INT32_C( 152), INT32_C( 69), INT32_C( 234), INT32_C( 211), INT32_C( 131) },
|
||||
{ SIMDE_FLOAT32_C( 182.00), SIMDE_FLOAT32_C( 12.00), SIMDE_FLOAT32_C( 486.00), SIMDE_FLOAT32_C( 220.00),
|
||||
SIMDE_FLOAT32_C( 320.00), SIMDE_FLOAT32_C( 16.00), SIMDE_FLOAT32_C( 56.00), SIMDE_FLOAT32_C( 206.00),
|
||||
SIMDE_FLOAT32_C( 416.00), SIMDE_FLOAT32_C( 340.00), SIMDE_FLOAT32_C( 454.00), SIMDE_FLOAT32_C( 304.00),
|
||||
SIMDE_FLOAT32_C( 138.00), SIMDE_FLOAT32_C( 468.00), SIMDE_FLOAT32_C( 422.00), SIMDE_FLOAT32_C( 262.00) } },
|
||||
{ { INT32_C( 180), INT32_C( 211), INT32_C( 170), INT32_C( 243), INT32_C( 162), INT32_C( 194), INT32_C( 27), INT32_C( 150),
|
||||
INT32_C( 247), INT32_C( 93), INT32_C( 249), INT32_C( 19), INT32_C( 102), INT32_C( 42), INT32_C( 208), INT32_C( 193) },
|
||||
{ SIMDE_FLOAT32_C( 360.00), SIMDE_FLOAT32_C( 422.00), SIMDE_FLOAT32_C( 340.00), SIMDE_FLOAT32_C( 486.00),
|
||||
SIMDE_FLOAT32_C( 324.00), SIMDE_FLOAT32_C( 388.00), SIMDE_FLOAT32_C( 54.00), SIMDE_FLOAT32_C( 300.00),
|
||||
SIMDE_FLOAT32_C( 494.00), SIMDE_FLOAT32_C( 186.00), SIMDE_FLOAT32_C( 498.00), SIMDE_FLOAT32_C( 38.00),
|
||||
SIMDE_FLOAT32_C( 204.00), SIMDE_FLOAT32_C( 84.00), SIMDE_FLOAT32_C( 416.00), SIMDE_FLOAT32_C( 386.00) } },
|
||||
{ { INT32_C( 49), INT32_C( 196), INT32_C( 48), INT32_C( 209), INT32_C( 204), INT32_C( 76), INT32_C( 56), INT32_C( 156),
|
||||
INT32_C( 246), INT32_C( 27), INT32_C( 52), INT32_C( 60), INT32_C( 5), INT32_C( 8), INT32_C( 191), INT32_C( 186) },
|
||||
{ SIMDE_FLOAT32_C( 98.00), SIMDE_FLOAT32_C( 392.00), SIMDE_FLOAT32_C( 96.00), SIMDE_FLOAT32_C( 418.00),
|
||||
SIMDE_FLOAT32_C( 408.00), SIMDE_FLOAT32_C( 152.00), SIMDE_FLOAT32_C( 112.00), SIMDE_FLOAT32_C( 312.00),
|
||||
SIMDE_FLOAT32_C( 492.00), SIMDE_FLOAT32_C( 54.00), SIMDE_FLOAT32_C( 104.00), SIMDE_FLOAT32_C( 120.00),
|
||||
SIMDE_FLOAT32_C( 10.00), SIMDE_FLOAT32_C( 16.00), SIMDE_FLOAT32_C( 382.00), SIMDE_FLOAT32_C( 372.00) } },
|
||||
{ { INT32_C( 219), INT32_C( 105), INT32_C( 173), INT32_C( 126), INT32_C( 44), INT32_C( 200), INT32_C( 20), INT32_C( 35),
|
||||
INT32_C( 37), INT32_C( 14), INT32_C( 55), INT32_C( 139), INT32_C( 56), INT32_C( 7), INT32_C( 76), INT32_C( 105) },
|
||||
{ SIMDE_FLOAT32_C( 438.00), SIMDE_FLOAT32_C( 210.00), SIMDE_FLOAT32_C( 346.00), SIMDE_FLOAT32_C( 252.00),
|
||||
SIMDE_FLOAT32_C( 88.00), SIMDE_FLOAT32_C( 400.00), SIMDE_FLOAT32_C( 40.00), SIMDE_FLOAT32_C( 70.00),
|
||||
SIMDE_FLOAT32_C( 74.00), SIMDE_FLOAT32_C( 28.00), SIMDE_FLOAT32_C( 110.00), SIMDE_FLOAT32_C( 278.00),
|
||||
SIMDE_FLOAT32_C( 112.00), SIMDE_FLOAT32_C( 14.00), SIMDE_FLOAT32_C( 152.00), SIMDE_FLOAT32_C( 210.00) } },
|
||||
{ { INT32_C( 203), INT32_C( 124), INT32_C( 59), INT32_C( 151), INT32_C( 200), INT32_C( 115), INT32_C( 52), INT32_C( 191),
|
||||
INT32_C( 143), INT32_C( 104), INT32_C( 251), INT32_C( 148), INT32_C( 112), INT32_C( 186), INT32_C( 78), INT32_C( 76) },
|
||||
{ SIMDE_FLOAT32_C( 406.00), SIMDE_FLOAT32_C( 248.00), SIMDE_FLOAT32_C( 118.00), SIMDE_FLOAT32_C( 302.00),
|
||||
SIMDE_FLOAT32_C( 400.00), SIMDE_FLOAT32_C( 230.00), SIMDE_FLOAT32_C( 104.00), SIMDE_FLOAT32_C( 382.00),
|
||||
SIMDE_FLOAT32_C( 286.00), SIMDE_FLOAT32_C( 208.00), SIMDE_FLOAT32_C( 502.00), SIMDE_FLOAT32_C( 296.00),
|
||||
SIMDE_FLOAT32_C( 224.00), SIMDE_FLOAT32_C( 372.00), SIMDE_FLOAT32_C( 156.00), SIMDE_FLOAT32_C( 152.00) } },
|
||||
{ { INT32_C( 36), INT32_C( 251), INT32_C( 202), INT32_C( 80), INT32_C( 195), INT32_C( 222), INT32_C( 115), INT32_C( 232),
|
||||
INT32_C( 236), INT32_C( 170), INT32_C( 115), INT32_C( 37), INT32_C( 178), INT32_C( 192), INT32_C( 142), INT32_C( 125) },
|
||||
{ SIMDE_FLOAT32_C( 72.00), SIMDE_FLOAT32_C( 502.00), SIMDE_FLOAT32_C( 404.00), SIMDE_FLOAT32_C( 160.00),
|
||||
SIMDE_FLOAT32_C( 390.00), SIMDE_FLOAT32_C( 444.00), SIMDE_FLOAT32_C( 230.00), SIMDE_FLOAT32_C( 464.00),
|
||||
SIMDE_FLOAT32_C( 472.00), SIMDE_FLOAT32_C( 340.00), SIMDE_FLOAT32_C( 230.00), SIMDE_FLOAT32_C( 74.00),
|
||||
SIMDE_FLOAT32_C( 356.00), SIMDE_FLOAT32_C( 384.00), SIMDE_FLOAT32_C( 284.00), SIMDE_FLOAT32_C( 250.00) } },
|
||||
{ { INT32_C( 60), INT32_C( 201), INT32_C( 21), INT32_C( 5), INT32_C( 61), INT32_C( 73), INT32_C( 196), INT32_C( 204),
|
||||
INT32_C( 177), INT32_C( 191), INT32_C( 96), INT32_C( 34), INT32_C( 121), INT32_C( 175), INT32_C( 110), INT32_C( 157) },
|
||||
{ SIMDE_FLOAT32_C( 120.00), SIMDE_FLOAT32_C( 402.00), SIMDE_FLOAT32_C( 42.00), SIMDE_FLOAT32_C( 10.00),
|
||||
SIMDE_FLOAT32_C( 122.00), SIMDE_FLOAT32_C( 146.00), SIMDE_FLOAT32_C( 392.00), SIMDE_FLOAT32_C( 408.00),
|
||||
SIMDE_FLOAT32_C( 354.00), SIMDE_FLOAT32_C( 382.00), SIMDE_FLOAT32_C( 192.00), SIMDE_FLOAT32_C( 68.00),
|
||||
SIMDE_FLOAT32_C( 242.00), SIMDE_FLOAT32_C( 350.00), SIMDE_FLOAT32_C( 220.00), SIMDE_FLOAT32_C( 314.00) } },
|
||||
{ { INT32_C( 170), INT32_C( 56), INT32_C( 237), INT32_C( 110), INT32_C( 22), INT32_C( 97), INT32_C( 86), INT32_C( 3),
|
||||
INT32_C( 11), INT32_C( 202), INT32_C( 40), INT32_C( 189), INT32_C( 138), INT32_C( 182), INT32_C( 59), INT32_C( 198) },
|
||||
{ SIMDE_FLOAT32_C( 340.00), SIMDE_FLOAT32_C( 112.00), SIMDE_FLOAT32_C( 474.00), SIMDE_FLOAT32_C( 220.00),
|
||||
SIMDE_FLOAT32_C( 44.00), SIMDE_FLOAT32_C( 194.00), SIMDE_FLOAT32_C( 172.00), SIMDE_FLOAT32_C( 6.00),
|
||||
SIMDE_FLOAT32_C( 22.00), SIMDE_FLOAT32_C( 404.00), SIMDE_FLOAT32_C( 80.00), SIMDE_FLOAT32_C( 378.00),
|
||||
SIMDE_FLOAT32_C( 276.00), SIMDE_FLOAT32_C( 364.00), SIMDE_FLOAT32_C( 118.00), SIMDE_FLOAT32_C( 396.00) } },
|
||||
};
|
||||
for (size_t i = 0 ; i < (sizeof(f32_buffer) / sizeof(f32_buffer[0])) ; i++) { f32_buffer[i] = HEDLEY_STATIC_CAST(simde_float32, i); }
|
||||
|
||||
for (size_t i = 0 ; i < (sizeof(test_vec) / sizeof(test_vec[0])) ; i++) {
|
||||
simde__m512i vindex = simde_mm512_loadu_epi32(test_vec[i].vindex);
|
||||
simde__m512 r = simde_mm512_i32gather_ps(vindex, HEDLEY_STATIC_CAST(const void*, f32_buffer), 8);
|
||||
simde_test_x86_assert_equal_f32x16(r, simde_mm512_loadu_ps(test_vec[i].r), 1);
|
||||
}
|
||||
|
||||
return 0;
|
||||
#else
|
||||
fputc('\n', stdout);
|
||||
|
||||
for (size_t i = 0 ; i < (sizeof(f32_buffer) / sizeof(f32_buffer[0])) ; i++) { f32_buffer[i] = HEDLEY_STATIC_CAST(simde_float32, i); }
|
||||
|
||||
for (int i = 0; i < 8; i++) {
|
||||
simde__m512i vindex = simde_mm512_set_epi32(
|
||||
HEDLEY_STATIC_CAST(int32_t, (simde_test_codegen_random_u8())),
|
||||
HEDLEY_STATIC_CAST(int32_t, (simde_test_codegen_random_u8())),
|
||||
HEDLEY_STATIC_CAST(int32_t, (simde_test_codegen_random_u8())),
|
||||
HEDLEY_STATIC_CAST(int32_t, (simde_test_codegen_random_u8())),
|
||||
HEDLEY_STATIC_CAST(int32_t, (simde_test_codegen_random_u8())),
|
||||
HEDLEY_STATIC_CAST(int32_t, (simde_test_codegen_random_u8())),
|
||||
HEDLEY_STATIC_CAST(int32_t, (simde_test_codegen_random_u8())),
|
||||
HEDLEY_STATIC_CAST(int32_t, (simde_test_codegen_random_u8())),
|
||||
HEDLEY_STATIC_CAST(int32_t, (simde_test_codegen_random_u8())),
|
||||
HEDLEY_STATIC_CAST(int32_t, (simde_test_codegen_random_u8())),
|
||||
HEDLEY_STATIC_CAST(int32_t, (simde_test_codegen_random_u8())),
|
||||
HEDLEY_STATIC_CAST(int32_t, (simde_test_codegen_random_u8())),
|
||||
HEDLEY_STATIC_CAST(int32_t, (simde_test_codegen_random_u8())),
|
||||
HEDLEY_STATIC_CAST(int32_t, (simde_test_codegen_random_u8())),
|
||||
HEDLEY_STATIC_CAST(int32_t, (simde_test_codegen_random_u8())),
|
||||
HEDLEY_STATIC_CAST(int32_t, (simde_test_codegen_random_u8())));
|
||||
simde__m512 r = simde_mm512_i32gather_ps(vindex, f32_buffer, 8);
|
||||
|
||||
simde_test_x86_write_i32x16(2, vindex, SIMDE_TEST_VEC_POS_FIRST);
|
||||
simde_test_x86_write_f32x16(2, r, SIMDE_TEST_VEC_POS_LAST);
|
||||
}
|
||||
return 1;
|
||||
#endif
|
||||
}
|
||||
|
||||
static int32_t i32_buffer[2048];
|
||||
|
||||
static int
|
||||
test_simde_mm512_i64gather_epi32 (SIMDE_MUNIT_TEST_ARGS) {
|
||||
#if 1
|
||||
static const struct {
|
||||
const int64_t vindex[8];
|
||||
const int32_t r[8];
|
||||
} test_vec[] = {
|
||||
{ { INT64_C( 99), INT64_C( 54), INT64_C( 101), INT64_C( 76),
|
||||
INT64_C( 81), INT64_C( 199), INT64_C( 78), INT64_C( 219) },
|
||||
{ INT32_C( 198), INT32_C( 108), INT32_C( 202), INT32_C( 152), INT32_C( 162), INT32_C( 398), INT32_C( 156), INT32_C( 438) } },
|
||||
{ { INT64_C( 10), INT64_C( 225), INT64_C( 193), INT64_C( 220),
|
||||
INT64_C( 147), INT64_C( 180), INT64_C( 252), INT64_C( 161) },
|
||||
{ INT32_C( 20), INT32_C( 450), INT32_C( 386), INT32_C( 440), INT32_C( 294), INT32_C( 360), INT32_C( 504), INT32_C( 322) } },
|
||||
{ { INT64_C( 40), INT64_C( 182), INT64_C( 201), INT64_C( 129),
|
||||
INT64_C( 121), INT64_C( 142), INT64_C( 14), INT64_C( 145) },
|
||||
{ INT32_C( 80), INT32_C( 364), INT32_C( 402), INT32_C( 258), INT32_C( 242), INT32_C( 284), INT32_C( 28), INT32_C( 290) } },
|
||||
{ { INT64_C( 60), INT64_C( 92), INT64_C( 26), INT64_C( 140),
|
||||
INT64_C( 174), INT64_C( 29), INT64_C( 214), INT64_C( 18) },
|
||||
{ INT32_C( 120), INT32_C( 184), INT32_C( 52), INT32_C( 280), INT32_C( 348), INT32_C( 58), INT32_C( 428), INT32_C( 36) } },
|
||||
{ { INT64_C( 84), INT64_C( 60), INT64_C( 94), INT64_C( 165),
|
||||
INT64_C( 3), INT64_C( 172), INT64_C( 128), INT64_C( 14) },
|
||||
{ INT32_C( 168), INT32_C( 120), INT32_C( 188), INT32_C( 330), INT32_C( 6), INT32_C( 344), INT32_C( 256), INT32_C( 28) } },
|
||||
{ { INT64_C( 141), INT64_C( 66), INT64_C( 234), INT64_C( 32),
|
||||
INT64_C( 246), INT64_C( 231), INT64_C( 193), INT64_C( 30) },
|
||||
{ INT32_C( 282), INT32_C( 132), INT32_C( 468), INT32_C( 64), INT32_C( 492), INT32_C( 462), INT32_C( 386), INT32_C( 60) } },
|
||||
{ { INT64_C( 157), INT64_C( 139), INT64_C( 159), INT64_C( 23),
|
||||
INT64_C( 25), INT64_C( 173), INT64_C( 168), INT64_C( 86) },
|
||||
{ INT32_C( 314), INT32_C( 278), INT32_C( 318), INT32_C( 46), INT32_C( 50), INT32_C( 346), INT32_C( 336), INT32_C( 172) } },
|
||||
{ { INT64_C( 9), INT64_C( 194), INT64_C( 226), INT64_C( 183),
|
||||
INT64_C( 224), INT64_C( 184), INT64_C( 201), INT64_C( 52) },
|
||||
{ INT32_C( 18), INT32_C( 388), INT32_C( 452), INT32_C( 366), INT32_C( 448), INT32_C( 368), INT32_C( 402), INT32_C( 104) } }
|
||||
};
|
||||
for (size_t i = 0 ; i < (sizeof(i32_buffer) / sizeof(i32_buffer[0])) ; i++) { i32_buffer[i] = HEDLEY_STATIC_CAST(int32_t, i); }
|
||||
|
||||
for (size_t i = 0 ; i < (sizeof(test_vec) / sizeof(test_vec[0])) ; i++) {
|
||||
simde__m512i vindex = simde_mm512_loadu_epi64(test_vec[i].vindex);
|
||||
simde__m256i r = simde_mm512_i64gather_epi32(vindex, HEDLEY_STATIC_CAST(const void*, i32_buffer), 8);
|
||||
simde_test_x86_assert_equal_i32x8(r, simde_mm256_loadu_epi32(test_vec[i].r));
|
||||
}
|
||||
|
||||
return 0;
|
||||
#else
|
||||
fputc('\n', stdout);
|
||||
|
||||
for (size_t i = 0 ; i < (sizeof(i32_buffer) / sizeof(i32_buffer[0])) ; i++) { i32_buffer[i] = HEDLEY_STATIC_CAST(int32_t, i); }
|
||||
|
||||
for (int i = 0; i < 8; i++) {
|
||||
simde__m512i vindex = simde_mm512_set_epi64(
|
||||
HEDLEY_STATIC_CAST(int64_t, (simde_test_codegen_random_u8())),
|
||||
HEDLEY_STATIC_CAST(int64_t, (simde_test_codegen_random_u8())),
|
||||
HEDLEY_STATIC_CAST(int64_t, (simde_test_codegen_random_u8())),
|
||||
HEDLEY_STATIC_CAST(int64_t, (simde_test_codegen_random_u8())),
|
||||
HEDLEY_STATIC_CAST(int64_t, (simde_test_codegen_random_u8())),
|
||||
HEDLEY_STATIC_CAST(int64_t, (simde_test_codegen_random_u8())),
|
||||
HEDLEY_STATIC_CAST(int64_t, (simde_test_codegen_random_u8())),
|
||||
HEDLEY_STATIC_CAST(int64_t, (simde_test_codegen_random_u8())));
|
||||
simde__m256i r = simde_mm512_i64gather_epi32(vindex, i32_buffer, 8);
|
||||
|
||||
simde_test_x86_write_i64x8(2, vindex, SIMDE_TEST_VEC_POS_FIRST);
|
||||
simde_test_x86_write_i32x8(2, r, SIMDE_TEST_VEC_POS_LAST);
|
||||
}
|
||||
return 1;
|
||||
#endif
|
||||
}
|
||||
|
||||
static int
|
||||
test_simde_mm512_mask_i64gather_epi32 (SIMDE_MUNIT_TEST_ARGS) {
|
||||
#if 1
|
||||
static const struct {
|
||||
const int32_t src[8];
|
||||
simde__mmask8 k;
|
||||
const int64_t vindex[8];
|
||||
const int32_t r[8];
|
||||
} test_vec[] = {
|
||||
{ { -INT32_C( 1723041393), INT32_C( 96312955), INT32_C( 2084620542), INT32_C( 1198400529), -INT32_C( 415893220), -INT32_C( 1193950777), -INT32_C( 764347007), -INT32_C( 1902811906) },
|
||||
UINT8_C(222),
|
||||
{ INT64_C( 225), INT64_C( 39), INT64_C( 89), INT64_C( 127),
|
||||
INT64_C( 228), INT64_C( 94), INT64_C( 125), INT64_C( 172) },
|
||||
{ -INT32_C( 1723041393), INT32_C( 78), INT32_C( 178), INT32_C( 254), INT32_C( 456), -INT32_C( 1193950777), INT32_C( 250), INT32_C( 344) } },
|
||||
{ { -INT32_C( 1010959970), INT32_C( 1642005864), -INT32_C( 64436422), -INT32_C( 1703026276), -INT32_C( 1248309423), -INT32_C( 980211996), INT32_C( 843377997), -INT32_C( 354500277) },
|
||||
UINT8_C(186),
|
||||
{ INT64_C( 156), INT64_C( 173), INT64_C( 34), INT64_C( 161),
|
||||
INT64_C( 140), INT64_C( 132), INT64_C( 219), INT64_C( 83) },
|
||||
{ -INT32_C( 1010959970), INT32_C( 346), -INT32_C( 64436422), INT32_C( 322), INT32_C( 280), INT32_C( 264), INT32_C( 843377997), INT32_C( 166) } },
|
||||
{ { -INT32_C( 1913595988), -INT32_C( 1545696684), INT32_C( 1233622050), INT32_C( 345394215), INT32_C( 1365297296), INT32_C( 1124879015), -INT32_C( 2082197769), INT32_C( 1607974834) },
|
||||
UINT8_C(151),
|
||||
{ INT64_C( 199), INT64_C( 236), INT64_C( 235), INT64_C( 81),
|
||||
INT64_C( 203), INT64_C( 143), INT64_C( 115), INT64_C( 95) },
|
||||
{ INT32_C( 398), INT32_C( 472), INT32_C( 470), INT32_C( 345394215), INT32_C( 406), INT32_C( 1124879015), -INT32_C( 2082197769), INT32_C( 190) } },
|
||||
{ { INT32_C( 1669774358), INT32_C( 468949843), INT32_C( 1170359803), INT32_C( 2134639953), -INT32_C( 1456291863), INT32_C( 1564512662), INT32_C( 1219373949), -INT32_C( 777575750) },
|
||||
UINT8_C(222),
|
||||
{ INT64_C( 46), INT64_C( 52), INT64_C( 49), INT64_C( 201),
|
||||
INT64_C( 39), INT64_C( 77), INT64_C( 196), INT64_C( 108) },
|
||||
{ INT32_C( 1669774358), INT32_C( 104), INT32_C( 98), INT32_C( 402), INT32_C( 78), INT32_C( 1564512662), INT32_C( 392), INT32_C( 216) } },
|
||||
{ { INT32_C( 364710159), INT32_C( 83770693), INT32_C( 10200943), INT32_C( 327022823), -INT32_C( 909261145), -INT32_C( 1683513747), -INT32_C( 94053934), INT32_C( 895887398) },
|
||||
UINT8_C( 49),
|
||||
{ INT64_C( 36), INT64_C( 74), INT64_C( 118), INT64_C( 97),
|
||||
INT64_C( 73), INT64_C( 123), INT64_C( 208), INT64_C( 240) },
|
||||
{ INT32_C( 72), INT32_C( 83770693), INT32_C( 10200943), INT32_C( 327022823), INT32_C( 146), INT32_C( 246), -INT32_C( 94053934), INT32_C( 895887398) } },
|
||||
{ { INT32_C( 249090070), INT32_C( 330689357), INT32_C( 1468104376), -INT32_C( 14083034), -INT32_C( 1457183871), -INT32_C( 1361356150), -INT32_C( 300985947), -INT32_C( 488710196) },
|
||||
UINT8_C(175),
|
||||
{ INT64_C( 182), INT64_C( 241), INT64_C( 252), INT64_C( 161),
|
||||
INT64_C( 166), INT64_C( 16), INT64_C( 90), INT64_C( 37) },
|
||||
{ INT32_C( 364), INT32_C( 482), INT32_C( 504), INT32_C( 322), -INT32_C( 1457183871), INT32_C( 32), -INT32_C( 300985947), INT32_C( 74) } },
|
||||
{ { -INT32_C( 1387548271), -INT32_C( 30520614), -INT32_C( 913778577), INT32_C( 74331827), INT32_C( 617700421), -INT32_C( 237784261), INT32_C( 1267978148), INT32_C( 1886449119) },
|
||||
UINT8_C(158),
|
||||
{ INT64_C( 187), INT64_C( 30), INT64_C( 120), INT64_C( 5),
|
||||
INT64_C( 76), INT64_C( 118), INT64_C( 116), INT64_C( 36) },
|
||||
{ -INT32_C( 1387548271), INT32_C( 60), INT32_C( 240), INT32_C( 10), INT32_C( 152), -INT32_C( 237784261), INT32_C( 1267978148), INT32_C( 72) } },
|
||||
{ { INT32_C( 886521342), INT32_C( 142204076), INT32_C( 1615044013), INT32_C( 1074083184), -INT32_C( 1256238904), INT32_C( 2069074112), -INT32_C( 92222546), INT32_C( 1075835970) },
|
||||
UINT8_C( 49),
|
||||
{ INT64_C( 246), INT64_C( 117), INT64_C( 221), INT64_C( 210),
|
||||
INT64_C( 238), INT64_C( 230), INT64_C( 127), INT64_C( 140) },
|
||||
{ INT32_C( 492), INT32_C( 142204076), INT32_C( 1615044013), INT32_C( 1074083184), INT32_C( 476), INT32_C( 460), -INT32_C( 92222546), INT32_C( 1075835970) } },
|
||||
};
|
||||
for (size_t i = 0 ; i < (sizeof(i32_buffer) / sizeof(i32_buffer[0])) ; i++) { i32_buffer[i] = HEDLEY_STATIC_CAST(int32_t, i); }
|
||||
|
||||
for (size_t i = 0 ; i < (sizeof(test_vec) / sizeof(test_vec[0])) ; i++) {
|
||||
simde__m256i src = simde_mm256_loadu_epi32(test_vec[i].src);
|
||||
simde__m512i vindex = simde_mm512_loadu_epi64(test_vec[i].vindex);
|
||||
simde__m256i r = simde_mm512_mask_i64gather_epi32(src, test_vec[i].k, vindex, HEDLEY_STATIC_CAST(const void*, i32_buffer), 8);
|
||||
simde_test_x86_assert_equal_i32x8(r, simde_mm256_loadu_epi32(test_vec[i].r));
|
||||
}
|
||||
|
||||
return 0;
|
||||
#else
|
||||
fputc('\n', stdout);
|
||||
|
||||
for (size_t i = 0 ; i < (sizeof(i32_buffer) / sizeof(i32_buffer[0])) ; i++) { i32_buffer[i] = HEDLEY_STATIC_CAST(int32_t, i); }
|
||||
|
||||
for (int i = 0; i < 8; i++) {
|
||||
simde__m256i src = simde_test_x86_random_i32x8();
|
||||
simde__mmask8 k = simde_test_x86_random_mmask8();
|
||||
simde__m512i vindex = simde_mm512_set_epi64(
|
||||
HEDLEY_STATIC_CAST(int64_t, (simde_test_codegen_random_u8())),
|
||||
HEDLEY_STATIC_CAST(int64_t, (simde_test_codegen_random_u8())),
|
||||
HEDLEY_STATIC_CAST(int64_t, (simde_test_codegen_random_u8())),
|
||||
HEDLEY_STATIC_CAST(int64_t, (simde_test_codegen_random_u8())),
|
||||
HEDLEY_STATIC_CAST(int64_t, (simde_test_codegen_random_u8())),
|
||||
HEDLEY_STATIC_CAST(int64_t, (simde_test_codegen_random_u8())),
|
||||
HEDLEY_STATIC_CAST(int64_t, (simde_test_codegen_random_u8())),
|
||||
HEDLEY_STATIC_CAST(int64_t, (simde_test_codegen_random_u8())));
|
||||
simde__m256i r = simde_mm512_mask_i64gather_epi32(src, k, vindex, i32_buffer, 8);
|
||||
|
||||
simde_test_x86_write_i32x8(2, src, SIMDE_TEST_VEC_POS_FIRST);
|
||||
simde_test_x86_write_mmask8(2, k, SIMDE_TEST_VEC_POS_MIDDLE);
|
||||
simde_test_x86_write_i64x8(2, vindex, SIMDE_TEST_VEC_POS_MIDDLE);
|
||||
simde_test_x86_write_i32x8(2, r, SIMDE_TEST_VEC_POS_LAST);
|
||||
}
|
||||
return 1;
|
||||
#endif
|
||||
}
|
||||
|
||||
static int64_t i64_buffer[2048];
|
||||
|
||||
static int
|
||||
test_simde_mm512_i64gather_epi64 (SIMDE_MUNIT_TEST_ARGS) {
|
||||
#if 1
|
||||
static const struct {
|
||||
const int64_t vindex[8];
|
||||
const int64_t r[8];
|
||||
} test_vec[] = {
|
||||
{ { INT64_C( 101), INT64_C( 41), INT64_C( 148), INT64_C( 45),
|
||||
INT64_C( 233), INT64_C( 157), INT64_C( 59), INT64_C( 178) },
|
||||
{ INT64_C( 101), INT64_C( 41), INT64_C( 148), INT64_C( 45),
|
||||
INT64_C( 233), INT64_C( 157), INT64_C( 59), INT64_C( 178) } },
|
||||
{ { INT64_C( 105), INT64_C( 251), INT64_C( 212), INT64_C( 98),
|
||||
INT64_C( 193), INT64_C( 235), INT64_C( 152), INT64_C( 121) },
|
||||
{ INT64_C( 105), INT64_C( 251), INT64_C( 212), INT64_C( 98),
|
||||
INT64_C( 193), INT64_C( 235), INT64_C( 152), INT64_C( 121) } },
|
||||
{ { INT64_C( 133), INT64_C( 65), INT64_C( 37), INT64_C( 189),
|
||||
INT64_C( 106), INT64_C( 7), INT64_C( 106), INT64_C( 95) },
|
||||
{ INT64_C( 133), INT64_C( 65), INT64_C( 37), INT64_C( 189),
|
||||
INT64_C( 106), INT64_C( 7), INT64_C( 106), INT64_C( 95) } },
|
||||
{ { INT64_C( 87), INT64_C( 37), INT64_C( 119), INT64_C( 6),
|
||||
INT64_C( 254), INT64_C( 23), INT64_C( 237), INT64_C( 99) },
|
||||
{ INT64_C( 87), INT64_C( 37), INT64_C( 119), INT64_C( 6),
|
||||
INT64_C( 254), INT64_C( 23), INT64_C( 237), INT64_C( 99) } },
|
||||
{ { INT64_C( 64), INT64_C( 129), INT64_C( 145), INT64_C( 41),
|
||||
INT64_C( 30), INT64_C( 204), INT64_C( 219), INT64_C( 135) },
|
||||
{ INT64_C( 64), INT64_C( 129), INT64_C( 145), INT64_C( 41),
|
||||
INT64_C( 30), INT64_C( 204), INT64_C( 219), INT64_C( 135) } },
|
||||
{ { INT64_C( 199), INT64_C( 176), INT64_C( 234), INT64_C( 136),
|
||||
INT64_C( 155), INT64_C( 130), INT64_C( 1), INT64_C( 32) },
|
||||
{ INT64_C( 199), INT64_C( 176), INT64_C( 234), INT64_C( 136),
|
||||
INT64_C( 155), INT64_C( 130), INT64_C( 1), INT64_C( 32) } },
|
||||
{ { INT64_C( 195), INT64_C( 38), INT64_C( 221), INT64_C( 46),
|
||||
INT64_C( 46), INT64_C( 71), INT64_C( 141), INT64_C( 133) },
|
||||
{ INT64_C( 195), INT64_C( 38), INT64_C( 221), INT64_C( 46),
|
||||
INT64_C( 46), INT64_C( 71), INT64_C( 141), INT64_C( 133) } },
|
||||
{ { INT64_C( 109), INT64_C( 4), INT64_C( 139), INT64_C( 107),
|
||||
INT64_C( 27), INT64_C( 120), INT64_C( 206), INT64_C( 91) },
|
||||
{ INT64_C( 109), INT64_C( 4), INT64_C( 139), INT64_C( 107),
|
||||
INT64_C( 27), INT64_C( 120), INT64_C( 206), INT64_C( 91) } },
|
||||
};
|
||||
for (size_t i = 0 ; i < (sizeof(i64_buffer) / sizeof(i64_buffer[0])) ; i++) { i64_buffer[i] = HEDLEY_STATIC_CAST(int64_t, i); }
|
||||
|
||||
for (size_t i = 0 ; i < (sizeof(test_vec) / sizeof(test_vec[0])) ; i++) {
|
||||
simde__m512i vindex = simde_mm512_loadu_epi64(test_vec[i].vindex);
|
||||
simde__m512i r = simde_mm512_i64gather_epi64(vindex, HEDLEY_STATIC_CAST(const void*, i64_buffer), 8);
|
||||
simde_test_x86_assert_equal_i64x8(r, simde_mm512_loadu_epi64(test_vec[i].r));
|
||||
}
|
||||
|
||||
return 0;
|
||||
#else
|
||||
fputc('\n', stdout);
|
||||
|
||||
for (size_t i = 0 ; i < (sizeof(i64_buffer) / sizeof(i64_buffer[0])) ; i++) { i64_buffer[i] = HEDLEY_STATIC_CAST(int64_t, i); }
|
||||
|
||||
for (int i = 0; i < 8; i++) {
|
||||
simde__m512i vindex = simde_mm512_set_epi64(
|
||||
HEDLEY_STATIC_CAST(int64_t, (simde_test_codegen_random_u8())),
|
||||
HEDLEY_STATIC_CAST(int64_t, (simde_test_codegen_random_u8())),
|
||||
HEDLEY_STATIC_CAST(int64_t, (simde_test_codegen_random_u8())),
|
||||
HEDLEY_STATIC_CAST(int64_t, (simde_test_codegen_random_u8())),
|
||||
HEDLEY_STATIC_CAST(int64_t, (simde_test_codegen_random_u8())),
|
||||
HEDLEY_STATIC_CAST(int64_t, (simde_test_codegen_random_u8())),
|
||||
HEDLEY_STATIC_CAST(int64_t, (simde_test_codegen_random_u8())),
|
||||
HEDLEY_STATIC_CAST(int64_t, (simde_test_codegen_random_u8())));
|
||||
simde__m512i r = simde_mm512_i64gather_epi64(vindex, i64_buffer, 8);
|
||||
|
||||
simde_test_x86_write_i64x8(2, vindex, SIMDE_TEST_VEC_POS_FIRST);
|
||||
simde_test_x86_write_i64x8(2, r, SIMDE_TEST_VEC_POS_LAST);
|
||||
}
|
||||
return 1;
|
||||
#endif
|
||||
}
|
||||
|
||||
static int
|
||||
test_simde_mm512_mask_i64gather_epi64 (SIMDE_MUNIT_TEST_ARGS) {
|
||||
#if 1
|
||||
static const struct {
|
||||
const int64_t src[8];
|
||||
const simde__mmask8 k;
|
||||
const int64_t vindex[8];
|
||||
const int64_t r[8];
|
||||
} test_vec[] = {
|
||||
{ { INT64_C( 1984428018067240100), -INT64_C( 2414100954086902818), -INT64_C( 7968884413910531848), -INT64_C( 7442120368302142668),
|
||||
-INT64_C( 1577987146540387782), INT64_C( 3145884408933699792), INT64_C( 7500261619853647789), INT64_C( 4440725167482125331) },
|
||||
UINT8_C(146),
|
||||
{ INT64_C( 244), INT64_C( 60), INT64_C( 159), INT64_C( 209),
|
||||
INT64_C( 85), INT64_C( 137), INT64_C( 162), INT64_C( 38) },
|
||||
{ INT64_C( 1984428018067240100), INT64_C( 60), -INT64_C( 7968884413910531848), -INT64_C( 7442120368302142668),
|
||||
INT64_C( 85), INT64_C( 3145884408933699792), INT64_C( 7500261619853647789), INT64_C( 38) } },
|
||||
{ { INT64_C( 8327864985755151479), -INT64_C( 1459148486616868764), INT64_C( 6641168328753596664), -INT64_C( 3826986200259966617),
|
||||
INT64_C( 2793149591949622332), INT64_C( 8247096397624666714), -INT64_C( 855906521198206630), INT64_C( 6421170022369021438) },
|
||||
UINT8_C(209),
|
||||
{ INT64_C( 203), INT64_C( 169), INT64_C( 146), INT64_C( 13),
|
||||
INT64_C( 108), INT64_C( 184), INT64_C( 103), INT64_C( 215) },
|
||||
{ INT64_C( 203), -INT64_C( 1459148486616868764), INT64_C( 6641168328753596664), -INT64_C( 3826986200259966617),
|
||||
INT64_C( 108), INT64_C( 8247096397624666714), INT64_C( 103), INT64_C( 215) } },
|
||||
{ { -INT64_C( 4217405121059753845), -INT64_C( 6340427972967515186), INT64_C( 4277609785035412472), INT64_C( 3678509232149819592),
|
||||
-INT64_C( 1096405365637948000), INT64_C( 6415084517789473284), -INT64_C( 5479961641881318327), -INT64_C( 8354189485610091469) },
|
||||
UINT8_C( 82),
|
||||
{ INT64_C( 96), INT64_C( 143), INT64_C( 115), INT64_C( 41),
|
||||
INT64_C( 88), INT64_C( 99), INT64_C( 45), INT64_C( 114) },
|
||||
{ -INT64_C( 4217405121059753845), INT64_C( 143), INT64_C( 4277609785035412472), INT64_C( 3678509232149819592),
|
||||
INT64_C( 88), INT64_C( 6415084517789473284), INT64_C( 45), -INT64_C( 8354189485610091469) } },
|
||||
{ { INT64_C( 6815402617960893271), INT64_C( 9045757209107582482), -INT64_C( 3302276028123487259), INT64_C( 6435406385315028869),
|
||||
INT64_C( 7035813729533305780), -INT64_C( 3582544329707164279), INT64_C( 3235787571848589986), -INT64_C( 4625661861519826318) },
|
||||
UINT8_C(124),
|
||||
{ INT64_C( 116), INT64_C( 5), INT64_C( 203), INT64_C( 176),
|
||||
INT64_C( 169), INT64_C( 45), INT64_C( 57), INT64_C( 150) },
|
||||
{ INT64_C( 6815402617960893271), INT64_C( 9045757209107582482), INT64_C( 203), INT64_C( 176),
|
||||
INT64_C( 169), INT64_C( 45), INT64_C( 57), -INT64_C( 4625661861519826318) } },
|
||||
{ { -INT64_C( 16802405404441373), -INT64_C( 6756292520287217418), -INT64_C( 814750763960127012), -INT64_C( 8236839995799470735),
|
||||
INT64_C( 8299698144798519266), -INT64_C( 8886312731377019828), INT64_C( 4007477744424802858), INT64_C( 80784553426371048) },
|
||||
UINT8_C( 49),
|
||||
{ INT64_C( 207), INT64_C( 48), INT64_C( 174), INT64_C( 66),
|
||||
INT64_C( 94), INT64_C( 34), INT64_C( 142), INT64_C( 50) },
|
||||
{ INT64_C( 207), -INT64_C( 6756292520287217418), -INT64_C( 814750763960127012), -INT64_C( 8236839995799470735),
|
||||
INT64_C( 94), INT64_C( 34), INT64_C( 4007477744424802858), INT64_C( 80784553426371048) } },
|
||||
{ { -INT64_C( 6772747226937910689), -INT64_C( 8472783511363212521), -INT64_C( 1502889334311093007), INT64_C( 6011105884756628186),
|
||||
-INT64_C( 5026248478382406314), INT64_C( 4155880484410075353), -INT64_C( 2617910794231458140), -INT64_C( 1555010071818938333) },
|
||||
UINT8_C(195),
|
||||
{ INT64_C( 150), INT64_C( 136), INT64_C( 102), INT64_C( 196),
|
||||
INT64_C( 199), INT64_C( 33), INT64_C( 157), INT64_C( 111) },
|
||||
{ INT64_C( 150), INT64_C( 136), -INT64_C( 1502889334311093007), INT64_C( 6011105884756628186),
|
||||
-INT64_C( 5026248478382406314), INT64_C( 4155880484410075353), INT64_C( 157), INT64_C( 111) } },
|
||||
{ { -INT64_C( 4491793711365636258), -INT64_C( 1328107704014444259), -INT64_C( 6128717313240618832), -INT64_C( 2870187715760072204),
|
||||
-INT64_C( 1011190250109803830), INT64_C( 500726760839559664), -INT64_C( 3218339942577638504), -INT64_C( 7362335563379129215) },
|
||||
UINT8_C(156),
|
||||
{ INT64_C( 176), INT64_C( 206), INT64_C( 112), INT64_C( 55),
|
||||
INT64_C( 197), INT64_C( 97), INT64_C( 40), INT64_C( 126) },
|
||||
{ -INT64_C( 4491793711365636258), -INT64_C( 1328107704014444259), INT64_C( 112), INT64_C( 55),
|
||||
INT64_C( 197), INT64_C( 500726760839559664), -INT64_C( 3218339942577638504), INT64_C( 126) } },
|
||||
{ { -INT64_C( 7905828216691741248), INT64_C( 1060955372299416592), INT64_C( 4047459014712079572), -INT64_C( 4861187214007100603),
|
||||
INT64_C( 5293616568447294916), INT64_C( 144743206574221481), -INT64_C( 7228352896858791953), INT64_C( 8795018482906635862) },
|
||||
UINT8_C(140),
|
||||
{ INT64_C( 122), INT64_C( 94), INT64_C( 196), INT64_C( 47),
|
||||
INT64_C( 212), INT64_C( 13), INT64_C( 216), INT64_C( 188) },
|
||||
{ -INT64_C( 7905828216691741248), INT64_C( 1060955372299416592), INT64_C( 196), INT64_C( 47),
|
||||
INT64_C( 5293616568447294916), INT64_C( 144743206574221481), -INT64_C( 7228352896858791953), INT64_C( 188) } },
|
||||
};
|
||||
for (size_t i = 0 ; i < (sizeof(i64_buffer) / sizeof(i64_buffer[0])) ; i++) { i64_buffer[i] = HEDLEY_STATIC_CAST(int64_t, i); }
|
||||
|
||||
for (size_t i = 0 ; i < (sizeof(test_vec) / sizeof(test_vec[0])) ; i++) {
|
||||
simde__m512i src = simde_mm512_loadu_epi64(test_vec[i].src);
|
||||
simde__m512i vindex = simde_mm512_loadu_epi64(test_vec[i].vindex);
|
||||
simde__m512i r = simde_mm512_mask_i64gather_epi64(src, test_vec[i].k, vindex, HEDLEY_STATIC_CAST(const void*, i64_buffer), 8);
|
||||
simde_test_x86_assert_equal_i64x8(r, simde_mm512_loadu_epi64(test_vec[i].r));
|
||||
}
|
||||
|
||||
return 0;
|
||||
#else
|
||||
fputc('\n', stdout);
|
||||
|
||||
for (size_t i = 0 ; i < (sizeof(i64_buffer) / sizeof(i64_buffer[0])) ; i++) { i64_buffer[i] = HEDLEY_STATIC_CAST(int64_t, i); }
|
||||
|
||||
for (int i = 0; i < 8; i++) {
|
||||
simde__m512i src = simde_test_x86_random_i64x8();
|
||||
simde__mmask8 k = simde_test_x86_random_mmask8();
|
||||
simde__m512i vindex = simde_mm512_set_epi64(
|
||||
HEDLEY_STATIC_CAST(int64_t, (simde_test_codegen_random_u8())),
|
||||
HEDLEY_STATIC_CAST(int64_t, (simde_test_codegen_random_u8())),
|
||||
HEDLEY_STATIC_CAST(int64_t, (simde_test_codegen_random_u8())),
|
||||
HEDLEY_STATIC_CAST(int64_t, (simde_test_codegen_random_u8())),
|
||||
HEDLEY_STATIC_CAST(int64_t, (simde_test_codegen_random_u8())),
|
||||
HEDLEY_STATIC_CAST(int64_t, (simde_test_codegen_random_u8())),
|
||||
HEDLEY_STATIC_CAST(int64_t, (simde_test_codegen_random_u8())),
|
||||
HEDLEY_STATIC_CAST(int64_t, (simde_test_codegen_random_u8())));
|
||||
simde__m512i r = simde_mm512_mask_i64gather_epi64(src, k, vindex, i64_buffer, 8);
|
||||
|
||||
simde_test_x86_write_i64x8(2, src, SIMDE_TEST_VEC_POS_FIRST);
|
||||
simde_test_x86_write_mmask8(2, k, SIMDE_TEST_VEC_POS_MIDDLE);
|
||||
simde_test_x86_write_i64x8(2, vindex, SIMDE_TEST_VEC_POS_MIDDLE);
|
||||
simde_test_x86_write_i64x8(2, r, SIMDE_TEST_VEC_POS_LAST);
|
||||
}
|
||||
return 1;
|
||||
#endif
|
||||
}
|
||||
|
||||
static int
|
||||
test_simde_mm512_i64gather_ps (SIMDE_MUNIT_TEST_ARGS) {
|
||||
#if 1
|
||||
static const struct {
|
||||
const int64_t vindex[8];
|
||||
const simde_float32 r[8];
|
||||
} test_vec[] = {
|
||||
{ { INT64_C( 63), INT64_C( 72), INT64_C( 219), INT64_C( 201),
|
||||
INT64_C( 236), INT64_C( 211), INT64_C( 60), INT64_C( 171) },
|
||||
{ SIMDE_FLOAT32_C( 126.00), SIMDE_FLOAT32_C( 144.00), SIMDE_FLOAT32_C( 438.00), SIMDE_FLOAT32_C( 402.00),
|
||||
SIMDE_FLOAT32_C( 472.00), SIMDE_FLOAT32_C( 422.00), SIMDE_FLOAT32_C( 120.00), SIMDE_FLOAT32_C( 342.00) } },
|
||||
{ { INT64_C( 163), INT64_C( 212), INT64_C( 237), INT64_C( 236),
|
||||
INT64_C( 38), INT64_C( 221), INT64_C( 176), INT64_C( 15) },
|
||||
{ SIMDE_FLOAT32_C( 326.00), SIMDE_FLOAT32_C( 424.00), SIMDE_FLOAT32_C( 474.00), SIMDE_FLOAT32_C( 472.00),
|
||||
SIMDE_FLOAT32_C( 76.00), SIMDE_FLOAT32_C( 442.00), SIMDE_FLOAT32_C( 352.00), SIMDE_FLOAT32_C( 30.00) } },
|
||||
{ { INT64_C( 108), INT64_C( 118), INT64_C( 135), INT64_C( 245),
|
||||
INT64_C( 24), INT64_C( 69), INT64_C( 121), INT64_C( 104) },
|
||||
{ SIMDE_FLOAT32_C( 216.00), SIMDE_FLOAT32_C( 236.00), SIMDE_FLOAT32_C( 270.00), SIMDE_FLOAT32_C( 490.00),
|
||||
SIMDE_FLOAT32_C( 48.00), SIMDE_FLOAT32_C( 138.00), SIMDE_FLOAT32_C( 242.00), SIMDE_FLOAT32_C( 208.00) } },
|
||||
{ { INT64_C( 38), INT64_C( 30), INT64_C( 220), INT64_C( 63),
|
||||
INT64_C( 166), INT64_C( 80), INT64_C( 194), INT64_C( 230) },
|
||||
{ SIMDE_FLOAT32_C( 76.00), SIMDE_FLOAT32_C( 60.00), SIMDE_FLOAT32_C( 440.00), SIMDE_FLOAT32_C( 126.00),
|
||||
SIMDE_FLOAT32_C( 332.00), SIMDE_FLOAT32_C( 160.00), SIMDE_FLOAT32_C( 388.00), SIMDE_FLOAT32_C( 460.00) } },
|
||||
{ { INT64_C( 152), INT64_C( 158), INT64_C( 175), INT64_C( 132),
|
||||
INT64_C( 113), INT64_C( 235), INT64_C( 47), INT64_C( 21) },
|
||||
{ SIMDE_FLOAT32_C( 304.00), SIMDE_FLOAT32_C( 316.00), SIMDE_FLOAT32_C( 350.00), SIMDE_FLOAT32_C( 264.00),
|
||||
SIMDE_FLOAT32_C( 226.00), SIMDE_FLOAT32_C( 470.00), SIMDE_FLOAT32_C( 94.00), SIMDE_FLOAT32_C( 42.00) } },
|
||||
{ { INT64_C( 191), INT64_C( 29), INT64_C( 1), INT64_C( 229),
|
||||
INT64_C( 250), INT64_C( 177), INT64_C( 244), INT64_C( 102) },
|
||||
{ SIMDE_FLOAT32_C( 382.00), SIMDE_FLOAT32_C( 58.00), SIMDE_FLOAT32_C( 2.00), SIMDE_FLOAT32_C( 458.00),
|
||||
SIMDE_FLOAT32_C( 500.00), SIMDE_FLOAT32_C( 354.00), SIMDE_FLOAT32_C( 488.00), SIMDE_FLOAT32_C( 204.00) } },
|
||||
{ { INT64_C( 40), INT64_C( 123), INT64_C( 91), INT64_C( 64),
|
||||
INT64_C( 192), INT64_C( 213), INT64_C( 169), INT64_C( 230) },
|
||||
{ SIMDE_FLOAT32_C( 80.00), SIMDE_FLOAT32_C( 246.00), SIMDE_FLOAT32_C( 182.00), SIMDE_FLOAT32_C( 128.00),
|
||||
SIMDE_FLOAT32_C( 384.00), SIMDE_FLOAT32_C( 426.00), SIMDE_FLOAT32_C( 338.00), SIMDE_FLOAT32_C( 460.00) } },
|
||||
{ { INT64_C( 243), INT64_C( 133), INT64_C( 37), INT64_C( 154),
|
||||
INT64_C( 213), INT64_C( 232), INT64_C( 128), INT64_C( 109) },
|
||||
{ SIMDE_FLOAT32_C( 486.00), SIMDE_FLOAT32_C( 266.00), SIMDE_FLOAT32_C( 74.00), SIMDE_FLOAT32_C( 308.00),
|
||||
SIMDE_FLOAT32_C( 426.00), SIMDE_FLOAT32_C( 464.00), SIMDE_FLOAT32_C( 256.00), SIMDE_FLOAT32_C( 218.00) } },
|
||||
};
|
||||
for (size_t i = 0 ; i < (sizeof(f32_buffer) / sizeof(f32_buffer[0])) ; i++) { f32_buffer[i] = HEDLEY_STATIC_CAST(simde_float32, i); }
|
||||
|
||||
for (size_t i = 0 ; i < (sizeof(test_vec) / sizeof(test_vec[0])) ; i++) {
|
||||
simde__m512i vindex = simde_mm512_loadu_epi64(test_vec[i].vindex);
|
||||
simde__m256 r = simde_mm512_i64gather_ps(vindex, HEDLEY_STATIC_CAST(const void*, f32_buffer), 8);
|
||||
simde_test_x86_assert_equal_f32x8(r, simde_mm256_loadu_ps(test_vec[i].r), 1);
|
||||
}
|
||||
|
||||
return 0;
|
||||
#else
|
||||
fputc('\n', stdout);
|
||||
|
||||
for (size_t i = 0 ; i < (sizeof(f32_buffer) / sizeof(f32_buffer[0])) ; i++) { f32_buffer[i] = HEDLEY_STATIC_CAST(simde_float32, i); }
|
||||
|
||||
for (int i = 0; i < 8; i++) {
|
||||
simde__m512i vindex = simde_mm512_set_epi64(
|
||||
HEDLEY_STATIC_CAST(int64_t, (simde_test_codegen_random_u8())),
|
||||
HEDLEY_STATIC_CAST(int64_t, (simde_test_codegen_random_u8())),
|
||||
HEDLEY_STATIC_CAST(int64_t, (simde_test_codegen_random_u8())),
|
||||
HEDLEY_STATIC_CAST(int64_t, (simde_test_codegen_random_u8())),
|
||||
HEDLEY_STATIC_CAST(int64_t, (simde_test_codegen_random_u8())),
|
||||
HEDLEY_STATIC_CAST(int64_t, (simde_test_codegen_random_u8())),
|
||||
HEDLEY_STATIC_CAST(int64_t, (simde_test_codegen_random_u8())),
|
||||
HEDLEY_STATIC_CAST(int64_t, (simde_test_codegen_random_u8())));
|
||||
simde__m256 r = simde_mm512_i64gather_ps(vindex, f32_buffer, 8);
|
||||
|
||||
simde_test_x86_write_i64x8(2, vindex, SIMDE_TEST_VEC_POS_FIRST);
|
||||
simde_test_x86_write_f32x8(2, r, SIMDE_TEST_VEC_POS_LAST);
|
||||
}
|
||||
return 1;
|
||||
#endif
|
||||
}
|
||||
|
||||
static int
|
||||
test_simde_mm512_mask_i64gather_ps (SIMDE_MUNIT_TEST_ARGS) {
|
||||
#if 1
|
||||
static const struct {
|
||||
const simde_float32 src[8];
|
||||
const simde__mmask8 k;
|
||||
const int64_t vindex[8];
|
||||
const simde_float32 r[8];
|
||||
} test_vec[] = {
|
||||
{ { SIMDE_FLOAT32_C( -244.06), SIMDE_FLOAT32_C( -573.24), SIMDE_FLOAT32_C( 330.53), SIMDE_FLOAT32_C( 541.20),
|
||||
SIMDE_FLOAT32_C( 260.56), SIMDE_FLOAT32_C( -655.21), SIMDE_FLOAT32_C( 72.81), SIMDE_FLOAT32_C( 696.96) },
|
||||
UINT8_C(166),
|
||||
{ INT64_C( 109), INT64_C( 244), INT64_C( 66), INT64_C( 157),
|
||||
INT64_C( 184), INT64_C( 241), INT64_C( 218), INT64_C( 179) },
|
||||
{ SIMDE_FLOAT32_C( -244.06), SIMDE_FLOAT32_C( 488.00), SIMDE_FLOAT32_C( 132.00), SIMDE_FLOAT32_C( 541.20),
|
||||
SIMDE_FLOAT32_C( 260.56), SIMDE_FLOAT32_C( 482.00), SIMDE_FLOAT32_C( 72.81), SIMDE_FLOAT32_C( 358.00) } },
|
||||
{ { SIMDE_FLOAT32_C( -472.29), SIMDE_FLOAT32_C( -259.46), SIMDE_FLOAT32_C( 370.51), SIMDE_FLOAT32_C( -860.10),
|
||||
SIMDE_FLOAT32_C( -882.37), SIMDE_FLOAT32_C( -758.79), SIMDE_FLOAT32_C( -30.79), SIMDE_FLOAT32_C( 738.31) },
|
||||
UINT8_C(136),
|
||||
{ INT64_C( 55), INT64_C( 59), INT64_C( 72), INT64_C( 112),
|
||||
INT64_C( 109), INT64_C( 238), INT64_C( 110), INT64_C( 164) },
|
||||
{ SIMDE_FLOAT32_C( -472.29), SIMDE_FLOAT32_C( -259.46), SIMDE_FLOAT32_C( 370.51), SIMDE_FLOAT32_C( 224.00),
|
||||
SIMDE_FLOAT32_C( -882.37), SIMDE_FLOAT32_C( -758.79), SIMDE_FLOAT32_C( -30.79), SIMDE_FLOAT32_C( 328.00) } },
|
||||
{ { SIMDE_FLOAT32_C( 774.25), SIMDE_FLOAT32_C( -229.38), SIMDE_FLOAT32_C( 492.09), SIMDE_FLOAT32_C( -152.94),
|
||||
SIMDE_FLOAT32_C( -532.42), SIMDE_FLOAT32_C( 268.84), SIMDE_FLOAT32_C( -308.73), SIMDE_FLOAT32_C( -58.59) },
|
||||
UINT8_C(187),
|
||||
{ INT64_C( 141), INT64_C( 226), INT64_C( 173), INT64_C( 103),
|
||||
INT64_C( 149), INT64_C( 89), INT64_C( 113), INT64_C( 232) },
|
||||
{ SIMDE_FLOAT32_C( 282.00), SIMDE_FLOAT32_C( 452.00), SIMDE_FLOAT32_C( 492.09), SIMDE_FLOAT32_C( 206.00),
|
||||
SIMDE_FLOAT32_C( 298.00), SIMDE_FLOAT32_C( 178.00), SIMDE_FLOAT32_C( -308.73), SIMDE_FLOAT32_C( 464.00) } },
|
||||
{ { SIMDE_FLOAT32_C( 196.06), SIMDE_FLOAT32_C( 707.06), SIMDE_FLOAT32_C( 839.97), SIMDE_FLOAT32_C( -834.73),
|
||||
SIMDE_FLOAT32_C( 445.37), SIMDE_FLOAT32_C( 482.10), SIMDE_FLOAT32_C( 110.19), SIMDE_FLOAT32_C( -322.27) },
|
||||
UINT8_C(152),
|
||||
{ INT64_C( 52), INT64_C( 100), INT64_C( 134), INT64_C( 163),
|
||||
INT64_C( 9), INT64_C( 196), INT64_C( 204), INT64_C( 220) },
|
||||
{ SIMDE_FLOAT32_C( 196.06), SIMDE_FLOAT32_C( 707.06), SIMDE_FLOAT32_C( 839.97), SIMDE_FLOAT32_C( 326.00),
|
||||
SIMDE_FLOAT32_C( 18.00), SIMDE_FLOAT32_C( 482.10), SIMDE_FLOAT32_C( 110.19), SIMDE_FLOAT32_C( 440.00) } },
|
||||
{ { SIMDE_FLOAT32_C( 813.58), SIMDE_FLOAT32_C( -58.24), SIMDE_FLOAT32_C( -597.26), SIMDE_FLOAT32_C( -495.15),
|
||||
SIMDE_FLOAT32_C( 883.17), SIMDE_FLOAT32_C( -319.10), SIMDE_FLOAT32_C( 518.95), SIMDE_FLOAT32_C( -680.42) },
|
||||
UINT8_C(189),
|
||||
{ INT64_C( 43), INT64_C( 164), INT64_C( 22), INT64_C( 156),
|
||||
INT64_C( 140), INT64_C( 41), INT64_C( 102), INT64_C( 84) },
|
||||
{ SIMDE_FLOAT32_C( 86.00), SIMDE_FLOAT32_C( -58.24), SIMDE_FLOAT32_C( 44.00), SIMDE_FLOAT32_C( 312.00),
|
||||
SIMDE_FLOAT32_C( 280.00), SIMDE_FLOAT32_C( 82.00), SIMDE_FLOAT32_C( 518.95), SIMDE_FLOAT32_C( 168.00) } },
|
||||
{ { SIMDE_FLOAT32_C( 626.86), SIMDE_FLOAT32_C( 109.68), SIMDE_FLOAT32_C( 468.68), SIMDE_FLOAT32_C( -262.95),
|
||||
SIMDE_FLOAT32_C( 787.42), SIMDE_FLOAT32_C( -572.11), SIMDE_FLOAT32_C( -69.46), SIMDE_FLOAT32_C( -718.08) },
|
||||
UINT8_C(196),
|
||||
{ INT64_C( 83), INT64_C( 135), INT64_C( 136), INT64_C( 31),
|
||||
INT64_C( 99), INT64_C( 206), INT64_C( 33), INT64_C( 184) },
|
||||
{ SIMDE_FLOAT32_C( 626.86), SIMDE_FLOAT32_C( 109.68), SIMDE_FLOAT32_C( 272.00), SIMDE_FLOAT32_C( -262.95),
|
||||
SIMDE_FLOAT32_C( 787.42), SIMDE_FLOAT32_C( -572.11), SIMDE_FLOAT32_C( 66.00), SIMDE_FLOAT32_C( 368.00) } },
|
||||
{ { SIMDE_FLOAT32_C( -94.89), SIMDE_FLOAT32_C( 933.21), SIMDE_FLOAT32_C( -858.75), SIMDE_FLOAT32_C( -575.94),
|
||||
SIMDE_FLOAT32_C( -747.21), SIMDE_FLOAT32_C( 350.61), SIMDE_FLOAT32_C( -208.11), SIMDE_FLOAT32_C( -199.38) },
|
||||
UINT8_C(156),
|
||||
{ INT64_C( 145), INT64_C( 140), INT64_C( 198), INT64_C( 247),
|
||||
INT64_C( 224), INT64_C( 125), INT64_C( 25), INT64_C( 133) },
|
||||
{ SIMDE_FLOAT32_C( -94.89), SIMDE_FLOAT32_C( 933.21), SIMDE_FLOAT32_C( 396.00), SIMDE_FLOAT32_C( 494.00),
|
||||
SIMDE_FLOAT32_C( 448.00), SIMDE_FLOAT32_C( 350.61), SIMDE_FLOAT32_C( -208.11), SIMDE_FLOAT32_C( 266.00) } },
|
||||
{ { SIMDE_FLOAT32_C( 441.64), SIMDE_FLOAT32_C( 310.56), SIMDE_FLOAT32_C( -169.63), SIMDE_FLOAT32_C( -627.82),
|
||||
SIMDE_FLOAT32_C( 592.49), SIMDE_FLOAT32_C( -549.48), SIMDE_FLOAT32_C( 6.28), SIMDE_FLOAT32_C( 516.21) },
|
||||
UINT8_C( 15),
|
||||
{ INT64_C( 27), INT64_C( 154), INT64_C( 221), INT64_C( 60),
|
||||
INT64_C( 82), INT64_C( 226), INT64_C( 138), INT64_C( 27) },
|
||||
{ SIMDE_FLOAT32_C( 54.00), SIMDE_FLOAT32_C( 308.00), SIMDE_FLOAT32_C( 442.00), SIMDE_FLOAT32_C( 120.00),
|
||||
SIMDE_FLOAT32_C( 592.49), SIMDE_FLOAT32_C( -549.48), SIMDE_FLOAT32_C( 6.28), SIMDE_FLOAT32_C( 516.21) } },
|
||||
};
|
||||
for (size_t i = 0 ; i < (sizeof(f32_buffer) / sizeof(f32_buffer[0])) ; i++) { f32_buffer[i] = HEDLEY_STATIC_CAST(simde_float32, i); }
|
||||
|
||||
for (size_t i = 0 ; i < (sizeof(test_vec) / sizeof(test_vec[0])) ; i++) {
|
||||
simde__m256 src = simde_mm256_loadu_ps(test_vec[i].src);
|
||||
simde__m512i vindex = simde_mm512_loadu_epi64(test_vec[i].vindex);
|
||||
simde__m256 r = simde_mm512_mask_i64gather_ps(src, test_vec[i].k, vindex, HEDLEY_STATIC_CAST(const void*, f32_buffer), 8);
|
||||
simde_test_x86_assert_equal_f32x8(r, simde_mm256_loadu_ps(test_vec[i].r), 1);
|
||||
}
|
||||
|
||||
return 0;
|
||||
#else
|
||||
fputc('\n', stdout);
|
||||
|
||||
for (size_t i = 0 ; i < (sizeof(f32_buffer) / sizeof(f32_buffer[0])) ; i++) { f32_buffer[i] = HEDLEY_STATIC_CAST(simde_float32, i); }
|
||||
|
||||
for (int i = 0; i < 8; i++) {
|
||||
simde__m256 src = simde_test_x86_random_f32x8(SIMDE_FLOAT32_C(-1000.0), SIMDE_FLOAT32_C(1000.0));
|
||||
simde__mmask8 k = simde_test_x86_random_mmask8();
|
||||
simde__m512i vindex = simde_mm512_set_epi64(
|
||||
HEDLEY_STATIC_CAST(int64_t, (simde_test_codegen_random_u8())),
|
||||
HEDLEY_STATIC_CAST(int64_t, (simde_test_codegen_random_u8())),
|
||||
HEDLEY_STATIC_CAST(int64_t, (simde_test_codegen_random_u8())),
|
||||
HEDLEY_STATIC_CAST(int64_t, (simde_test_codegen_random_u8())),
|
||||
HEDLEY_STATIC_CAST(int64_t, (simde_test_codegen_random_u8())),
|
||||
HEDLEY_STATIC_CAST(int64_t, (simde_test_codegen_random_u8())),
|
||||
HEDLEY_STATIC_CAST(int64_t, (simde_test_codegen_random_u8())),
|
||||
HEDLEY_STATIC_CAST(int64_t, (simde_test_codegen_random_u8())));
|
||||
simde__m256 r = simde_mm512_mask_i64gather_ps(src, k, vindex, f32_buffer, 8);
|
||||
|
||||
simde_test_x86_write_f32x8(2, src, SIMDE_TEST_VEC_POS_FIRST);
|
||||
simde_test_x86_write_mmask8(2, k, SIMDE_TEST_VEC_POS_MIDDLE);
|
||||
simde_test_x86_write_i64x8(2, vindex, SIMDE_TEST_VEC_POS_MIDDLE);
|
||||
simde_test_x86_write_f32x8(2, r, SIMDE_TEST_VEC_POS_LAST);
|
||||
}
|
||||
return 1;
|
||||
#endif
|
||||
}
|
||||
|
||||
static simde_float64 f64_buffer[2048];
|
||||
|
||||
static int
|
||||
test_simde_mm512_i64gather_pd (SIMDE_MUNIT_TEST_ARGS) {
|
||||
#if 1
|
||||
static const struct {
|
||||
const int64_t vindex[8];
|
||||
const simde_float64 r[8];
|
||||
} test_vec[] = {
|
||||
{ { INT64_C( 81), INT64_C( 130), INT64_C( 178), INT64_C( 162),
|
||||
INT64_C( 53), INT64_C( 146), INT64_C( 137), INT64_C( 11) },
|
||||
{ SIMDE_FLOAT64_C( 81.00), SIMDE_FLOAT64_C( 130.00), SIMDE_FLOAT64_C( 178.00), SIMDE_FLOAT64_C( 162.00),
|
||||
SIMDE_FLOAT64_C( 53.00), SIMDE_FLOAT64_C( 146.00), SIMDE_FLOAT64_C( 137.00), SIMDE_FLOAT64_C( 11.00) } },
|
||||
{ { INT64_C( 253), INT64_C( 179), INT64_C( 7), INT64_C( 97),
|
||||
INT64_C( 77), INT64_C( 212), INT64_C( 130), INT64_C( 42) },
|
||||
{ SIMDE_FLOAT64_C( 253.00), SIMDE_FLOAT64_C( 179.00), SIMDE_FLOAT64_C( 7.00), SIMDE_FLOAT64_C( 97.00),
|
||||
SIMDE_FLOAT64_C( 77.00), SIMDE_FLOAT64_C( 212.00), SIMDE_FLOAT64_C( 130.00), SIMDE_FLOAT64_C( 42.00) } },
|
||||
{ { INT64_C( 173), INT64_C( 174), INT64_C( 104), INT64_C( 50),
|
||||
INT64_C( 140), INT64_C( 171), INT64_C( 4), INT64_C( 218) },
|
||||
{ SIMDE_FLOAT64_C( 173.00), SIMDE_FLOAT64_C( 174.00), SIMDE_FLOAT64_C( 104.00), SIMDE_FLOAT64_C( 50.00),
|
||||
SIMDE_FLOAT64_C( 140.00), SIMDE_FLOAT64_C( 171.00), SIMDE_FLOAT64_C( 4.00), SIMDE_FLOAT64_C( 218.00) } },
|
||||
{ { INT64_C( 82), INT64_C( 179), INT64_C( 104), INT64_C( 230),
|
||||
INT64_C( 78), INT64_C( 154), INT64_C( 88), INT64_C( 159) },
|
||||
{ SIMDE_FLOAT64_C( 82.00), SIMDE_FLOAT64_C( 179.00), SIMDE_FLOAT64_C( 104.00), SIMDE_FLOAT64_C( 230.00),
|
||||
SIMDE_FLOAT64_C( 78.00), SIMDE_FLOAT64_C( 154.00), SIMDE_FLOAT64_C( 88.00), SIMDE_FLOAT64_C( 159.00) } },
|
||||
{ { INT64_C( 28), INT64_C( 10), INT64_C( 65), INT64_C( 81),
|
||||
INT64_C( 156), INT64_C( 202), INT64_C( 93), INT64_C( 153) },
|
||||
{ SIMDE_FLOAT64_C( 28.00), SIMDE_FLOAT64_C( 10.00), SIMDE_FLOAT64_C( 65.00), SIMDE_FLOAT64_C( 81.00),
|
||||
SIMDE_FLOAT64_C( 156.00), SIMDE_FLOAT64_C( 202.00), SIMDE_FLOAT64_C( 93.00), SIMDE_FLOAT64_C( 153.00) } },
|
||||
{ { INT64_C( 125), INT64_C( 100), INT64_C( 251), INT64_C( 202),
|
||||
INT64_C( 56), INT64_C( 125), INT64_C( 245), INT64_C( 230) },
|
||||
{ SIMDE_FLOAT64_C( 125.00), SIMDE_FLOAT64_C( 100.00), SIMDE_FLOAT64_C( 251.00), SIMDE_FLOAT64_C( 202.00),
|
||||
SIMDE_FLOAT64_C( 56.00), SIMDE_FLOAT64_C( 125.00), SIMDE_FLOAT64_C( 245.00), SIMDE_FLOAT64_C( 230.00) } },
|
||||
{ { INT64_C( 43), INT64_C( 93), INT64_C( 24), INT64_C( 184),
|
||||
INT64_C( 8), INT64_C( 28), INT64_C( 146), INT64_C( 90) },
|
||||
{ SIMDE_FLOAT64_C( 43.00), SIMDE_FLOAT64_C( 93.00), SIMDE_FLOAT64_C( 24.00), SIMDE_FLOAT64_C( 184.00),
|
||||
SIMDE_FLOAT64_C( 8.00), SIMDE_FLOAT64_C( 28.00), SIMDE_FLOAT64_C( 146.00), SIMDE_FLOAT64_C( 90.00) } },
|
||||
{ { INT64_C( 208), INT64_C( 250), INT64_C( 64), INT64_C( 30),
|
||||
INT64_C( 148), INT64_C( 152), INT64_C( 190), INT64_C( 177) },
|
||||
{ SIMDE_FLOAT64_C( 208.00), SIMDE_FLOAT64_C( 250.00), SIMDE_FLOAT64_C( 64.00), SIMDE_FLOAT64_C( 30.00),
|
||||
SIMDE_FLOAT64_C( 148.00), SIMDE_FLOAT64_C( 152.00), SIMDE_FLOAT64_C( 190.00), SIMDE_FLOAT64_C( 177.00) } },
|
||||
};
|
||||
for (size_t i = 0 ; i < (sizeof(f64_buffer) / sizeof(f64_buffer[0])) ; i++) { f64_buffer[i] = HEDLEY_STATIC_CAST(simde_float64, i); }
|
||||
|
||||
for (size_t i = 0 ; i < (sizeof(test_vec) / sizeof(test_vec[0])) ; i++) {
|
||||
simde__m512i vindex = simde_mm512_loadu_epi64(test_vec[i].vindex);
|
||||
simde__m512d r = simde_mm512_i64gather_pd(vindex, f64_buffer, 8);
|
||||
simde_test_x86_assert_equal_f64x8(r, simde_mm512_loadu_pd(test_vec[i].r), 1);
|
||||
}
|
||||
|
||||
return 0;
|
||||
#else
|
||||
fputc('\n', stdout);
|
||||
|
||||
for (size_t i = 0 ; i < (sizeof(f64_buffer) / sizeof(f64_buffer[0])) ; i++) { f64_buffer[i] = HEDLEY_STATIC_CAST(simde_float64, i); }
|
||||
|
||||
for (int i = 0; i < 8; i++) {
|
||||
simde__m512i vindex = simde_mm512_set_epi64(
|
||||
HEDLEY_STATIC_CAST(int64_t, (simde_test_codegen_random_u8())),
|
||||
HEDLEY_STATIC_CAST(int64_t, (simde_test_codegen_random_u8())),
|
||||
HEDLEY_STATIC_CAST(int64_t, (simde_test_codegen_random_u8())),
|
||||
HEDLEY_STATIC_CAST(int64_t, (simde_test_codegen_random_u8())),
|
||||
HEDLEY_STATIC_CAST(int64_t, (simde_test_codegen_random_u8())),
|
||||
HEDLEY_STATIC_CAST(int64_t, (simde_test_codegen_random_u8())),
|
||||
HEDLEY_STATIC_CAST(int64_t, (simde_test_codegen_random_u8())),
|
||||
HEDLEY_STATIC_CAST(int64_t, (simde_test_codegen_random_u8())));
|
||||
simde__m512d r = simde_mm512_i64gather_pd(vindex, f64_buffer, 8);
|
||||
|
||||
simde_test_x86_write_i64x8(2, vindex, SIMDE_TEST_VEC_POS_FIRST);
|
||||
simde_test_x86_write_f64x8(2, r, SIMDE_TEST_VEC_POS_LAST);
|
||||
}
|
||||
return 1;
|
||||
#endif
|
||||
}
|
||||
|
||||
static int
|
||||
test_simde_mm512_mask_i64gather_pd (SIMDE_MUNIT_TEST_ARGS) {
|
||||
#if 1
|
||||
static const struct {
|
||||
const simde_float64 src[8];
|
||||
const simde__mmask8 k;
|
||||
const int64_t vindex[8];
|
||||
const simde_float64 r[8];
|
||||
} test_vec[] = {
|
||||
{ { SIMDE_FLOAT64_C( 223.11), SIMDE_FLOAT64_C( -710.72), SIMDE_FLOAT64_C( -783.47), SIMDE_FLOAT64_C( 606.62),
|
||||
SIMDE_FLOAT64_C( -643.82), SIMDE_FLOAT64_C( 31.73), SIMDE_FLOAT64_C( -880.49), SIMDE_FLOAT64_C( -115.50) },
|
||||
UINT8_C(189),
|
||||
{ INT64_C( 16), INT64_C( 177), INT64_C( 193), INT64_C( 43),
|
||||
INT64_C( 55), INT64_C( 99), INT64_C( 52), INT64_C( 36) },
|
||||
{ SIMDE_FLOAT64_C( 16.00), SIMDE_FLOAT64_C( -710.72), SIMDE_FLOAT64_C( 193.00), SIMDE_FLOAT64_C( 43.00),
|
||||
SIMDE_FLOAT64_C( 55.00), SIMDE_FLOAT64_C( 99.00), SIMDE_FLOAT64_C( -880.49), SIMDE_FLOAT64_C( 36.00) } },
|
||||
{ { SIMDE_FLOAT64_C( 204.01), SIMDE_FLOAT64_C( -197.77), SIMDE_FLOAT64_C( -836.10), SIMDE_FLOAT64_C( 97.36),
|
||||
SIMDE_FLOAT64_C( -627.75), SIMDE_FLOAT64_C( 863.52), SIMDE_FLOAT64_C( 518.57), SIMDE_FLOAT64_C( 380.89) },
|
||||
UINT8_C(163),
|
||||
{ INT64_C( 35), INT64_C( 113), INT64_C( 17), INT64_C( 27),
|
||||
INT64_C( 193), INT64_C( 232), INT64_C( 114), INT64_C( 173) },
|
||||
{ SIMDE_FLOAT64_C( 35.00), SIMDE_FLOAT64_C( 113.00), SIMDE_FLOAT64_C( -836.10), SIMDE_FLOAT64_C( 97.36),
|
||||
SIMDE_FLOAT64_C( -627.75), SIMDE_FLOAT64_C( 232.00), SIMDE_FLOAT64_C( 518.57), SIMDE_FLOAT64_C( 173.00) } },
|
||||
{ { SIMDE_FLOAT64_C( -139.16), SIMDE_FLOAT64_C( 40.30), SIMDE_FLOAT64_C( -35.80), SIMDE_FLOAT64_C( -19.65),
|
||||
SIMDE_FLOAT64_C( 924.81), SIMDE_FLOAT64_C( 68.78), SIMDE_FLOAT64_C( 419.72), SIMDE_FLOAT64_C( 550.54) },
|
||||
UINT8_C( 66),
|
||||
{ INT64_C( 12), INT64_C( 237), INT64_C( 165), INT64_C( 65),
|
||||
INT64_C( 17), INT64_C( 180), INT64_C( 149), INT64_C( 178) },
|
||||
{ SIMDE_FLOAT64_C( -139.16), SIMDE_FLOAT64_C( 237.00), SIMDE_FLOAT64_C( -35.80), SIMDE_FLOAT64_C( -19.65),
|
||||
SIMDE_FLOAT64_C( 924.81), SIMDE_FLOAT64_C( 68.78), SIMDE_FLOAT64_C( 149.00), SIMDE_FLOAT64_C( 550.54) } },
|
||||
{ { SIMDE_FLOAT64_C( -990.13), SIMDE_FLOAT64_C( 586.89), SIMDE_FLOAT64_C( 62.13), SIMDE_FLOAT64_C( 528.45),
|
||||
SIMDE_FLOAT64_C( -32.21), SIMDE_FLOAT64_C( -515.53), SIMDE_FLOAT64_C( 550.99), SIMDE_FLOAT64_C( 422.62) },
|
||||
UINT8_C( 27),
|
||||
{ INT64_C( 104), INT64_C( 49), INT64_C( 3), INT64_C( 218),
|
||||
INT64_C( 222), INT64_C( 111), INT64_C( 95), INT64_C( 161) },
|
||||
{ SIMDE_FLOAT64_C( 104.00), SIMDE_FLOAT64_C( 49.00), SIMDE_FLOAT64_C( 62.13), SIMDE_FLOAT64_C( 218.00),
|
||||
SIMDE_FLOAT64_C( 222.00), SIMDE_FLOAT64_C( -515.53), SIMDE_FLOAT64_C( 550.99), SIMDE_FLOAT64_C( 422.62) } },
|
||||
{ { SIMDE_FLOAT64_C( 611.00), SIMDE_FLOAT64_C( 595.07), SIMDE_FLOAT64_C( 104.01), SIMDE_FLOAT64_C( 30.72),
|
||||
SIMDE_FLOAT64_C( 145.61), SIMDE_FLOAT64_C( -578.55), SIMDE_FLOAT64_C( 653.32), SIMDE_FLOAT64_C( 69.82) },
|
||||
UINT8_C( 9),
|
||||
{ INT64_C( 110), INT64_C( 23), INT64_C( 189), INT64_C( 3),
|
||||
INT64_C( 202), INT64_C( 49), INT64_C( 97), INT64_C( 49) },
|
||||
{ SIMDE_FLOAT64_C( 110.00), SIMDE_FLOAT64_C( 595.07), SIMDE_FLOAT64_C( 104.01), SIMDE_FLOAT64_C( 3.00),
|
||||
SIMDE_FLOAT64_C( 145.61), SIMDE_FLOAT64_C( -578.55), SIMDE_FLOAT64_C( 653.32), SIMDE_FLOAT64_C( 69.82) } },
|
||||
{ { SIMDE_FLOAT64_C( -419.23), SIMDE_FLOAT64_C( 835.05), SIMDE_FLOAT64_C( -150.23), SIMDE_FLOAT64_C( -868.24),
|
||||
SIMDE_FLOAT64_C( 257.66), SIMDE_FLOAT64_C( 365.35), SIMDE_FLOAT64_C( -922.40), SIMDE_FLOAT64_C( -603.78) },
|
||||
UINT8_C( 90),
|
||||
{ INT64_C( 236), INT64_C( 222), INT64_C( 201), INT64_C( 75),
|
||||
INT64_C( 128), INT64_C( 8), INT64_C( 174), INT64_C( 162) },
|
||||
{ SIMDE_FLOAT64_C( -419.23), SIMDE_FLOAT64_C( 222.00), SIMDE_FLOAT64_C( -150.23), SIMDE_FLOAT64_C( 75.00),
|
||||
SIMDE_FLOAT64_C( 128.00), SIMDE_FLOAT64_C( 365.35), SIMDE_FLOAT64_C( 174.00), SIMDE_FLOAT64_C( -603.78) } },
|
||||
{ { SIMDE_FLOAT64_C( -592.47), SIMDE_FLOAT64_C( 118.51), SIMDE_FLOAT64_C( 27.94), SIMDE_FLOAT64_C( -939.14),
|
||||
SIMDE_FLOAT64_C( -811.67), SIMDE_FLOAT64_C( 157.88), SIMDE_FLOAT64_C( -873.41), SIMDE_FLOAT64_C( -707.13) },
|
||||
UINT8_C(205),
|
||||
{ INT64_C( 199), INT64_C( 176), INT64_C( 254), INT64_C( 40),
|
||||
INT64_C( 225), INT64_C( 90), INT64_C( 136), INT64_C( 28) },
|
||||
{ SIMDE_FLOAT64_C( 199.00), SIMDE_FLOAT64_C( 118.51), SIMDE_FLOAT64_C( 254.00), SIMDE_FLOAT64_C( 40.00),
|
||||
SIMDE_FLOAT64_C( -811.67), SIMDE_FLOAT64_C( 157.88), SIMDE_FLOAT64_C( 136.00), SIMDE_FLOAT64_C( 28.00) } },
|
||||
{ { SIMDE_FLOAT64_C( 965.19), SIMDE_FLOAT64_C( 366.94), SIMDE_FLOAT64_C( -823.55), SIMDE_FLOAT64_C( -957.21),
|
||||
SIMDE_FLOAT64_C( 763.16), SIMDE_FLOAT64_C( 311.61), SIMDE_FLOAT64_C( -249.66), SIMDE_FLOAT64_C( 230.41) },
|
||||
UINT8_C(149),
|
||||
{ INT64_C( 75), INT64_C( 182), INT64_C( 158), INT64_C( 250),
|
||||
INT64_C( 88), INT64_C( 199), INT64_C( 194), INT64_C( 94) },
|
||||
{ SIMDE_FLOAT64_C( 75.00), SIMDE_FLOAT64_C( 366.94), SIMDE_FLOAT64_C( 158.00), SIMDE_FLOAT64_C( -957.21),
|
||||
SIMDE_FLOAT64_C( 88.00), SIMDE_FLOAT64_C( 311.61), SIMDE_FLOAT64_C( -249.66), SIMDE_FLOAT64_C( 94.00) } },
|
||||
};
|
||||
for (size_t i = 0 ; i < (sizeof(f64_buffer) / sizeof(f64_buffer[0])) ; i++) { f64_buffer[i] = HEDLEY_STATIC_CAST(simde_float64, i); }
|
||||
|
||||
for (size_t i = 0 ; i < (sizeof(test_vec) / sizeof(test_vec[0])) ; i++) {
|
||||
simde__m512d src = simde_mm512_loadu_pd(test_vec[i].src);
|
||||
simde__m512i vindex = simde_mm512_loadu_epi64(test_vec[i].vindex);
|
||||
simde__m512d r = simde_mm512_mask_i64gather_pd(src, test_vec[i].k, vindex, f64_buffer, 8);
|
||||
simde_test_x86_assert_equal_f64x8(r, simde_mm512_loadu_pd(test_vec[i].r), 1);
|
||||
}
|
||||
|
||||
return 0;
|
||||
#else
|
||||
fputc('\n', stdout);
|
||||
|
||||
for (size_t i = 0 ; i < (sizeof(f64_buffer) / sizeof(f64_buffer[0])) ; i++) { f64_buffer[i] = HEDLEY_STATIC_CAST(simde_float64, i); }
|
||||
|
||||
for (int i = 0; i < 8; i++) {
|
||||
simde__m512d src = simde_test_x86_random_f64x8(SIMDE_FLOAT64_C(-1000.0), SIMDE_FLOAT64_C(1000.0));
|
||||
simde__mmask8 k = simde_test_x86_random_mmask8();
|
||||
simde__m512i vindex = simde_mm512_set_epi64(
|
||||
HEDLEY_STATIC_CAST(int64_t, (simde_test_codegen_random_u8())),
|
||||
HEDLEY_STATIC_CAST(int64_t, (simde_test_codegen_random_u8())),
|
||||
HEDLEY_STATIC_CAST(int64_t, (simde_test_codegen_random_u8())),
|
||||
HEDLEY_STATIC_CAST(int64_t, (simde_test_codegen_random_u8())),
|
||||
HEDLEY_STATIC_CAST(int64_t, (simde_test_codegen_random_u8())),
|
||||
HEDLEY_STATIC_CAST(int64_t, (simde_test_codegen_random_u8())),
|
||||
HEDLEY_STATIC_CAST(int64_t, (simde_test_codegen_random_u8())),
|
||||
HEDLEY_STATIC_CAST(int64_t, (simde_test_codegen_random_u8())));
|
||||
simde__m512d r = simde_mm512_mask_i64gather_pd(src, k, vindex, f64_buffer, 8);
|
||||
|
||||
simde_test_x86_write_f64x8(2, src, SIMDE_TEST_VEC_POS_FIRST);
|
||||
simde_test_x86_write_mmask8(2, k, SIMDE_TEST_VEC_POS_MIDDLE);
|
||||
simde_test_x86_write_i64x8(2, vindex, SIMDE_TEST_VEC_POS_MIDDLE);
|
||||
simde_test_x86_write_f64x8(2, r, SIMDE_TEST_VEC_POS_LAST);
|
||||
}
|
||||
return 1;
|
||||
#endif
|
||||
}
|
||||
|
||||
SIMDE_TEST_FUNC_LIST_BEGIN
|
||||
SIMDE_TEST_FUNC_LIST_ENTRY(mm512_i32gather_ps)
|
||||
|
||||
SIMDE_TEST_FUNC_LIST_ENTRY(mm512_i64gather_epi32)
|
||||
SIMDE_TEST_FUNC_LIST_ENTRY(mm512_mask_i64gather_epi32)
|
||||
SIMDE_TEST_FUNC_LIST_ENTRY(mm512_i64gather_epi64)
|
||||
SIMDE_TEST_FUNC_LIST_ENTRY(mm512_mask_i64gather_epi64)
|
||||
SIMDE_TEST_FUNC_LIST_ENTRY(mm512_i64gather_ps)
|
||||
SIMDE_TEST_FUNC_LIST_ENTRY(mm512_mask_i64gather_ps)
|
||||
SIMDE_TEST_FUNC_LIST_ENTRY(mm512_i64gather_pd)
|
||||
SIMDE_TEST_FUNC_LIST_ENTRY(mm512_mask_i64gather_pd)
|
||||
SIMDE_TEST_FUNC_LIST_END
|
||||
|
||||
#include <test/x86/avx512/test-avx512-footer.h>
|
||||
63
thirdparty/simde/test/x86/avx512/insert.c
vendored
63
thirdparty/simde/test/x86/avx512/insert.c
vendored
|
|
@ -126,9 +126,12 @@ test_simde_mm512_insertf32x4 (SIMDE_MUNIT_TEST_ARGS) {
|
|||
for (size_t i = 0 ; i < (sizeof(test_vec) / sizeof(test_vec[0])) ; i++) {
|
||||
simde__m512 a = simde_mm512_loadu_ps(test_vec[i].a);
|
||||
simde__m128 b = simde_mm_loadu_ps(test_vec[i].b);
|
||||
simde__m512 r;
|
||||
SIMDE_CONSTIFY_4_(simde_mm512_insertf32x4, r, (HEDLEY_UNREACHABLE(), simde_mm512_setzero_ps ()), test_vec[i].imm8, a, b);
|
||||
simde_test_x86_assert_equal_f32x16(r, simde_mm512_loadu_ps(test_vec[i].r), 1);
|
||||
switch(test_vec[i].imm8) {
|
||||
case 0: simde_test_x86_assert_equal_f32x16(simde_mm512_insertf32x4(a, b, 0), simde_mm512_loadu_ps(test_vec[i].r), 1); break;
|
||||
case 1: simde_test_x86_assert_equal_f32x16(simde_mm512_insertf32x4(a, b, 1), simde_mm512_loadu_ps(test_vec[i].r), 1); break;
|
||||
case 2: simde_test_x86_assert_equal_f32x16(simde_mm512_insertf32x4(a, b, 2), simde_mm512_loadu_ps(test_vec[i].r), 1); break;
|
||||
case 3: simde_test_x86_assert_equal_f32x16(simde_mm512_insertf32x4(a, b, 3), simde_mm512_loadu_ps(test_vec[i].r), 1); break;
|
||||
}
|
||||
}
|
||||
|
||||
return 0;
|
||||
|
|
@ -506,9 +509,10 @@ test_simde_mm512_insertf64x4 (SIMDE_MUNIT_TEST_ARGS) {
|
|||
for (size_t i = 0 ; i < (sizeof(test_vec) / sizeof(test_vec[0])) ; i++) {
|
||||
simde__m512d a = simde_mm512_loadu_pd(test_vec[i].a);
|
||||
simde__m256d b = simde_mm256_loadu_pd(test_vec[i].b);
|
||||
simde__m512d r;
|
||||
SIMDE_CONSTIFY_2_(simde_mm512_insertf64x4, r, (HEDLEY_UNREACHABLE(), simde_mm512_setzero_pd ()), test_vec[i].imm8, a, b);
|
||||
simde_test_x86_assert_equal_f64x8(r, simde_mm512_loadu_pd(test_vec[i].r), 1);
|
||||
switch(test_vec[i].imm8) {
|
||||
case 0: simde_test_x86_assert_equal_f64x8(simde_mm512_insertf64x4(a, b, 0), simde_mm512_loadu_pd(test_vec[i].r), 1); break;
|
||||
case 1: simde_test_x86_assert_equal_f64x8(simde_mm512_insertf64x4(a, b, 1), simde_mm512_loadu_pd(test_vec[i].r), 1); break;
|
||||
}
|
||||
}
|
||||
|
||||
return 0;
|
||||
|
|
@ -806,9 +810,12 @@ test_simde_mm512_inserti32x4 (SIMDE_MUNIT_TEST_ARGS) {
|
|||
for (size_t i = 0 ; i < (sizeof(test_vec) / sizeof(test_vec[0])) ; i++) {
|
||||
simde__m512i a = simde_mm512_loadu_epi32(test_vec[i].a);
|
||||
simde__m128i b = simde_mm_loadu_epi32(test_vec[i].b);
|
||||
simde__m512i r;
|
||||
SIMDE_CONSTIFY_4_(simde_mm512_inserti32x4, r, (HEDLEY_UNREACHABLE(), simde_mm512_setzero_si512 ()), test_vec[i].imm8, a, b);
|
||||
simde_test_x86_assert_equal_i32x16(r, simde_mm512_loadu_epi32(test_vec[i].r));
|
||||
switch(test_vec[i].imm8) {
|
||||
case 0: simde_test_x86_assert_equal_i32x16(simde_mm512_inserti32x4(a, b, 0), simde_mm512_loadu_epi32(test_vec[i].r)); break;
|
||||
case 1: simde_test_x86_assert_equal_i32x16(simde_mm512_inserti32x4(a, b, 1), simde_mm512_loadu_epi32(test_vec[i].r)); break;
|
||||
case 2: simde_test_x86_assert_equal_i32x16(simde_mm512_inserti32x4(a, b, 2), simde_mm512_loadu_epi32(test_vec[i].r)); break;
|
||||
case 3: simde_test_x86_assert_equal_i32x16(simde_mm512_inserti32x4(a, b, 3), simde_mm512_loadu_epi32(test_vec[i].r)); break;
|
||||
}
|
||||
}
|
||||
|
||||
return 0;
|
||||
|
|
@ -1106,9 +1113,10 @@ test_simde_mm512_inserti64x4 (SIMDE_MUNIT_TEST_ARGS) {
|
|||
for (size_t i = 0 ; i < (sizeof(test_vec) / sizeof(test_vec[0])) ; i++) {
|
||||
simde__m512i a = simde_mm512_loadu_epi64(test_vec[i].a);
|
||||
simde__m256i b = simde_mm256_loadu_epi64(test_vec[i].b);
|
||||
simde__m512i r;
|
||||
SIMDE_CONSTIFY_2_(simde_mm512_inserti64x4, r, (HEDLEY_UNREACHABLE(), simde_mm512_setzero_si512 ()), test_vec[i].imm8, a, b);
|
||||
simde_test_x86_assert_equal_i64x8(r, simde_mm512_loadu_epi64(test_vec[i].r));
|
||||
switch(test_vec[i].imm8) {
|
||||
case 0: simde_test_x86_assert_equal_i64x8(simde_mm512_inserti64x4(a, b, 0), simde_mm512_loadu_epi64(test_vec[i].r)); break;
|
||||
case 1: simde_test_x86_assert_equal_i64x8(simde_mm512_inserti64x4(a, b, 1), simde_mm512_loadu_epi64(test_vec[i].r)); break;
|
||||
}
|
||||
}
|
||||
|
||||
return 0;
|
||||
|
|
@ -1446,9 +1454,10 @@ test_simde_mm512_insertf32x8 (SIMDE_MUNIT_TEST_ARGS) {
|
|||
for (size_t i = 0 ; i < (sizeof(test_vec) / sizeof(test_vec[0])) ; i++) {
|
||||
simde__m512 a = simde_mm512_loadu_ps(test_vec[i].a);
|
||||
simde__m256 b = simde_mm256_loadu_ps(test_vec[i].b);
|
||||
simde__m512 r;
|
||||
SIMDE_CONSTIFY_2_(simde_mm512_insertf32x8, r, (HEDLEY_UNREACHABLE(), simde_mm512_setzero_ps ()), test_vec[i].imm8, a, b);
|
||||
simde_assert_m512_close(r, simde_mm512_loadu_ps(test_vec[i].r), 1);
|
||||
switch(test_vec[i].imm8) {
|
||||
case 0: simde_assert_m512_close(simde_mm512_insertf32x8(a, b, 0), simde_mm512_loadu_ps(test_vec[i].r), 1); break;
|
||||
case 1: simde_assert_m512_close(simde_mm512_insertf32x8(a, b, 1), simde_mm512_loadu_ps(test_vec[i].r), 1); break;
|
||||
}
|
||||
}
|
||||
|
||||
return 0;
|
||||
|
|
@ -1841,9 +1850,12 @@ test_simde_mm512_insertf64x2 (SIMDE_MUNIT_TEST_ARGS) {
|
|||
for (size_t i = 0 ; i < (sizeof(test_vec) / sizeof(test_vec[0])) ; i++) {
|
||||
simde__m512d a = simde_mm512_loadu_pd(test_vec[i].a);
|
||||
simde__m128d b = simde_mm_loadu_pd(test_vec[i].b);
|
||||
simde__m512d r;
|
||||
SIMDE_CONSTIFY_4_(simde_mm512_insertf64x2, r, (HEDLEY_UNREACHABLE(), simde_mm512_setzero_pd ()), test_vec[i].imm8 , a, b);
|
||||
simde_test_x86_assert_equal_f64x8(r, simde_mm512_loadu_pd(test_vec[i].r), 1);
|
||||
switch(test_vec[i].imm8) {
|
||||
case 0: simde_test_x86_assert_equal_f64x8(simde_mm512_insertf64x2(a, b, 0), simde_mm512_loadu_pd(test_vec[i].r), 1); break;
|
||||
case 1: simde_test_x86_assert_equal_f64x8(simde_mm512_insertf64x2(a, b, 1), simde_mm512_loadu_pd(test_vec[i].r), 1); break;
|
||||
case 2: simde_test_x86_assert_equal_f64x8(simde_mm512_insertf64x2(a, b, 2), simde_mm512_loadu_pd(test_vec[i].r), 1); break;
|
||||
case 3: simde_test_x86_assert_equal_f64x8(simde_mm512_insertf64x2(a, b, 3), simde_mm512_loadu_pd(test_vec[i].r), 1); break;
|
||||
}
|
||||
}
|
||||
|
||||
return 0;
|
||||
|
|
@ -2142,7 +2154,11 @@ test_simde_mm512_inserti32x8 (SIMDE_MUNIT_TEST_ARGS) {
|
|||
simde__m512i a = simde_mm512_loadu_epi32(test_vec[i].a);
|
||||
simde__m256i b = simde_mm256_loadu_epi32(test_vec[i].b);
|
||||
simde__m512i r;
|
||||
SIMDE_CONSTIFY_2_(simde_mm512_inserti32x8, r, (HEDLEY_UNREACHABLE(), simde_mm512_setzero_epi32 ()), test_vec[i].imm8, a, b);
|
||||
switch(test_vec[i].imm8) {
|
||||
case 0: r = simde_mm512_inserti32x8(a, b, 0); break;
|
||||
case 1: r = simde_mm512_inserti32x8(a, b, 1); break;
|
||||
default: HEDLEY_UNREACHABLE(); r = simde_mm512_setzero_epi32(); break;
|
||||
}
|
||||
simde_assert_m512i_i32(r, == ,simde_mm512_loadu_epi32(test_vec[i].r));
|
||||
}
|
||||
|
||||
|
|
@ -2440,9 +2456,12 @@ test_simde_mm512_inserti64x2 (SIMDE_MUNIT_TEST_ARGS) {
|
|||
for (size_t i = 0 ; i < (sizeof(test_vec) / sizeof(test_vec[0])) ; i++) {
|
||||
simde__m512i a = simde_mm512_loadu_epi64(test_vec[i].a);
|
||||
simde__m128i b = simde_mm_loadu_epi64(test_vec[i].b);
|
||||
simde__m512i r;
|
||||
SIMDE_CONSTIFY_4_(simde_mm512_inserti64x2, r, (HEDLEY_UNREACHABLE(), simde_mm512_setzero_si512 ()), test_vec[i].imm8 , a, b);
|
||||
simde_assert_m512i_i64(r, ==, simde_mm512_loadu_epi64(test_vec[i].r));
|
||||
switch(test_vec[i].imm8) {
|
||||
case 0: simde_assert_m512i_i64(simde_mm512_inserti64x2(a, b, 0), ==, simde_mm512_loadu_epi64(test_vec[i].r)); break;
|
||||
case 1: simde_assert_m512i_i64(simde_mm512_inserti64x2(a, b, 1), ==, simde_mm512_loadu_epi64(test_vec[i].r)); break;
|
||||
case 2: simde_assert_m512i_i64(simde_mm512_inserti64x2(a, b, 2), ==, simde_mm512_loadu_epi64(test_vec[i].r)); break;
|
||||
case 3: simde_assert_m512i_i64(simde_mm512_inserti64x2(a, b, 3), ==, simde_mm512_loadu_epi64(test_vec[i].r)); break;
|
||||
}
|
||||
}
|
||||
|
||||
return 0;
|
||||
|
|
|
|||
91
thirdparty/simde/test/x86/avx512/kand.c
vendored
Normal file
91
thirdparty/simde/test/x86/avx512/kand.c
vendored
Normal file
|
|
@ -0,0 +1,91 @@
|
|||
/* SPDX-License-Identifier: MIT
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person
|
||||
* obtaining a copy of this software and associated documentation
|
||||
* files (the "Software"), to deal in the Software without
|
||||
* restriction, including without limitation the rights to use, copy,
|
||||
* modify, merge, publish, distribute, sublicense, and/or sell copies
|
||||
* of the Software, and to permit persons to whom the Software is
|
||||
* furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be
|
||||
* included in all copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
|
||||
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
|
||||
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
|
||||
* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
|
||||
* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
|
||||
* SOFTWARE.
|
||||
*
|
||||
* Copyright:
|
||||
* 2023 Michael R. Crusoe <crusoe@debian.org>
|
||||
*/
|
||||
|
||||
#define SIMDE_TEST_X86_AVX512_INSN knand
|
||||
|
||||
#include <test/x86/avx512/test-avx512.h>
|
||||
#include <simde/x86/avx512/kand.h>
|
||||
|
||||
static int
|
||||
test_simde_mm512_kand (SIMDE_MUNIT_TEST_ARGS) {
|
||||
#if 1
|
||||
static const struct {
|
||||
const simde__mmask16 a;
|
||||
const simde__mmask16 b;
|
||||
const simde__mmask16 r;
|
||||
} test_vec[] = {
|
||||
{ UINT16_C(33740),
|
||||
UINT16_C(60209),
|
||||
UINT16_C(33536) },
|
||||
{ UINT16_C(46020),
|
||||
UINT16_C(24332),
|
||||
UINT16_C( 4868) },
|
||||
{ UINT16_C(13269),
|
||||
UINT16_C(65007),
|
||||
UINT16_C(12741) },
|
||||
{ UINT16_C(64804),
|
||||
UINT16_C( 8743),
|
||||
UINT16_C( 8228) },
|
||||
{ UINT16_C(58611),
|
||||
UINT16_C(55107),
|
||||
UINT16_C(50243) },
|
||||
{ UINT16_C(60104),
|
||||
UINT16_C(13905),
|
||||
UINT16_C( 8768) },
|
||||
{ UINT16_C(24513),
|
||||
UINT16_C(17751),
|
||||
UINT16_C(17729) },
|
||||
{ UINT16_C(15289),
|
||||
UINT16_C(34084),
|
||||
UINT16_C( 288) },
|
||||
};
|
||||
|
||||
for (size_t i = 0 ; i < (sizeof(test_vec) / sizeof(test_vec[0])) ; i++) {
|
||||
simde__mmask16 r = simde_mm512_kand(test_vec[i].a, test_vec[i].b);
|
||||
simde_assert_equal_mmask16(r, test_vec[i].r);
|
||||
}
|
||||
|
||||
return 0;
|
||||
#else
|
||||
fputc('\n', stdout);
|
||||
for (int i = 0 ; i < 8 ; i++) {
|
||||
simde__mmask16 a = simde_test_x86_random_mmask16();
|
||||
simde__mmask16 b = simde_test_x86_random_mmask16();
|
||||
simde__mmask16 r = simde_mm512_kand(a, b);
|
||||
|
||||
simde_test_x86_write_mmask16(2, a, SIMDE_TEST_VEC_POS_FIRST);
|
||||
simde_test_x86_write_mmask16(2, b, SIMDE_TEST_VEC_POS_MIDDLE);
|
||||
simde_test_x86_write_mmask16(2, r, SIMDE_TEST_VEC_POS_LAST);
|
||||
}
|
||||
return 1;
|
||||
#endif
|
||||
}
|
||||
|
||||
SIMDE_TEST_FUNC_LIST_BEGIN
|
||||
SIMDE_TEST_FUNC_LIST_ENTRY(mm512_kand)
|
||||
SIMDE_TEST_FUNC_LIST_END
|
||||
|
||||
#include <test/x86/avx512/test-avx512-footer.h>
|
||||
260
thirdparty/simde/test/x86/avx512/knot.c
vendored
Normal file
260
thirdparty/simde/test/x86/avx512/knot.c
vendored
Normal file
|
|
@ -0,0 +1,260 @@
|
|||
/* SPDX-License-Identifier: MIT
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person
|
||||
* obtaining a copy of this software and associated documentation
|
||||
* files (the "Software"), to deal in the Software without
|
||||
* restriction, including without limitation the rights to use, copy,
|
||||
* modify, merge, publish, distribute, sublicense, and/or sell copies
|
||||
* of the Software, and to permit persons to whom the Software is
|
||||
* furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be
|
||||
* included in all copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
|
||||
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
|
||||
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
|
||||
* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
|
||||
* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
|
||||
* SOFTWARE.
|
||||
*
|
||||
* Copyright:
|
||||
* 2023 Michael R. Crusoe <crusoe@debian.org>
|
||||
*/
|
||||
|
||||
#define SIMDE_TEST_X86_AVX512_INSN knot
|
||||
|
||||
#include <test/x86/avx512/test-avx512.h>
|
||||
#include <simde/x86/avx512/knot.h>
|
||||
|
||||
static int
|
||||
test_simde_knot_mask8 (SIMDE_MUNIT_TEST_ARGS) {
|
||||
#if 1
|
||||
static const struct {
|
||||
const simde__mmask8 a;
|
||||
const simde__mmask8 r;
|
||||
} test_vec[] = {
|
||||
{ UINT8_C(244),
|
||||
UINT8_C( 11) },
|
||||
{ UINT8_C(142),
|
||||
UINT8_C(113) },
|
||||
{ UINT8_C( 46),
|
||||
UINT8_C(209) },
|
||||
{ UINT8_C( 74),
|
||||
UINT8_C(181) },
|
||||
{ UINT8_C(116),
|
||||
UINT8_C(139) },
|
||||
{ UINT8_C(192),
|
||||
UINT8_C( 63) },
|
||||
{ UINT8_C( 51),
|
||||
UINT8_C(204) },
|
||||
{ UINT8_C(206),
|
||||
UINT8_C( 49) },
|
||||
};
|
||||
|
||||
for (size_t i = 0 ; i < (sizeof(test_vec) / sizeof(test_vec[0])) ; i++) {
|
||||
simde__mmask8 r = simde_knot_mask8(test_vec[i].a);
|
||||
simde_assert_equal_mmask8(r, test_vec[i].r);
|
||||
}
|
||||
|
||||
return 0;
|
||||
#else
|
||||
fputc('\n', stdout);
|
||||
for (int i = 0 ; i < 8 ; i++) {
|
||||
simde__mmask8 a = simde_test_x86_random_mmask8();
|
||||
simde__mmask8 r = simde_knot_mask8(a);
|
||||
|
||||
simde_test_x86_write_mmask8(2, a, SIMDE_TEST_VEC_POS_FIRST);
|
||||
simde_test_x86_write_mmask8(2, r, SIMDE_TEST_VEC_POS_LAST);
|
||||
}
|
||||
return 1;
|
||||
#endif
|
||||
}
|
||||
|
||||
static int
|
||||
test_simde_knot_mask16 (SIMDE_MUNIT_TEST_ARGS) {
|
||||
#if 1
|
||||
static const struct {
|
||||
const simde__mmask16 a;
|
||||
const simde__mmask16 r;
|
||||
} test_vec[] = {
|
||||
{ UINT16_C(50766),
|
||||
UINT16_C(14769) },
|
||||
{ UINT16_C( 2645),
|
||||
UINT16_C(62890) },
|
||||
{ UINT16_C( 2583),
|
||||
UINT16_C(62952) },
|
||||
{ UINT16_C(60343),
|
||||
UINT16_C( 5192) },
|
||||
{ UINT16_C(21746),
|
||||
UINT16_C(43789) },
|
||||
{ UINT16_C(61769),
|
||||
UINT16_C( 3766) },
|
||||
{ UINT16_C(37441),
|
||||
UINT16_C(28094) },
|
||||
{ UINT16_C(18375),
|
||||
UINT16_C(47160) },
|
||||
};
|
||||
|
||||
for (size_t i = 0 ; i < (sizeof(test_vec) / sizeof(test_vec[0])) ; i++) {
|
||||
simde__mmask16 r = simde_knot_mask16(test_vec[i].a);
|
||||
simde_assert_equal_mmask16(r, test_vec[i].r);
|
||||
}
|
||||
|
||||
return 0;
|
||||
#else
|
||||
fputc('\n', stdout);
|
||||
for (int i = 0 ; i < 8 ; i++) {
|
||||
simde__mmask16 a = simde_test_x86_random_mmask16();
|
||||
simde__mmask16 r = simde_knot_mask16(a);
|
||||
|
||||
simde_test_x86_write_mmask16(2, a, SIMDE_TEST_VEC_POS_FIRST);
|
||||
simde_test_x86_write_mmask16(2, r, SIMDE_TEST_VEC_POS_LAST);
|
||||
}
|
||||
return 1;
|
||||
#endif
|
||||
}
|
||||
|
||||
static int
|
||||
test_simde_mm512_knot (SIMDE_MUNIT_TEST_ARGS) {
|
||||
#if 1
|
||||
static const struct {
|
||||
const simde__mmask16 a;
|
||||
const simde__mmask16 r;
|
||||
} test_vec[] = {
|
||||
{ UINT16_C(54112),
|
||||
UINT16_C(11423) },
|
||||
{ UINT16_C(42070),
|
||||
UINT16_C(23465) },
|
||||
{ UINT16_C(14863),
|
||||
UINT16_C(50672) },
|
||||
{ UINT16_C( 968),
|
||||
UINT16_C(64567) },
|
||||
{ UINT16_C(63176),
|
||||
UINT16_C( 2359) },
|
||||
{ UINT16_C(15437),
|
||||
UINT16_C(50098) },
|
||||
{ UINT16_C(32950),
|
||||
UINT16_C(32585) },
|
||||
{ UINT16_C( 1034),
|
||||
UINT16_C(64501) },
|
||||
};
|
||||
|
||||
for (size_t i = 0 ; i < (sizeof(test_vec) / sizeof(test_vec[0])) ; i++) {
|
||||
simde__mmask16 r = simde_mm512_knot(test_vec[i].a);
|
||||
simde_assert_equal_mmask16(r, test_vec[i].r);
|
||||
}
|
||||
|
||||
return 0;
|
||||
#else
|
||||
fputc('\n', stdout);
|
||||
for (int i = 0 ; i < 8 ; i++) {
|
||||
simde__mmask16 a = simde_test_x86_random_mmask16();
|
||||
simde__mmask16 r = simde_mm512_knot(a);
|
||||
|
||||
simde_test_x86_write_mmask16(2, a, SIMDE_TEST_VEC_POS_FIRST);
|
||||
simde_test_x86_write_mmask16(2, r, SIMDE_TEST_VEC_POS_LAST);
|
||||
}
|
||||
return 1;
|
||||
#endif
|
||||
}
|
||||
|
||||
static int
|
||||
test_simde_knot_mask32 (SIMDE_MUNIT_TEST_ARGS) {
|
||||
#if 1
|
||||
static const struct {
|
||||
const simde__mmask32 a;
|
||||
const simde__mmask32 r;
|
||||
} test_vec[] = {
|
||||
{ UINT32_C(1561222982),
|
||||
UINT32_C(2733744313) },
|
||||
{ UINT32_C(1548338794),
|
||||
UINT32_C(2746628501) },
|
||||
{ UINT32_C(1531810330),
|
||||
UINT32_C(2763156965) },
|
||||
{ UINT32_C(2242057253),
|
||||
UINT32_C(2052910042) },
|
||||
{ UINT32_C(4130011623),
|
||||
UINT32_C( 164955672) },
|
||||
{ UINT32_C(4227461683),
|
||||
UINT32_C( 67505612) },
|
||||
{ UINT32_C(2671265512),
|
||||
UINT32_C(1623701783) },
|
||||
{ UINT32_C( 228803271),
|
||||
UINT32_C(4066164024) },
|
||||
};
|
||||
|
||||
for (size_t i = 0 ; i < (sizeof(test_vec) / sizeof(test_vec[0])) ; i++) {
|
||||
simde__mmask32 r = simde_knot_mask32(test_vec[i].a);
|
||||
simde_assert_equal_mmask32(r, test_vec[i].r);
|
||||
}
|
||||
|
||||
return 0;
|
||||
#else
|
||||
fputc('\n', stdout);
|
||||
for (int i = 0 ; i < 8 ; i++) {
|
||||
simde__mmask32 a = simde_test_x86_random_mmask32();
|
||||
simde__mmask32 r = simde_knot_mask32(a);
|
||||
|
||||
simde_test_x86_write_mmask32(2, a, SIMDE_TEST_VEC_POS_FIRST);
|
||||
simde_test_x86_write_mmask32(2, r, SIMDE_TEST_VEC_POS_LAST);
|
||||
}
|
||||
return 1;
|
||||
#endif
|
||||
}
|
||||
|
||||
static int
|
||||
test_simde_knot_mask64 (SIMDE_MUNIT_TEST_ARGS) {
|
||||
#if 1
|
||||
static const struct {
|
||||
const simde__mmask64 a;
|
||||
const simde__mmask64 r;
|
||||
} test_vec[] = {
|
||||
{ UINT64_C(10549880554812846754),
|
||||
UINT64_C( 7896863518896704861) },
|
||||
{ UINT64_C(12822189912680740166),
|
||||
UINT64_C( 5624554161028811449) },
|
||||
{ UINT64_C(17706360490389150602),
|
||||
UINT64_C( 740383583320401013) },
|
||||
{ UINT64_C(15473304218673410536),
|
||||
UINT64_C( 2973439855036141079) },
|
||||
{ UINT64_C( 2518720397724231658),
|
||||
UINT64_C(15928023675985319957) },
|
||||
{ UINT64_C(18337389343536964351),
|
||||
UINT64_C( 109354730172587264) },
|
||||
{ UINT64_C(12437945758361854873),
|
||||
UINT64_C( 6008798315347696742) },
|
||||
{ UINT64_C( 5940556221040504935),
|
||||
UINT64_C(12506187852669046680) },
|
||||
};
|
||||
|
||||
for (size_t i = 0 ; i < (sizeof(test_vec) / sizeof(test_vec[0])) ; i++) {
|
||||
simde__mmask64 r = simde_knot_mask64(test_vec[i].a);
|
||||
simde_assert_equal_mmask64(r, test_vec[i].r);
|
||||
}
|
||||
|
||||
return 0;
|
||||
#else
|
||||
fputc('\n', stdout);
|
||||
for (int i = 0 ; i < 8 ; i++) {
|
||||
simde__mmask64 a = simde_test_x86_random_mmask64();
|
||||
simde__mmask64 r = simde_knot_mask64(a);
|
||||
|
||||
simde_test_x86_write_mmask64(2, a, SIMDE_TEST_VEC_POS_FIRST);
|
||||
simde_test_x86_write_mmask64(2, r, SIMDE_TEST_VEC_POS_LAST);
|
||||
}
|
||||
return 1;
|
||||
#endif
|
||||
}
|
||||
|
||||
SIMDE_TEST_FUNC_LIST_BEGIN
|
||||
SIMDE_TEST_FUNC_LIST_ENTRY(knot_mask8)
|
||||
SIMDE_TEST_FUNC_LIST_ENTRY(knot_mask16)
|
||||
SIMDE_TEST_FUNC_LIST_ENTRY(mm512_knot)
|
||||
SIMDE_TEST_FUNC_LIST_ENTRY(knot_mask32)
|
||||
SIMDE_TEST_FUNC_LIST_ENTRY(knot_mask64)
|
||||
SIMDE_TEST_FUNC_LIST_END
|
||||
|
||||
#include <test/x86/avx512/test-avx512-footer.h>
|
||||
316
thirdparty/simde/test/x86/avx512/kxor.c
vendored
Normal file
316
thirdparty/simde/test/x86/avx512/kxor.c
vendored
Normal file
|
|
@ -0,0 +1,316 @@
|
|||
/* SPDX-License-Identifier: MIT
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person
|
||||
* obtaining a copy of this software and associated documentation
|
||||
* files (the "Software"), to deal in the Software without
|
||||
* restriction, including without limitation the rights to use, copy,
|
||||
* modify, merge, publish, distribute, sublicense, and/or sell copies
|
||||
* of the Software, and to permit persons to whom the Software is
|
||||
* furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be
|
||||
* included in all copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
|
||||
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
|
||||
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
|
||||
* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
|
||||
* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
|
||||
* SOFTWARE.
|
||||
*
|
||||
* Copyright:
|
||||
* 2023 Michael R. Crusoe <crusoe@debian.org>
|
||||
*/
|
||||
|
||||
#define SIMDE_TEST_X86_AVX512_INSN kxor
|
||||
|
||||
#include <test/x86/avx512/test-avx512.h>
|
||||
#include <simde/x86/avx512/kxor.h>
|
||||
|
||||
static int
|
||||
test_simde_kxor_mask8 (SIMDE_MUNIT_TEST_ARGS) {
|
||||
#if 1
|
||||
static const struct {
|
||||
const simde__mmask8 a;
|
||||
const simde__mmask8 b;
|
||||
const simde__mmask8 r;
|
||||
} test_vec[] = {
|
||||
{ UINT8_C(180),
|
||||
UINT8_C(253),
|
||||
UINT8_C( 73) },
|
||||
{ UINT8_C( 16),
|
||||
UINT8_C( 50),
|
||||
UINT8_C( 34) },
|
||||
{ UINT8_C(181),
|
||||
UINT8_C(122),
|
||||
UINT8_C(207) },
|
||||
{ UINT8_C( 81),
|
||||
UINT8_C( 92),
|
||||
UINT8_C( 13) },
|
||||
{ UINT8_C( 21),
|
||||
UINT8_C(159),
|
||||
UINT8_C(138) },
|
||||
{ UINT8_C(254),
|
||||
UINT8_C(236),
|
||||
UINT8_C( 18) },
|
||||
{ UINT8_C(101),
|
||||
UINT8_C(123),
|
||||
UINT8_C( 30) },
|
||||
{ UINT8_C(122),
|
||||
UINT8_C(180),
|
||||
UINT8_C(206) },
|
||||
};
|
||||
|
||||
for (size_t i = 0 ; i < (sizeof(test_vec) / sizeof(test_vec[0])) ; i++) {
|
||||
simde__mmask8 r = simde_kxor_mask8(test_vec[i].a, test_vec[i].b);
|
||||
simde_assert_equal_mmask8(r, test_vec[i].r);
|
||||
}
|
||||
|
||||
return 0;
|
||||
#else
|
||||
fputc('\n', stdout);
|
||||
for (int i = 0 ; i < 8 ; i++) {
|
||||
simde__mmask8 a = simde_test_x86_random_mmask8();
|
||||
simde__mmask8 b = simde_test_x86_random_mmask8();
|
||||
simde__mmask8 r = simde_kxor_mask8(a, b);
|
||||
|
||||
simde_test_x86_write_mmask8(2, a, SIMDE_TEST_VEC_POS_FIRST);
|
||||
simde_test_x86_write_mmask8(2, b, SIMDE_TEST_VEC_POS_MIDDLE);
|
||||
simde_test_x86_write_mmask8(2, r, SIMDE_TEST_VEC_POS_LAST);
|
||||
}
|
||||
return 1;
|
||||
#endif
|
||||
}
|
||||
|
||||
|
||||
static int
|
||||
test_simde_kxor_mask16 (SIMDE_MUNIT_TEST_ARGS) {
|
||||
#if 1
|
||||
static const struct {
|
||||
const simde__mmask16 a;
|
||||
const simde__mmask16 b;
|
||||
const simde__mmask16 r;
|
||||
} test_vec[] = {
|
||||
{ UINT16_C( 5117),
|
||||
UINT16_C(43689),
|
||||
UINT16_C(47444) },
|
||||
{ UINT16_C(32526),
|
||||
UINT16_C(40254),
|
||||
UINT16_C(57904) },
|
||||
{ UINT16_C( 9192),
|
||||
UINT16_C(52494),
|
||||
UINT16_C(61158) },
|
||||
{ UINT16_C(22597),
|
||||
UINT16_C(18227),
|
||||
UINT16_C( 8054) },
|
||||
{ UINT16_C(29104),
|
||||
UINT16_C(25853),
|
||||
UINT16_C( 5453) },
|
||||
{ UINT16_C(23320),
|
||||
UINT16_C(54041),
|
||||
UINT16_C(34817) },
|
||||
{ UINT16_C(22991),
|
||||
UINT16_C(47721),
|
||||
UINT16_C(58278) },
|
||||
{ UINT16_C(11519),
|
||||
UINT16_C(64553),
|
||||
UINT16_C(53462) },
|
||||
};
|
||||
|
||||
for (size_t i = 0 ; i < (sizeof(test_vec) / sizeof(test_vec[0])) ; i++) {
|
||||
simde__mmask16 r = simde_kxor_mask16(test_vec[i].a, test_vec[i].b);
|
||||
simde_assert_equal_mmask16(r, test_vec[i].r);
|
||||
}
|
||||
|
||||
return 0;
|
||||
#else
|
||||
fputc('\n', stdout);
|
||||
for (int i = 0 ; i < 8 ; i++) {
|
||||
simde__mmask16 a = simde_test_x86_random_mmask16();
|
||||
simde__mmask16 b = simde_test_x86_random_mmask16();
|
||||
simde__mmask16 r = simde_kxor_mask16(a, b);
|
||||
|
||||
simde_test_x86_write_mmask16(2, a, SIMDE_TEST_VEC_POS_FIRST);
|
||||
simde_test_x86_write_mmask16(2, b, SIMDE_TEST_VEC_POS_MIDDLE);
|
||||
simde_test_x86_write_mmask16(2, r, SIMDE_TEST_VEC_POS_LAST);
|
||||
}
|
||||
return 1;
|
||||
#endif
|
||||
}
|
||||
|
||||
static int
|
||||
test_simde_mm512_kxor (SIMDE_MUNIT_TEST_ARGS) {
|
||||
#if 1
|
||||
static const struct {
|
||||
const simde__mmask16 a;
|
||||
const simde__mmask16 b;
|
||||
const simde__mmask16 r;
|
||||
} test_vec[] = {
|
||||
{ UINT16_C(22659),
|
||||
UINT16_C(15183),
|
||||
UINT16_C(25548) },
|
||||
{ UINT16_C(64429),
|
||||
UINT16_C(37846),
|
||||
UINT16_C(26747) },
|
||||
{ UINT16_C(26767),
|
||||
UINT16_C(29157),
|
||||
UINT16_C( 6506) },
|
||||
{ UINT16_C( 8933),
|
||||
UINT16_C(26186),
|
||||
UINT16_C(17583) },
|
||||
{ UINT16_C(22529),
|
||||
UINT16_C(46653),
|
||||
UINT16_C(60988) },
|
||||
{ UINT16_C(42932),
|
||||
UINT16_C(46173),
|
||||
UINT16_C( 5097) },
|
||||
{ UINT16_C(29882),
|
||||
UINT16_C(38464),
|
||||
UINT16_C(58106) },
|
||||
{ UINT16_C(42475),
|
||||
UINT16_C(28355),
|
||||
UINT16_C(52008) },
|
||||
};
|
||||
|
||||
for (size_t i = 0 ; i < (sizeof(test_vec) / sizeof(test_vec[0])) ; i++) {
|
||||
simde__mmask16 r = simde_mm512_kxor(test_vec[i].a, test_vec[i].b);
|
||||
simde_assert_equal_mmask16(r, test_vec[i].r);
|
||||
}
|
||||
|
||||
return 0;
|
||||
#else
|
||||
fputc('\n', stdout);
|
||||
for (int i = 0 ; i < 8 ; i++) {
|
||||
simde__mmask16 a = simde_test_x86_random_mmask16();
|
||||
simde__mmask16 b = simde_test_x86_random_mmask16();
|
||||
simde__mmask16 r = simde_mm512_kxor(a, b);
|
||||
|
||||
simde_test_x86_write_mmask16(2, a, SIMDE_TEST_VEC_POS_FIRST);
|
||||
simde_test_x86_write_mmask16(2, b, SIMDE_TEST_VEC_POS_MIDDLE);
|
||||
simde_test_x86_write_mmask16(2, r, SIMDE_TEST_VEC_POS_LAST);
|
||||
}
|
||||
return 1;
|
||||
#endif
|
||||
}
|
||||
|
||||
static int
|
||||
test_simde_kxor_mask32 (SIMDE_MUNIT_TEST_ARGS) {
|
||||
#if 1
|
||||
static const struct {
|
||||
const simde__mmask32 a;
|
||||
const simde__mmask32 b;
|
||||
const simde__mmask32 r;
|
||||
} test_vec[] = {
|
||||
{ UINT32_C(1319621183),
|
||||
UINT32_C( 988538194),
|
||||
UINT32_C(1951151981) },
|
||||
{ UINT32_C(1292368392),
|
||||
UINT32_C( 60045906),
|
||||
UINT32_C(1318305882) },
|
||||
{ UINT32_C(3295122091),
|
||||
UINT32_C(3164045549),
|
||||
UINT32_C(2028999238) },
|
||||
{ UINT32_C(3648454874),
|
||||
UINT32_C(1825939500),
|
||||
UINT32_C(3047334134) },
|
||||
{ UINT32_C(3300555890),
|
||||
UINT32_C(1778296161),
|
||||
UINT32_C(2906970387) },
|
||||
{ UINT32_C(4072080799),
|
||||
UINT32_C(3958721344),
|
||||
UINT32_C( 423775967) },
|
||||
{ UINT32_C(3400490205),
|
||||
UINT32_C(3079096029),
|
||||
UINT32_C(2099780096) },
|
||||
{ UINT32_C(1938882118),
|
||||
UINT32_C( 283075998),
|
||||
UINT32_C(1666161624) },
|
||||
};
|
||||
|
||||
for (size_t i = 0 ; i < (sizeof(test_vec) / sizeof(test_vec[0])) ; i++) {
|
||||
simde__mmask32 r = simde_kxor_mask32(test_vec[i].a, test_vec[i].b);
|
||||
simde_assert_equal_mmask32(r, test_vec[i].r);
|
||||
}
|
||||
|
||||
return 0;
|
||||
#else
|
||||
fputc('\n', stdout);
|
||||
for (int i = 0 ; i < 8 ; i++) {
|
||||
simde__mmask32 a = simde_test_x86_random_mmask32();
|
||||
simde__mmask32 b = simde_test_x86_random_mmask32();
|
||||
simde__mmask32 r = simde_kxor_mask32(a, b);
|
||||
|
||||
simde_test_x86_write_mmask32(2, a, SIMDE_TEST_VEC_POS_FIRST);
|
||||
simde_test_x86_write_mmask32(2, b, SIMDE_TEST_VEC_POS_MIDDLE);
|
||||
simde_test_x86_write_mmask32(2, r, SIMDE_TEST_VEC_POS_LAST);
|
||||
}
|
||||
return 1;
|
||||
#endif
|
||||
}
|
||||
|
||||
static int
|
||||
test_simde_kxor_mask64 (SIMDE_MUNIT_TEST_ARGS) {
|
||||
#if 1
|
||||
static const struct {
|
||||
const simde__mmask64 a;
|
||||
const simde__mmask64 b;
|
||||
const simde__mmask64 r;
|
||||
} test_vec[] = {
|
||||
{ UINT64_C(16045713311770450402),
|
||||
UINT64_C(10161464015097717977),
|
||||
UINT64_C( 6028374389748530491) },
|
||||
{ UINT64_C( 4734935752840295457),
|
||||
UINT64_C(10199408145817945564),
|
||||
UINT64_C(14717285644810580477) },
|
||||
{ UINT64_C( 885094986567147564),
|
||||
UINT64_C(18383177860084209889),
|
||||
UINT64_C(17534298883154606285) },
|
||||
{ UINT64_C( 3465998565237421534),
|
||||
UINT64_C(10101633752882728440),
|
||||
UINT64_C(13558514613629663270) },
|
||||
{ UINT64_C( 6977834486443999638),
|
||||
UINT64_C( 230826133395995480),
|
||||
UINT64_C( 7197368326119946958) },
|
||||
{ UINT64_C(15927531924707095172),
|
||||
UINT64_C( 9273107251932017859),
|
||||
UINT64_C( 6753503951651178055) },
|
||||
{ UINT64_C( 4508419775504426930),
|
||||
UINT64_C( 1532535115017912859),
|
||||
UINT64_C( 3158632437299094953) },
|
||||
{ UINT64_C(15608903556322435290),
|
||||
UINT64_C( 9373588207016091307),
|
||||
UINT64_C( 6523565052813000305) },
|
||||
};
|
||||
|
||||
for (size_t i = 0 ; i < (sizeof(test_vec) / sizeof(test_vec[0])) ; i++) {
|
||||
simde__mmask64 r = simde_kxor_mask64(test_vec[i].a, test_vec[i].b);
|
||||
simde_assert_equal_mmask64(r, test_vec[i].r);
|
||||
}
|
||||
|
||||
return 0;
|
||||
#else
|
||||
fputc('\n', stdout);
|
||||
for (int i = 0 ; i < 8 ; i++) {
|
||||
simde__mmask64 a = simde_test_x86_random_mmask64();
|
||||
simde__mmask64 b = simde_test_x86_random_mmask64();
|
||||
simde__mmask64 r = simde_kxor_mask64(a, b);
|
||||
|
||||
simde_test_x86_write_mmask64(2, a, SIMDE_TEST_VEC_POS_FIRST);
|
||||
simde_test_x86_write_mmask64(2, b, SIMDE_TEST_VEC_POS_MIDDLE);
|
||||
simde_test_x86_write_mmask64(2, r, SIMDE_TEST_VEC_POS_LAST);
|
||||
}
|
||||
return 1;
|
||||
#endif
|
||||
}
|
||||
|
||||
SIMDE_TEST_FUNC_LIST_BEGIN
|
||||
SIMDE_TEST_FUNC_LIST_ENTRY(kxor_mask8)
|
||||
SIMDE_TEST_FUNC_LIST_ENTRY(kxor_mask16)
|
||||
SIMDE_TEST_FUNC_LIST_ENTRY(mm512_kxor)
|
||||
SIMDE_TEST_FUNC_LIST_ENTRY(kxor_mask32)
|
||||
SIMDE_TEST_FUNC_LIST_ENTRY(kxor_mask64)
|
||||
SIMDE_TEST_FUNC_LIST_END
|
||||
|
||||
#include <test/x86/avx512/test-avx512-footer.h>
|
||||
162
thirdparty/simde/test/x86/avx512/load.c
vendored
162
thirdparty/simde/test/x86/avx512/load.c
vendored
|
|
@ -142,6 +142,165 @@ test_simde_mm512_load_ps (SIMDE_MUNIT_TEST_ARGS) {
|
|||
|
||||
return 0;
|
||||
}
|
||||
|
||||
#if defined(SIMDE_FLOAT16_IS_SCALAR)
|
||||
static int
|
||||
test_simde_mm512_load_ph (SIMDE_MUNIT_TEST_ARGS) {
|
||||
#if 1
|
||||
static const struct {
|
||||
SIMDE_ALIGN_LIKE_64(simde__m512h) const simde_float16 a[32];
|
||||
const simde_float16 r[32];
|
||||
} test_vec[] = {
|
||||
{ { SIMDE_FLOAT16_VALUE( 62.34), SIMDE_FLOAT16_VALUE( -929.00), SIMDE_FLOAT16_VALUE( 875.00), SIMDE_FLOAT16_VALUE( 429.25),
|
||||
SIMDE_FLOAT16_VALUE( 438.75), SIMDE_FLOAT16_VALUE( 920.00), SIMDE_FLOAT16_VALUE( -110.75), SIMDE_FLOAT16_VALUE( -687.50),
|
||||
SIMDE_FLOAT16_VALUE( 436.25), SIMDE_FLOAT16_VALUE( -462.00), SIMDE_FLOAT16_VALUE( 658.00), SIMDE_FLOAT16_VALUE( 687.00),
|
||||
SIMDE_FLOAT16_VALUE( 571.50), SIMDE_FLOAT16_VALUE( -648.50), SIMDE_FLOAT16_VALUE( -857.00), SIMDE_FLOAT16_VALUE( 484.00),
|
||||
SIMDE_FLOAT16_VALUE( 390.25), SIMDE_FLOAT16_VALUE( 290.25), SIMDE_FLOAT16_VALUE( -618.00), SIMDE_FLOAT16_VALUE( 207.88),
|
||||
SIMDE_FLOAT16_VALUE( 211.00), SIMDE_FLOAT16_VALUE( -151.88), SIMDE_FLOAT16_VALUE( -582.00), SIMDE_FLOAT16_VALUE( 165.12),
|
||||
SIMDE_FLOAT16_VALUE( 986.00), SIMDE_FLOAT16_VALUE( 260.00), SIMDE_FLOAT16_VALUE( -352.50), SIMDE_FLOAT16_VALUE( 331.00),
|
||||
SIMDE_FLOAT16_VALUE( 463.00), SIMDE_FLOAT16_VALUE( 537.50), SIMDE_FLOAT16_VALUE( 182.75), SIMDE_FLOAT16_VALUE( -474.75) },
|
||||
{ SIMDE_FLOAT16_VALUE( 62.34), SIMDE_FLOAT16_VALUE( -929.00), SIMDE_FLOAT16_VALUE( 875.00), SIMDE_FLOAT16_VALUE( 429.25),
|
||||
SIMDE_FLOAT16_VALUE( 438.75), SIMDE_FLOAT16_VALUE( 920.00), SIMDE_FLOAT16_VALUE( -110.75), SIMDE_FLOAT16_VALUE( -687.50),
|
||||
SIMDE_FLOAT16_VALUE( 436.25), SIMDE_FLOAT16_VALUE( -462.00), SIMDE_FLOAT16_VALUE( 658.00), SIMDE_FLOAT16_VALUE( 687.00),
|
||||
SIMDE_FLOAT16_VALUE( 571.50), SIMDE_FLOAT16_VALUE( -648.50), SIMDE_FLOAT16_VALUE( -857.00), SIMDE_FLOAT16_VALUE( 484.00),
|
||||
SIMDE_FLOAT16_VALUE( 390.25), SIMDE_FLOAT16_VALUE( 290.25), SIMDE_FLOAT16_VALUE( -618.00), SIMDE_FLOAT16_VALUE( 207.88),
|
||||
SIMDE_FLOAT16_VALUE( 211.00), SIMDE_FLOAT16_VALUE( -151.88), SIMDE_FLOAT16_VALUE( -582.00), SIMDE_FLOAT16_VALUE( 165.12),
|
||||
SIMDE_FLOAT16_VALUE( 986.00), SIMDE_FLOAT16_VALUE( 260.00), SIMDE_FLOAT16_VALUE( -352.50), SIMDE_FLOAT16_VALUE( 331.00),
|
||||
SIMDE_FLOAT16_VALUE( 463.00), SIMDE_FLOAT16_VALUE( 537.50), SIMDE_FLOAT16_VALUE( 182.75), SIMDE_FLOAT16_VALUE( -474.75) } },
|
||||
{ { SIMDE_FLOAT16_VALUE( 608.50), SIMDE_FLOAT16_VALUE( 57.62), SIMDE_FLOAT16_VALUE( 954.50), SIMDE_FLOAT16_VALUE( 47.22),
|
||||
SIMDE_FLOAT16_VALUE( -22.30), SIMDE_FLOAT16_VALUE( -156.25), SIMDE_FLOAT16_VALUE( 360.00), SIMDE_FLOAT16_VALUE( -586.00),
|
||||
SIMDE_FLOAT16_VALUE( 381.75), SIMDE_FLOAT16_VALUE( 17.98), SIMDE_FLOAT16_VALUE( -899.00), SIMDE_FLOAT16_VALUE( -46.62),
|
||||
SIMDE_FLOAT16_VALUE( 369.25), SIMDE_FLOAT16_VALUE( -756.50), SIMDE_FLOAT16_VALUE( -562.50), SIMDE_FLOAT16_VALUE( -240.50),
|
||||
SIMDE_FLOAT16_VALUE( 534.00), SIMDE_FLOAT16_VALUE( -180.62), SIMDE_FLOAT16_VALUE( 967.50), SIMDE_FLOAT16_VALUE( -255.12),
|
||||
SIMDE_FLOAT16_VALUE( 667.50), SIMDE_FLOAT16_VALUE( -614.50), SIMDE_FLOAT16_VALUE( 910.00), SIMDE_FLOAT16_VALUE( 653.50),
|
||||
SIMDE_FLOAT16_VALUE( 645.50), SIMDE_FLOAT16_VALUE( -442.50), SIMDE_FLOAT16_VALUE( -15.32), SIMDE_FLOAT16_VALUE( 108.25),
|
||||
SIMDE_FLOAT16_VALUE( -905.00), SIMDE_FLOAT16_VALUE( -832.50), SIMDE_FLOAT16_VALUE( 633.50), SIMDE_FLOAT16_VALUE( 703.50) },
|
||||
{ SIMDE_FLOAT16_VALUE( 608.50), SIMDE_FLOAT16_VALUE( 57.62), SIMDE_FLOAT16_VALUE( 954.50), SIMDE_FLOAT16_VALUE( 47.22),
|
||||
SIMDE_FLOAT16_VALUE( -22.30), SIMDE_FLOAT16_VALUE( -156.25), SIMDE_FLOAT16_VALUE( 360.00), SIMDE_FLOAT16_VALUE( -586.00),
|
||||
SIMDE_FLOAT16_VALUE( 381.75), SIMDE_FLOAT16_VALUE( 17.98), SIMDE_FLOAT16_VALUE( -899.00), SIMDE_FLOAT16_VALUE( -46.62),
|
||||
SIMDE_FLOAT16_VALUE( 369.25), SIMDE_FLOAT16_VALUE( -756.50), SIMDE_FLOAT16_VALUE( -562.50), SIMDE_FLOAT16_VALUE( -240.50),
|
||||
SIMDE_FLOAT16_VALUE( 534.00), SIMDE_FLOAT16_VALUE( -180.62), SIMDE_FLOAT16_VALUE( 967.50), SIMDE_FLOAT16_VALUE( -255.12),
|
||||
SIMDE_FLOAT16_VALUE( 667.50), SIMDE_FLOAT16_VALUE( -614.50), SIMDE_FLOAT16_VALUE( 910.00), SIMDE_FLOAT16_VALUE( 653.50),
|
||||
SIMDE_FLOAT16_VALUE( 645.50), SIMDE_FLOAT16_VALUE( -442.50), SIMDE_FLOAT16_VALUE( -15.32), SIMDE_FLOAT16_VALUE( 108.25),
|
||||
SIMDE_FLOAT16_VALUE( -905.00), SIMDE_FLOAT16_VALUE( -832.50), SIMDE_FLOAT16_VALUE( 633.50), SIMDE_FLOAT16_VALUE( 703.50) } },
|
||||
{ { SIMDE_FLOAT16_VALUE( 225.12), SIMDE_FLOAT16_VALUE( 588.00), SIMDE_FLOAT16_VALUE( -249.25), SIMDE_FLOAT16_VALUE( -797.00),
|
||||
SIMDE_FLOAT16_VALUE( -568.00), SIMDE_FLOAT16_VALUE( -889.00), SIMDE_FLOAT16_VALUE( -383.25), SIMDE_FLOAT16_VALUE( 813.50),
|
||||
SIMDE_FLOAT16_VALUE( 128.75), SIMDE_FLOAT16_VALUE( -282.50), SIMDE_FLOAT16_VALUE( -233.12), SIMDE_FLOAT16_VALUE( -502.00),
|
||||
SIMDE_FLOAT16_VALUE( -38.66), SIMDE_FLOAT16_VALUE( 204.25), SIMDE_FLOAT16_VALUE( 257.50), SIMDE_FLOAT16_VALUE( -504.75),
|
||||
SIMDE_FLOAT16_VALUE( -976.50), SIMDE_FLOAT16_VALUE( 225.00), SIMDE_FLOAT16_VALUE( 240.25), SIMDE_FLOAT16_VALUE( 691.50),
|
||||
SIMDE_FLOAT16_VALUE( 610.50), SIMDE_FLOAT16_VALUE( 150.25), SIMDE_FLOAT16_VALUE( 345.00), SIMDE_FLOAT16_VALUE( 255.75),
|
||||
SIMDE_FLOAT16_VALUE( 708.00), SIMDE_FLOAT16_VALUE( -670.50), SIMDE_FLOAT16_VALUE( -636.00), SIMDE_FLOAT16_VALUE( 803.00),
|
||||
SIMDE_FLOAT16_VALUE( -503.00), SIMDE_FLOAT16_VALUE( 997.50), SIMDE_FLOAT16_VALUE( 506.75), SIMDE_FLOAT16_VALUE( 722.00) },
|
||||
{ SIMDE_FLOAT16_VALUE( 225.12), SIMDE_FLOAT16_VALUE( 588.00), SIMDE_FLOAT16_VALUE( -249.25), SIMDE_FLOAT16_VALUE( -797.00),
|
||||
SIMDE_FLOAT16_VALUE( -568.00), SIMDE_FLOAT16_VALUE( -889.00), SIMDE_FLOAT16_VALUE( -383.25), SIMDE_FLOAT16_VALUE( 813.50),
|
||||
SIMDE_FLOAT16_VALUE( 128.75), SIMDE_FLOAT16_VALUE( -282.50), SIMDE_FLOAT16_VALUE( -233.12), SIMDE_FLOAT16_VALUE( -502.00),
|
||||
SIMDE_FLOAT16_VALUE( -38.66), SIMDE_FLOAT16_VALUE( 204.25), SIMDE_FLOAT16_VALUE( 257.50), SIMDE_FLOAT16_VALUE( -504.75),
|
||||
SIMDE_FLOAT16_VALUE( -976.50), SIMDE_FLOAT16_VALUE( 225.00), SIMDE_FLOAT16_VALUE( 240.25), SIMDE_FLOAT16_VALUE( 691.50),
|
||||
SIMDE_FLOAT16_VALUE( 610.50), SIMDE_FLOAT16_VALUE( 150.25), SIMDE_FLOAT16_VALUE( 345.00), SIMDE_FLOAT16_VALUE( 255.75),
|
||||
SIMDE_FLOAT16_VALUE( 708.00), SIMDE_FLOAT16_VALUE( -670.50), SIMDE_FLOAT16_VALUE( -636.00), SIMDE_FLOAT16_VALUE( 803.00),
|
||||
SIMDE_FLOAT16_VALUE( -503.00), SIMDE_FLOAT16_VALUE( 997.50), SIMDE_FLOAT16_VALUE( 506.75), SIMDE_FLOAT16_VALUE( 722.00) } },
|
||||
{ { SIMDE_FLOAT16_VALUE( 585.50), SIMDE_FLOAT16_VALUE( -742.50), SIMDE_FLOAT16_VALUE( 925.00), SIMDE_FLOAT16_VALUE( -982.50),
|
||||
SIMDE_FLOAT16_VALUE( -631.50), SIMDE_FLOAT16_VALUE( -458.25), SIMDE_FLOAT16_VALUE( 831.00), SIMDE_FLOAT16_VALUE( 497.00),
|
||||
SIMDE_FLOAT16_VALUE( 259.25), SIMDE_FLOAT16_VALUE( -402.25), SIMDE_FLOAT16_VALUE( 995.00), SIMDE_FLOAT16_VALUE( -779.50),
|
||||
SIMDE_FLOAT16_VALUE( 802.00), SIMDE_FLOAT16_VALUE( 252.75), SIMDE_FLOAT16_VALUE( -284.00), SIMDE_FLOAT16_VALUE( 826.00),
|
||||
SIMDE_FLOAT16_VALUE( -522.00), SIMDE_FLOAT16_VALUE( 956.00), SIMDE_FLOAT16_VALUE( 517.00), SIMDE_FLOAT16_VALUE( -912.00),
|
||||
SIMDE_FLOAT16_VALUE( 106.50), SIMDE_FLOAT16_VALUE( -138.12), SIMDE_FLOAT16_VALUE( 343.75), SIMDE_FLOAT16_VALUE( -185.62),
|
||||
SIMDE_FLOAT16_VALUE( 191.50), SIMDE_FLOAT16_VALUE( 708.00), SIMDE_FLOAT16_VALUE( -382.50), SIMDE_FLOAT16_VALUE( 688.50),
|
||||
SIMDE_FLOAT16_VALUE( 705.50), SIMDE_FLOAT16_VALUE( -876.00), SIMDE_FLOAT16_VALUE( 410.75), SIMDE_FLOAT16_VALUE( 291.00) },
|
||||
{ SIMDE_FLOAT16_VALUE( 585.50), SIMDE_FLOAT16_VALUE( -742.50), SIMDE_FLOAT16_VALUE( 925.00), SIMDE_FLOAT16_VALUE( -982.50),
|
||||
SIMDE_FLOAT16_VALUE( -631.50), SIMDE_FLOAT16_VALUE( -458.25), SIMDE_FLOAT16_VALUE( 831.00), SIMDE_FLOAT16_VALUE( 497.00),
|
||||
SIMDE_FLOAT16_VALUE( 259.25), SIMDE_FLOAT16_VALUE( -402.25), SIMDE_FLOAT16_VALUE( 995.00), SIMDE_FLOAT16_VALUE( -779.50),
|
||||
SIMDE_FLOAT16_VALUE( 802.00), SIMDE_FLOAT16_VALUE( 252.75), SIMDE_FLOAT16_VALUE( -284.00), SIMDE_FLOAT16_VALUE( 826.00),
|
||||
SIMDE_FLOAT16_VALUE( -522.00), SIMDE_FLOAT16_VALUE( 956.00), SIMDE_FLOAT16_VALUE( 517.00), SIMDE_FLOAT16_VALUE( -912.00),
|
||||
SIMDE_FLOAT16_VALUE( 106.50), SIMDE_FLOAT16_VALUE( -138.12), SIMDE_FLOAT16_VALUE( 343.75), SIMDE_FLOAT16_VALUE( -185.62),
|
||||
SIMDE_FLOAT16_VALUE( 191.50), SIMDE_FLOAT16_VALUE( 708.00), SIMDE_FLOAT16_VALUE( -382.50), SIMDE_FLOAT16_VALUE( 688.50),
|
||||
SIMDE_FLOAT16_VALUE( 705.50), SIMDE_FLOAT16_VALUE( -876.00), SIMDE_FLOAT16_VALUE( 410.75), SIMDE_FLOAT16_VALUE( 291.00) } },
|
||||
{ { SIMDE_FLOAT16_VALUE( -618.50), SIMDE_FLOAT16_VALUE( 335.50), SIMDE_FLOAT16_VALUE( 308.25), SIMDE_FLOAT16_VALUE( -250.12),
|
||||
SIMDE_FLOAT16_VALUE( 877.50), SIMDE_FLOAT16_VALUE( 139.25), SIMDE_FLOAT16_VALUE( -753.00), SIMDE_FLOAT16_VALUE( 136.62),
|
||||
SIMDE_FLOAT16_VALUE( 737.00), SIMDE_FLOAT16_VALUE( -758.00), SIMDE_FLOAT16_VALUE( 357.25), SIMDE_FLOAT16_VALUE( 539.00),
|
||||
SIMDE_FLOAT16_VALUE( 494.75), SIMDE_FLOAT16_VALUE( -927.00), SIMDE_FLOAT16_VALUE( 364.75), SIMDE_FLOAT16_VALUE( 972.50),
|
||||
SIMDE_FLOAT16_VALUE( -970.50), SIMDE_FLOAT16_VALUE( -118.06), SIMDE_FLOAT16_VALUE( -939.50), SIMDE_FLOAT16_VALUE( 135.88),
|
||||
SIMDE_FLOAT16_VALUE( 744.00), SIMDE_FLOAT16_VALUE( 404.50), SIMDE_FLOAT16_VALUE( 950.50), SIMDE_FLOAT16_VALUE( -64.69),
|
||||
SIMDE_FLOAT16_VALUE( 112.38), SIMDE_FLOAT16_VALUE( -432.25), SIMDE_FLOAT16_VALUE( -376.25), SIMDE_FLOAT16_VALUE( -182.25),
|
||||
SIMDE_FLOAT16_VALUE( -308.00), SIMDE_FLOAT16_VALUE( -965.50), SIMDE_FLOAT16_VALUE( -891.50), SIMDE_FLOAT16_VALUE( 73.62) },
|
||||
{ SIMDE_FLOAT16_VALUE( -618.50), SIMDE_FLOAT16_VALUE( 335.50), SIMDE_FLOAT16_VALUE( 308.25), SIMDE_FLOAT16_VALUE( -250.12),
|
||||
SIMDE_FLOAT16_VALUE( 877.50), SIMDE_FLOAT16_VALUE( 139.25), SIMDE_FLOAT16_VALUE( -753.00), SIMDE_FLOAT16_VALUE( 136.62),
|
||||
SIMDE_FLOAT16_VALUE( 737.00), SIMDE_FLOAT16_VALUE( -758.00), SIMDE_FLOAT16_VALUE( 357.25), SIMDE_FLOAT16_VALUE( 539.00),
|
||||
SIMDE_FLOAT16_VALUE( 494.75), SIMDE_FLOAT16_VALUE( -927.00), SIMDE_FLOAT16_VALUE( 364.75), SIMDE_FLOAT16_VALUE( 972.50),
|
||||
SIMDE_FLOAT16_VALUE( -970.50), SIMDE_FLOAT16_VALUE( -118.06), SIMDE_FLOAT16_VALUE( -939.50), SIMDE_FLOAT16_VALUE( 135.88),
|
||||
SIMDE_FLOAT16_VALUE( 744.00), SIMDE_FLOAT16_VALUE( 404.50), SIMDE_FLOAT16_VALUE( 950.50), SIMDE_FLOAT16_VALUE( -64.69),
|
||||
SIMDE_FLOAT16_VALUE( 112.38), SIMDE_FLOAT16_VALUE( -432.25), SIMDE_FLOAT16_VALUE( -376.25), SIMDE_FLOAT16_VALUE( -182.25),
|
||||
SIMDE_FLOAT16_VALUE( -308.00), SIMDE_FLOAT16_VALUE( -965.50), SIMDE_FLOAT16_VALUE( -891.50), SIMDE_FLOAT16_VALUE( 73.62) } },
|
||||
{ { SIMDE_FLOAT16_VALUE( 370.00), SIMDE_FLOAT16_VALUE( 417.00), SIMDE_FLOAT16_VALUE( 823.50), SIMDE_FLOAT16_VALUE( 247.38),
|
||||
SIMDE_FLOAT16_VALUE( -443.75), SIMDE_FLOAT16_VALUE( -929.50), SIMDE_FLOAT16_VALUE( -616.00), SIMDE_FLOAT16_VALUE( -706.50),
|
||||
SIMDE_FLOAT16_VALUE( -687.50), SIMDE_FLOAT16_VALUE( 741.00), SIMDE_FLOAT16_VALUE( 832.50), SIMDE_FLOAT16_VALUE( 807.50),
|
||||
SIMDE_FLOAT16_VALUE( 814.50), SIMDE_FLOAT16_VALUE( 197.25), SIMDE_FLOAT16_VALUE( 780.00), SIMDE_FLOAT16_VALUE( 844.00),
|
||||
SIMDE_FLOAT16_VALUE( -921.00), SIMDE_FLOAT16_VALUE( 840.50), SIMDE_FLOAT16_VALUE( -20.16), SIMDE_FLOAT16_VALUE( 823.00),
|
||||
SIMDE_FLOAT16_VALUE( 245.12), SIMDE_FLOAT16_VALUE( -69.81), SIMDE_FLOAT16_VALUE( -241.62), SIMDE_FLOAT16_VALUE( -642.50),
|
||||
SIMDE_FLOAT16_VALUE( 498.00), SIMDE_FLOAT16_VALUE( 382.25), SIMDE_FLOAT16_VALUE( 175.12), SIMDE_FLOAT16_VALUE( -810.00),
|
||||
SIMDE_FLOAT16_VALUE( 416.75), SIMDE_FLOAT16_VALUE( 283.75), SIMDE_FLOAT16_VALUE( 263.75), SIMDE_FLOAT16_VALUE( -213.25) },
|
||||
{ SIMDE_FLOAT16_VALUE( 370.00), SIMDE_FLOAT16_VALUE( 417.00), SIMDE_FLOAT16_VALUE( 823.50), SIMDE_FLOAT16_VALUE( 247.38),
|
||||
SIMDE_FLOAT16_VALUE( -443.75), SIMDE_FLOAT16_VALUE( -929.50), SIMDE_FLOAT16_VALUE( -616.00), SIMDE_FLOAT16_VALUE( -706.50),
|
||||
SIMDE_FLOAT16_VALUE( -687.50), SIMDE_FLOAT16_VALUE( 741.00), SIMDE_FLOAT16_VALUE( 832.50), SIMDE_FLOAT16_VALUE( 807.50),
|
||||
SIMDE_FLOAT16_VALUE( 814.50), SIMDE_FLOAT16_VALUE( 197.25), SIMDE_FLOAT16_VALUE( 780.00), SIMDE_FLOAT16_VALUE( 844.00),
|
||||
SIMDE_FLOAT16_VALUE( -921.00), SIMDE_FLOAT16_VALUE( 840.50), SIMDE_FLOAT16_VALUE( -20.16), SIMDE_FLOAT16_VALUE( 823.00),
|
||||
SIMDE_FLOAT16_VALUE( 245.12), SIMDE_FLOAT16_VALUE( -69.81), SIMDE_FLOAT16_VALUE( -241.62), SIMDE_FLOAT16_VALUE( -642.50),
|
||||
SIMDE_FLOAT16_VALUE( 498.00), SIMDE_FLOAT16_VALUE( 382.25), SIMDE_FLOAT16_VALUE( 175.12), SIMDE_FLOAT16_VALUE( -810.00),
|
||||
SIMDE_FLOAT16_VALUE( 416.75), SIMDE_FLOAT16_VALUE( 283.75), SIMDE_FLOAT16_VALUE( 263.75), SIMDE_FLOAT16_VALUE( -213.25) } },
|
||||
{ { SIMDE_FLOAT16_VALUE( -299.25), SIMDE_FLOAT16_VALUE( 87.19), SIMDE_FLOAT16_VALUE( -966.00), SIMDE_FLOAT16_VALUE( 257.00),
|
||||
SIMDE_FLOAT16_VALUE( 157.62), SIMDE_FLOAT16_VALUE( -582.00), SIMDE_FLOAT16_VALUE( 550.50), SIMDE_FLOAT16_VALUE( 470.00),
|
||||
SIMDE_FLOAT16_VALUE( -840.50), SIMDE_FLOAT16_VALUE( 382.75), SIMDE_FLOAT16_VALUE( 277.50), SIMDE_FLOAT16_VALUE( 974.00),
|
||||
SIMDE_FLOAT16_VALUE( -420.00), SIMDE_FLOAT16_VALUE( 57.22), SIMDE_FLOAT16_VALUE( 818.00), SIMDE_FLOAT16_VALUE( -340.75),
|
||||
SIMDE_FLOAT16_VALUE( -102.25), SIMDE_FLOAT16_VALUE( -202.38), SIMDE_FLOAT16_VALUE( -517.50), SIMDE_FLOAT16_VALUE( -857.00),
|
||||
SIMDE_FLOAT16_VALUE( 728.00), SIMDE_FLOAT16_VALUE( 240.75), SIMDE_FLOAT16_VALUE( -499.75), SIMDE_FLOAT16_VALUE( 225.75),
|
||||
SIMDE_FLOAT16_VALUE( -377.00), SIMDE_FLOAT16_VALUE( 675.50), SIMDE_FLOAT16_VALUE( 415.75), SIMDE_FLOAT16_VALUE( -960.50),
|
||||
SIMDE_FLOAT16_VALUE( -40.75), SIMDE_FLOAT16_VALUE( -320.50), SIMDE_FLOAT16_VALUE( -173.50), SIMDE_FLOAT16_VALUE( 660.00) },
|
||||
{ SIMDE_FLOAT16_VALUE( -299.25), SIMDE_FLOAT16_VALUE( 87.19), SIMDE_FLOAT16_VALUE( -966.00), SIMDE_FLOAT16_VALUE( 257.00),
|
||||
SIMDE_FLOAT16_VALUE( 157.62), SIMDE_FLOAT16_VALUE( -582.00), SIMDE_FLOAT16_VALUE( 550.50), SIMDE_FLOAT16_VALUE( 470.00),
|
||||
SIMDE_FLOAT16_VALUE( -840.50), SIMDE_FLOAT16_VALUE( 382.75), SIMDE_FLOAT16_VALUE( 277.50), SIMDE_FLOAT16_VALUE( 974.00),
|
||||
SIMDE_FLOAT16_VALUE( -420.00), SIMDE_FLOAT16_VALUE( 57.22), SIMDE_FLOAT16_VALUE( 818.00), SIMDE_FLOAT16_VALUE( -340.75),
|
||||
SIMDE_FLOAT16_VALUE( -102.25), SIMDE_FLOAT16_VALUE( -202.38), SIMDE_FLOAT16_VALUE( -517.50), SIMDE_FLOAT16_VALUE( -857.00),
|
||||
SIMDE_FLOAT16_VALUE( 728.00), SIMDE_FLOAT16_VALUE( 240.75), SIMDE_FLOAT16_VALUE( -499.75), SIMDE_FLOAT16_VALUE( 225.75),
|
||||
SIMDE_FLOAT16_VALUE( -377.00), SIMDE_FLOAT16_VALUE( 675.50), SIMDE_FLOAT16_VALUE( 415.75), SIMDE_FLOAT16_VALUE( -960.50),
|
||||
SIMDE_FLOAT16_VALUE( -40.75), SIMDE_FLOAT16_VALUE( -320.50), SIMDE_FLOAT16_VALUE( -173.50), SIMDE_FLOAT16_VALUE( 660.00) } },
|
||||
{ { SIMDE_FLOAT16_VALUE( 766.50), SIMDE_FLOAT16_VALUE( -139.38), SIMDE_FLOAT16_VALUE( -82.88), SIMDE_FLOAT16_VALUE( -75.81),
|
||||
SIMDE_FLOAT16_VALUE( 278.75), SIMDE_FLOAT16_VALUE( -532.50), SIMDE_FLOAT16_VALUE( -605.50), SIMDE_FLOAT16_VALUE( 438.25),
|
||||
SIMDE_FLOAT16_VALUE( 850.50), SIMDE_FLOAT16_VALUE( 671.50), SIMDE_FLOAT16_VALUE( 412.00), SIMDE_FLOAT16_VALUE( -569.50),
|
||||
SIMDE_FLOAT16_VALUE( -271.25), SIMDE_FLOAT16_VALUE( 229.75), SIMDE_FLOAT16_VALUE( 89.62), SIMDE_FLOAT16_VALUE( 626.50),
|
||||
SIMDE_FLOAT16_VALUE( -972.50), SIMDE_FLOAT16_VALUE( 572.00), SIMDE_FLOAT16_VALUE( 769.50), SIMDE_FLOAT16_VALUE( 755.00),
|
||||
SIMDE_FLOAT16_VALUE( -187.38), SIMDE_FLOAT16_VALUE( -730.50), SIMDE_FLOAT16_VALUE( -19.11), SIMDE_FLOAT16_VALUE( 435.50),
|
||||
SIMDE_FLOAT16_VALUE( 945.00), SIMDE_FLOAT16_VALUE( -603.50), SIMDE_FLOAT16_VALUE( 475.25), SIMDE_FLOAT16_VALUE( -95.62),
|
||||
SIMDE_FLOAT16_VALUE( 76.06), SIMDE_FLOAT16_VALUE( -698.00), SIMDE_FLOAT16_VALUE( -435.50), SIMDE_FLOAT16_VALUE( -157.38) },
|
||||
{ SIMDE_FLOAT16_VALUE( 766.50), SIMDE_FLOAT16_VALUE( -139.38), SIMDE_FLOAT16_VALUE( -82.88), SIMDE_FLOAT16_VALUE( -75.81),
|
||||
SIMDE_FLOAT16_VALUE( 278.75), SIMDE_FLOAT16_VALUE( -532.50), SIMDE_FLOAT16_VALUE( -605.50), SIMDE_FLOAT16_VALUE( 438.25),
|
||||
SIMDE_FLOAT16_VALUE( 850.50), SIMDE_FLOAT16_VALUE( 671.50), SIMDE_FLOAT16_VALUE( 412.00), SIMDE_FLOAT16_VALUE( -569.50),
|
||||
SIMDE_FLOAT16_VALUE( -271.25), SIMDE_FLOAT16_VALUE( 229.75), SIMDE_FLOAT16_VALUE( 89.62), SIMDE_FLOAT16_VALUE( 626.50),
|
||||
SIMDE_FLOAT16_VALUE( -972.50), SIMDE_FLOAT16_VALUE( 572.00), SIMDE_FLOAT16_VALUE( 769.50), SIMDE_FLOAT16_VALUE( 755.00),
|
||||
SIMDE_FLOAT16_VALUE( -187.38), SIMDE_FLOAT16_VALUE( -730.50), SIMDE_FLOAT16_VALUE( -19.11), SIMDE_FLOAT16_VALUE( 435.50),
|
||||
SIMDE_FLOAT16_VALUE( 945.00), SIMDE_FLOAT16_VALUE( -603.50), SIMDE_FLOAT16_VALUE( 475.25), SIMDE_FLOAT16_VALUE( -95.62),
|
||||
SIMDE_FLOAT16_VALUE( 76.06), SIMDE_FLOAT16_VALUE( -698.00), SIMDE_FLOAT16_VALUE( -435.50), SIMDE_FLOAT16_VALUE( -157.38) } },
|
||||
};
|
||||
|
||||
for (size_t i = 0 ; i < (sizeof(test_vec) / sizeof(test_vec[0])) ; i++) {
|
||||
simde__m512h r = simde_mm512_load_ph(test_vec[i].a);
|
||||
simde_test_x86_assert_equal_f16x32(r, simde_mm512_loadu_ph(test_vec[i].r), 1);
|
||||
}
|
||||
|
||||
return 0;
|
||||
#else
|
||||
fputc('\n', stdout);
|
||||
for (int i = 0 ; i < 8 ; i++) {
|
||||
simde__m512h a = simde_test_x86_random_f16x32(SIMDE_FLOAT16_VALUE(-1000.0), SIMDE_FLOAT16_VALUE(1000.0));
|
||||
simde__m512h r = a;
|
||||
|
||||
simde_test_x86_write_f16x32(2, a, SIMDE_TEST_VEC_POS_FIRST);
|
||||
simde_test_x86_write_f16x32(2, r, SIMDE_TEST_VEC_POS_LAST);
|
||||
}
|
||||
return 1;
|
||||
#endif
|
||||
}
|
||||
#endif
|
||||
|
||||
static int
|
||||
test_simde_mm512_load_si512 (SIMDE_MUNIT_TEST_ARGS) {
|
||||
#if 1
|
||||
|
|
@ -204,6 +363,9 @@ test_simde_mm512_load_si512 (SIMDE_MUNIT_TEST_ARGS) {
|
|||
SIMDE_TEST_FUNC_LIST_BEGIN
|
||||
SIMDE_TEST_FUNC_LIST_ENTRY(mm512_load_pd)
|
||||
SIMDE_TEST_FUNC_LIST_ENTRY(mm512_load_ps)
|
||||
#if defined(SIMDE_FLOAT16_IS_SCALAR)
|
||||
SIMDE_TEST_FUNC_LIST_ENTRY(mm512_load_ph)
|
||||
#endif
|
||||
SIMDE_TEST_FUNC_LIST_ENTRY(mm512_load_si512)
|
||||
SIMDE_TEST_FUNC_LIST_END
|
||||
|
||||
|
|
|
|||
1204
thirdparty/simde/test/x86/avx512/loadu.c
vendored
1204
thirdparty/simde/test/x86/avx512/loadu.c
vendored
File diff suppressed because it is too large
Load diff
232
thirdparty/simde/test/x86/avx512/max.c
vendored
232
thirdparty/simde/test/x86/avx512/max.c
vendored
|
|
@ -3207,6 +3207,234 @@ test_simde_mm512_maskz_max_epu64 (SIMDE_MUNIT_TEST_ARGS) {
|
|||
return 0;
|
||||
}
|
||||
|
||||
#if defined(SIMDE_FLOAT16_IS_SCALAR)
|
||||
static int
|
||||
test_simde_mm512_max_ph (SIMDE_MUNIT_TEST_ARGS) {
|
||||
#if 1
|
||||
static const struct {
|
||||
const simde_float16 a[32];
|
||||
const simde_float16 b[32];
|
||||
const simde_float16 r[32];
|
||||
} test_vec[] = {
|
||||
{ { SIMDE_FLOAT16_VALUE( 77.75), SIMDE_FLOAT16_VALUE( -48.38), SIMDE_FLOAT16_VALUE( -7.66), SIMDE_FLOAT16_VALUE( -35.53),
|
||||
SIMDE_FLOAT16_VALUE( -15.31), SIMDE_FLOAT16_VALUE( -45.06), SIMDE_FLOAT16_VALUE( 66.81), SIMDE_FLOAT16_VALUE( -69.88),
|
||||
SIMDE_FLOAT16_VALUE( 74.50), SIMDE_FLOAT16_VALUE( 32.53), SIMDE_FLOAT16_VALUE( 79.38), SIMDE_FLOAT16_VALUE( 10.47),
|
||||
SIMDE_FLOAT16_VALUE( -1.68), SIMDE_FLOAT16_VALUE( -20.31), SIMDE_FLOAT16_VALUE( 15.38), SIMDE_FLOAT16_VALUE( -46.38),
|
||||
SIMDE_FLOAT16_VALUE( 4.04), SIMDE_FLOAT16_VALUE( 7.79), SIMDE_FLOAT16_VALUE( -36.53), SIMDE_FLOAT16_VALUE( -74.88),
|
||||
SIMDE_FLOAT16_VALUE( 22.08), SIMDE_FLOAT16_VALUE( 84.56), SIMDE_FLOAT16_VALUE( -98.94), SIMDE_FLOAT16_VALUE( 25.23),
|
||||
SIMDE_FLOAT16_VALUE( -10.24), SIMDE_FLOAT16_VALUE( 22.94), SIMDE_FLOAT16_VALUE( 68.56), SIMDE_FLOAT16_VALUE( 0.81),
|
||||
SIMDE_FLOAT16_VALUE( -61.03), SIMDE_FLOAT16_VALUE( -7.06), SIMDE_FLOAT16_VALUE( -74.31), SIMDE_FLOAT16_VALUE( -83.25) },
|
||||
{ SIMDE_FLOAT16_VALUE( 44.59), SIMDE_FLOAT16_VALUE( 18.02), SIMDE_FLOAT16_VALUE( -18.80), SIMDE_FLOAT16_VALUE( -70.75),
|
||||
SIMDE_FLOAT16_VALUE( 72.94), SIMDE_FLOAT16_VALUE( -51.97), SIMDE_FLOAT16_VALUE( -40.62), SIMDE_FLOAT16_VALUE( 47.50),
|
||||
SIMDE_FLOAT16_VALUE( 80.56), SIMDE_FLOAT16_VALUE( -61.28), SIMDE_FLOAT16_VALUE( -42.03), SIMDE_FLOAT16_VALUE( -21.12),
|
||||
SIMDE_FLOAT16_VALUE( 18.41), SIMDE_FLOAT16_VALUE( 73.38), SIMDE_FLOAT16_VALUE( 32.50), SIMDE_FLOAT16_VALUE( -77.56),
|
||||
SIMDE_FLOAT16_VALUE( -18.86), SIMDE_FLOAT16_VALUE( 95.94), SIMDE_FLOAT16_VALUE( -52.41), SIMDE_FLOAT16_VALUE( -96.75),
|
||||
SIMDE_FLOAT16_VALUE( 80.50), SIMDE_FLOAT16_VALUE( -51.38), SIMDE_FLOAT16_VALUE( 28.45), SIMDE_FLOAT16_VALUE( -29.70),
|
||||
SIMDE_FLOAT16_VALUE( 71.56), SIMDE_FLOAT16_VALUE( -2.99), SIMDE_FLOAT16_VALUE( 71.12), SIMDE_FLOAT16_VALUE( -89.50),
|
||||
SIMDE_FLOAT16_VALUE( 89.94), SIMDE_FLOAT16_VALUE( 96.75), SIMDE_FLOAT16_VALUE( -72.75), SIMDE_FLOAT16_VALUE( 34.53) },
|
||||
{ SIMDE_FLOAT16_VALUE( 77.75), SIMDE_FLOAT16_VALUE( 18.02), SIMDE_FLOAT16_VALUE( -7.66), SIMDE_FLOAT16_VALUE( -35.53),
|
||||
SIMDE_FLOAT16_VALUE( 72.94), SIMDE_FLOAT16_VALUE( -45.06), SIMDE_FLOAT16_VALUE( 66.81), SIMDE_FLOAT16_VALUE( 47.50),
|
||||
SIMDE_FLOAT16_VALUE( 80.56), SIMDE_FLOAT16_VALUE( 32.53), SIMDE_FLOAT16_VALUE( 79.38), SIMDE_FLOAT16_VALUE( 10.47),
|
||||
SIMDE_FLOAT16_VALUE( 18.41), SIMDE_FLOAT16_VALUE( 73.38), SIMDE_FLOAT16_VALUE( 32.50), SIMDE_FLOAT16_VALUE( -46.38),
|
||||
SIMDE_FLOAT16_VALUE( 4.04), SIMDE_FLOAT16_VALUE( 95.94), SIMDE_FLOAT16_VALUE( -36.53), SIMDE_FLOAT16_VALUE( -74.88),
|
||||
SIMDE_FLOAT16_VALUE( 80.50), SIMDE_FLOAT16_VALUE( 84.56), SIMDE_FLOAT16_VALUE( 28.45), SIMDE_FLOAT16_VALUE( 25.23),
|
||||
SIMDE_FLOAT16_VALUE( 71.56), SIMDE_FLOAT16_VALUE( 22.94), SIMDE_FLOAT16_VALUE( 71.12), SIMDE_FLOAT16_VALUE( 0.81),
|
||||
SIMDE_FLOAT16_VALUE( 89.94), SIMDE_FLOAT16_VALUE( 96.75), SIMDE_FLOAT16_VALUE( -72.75), SIMDE_FLOAT16_VALUE( 34.53) } },
|
||||
{ { SIMDE_FLOAT16_VALUE( 14.77), SIMDE_FLOAT16_VALUE( 8.47), SIMDE_FLOAT16_VALUE( 63.78), SIMDE_FLOAT16_VALUE( -12.27),
|
||||
SIMDE_FLOAT16_VALUE( 56.50), SIMDE_FLOAT16_VALUE( -76.81), SIMDE_FLOAT16_VALUE( -64.75), SIMDE_FLOAT16_VALUE( 37.06),
|
||||
SIMDE_FLOAT16_VALUE( -38.09), SIMDE_FLOAT16_VALUE( -6.81), SIMDE_FLOAT16_VALUE( -84.06), SIMDE_FLOAT16_VALUE( 80.31),
|
||||
SIMDE_FLOAT16_VALUE( -33.47), SIMDE_FLOAT16_VALUE( 48.41), SIMDE_FLOAT16_VALUE( -97.25), SIMDE_FLOAT16_VALUE( 47.66),
|
||||
SIMDE_FLOAT16_VALUE( 44.38), SIMDE_FLOAT16_VALUE( -49.62), SIMDE_FLOAT16_VALUE( 50.88), SIMDE_FLOAT16_VALUE( 24.89),
|
||||
SIMDE_FLOAT16_VALUE( -1.00), SIMDE_FLOAT16_VALUE( -20.66), SIMDE_FLOAT16_VALUE( 95.19), SIMDE_FLOAT16_VALUE( -29.44),
|
||||
SIMDE_FLOAT16_VALUE( 76.38), SIMDE_FLOAT16_VALUE( 66.25), SIMDE_FLOAT16_VALUE( -18.91), SIMDE_FLOAT16_VALUE( 66.31),
|
||||
SIMDE_FLOAT16_VALUE( 63.03), SIMDE_FLOAT16_VALUE( 8.35), SIMDE_FLOAT16_VALUE( 0.83), SIMDE_FLOAT16_VALUE( -22.19) },
|
||||
{ SIMDE_FLOAT16_VALUE( -83.19), SIMDE_FLOAT16_VALUE( -35.38), SIMDE_FLOAT16_VALUE( 65.56), SIMDE_FLOAT16_VALUE( 73.31),
|
||||
SIMDE_FLOAT16_VALUE( -12.21), SIMDE_FLOAT16_VALUE( -99.25), SIMDE_FLOAT16_VALUE( 10.37), SIMDE_FLOAT16_VALUE( 49.69),
|
||||
SIMDE_FLOAT16_VALUE( -6.05), SIMDE_FLOAT16_VALUE( 26.30), SIMDE_FLOAT16_VALUE( 30.02), SIMDE_FLOAT16_VALUE( 60.47),
|
||||
SIMDE_FLOAT16_VALUE( -25.31), SIMDE_FLOAT16_VALUE( 32.78), SIMDE_FLOAT16_VALUE( 8.15), SIMDE_FLOAT16_VALUE( -80.94),
|
||||
SIMDE_FLOAT16_VALUE( 83.12), SIMDE_FLOAT16_VALUE( -40.97), SIMDE_FLOAT16_VALUE( 43.94), SIMDE_FLOAT16_VALUE( -17.86),
|
||||
SIMDE_FLOAT16_VALUE( 38.38), SIMDE_FLOAT16_VALUE( 39.12), SIMDE_FLOAT16_VALUE( 52.72), SIMDE_FLOAT16_VALUE( 14.73),
|
||||
SIMDE_FLOAT16_VALUE( 5.39), SIMDE_FLOAT16_VALUE( -66.19), SIMDE_FLOAT16_VALUE( -18.97), SIMDE_FLOAT16_VALUE( -31.58),
|
||||
SIMDE_FLOAT16_VALUE( 42.16), SIMDE_FLOAT16_VALUE( 81.88), SIMDE_FLOAT16_VALUE( 46.22), SIMDE_FLOAT16_VALUE( 58.97) },
|
||||
{ SIMDE_FLOAT16_VALUE( 14.77), SIMDE_FLOAT16_VALUE( 8.47), SIMDE_FLOAT16_VALUE( 65.56), SIMDE_FLOAT16_VALUE( 73.31),
|
||||
SIMDE_FLOAT16_VALUE( 56.50), SIMDE_FLOAT16_VALUE( -76.81), SIMDE_FLOAT16_VALUE( 10.37), SIMDE_FLOAT16_VALUE( 49.69),
|
||||
SIMDE_FLOAT16_VALUE( -6.05), SIMDE_FLOAT16_VALUE( 26.30), SIMDE_FLOAT16_VALUE( 30.02), SIMDE_FLOAT16_VALUE( 80.31),
|
||||
SIMDE_FLOAT16_VALUE( -25.31), SIMDE_FLOAT16_VALUE( 48.41), SIMDE_FLOAT16_VALUE( 8.15), SIMDE_FLOAT16_VALUE( 47.66),
|
||||
SIMDE_FLOAT16_VALUE( 83.12), SIMDE_FLOAT16_VALUE( -40.97), SIMDE_FLOAT16_VALUE( 50.88), SIMDE_FLOAT16_VALUE( 24.89),
|
||||
SIMDE_FLOAT16_VALUE( 38.38), SIMDE_FLOAT16_VALUE( 39.12), SIMDE_FLOAT16_VALUE( 95.19), SIMDE_FLOAT16_VALUE( 14.73),
|
||||
SIMDE_FLOAT16_VALUE( 76.38), SIMDE_FLOAT16_VALUE( 66.25), SIMDE_FLOAT16_VALUE( -18.91), SIMDE_FLOAT16_VALUE( 66.31),
|
||||
SIMDE_FLOAT16_VALUE( 63.03), SIMDE_FLOAT16_VALUE( 81.88), SIMDE_FLOAT16_VALUE( 46.22), SIMDE_FLOAT16_VALUE( 58.97) } },
|
||||
{ { SIMDE_FLOAT16_VALUE( -53.53), SIMDE_FLOAT16_VALUE( 11.77), SIMDE_FLOAT16_VALUE( 32.31), SIMDE_FLOAT16_VALUE( 34.28),
|
||||
SIMDE_FLOAT16_VALUE( 12.53), SIMDE_FLOAT16_VALUE( -57.34), SIMDE_FLOAT16_VALUE( -16.05), SIMDE_FLOAT16_VALUE( -93.50),
|
||||
SIMDE_FLOAT16_VALUE( 68.94), SIMDE_FLOAT16_VALUE( -86.00), SIMDE_FLOAT16_VALUE( 66.94), SIMDE_FLOAT16_VALUE( -56.34),
|
||||
SIMDE_FLOAT16_VALUE( 46.75), SIMDE_FLOAT16_VALUE( -24.91), SIMDE_FLOAT16_VALUE( -37.31), SIMDE_FLOAT16_VALUE( 29.91),
|
||||
SIMDE_FLOAT16_VALUE( 34.12), SIMDE_FLOAT16_VALUE( -93.38), SIMDE_FLOAT16_VALUE( -87.94), SIMDE_FLOAT16_VALUE( -27.48),
|
||||
SIMDE_FLOAT16_VALUE( 45.75), SIMDE_FLOAT16_VALUE( 64.75), SIMDE_FLOAT16_VALUE( 87.25), SIMDE_FLOAT16_VALUE( -48.88),
|
||||
SIMDE_FLOAT16_VALUE( 98.56), SIMDE_FLOAT16_VALUE( -31.73), SIMDE_FLOAT16_VALUE( 19.56), SIMDE_FLOAT16_VALUE( 40.72),
|
||||
SIMDE_FLOAT16_VALUE( -49.88), SIMDE_FLOAT16_VALUE( -34.19), SIMDE_FLOAT16_VALUE( -0.32), SIMDE_FLOAT16_VALUE( -3.40) },
|
||||
{ SIMDE_FLOAT16_VALUE( 77.56), SIMDE_FLOAT16_VALUE( -68.00), SIMDE_FLOAT16_VALUE( -69.12), SIMDE_FLOAT16_VALUE( -9.90),
|
||||
SIMDE_FLOAT16_VALUE( -25.34), SIMDE_FLOAT16_VALUE( 14.82), SIMDE_FLOAT16_VALUE( -3.42), SIMDE_FLOAT16_VALUE( -56.38),
|
||||
SIMDE_FLOAT16_VALUE( 28.80), SIMDE_FLOAT16_VALUE( -36.47), SIMDE_FLOAT16_VALUE( -12.74), SIMDE_FLOAT16_VALUE( -24.44),
|
||||
SIMDE_FLOAT16_VALUE( 38.62), SIMDE_FLOAT16_VALUE( 49.97), SIMDE_FLOAT16_VALUE( -94.50), SIMDE_FLOAT16_VALUE( -27.23),
|
||||
SIMDE_FLOAT16_VALUE( 56.62), SIMDE_FLOAT16_VALUE( -82.44), SIMDE_FLOAT16_VALUE( 45.28), SIMDE_FLOAT16_VALUE( 2.36),
|
||||
SIMDE_FLOAT16_VALUE( 82.31), SIMDE_FLOAT16_VALUE( 32.53), SIMDE_FLOAT16_VALUE( 53.50), SIMDE_FLOAT16_VALUE( 80.88),
|
||||
SIMDE_FLOAT16_VALUE( -99.19), SIMDE_FLOAT16_VALUE( -26.94), SIMDE_FLOAT16_VALUE( 21.56), SIMDE_FLOAT16_VALUE( -49.09),
|
||||
SIMDE_FLOAT16_VALUE( 38.84), SIMDE_FLOAT16_VALUE( -78.75), SIMDE_FLOAT16_VALUE( 47.50), SIMDE_FLOAT16_VALUE( 16.42) },
|
||||
{ SIMDE_FLOAT16_VALUE( 77.56), SIMDE_FLOAT16_VALUE( 11.77), SIMDE_FLOAT16_VALUE( 32.31), SIMDE_FLOAT16_VALUE( 34.28),
|
||||
SIMDE_FLOAT16_VALUE( 12.53), SIMDE_FLOAT16_VALUE( 14.82), SIMDE_FLOAT16_VALUE( -3.42), SIMDE_FLOAT16_VALUE( -56.38),
|
||||
SIMDE_FLOAT16_VALUE( 68.94), SIMDE_FLOAT16_VALUE( -36.47), SIMDE_FLOAT16_VALUE( 66.94), SIMDE_FLOAT16_VALUE( -24.44),
|
||||
SIMDE_FLOAT16_VALUE( 46.75), SIMDE_FLOAT16_VALUE( 49.97), SIMDE_FLOAT16_VALUE( -37.31), SIMDE_FLOAT16_VALUE( 29.91),
|
||||
SIMDE_FLOAT16_VALUE( 56.62), SIMDE_FLOAT16_VALUE( -82.44), SIMDE_FLOAT16_VALUE( 45.28), SIMDE_FLOAT16_VALUE( 2.36),
|
||||
SIMDE_FLOAT16_VALUE( 82.31), SIMDE_FLOAT16_VALUE( 64.75), SIMDE_FLOAT16_VALUE( 87.25), SIMDE_FLOAT16_VALUE( 80.88),
|
||||
SIMDE_FLOAT16_VALUE( 98.56), SIMDE_FLOAT16_VALUE( -26.94), SIMDE_FLOAT16_VALUE( 21.56), SIMDE_FLOAT16_VALUE( 40.72),
|
||||
SIMDE_FLOAT16_VALUE( 38.84), SIMDE_FLOAT16_VALUE( -34.19), SIMDE_FLOAT16_VALUE( 47.50), SIMDE_FLOAT16_VALUE( 16.42) } },
|
||||
{ { SIMDE_FLOAT16_VALUE( -46.78), SIMDE_FLOAT16_VALUE( 78.38), SIMDE_FLOAT16_VALUE( -93.50), SIMDE_FLOAT16_VALUE( 27.88),
|
||||
SIMDE_FLOAT16_VALUE( -6.81), SIMDE_FLOAT16_VALUE( 3.10), SIMDE_FLOAT16_VALUE( 71.50), SIMDE_FLOAT16_VALUE( -78.00),
|
||||
SIMDE_FLOAT16_VALUE( 66.62), SIMDE_FLOAT16_VALUE( -41.25), SIMDE_FLOAT16_VALUE( -2.45), SIMDE_FLOAT16_VALUE( 5.28),
|
||||
SIMDE_FLOAT16_VALUE( -91.25), SIMDE_FLOAT16_VALUE( 3.03), SIMDE_FLOAT16_VALUE( 78.06), SIMDE_FLOAT16_VALUE( 65.31),
|
||||
SIMDE_FLOAT16_VALUE( 20.56), SIMDE_FLOAT16_VALUE( 23.34), SIMDE_FLOAT16_VALUE( -32.31), SIMDE_FLOAT16_VALUE( 2.87),
|
||||
SIMDE_FLOAT16_VALUE( -44.12), SIMDE_FLOAT16_VALUE( -78.81), SIMDE_FLOAT16_VALUE( -16.28), SIMDE_FLOAT16_VALUE( -43.38),
|
||||
SIMDE_FLOAT16_VALUE( -5.77), SIMDE_FLOAT16_VALUE( -94.69), SIMDE_FLOAT16_VALUE( 7.55), SIMDE_FLOAT16_VALUE( -66.94),
|
||||
SIMDE_FLOAT16_VALUE( -73.44), SIMDE_FLOAT16_VALUE( -44.94), SIMDE_FLOAT16_VALUE( 49.50), SIMDE_FLOAT16_VALUE( -20.23) },
|
||||
{ SIMDE_FLOAT16_VALUE( -66.56), SIMDE_FLOAT16_VALUE( 56.03), SIMDE_FLOAT16_VALUE( -92.38), SIMDE_FLOAT16_VALUE( 26.61),
|
||||
SIMDE_FLOAT16_VALUE( -40.88), SIMDE_FLOAT16_VALUE( 79.12), SIMDE_FLOAT16_VALUE( 48.59), SIMDE_FLOAT16_VALUE( -74.25),
|
||||
SIMDE_FLOAT16_VALUE( -62.12), SIMDE_FLOAT16_VALUE( -53.84), SIMDE_FLOAT16_VALUE( 31.05), SIMDE_FLOAT16_VALUE( -53.38),
|
||||
SIMDE_FLOAT16_VALUE( 49.19), SIMDE_FLOAT16_VALUE( 9.11), SIMDE_FLOAT16_VALUE( -88.06), SIMDE_FLOAT16_VALUE( -30.25),
|
||||
SIMDE_FLOAT16_VALUE( -67.56), SIMDE_FLOAT16_VALUE( -20.39), SIMDE_FLOAT16_VALUE( 72.62), SIMDE_FLOAT16_VALUE( -11.70),
|
||||
SIMDE_FLOAT16_VALUE( 0.78), SIMDE_FLOAT16_VALUE( -43.66), SIMDE_FLOAT16_VALUE( 44.94), SIMDE_FLOAT16_VALUE( 95.00),
|
||||
SIMDE_FLOAT16_VALUE( -38.38), SIMDE_FLOAT16_VALUE( -47.50), SIMDE_FLOAT16_VALUE( -71.88), SIMDE_FLOAT16_VALUE( -11.84),
|
||||
SIMDE_FLOAT16_VALUE( 7.55), SIMDE_FLOAT16_VALUE( 77.62), SIMDE_FLOAT16_VALUE( 67.94), SIMDE_FLOAT16_VALUE( 40.97) },
|
||||
{ SIMDE_FLOAT16_VALUE( -46.78), SIMDE_FLOAT16_VALUE( 78.38), SIMDE_FLOAT16_VALUE( -92.38), SIMDE_FLOAT16_VALUE( 27.88),
|
||||
SIMDE_FLOAT16_VALUE( -6.81), SIMDE_FLOAT16_VALUE( 79.12), SIMDE_FLOAT16_VALUE( 71.50), SIMDE_FLOAT16_VALUE( -74.25),
|
||||
SIMDE_FLOAT16_VALUE( 66.62), SIMDE_FLOAT16_VALUE( -41.25), SIMDE_FLOAT16_VALUE( 31.05), SIMDE_FLOAT16_VALUE( 5.28),
|
||||
SIMDE_FLOAT16_VALUE( 49.19), SIMDE_FLOAT16_VALUE( 9.11), SIMDE_FLOAT16_VALUE( 78.06), SIMDE_FLOAT16_VALUE( 65.31),
|
||||
SIMDE_FLOAT16_VALUE( 20.56), SIMDE_FLOAT16_VALUE( 23.34), SIMDE_FLOAT16_VALUE( 72.62), SIMDE_FLOAT16_VALUE( 2.87),
|
||||
SIMDE_FLOAT16_VALUE( 0.78), SIMDE_FLOAT16_VALUE( -43.66), SIMDE_FLOAT16_VALUE( 44.94), SIMDE_FLOAT16_VALUE( 95.00),
|
||||
SIMDE_FLOAT16_VALUE( -5.77), SIMDE_FLOAT16_VALUE( -47.50), SIMDE_FLOAT16_VALUE( 7.55), SIMDE_FLOAT16_VALUE( -11.84),
|
||||
SIMDE_FLOAT16_VALUE( 7.55), SIMDE_FLOAT16_VALUE( 77.62), SIMDE_FLOAT16_VALUE( 67.94), SIMDE_FLOAT16_VALUE( 40.97) } },
|
||||
{ { SIMDE_FLOAT16_VALUE( 33.66), SIMDE_FLOAT16_VALUE( 75.56), SIMDE_FLOAT16_VALUE( -32.41), SIMDE_FLOAT16_VALUE( 92.81),
|
||||
SIMDE_FLOAT16_VALUE( 54.72), SIMDE_FLOAT16_VALUE( -83.81), SIMDE_FLOAT16_VALUE( -81.44), SIMDE_FLOAT16_VALUE( 92.62),
|
||||
SIMDE_FLOAT16_VALUE( -37.66), SIMDE_FLOAT16_VALUE( 49.62), SIMDE_FLOAT16_VALUE( -60.81), SIMDE_FLOAT16_VALUE( -88.50),
|
||||
SIMDE_FLOAT16_VALUE( -41.28), SIMDE_FLOAT16_VALUE( -48.88), SIMDE_FLOAT16_VALUE( -18.73), SIMDE_FLOAT16_VALUE( -8.83),
|
||||
SIMDE_FLOAT16_VALUE( 30.73), SIMDE_FLOAT16_VALUE( -46.12), SIMDE_FLOAT16_VALUE( 79.50), SIMDE_FLOAT16_VALUE( -68.50),
|
||||
SIMDE_FLOAT16_VALUE( 10.22), SIMDE_FLOAT16_VALUE( 24.41), SIMDE_FLOAT16_VALUE( -73.44), SIMDE_FLOAT16_VALUE( 71.88),
|
||||
SIMDE_FLOAT16_VALUE( 76.88), SIMDE_FLOAT16_VALUE( -45.34), SIMDE_FLOAT16_VALUE( -40.00), SIMDE_FLOAT16_VALUE( -15.55),
|
||||
SIMDE_FLOAT16_VALUE( -67.75), SIMDE_FLOAT16_VALUE( -72.06), SIMDE_FLOAT16_VALUE( -74.56), SIMDE_FLOAT16_VALUE( 65.94) },
|
||||
{ SIMDE_FLOAT16_VALUE( -96.50), SIMDE_FLOAT16_VALUE( -7.00), SIMDE_FLOAT16_VALUE( 58.72), SIMDE_FLOAT16_VALUE( 58.22),
|
||||
SIMDE_FLOAT16_VALUE( 9.18), SIMDE_FLOAT16_VALUE( 77.31), SIMDE_FLOAT16_VALUE( 50.81), SIMDE_FLOAT16_VALUE( 71.50),
|
||||
SIMDE_FLOAT16_VALUE( 26.91), SIMDE_FLOAT16_VALUE( 90.00), SIMDE_FLOAT16_VALUE( 83.00), SIMDE_FLOAT16_VALUE( 85.62),
|
||||
SIMDE_FLOAT16_VALUE( -58.88), SIMDE_FLOAT16_VALUE( -35.69), SIMDE_FLOAT16_VALUE( -23.19), SIMDE_FLOAT16_VALUE( 71.88),
|
||||
SIMDE_FLOAT16_VALUE( 18.19), SIMDE_FLOAT16_VALUE( -43.72), SIMDE_FLOAT16_VALUE( -96.62), SIMDE_FLOAT16_VALUE( -71.62),
|
||||
SIMDE_FLOAT16_VALUE( 80.69), SIMDE_FLOAT16_VALUE( -70.06), SIMDE_FLOAT16_VALUE( -99.75), SIMDE_FLOAT16_VALUE( 57.59),
|
||||
SIMDE_FLOAT16_VALUE( -15.41), SIMDE_FLOAT16_VALUE( -39.75), SIMDE_FLOAT16_VALUE( -57.97), SIMDE_FLOAT16_VALUE( 16.84),
|
||||
SIMDE_FLOAT16_VALUE( -11.81), SIMDE_FLOAT16_VALUE( -32.56), SIMDE_FLOAT16_VALUE( -17.23), SIMDE_FLOAT16_VALUE( -8.31) },
|
||||
{ SIMDE_FLOAT16_VALUE( 33.66), SIMDE_FLOAT16_VALUE( 75.56), SIMDE_FLOAT16_VALUE( 58.72), SIMDE_FLOAT16_VALUE( 92.81),
|
||||
SIMDE_FLOAT16_VALUE( 54.72), SIMDE_FLOAT16_VALUE( 77.31), SIMDE_FLOAT16_VALUE( 50.81), SIMDE_FLOAT16_VALUE( 92.62),
|
||||
SIMDE_FLOAT16_VALUE( 26.91), SIMDE_FLOAT16_VALUE( 90.00), SIMDE_FLOAT16_VALUE( 83.00), SIMDE_FLOAT16_VALUE( 85.62),
|
||||
SIMDE_FLOAT16_VALUE( -41.28), SIMDE_FLOAT16_VALUE( -35.69), SIMDE_FLOAT16_VALUE( -18.73), SIMDE_FLOAT16_VALUE( 71.88),
|
||||
SIMDE_FLOAT16_VALUE( 30.73), SIMDE_FLOAT16_VALUE( -43.72), SIMDE_FLOAT16_VALUE( 79.50), SIMDE_FLOAT16_VALUE( -68.50),
|
||||
SIMDE_FLOAT16_VALUE( 80.69), SIMDE_FLOAT16_VALUE( 24.41), SIMDE_FLOAT16_VALUE( -73.44), SIMDE_FLOAT16_VALUE( 71.88),
|
||||
SIMDE_FLOAT16_VALUE( 76.88), SIMDE_FLOAT16_VALUE( -39.75), SIMDE_FLOAT16_VALUE( -40.00), SIMDE_FLOAT16_VALUE( 16.84),
|
||||
SIMDE_FLOAT16_VALUE( -11.81), SIMDE_FLOAT16_VALUE( -32.56), SIMDE_FLOAT16_VALUE( -17.23), SIMDE_FLOAT16_VALUE( 65.94) } },
|
||||
{ { SIMDE_FLOAT16_VALUE( 60.44), SIMDE_FLOAT16_VALUE( -58.50), SIMDE_FLOAT16_VALUE( -50.09), SIMDE_FLOAT16_VALUE( -30.38),
|
||||
SIMDE_FLOAT16_VALUE( -81.25), SIMDE_FLOAT16_VALUE( -99.25), SIMDE_FLOAT16_VALUE( -58.88), SIMDE_FLOAT16_VALUE( 45.69),
|
||||
SIMDE_FLOAT16_VALUE( 90.75), SIMDE_FLOAT16_VALUE( -75.81), SIMDE_FLOAT16_VALUE( 31.31), SIMDE_FLOAT16_VALUE( -68.12),
|
||||
SIMDE_FLOAT16_VALUE( -11.54), SIMDE_FLOAT16_VALUE( -91.88), SIMDE_FLOAT16_VALUE( -96.25), SIMDE_FLOAT16_VALUE( -93.38),
|
||||
SIMDE_FLOAT16_VALUE( -35.59), SIMDE_FLOAT16_VALUE( -92.81), SIMDE_FLOAT16_VALUE( -65.00), SIMDE_FLOAT16_VALUE( -54.91),
|
||||
SIMDE_FLOAT16_VALUE( -62.91), SIMDE_FLOAT16_VALUE( -64.75), SIMDE_FLOAT16_VALUE( -97.31), SIMDE_FLOAT16_VALUE( 21.69),
|
||||
SIMDE_FLOAT16_VALUE( -4.47), SIMDE_FLOAT16_VALUE( -55.31), SIMDE_FLOAT16_VALUE( -61.47), SIMDE_FLOAT16_VALUE( 83.69),
|
||||
SIMDE_FLOAT16_VALUE( 12.14), SIMDE_FLOAT16_VALUE( 21.31), SIMDE_FLOAT16_VALUE( -24.59), SIMDE_FLOAT16_VALUE( -27.42) },
|
||||
{ SIMDE_FLOAT16_VALUE( 62.78), SIMDE_FLOAT16_VALUE( 25.31), SIMDE_FLOAT16_VALUE( 42.22), SIMDE_FLOAT16_VALUE( 81.56),
|
||||
SIMDE_FLOAT16_VALUE( 26.05), SIMDE_FLOAT16_VALUE( 83.31), SIMDE_FLOAT16_VALUE( 27.25), SIMDE_FLOAT16_VALUE( 16.77),
|
||||
SIMDE_FLOAT16_VALUE( -92.50), SIMDE_FLOAT16_VALUE( -41.44), SIMDE_FLOAT16_VALUE( 48.66), SIMDE_FLOAT16_VALUE( -4.03),
|
||||
SIMDE_FLOAT16_VALUE( -33.31), SIMDE_FLOAT16_VALUE( 52.41), SIMDE_FLOAT16_VALUE( 2.60), SIMDE_FLOAT16_VALUE( 31.09),
|
||||
SIMDE_FLOAT16_VALUE( 59.56), SIMDE_FLOAT16_VALUE( 37.62), SIMDE_FLOAT16_VALUE( 76.19), SIMDE_FLOAT16_VALUE( 96.69),
|
||||
SIMDE_FLOAT16_VALUE( 72.94), SIMDE_FLOAT16_VALUE( 78.88), SIMDE_FLOAT16_VALUE( 18.36), SIMDE_FLOAT16_VALUE( -31.56),
|
||||
SIMDE_FLOAT16_VALUE( -76.44), SIMDE_FLOAT16_VALUE( 56.88), SIMDE_FLOAT16_VALUE( -47.84), SIMDE_FLOAT16_VALUE( 35.69),
|
||||
SIMDE_FLOAT16_VALUE( -21.80), SIMDE_FLOAT16_VALUE( 27.56), SIMDE_FLOAT16_VALUE( -91.75), SIMDE_FLOAT16_VALUE( -59.00) },
|
||||
{ SIMDE_FLOAT16_VALUE( 62.78), SIMDE_FLOAT16_VALUE( 25.31), SIMDE_FLOAT16_VALUE( 42.22), SIMDE_FLOAT16_VALUE( 81.56),
|
||||
SIMDE_FLOAT16_VALUE( 26.05), SIMDE_FLOAT16_VALUE( 83.31), SIMDE_FLOAT16_VALUE( 27.25), SIMDE_FLOAT16_VALUE( 45.69),
|
||||
SIMDE_FLOAT16_VALUE( 90.75), SIMDE_FLOAT16_VALUE( -41.44), SIMDE_FLOAT16_VALUE( 48.66), SIMDE_FLOAT16_VALUE( -4.03),
|
||||
SIMDE_FLOAT16_VALUE( -11.54), SIMDE_FLOAT16_VALUE( 52.41), SIMDE_FLOAT16_VALUE( 2.60), SIMDE_FLOAT16_VALUE( 31.09),
|
||||
SIMDE_FLOAT16_VALUE( 59.56), SIMDE_FLOAT16_VALUE( 37.62), SIMDE_FLOAT16_VALUE( 76.19), SIMDE_FLOAT16_VALUE( 96.69),
|
||||
SIMDE_FLOAT16_VALUE( 72.94), SIMDE_FLOAT16_VALUE( 78.88), SIMDE_FLOAT16_VALUE( 18.36), SIMDE_FLOAT16_VALUE( 21.69),
|
||||
SIMDE_FLOAT16_VALUE( -4.47), SIMDE_FLOAT16_VALUE( 56.88), SIMDE_FLOAT16_VALUE( -47.84), SIMDE_FLOAT16_VALUE( 83.69),
|
||||
SIMDE_FLOAT16_VALUE( 12.14), SIMDE_FLOAT16_VALUE( 27.56), SIMDE_FLOAT16_VALUE( -24.59), SIMDE_FLOAT16_VALUE( -27.42) } },
|
||||
{ { SIMDE_FLOAT16_VALUE( -47.12), SIMDE_FLOAT16_VALUE( 50.47), SIMDE_FLOAT16_VALUE( -77.44), SIMDE_FLOAT16_VALUE( 78.94),
|
||||
SIMDE_FLOAT16_VALUE( 33.81), SIMDE_FLOAT16_VALUE( 49.81), SIMDE_FLOAT16_VALUE( -4.32), SIMDE_FLOAT16_VALUE( 41.31),
|
||||
SIMDE_FLOAT16_VALUE( -91.62), SIMDE_FLOAT16_VALUE( -55.66), SIMDE_FLOAT16_VALUE( -62.72), SIMDE_FLOAT16_VALUE( -24.94),
|
||||
SIMDE_FLOAT16_VALUE( 96.75), SIMDE_FLOAT16_VALUE( 39.88), SIMDE_FLOAT16_VALUE( -93.81), SIMDE_FLOAT16_VALUE( 56.31),
|
||||
SIMDE_FLOAT16_VALUE( -22.48), SIMDE_FLOAT16_VALUE( 82.38), SIMDE_FLOAT16_VALUE( 53.00), SIMDE_FLOAT16_VALUE( -49.56),
|
||||
SIMDE_FLOAT16_VALUE( 61.19), SIMDE_FLOAT16_VALUE( -28.66), SIMDE_FLOAT16_VALUE( 18.88), SIMDE_FLOAT16_VALUE( 84.75),
|
||||
SIMDE_FLOAT16_VALUE( -71.75), SIMDE_FLOAT16_VALUE( 71.00), SIMDE_FLOAT16_VALUE( 20.44), SIMDE_FLOAT16_VALUE( 6.45),
|
||||
SIMDE_FLOAT16_VALUE( -1.42), SIMDE_FLOAT16_VALUE( 28.70), SIMDE_FLOAT16_VALUE( 47.44), SIMDE_FLOAT16_VALUE( 51.47) },
|
||||
{ SIMDE_FLOAT16_VALUE( -20.83), SIMDE_FLOAT16_VALUE( 70.00), SIMDE_FLOAT16_VALUE( 30.38), SIMDE_FLOAT16_VALUE( -87.00),
|
||||
SIMDE_FLOAT16_VALUE( 19.81), SIMDE_FLOAT16_VALUE( -73.94), SIMDE_FLOAT16_VALUE( 54.31), SIMDE_FLOAT16_VALUE( 28.20),
|
||||
SIMDE_FLOAT16_VALUE( -29.61), SIMDE_FLOAT16_VALUE( 91.56), SIMDE_FLOAT16_VALUE( -96.75), SIMDE_FLOAT16_VALUE( -32.88),
|
||||
SIMDE_FLOAT16_VALUE( 31.48), SIMDE_FLOAT16_VALUE( -90.56), SIMDE_FLOAT16_VALUE( -76.56), SIMDE_FLOAT16_VALUE( -91.00),
|
||||
SIMDE_FLOAT16_VALUE( 91.81), SIMDE_FLOAT16_VALUE( 76.44), SIMDE_FLOAT16_VALUE( -40.56), SIMDE_FLOAT16_VALUE( 53.00),
|
||||
SIMDE_FLOAT16_VALUE( -52.19), SIMDE_FLOAT16_VALUE( 78.31), SIMDE_FLOAT16_VALUE( 37.75), SIMDE_FLOAT16_VALUE( -23.95),
|
||||
SIMDE_FLOAT16_VALUE( 49.34), SIMDE_FLOAT16_VALUE( -41.84), SIMDE_FLOAT16_VALUE( 82.50), SIMDE_FLOAT16_VALUE( -52.09),
|
||||
SIMDE_FLOAT16_VALUE( 86.88), SIMDE_FLOAT16_VALUE( 29.94), SIMDE_FLOAT16_VALUE( 99.38), SIMDE_FLOAT16_VALUE( -33.97) },
|
||||
{ SIMDE_FLOAT16_VALUE( -20.83), SIMDE_FLOAT16_VALUE( 70.00), SIMDE_FLOAT16_VALUE( 30.38), SIMDE_FLOAT16_VALUE( 78.94),
|
||||
SIMDE_FLOAT16_VALUE( 33.81), SIMDE_FLOAT16_VALUE( 49.81), SIMDE_FLOAT16_VALUE( 54.31), SIMDE_FLOAT16_VALUE( 41.31),
|
||||
SIMDE_FLOAT16_VALUE( -29.61), SIMDE_FLOAT16_VALUE( 91.56), SIMDE_FLOAT16_VALUE( -62.72), SIMDE_FLOAT16_VALUE( -24.94),
|
||||
SIMDE_FLOAT16_VALUE( 96.75), SIMDE_FLOAT16_VALUE( 39.88), SIMDE_FLOAT16_VALUE( -76.56), SIMDE_FLOAT16_VALUE( 56.31),
|
||||
SIMDE_FLOAT16_VALUE( 91.81), SIMDE_FLOAT16_VALUE( 82.38), SIMDE_FLOAT16_VALUE( 53.00), SIMDE_FLOAT16_VALUE( 53.00),
|
||||
SIMDE_FLOAT16_VALUE( 61.19), SIMDE_FLOAT16_VALUE( 78.31), SIMDE_FLOAT16_VALUE( 37.75), SIMDE_FLOAT16_VALUE( 84.75),
|
||||
SIMDE_FLOAT16_VALUE( 49.34), SIMDE_FLOAT16_VALUE( 71.00), SIMDE_FLOAT16_VALUE( 82.50), SIMDE_FLOAT16_VALUE( 6.45),
|
||||
SIMDE_FLOAT16_VALUE( 86.88), SIMDE_FLOAT16_VALUE( 29.94), SIMDE_FLOAT16_VALUE( 99.38), SIMDE_FLOAT16_VALUE( 51.47) } },
|
||||
{ { SIMDE_FLOAT16_VALUE( -0.06), SIMDE_FLOAT16_VALUE( 29.75), SIMDE_FLOAT16_VALUE( -20.98), SIMDE_FLOAT16_VALUE( -80.25),
|
||||
SIMDE_FLOAT16_VALUE( 55.81), SIMDE_FLOAT16_VALUE( -66.69), SIMDE_FLOAT16_VALUE( 47.94), SIMDE_FLOAT16_VALUE( -73.81),
|
||||
SIMDE_FLOAT16_VALUE( -75.06), SIMDE_FLOAT16_VALUE( 51.22), SIMDE_FLOAT16_VALUE( -6.66), SIMDE_FLOAT16_VALUE( 56.41),
|
||||
SIMDE_FLOAT16_VALUE( 60.66), SIMDE_FLOAT16_VALUE( 16.80), SIMDE_FLOAT16_VALUE( 65.38), SIMDE_FLOAT16_VALUE( 52.44),
|
||||
SIMDE_FLOAT16_VALUE( -6.75), SIMDE_FLOAT16_VALUE( -75.19), SIMDE_FLOAT16_VALUE( 5.45), SIMDE_FLOAT16_VALUE( 41.06),
|
||||
SIMDE_FLOAT16_VALUE( -96.88), SIMDE_FLOAT16_VALUE( -56.81), SIMDE_FLOAT16_VALUE( -82.94), SIMDE_FLOAT16_VALUE( 52.47),
|
||||
SIMDE_FLOAT16_VALUE( 1.35), SIMDE_FLOAT16_VALUE( 99.56), SIMDE_FLOAT16_VALUE( -99.62), SIMDE_FLOAT16_VALUE( -11.79),
|
||||
SIMDE_FLOAT16_VALUE( 29.50), SIMDE_FLOAT16_VALUE( 99.75), SIMDE_FLOAT16_VALUE( 54.25), SIMDE_FLOAT16_VALUE( -70.56) },
|
||||
{ SIMDE_FLOAT16_VALUE( 29.52), SIMDE_FLOAT16_VALUE( -66.75), SIMDE_FLOAT16_VALUE( -50.81), SIMDE_FLOAT16_VALUE( -14.67),
|
||||
SIMDE_FLOAT16_VALUE( -33.41), SIMDE_FLOAT16_VALUE( 97.12), SIMDE_FLOAT16_VALUE( 11.53), SIMDE_FLOAT16_VALUE( -8.49),
|
||||
SIMDE_FLOAT16_VALUE( 48.38), SIMDE_FLOAT16_VALUE( -95.12), SIMDE_FLOAT16_VALUE( -52.09), SIMDE_FLOAT16_VALUE( 9.03),
|
||||
SIMDE_FLOAT16_VALUE( 21.67), SIMDE_FLOAT16_VALUE( -86.69), SIMDE_FLOAT16_VALUE( -38.50), SIMDE_FLOAT16_VALUE( -85.06),
|
||||
SIMDE_FLOAT16_VALUE( -61.88), SIMDE_FLOAT16_VALUE( 66.94), SIMDE_FLOAT16_VALUE( 55.97), SIMDE_FLOAT16_VALUE( -58.72),
|
||||
SIMDE_FLOAT16_VALUE( -89.88), SIMDE_FLOAT16_VALUE( 73.06), SIMDE_FLOAT16_VALUE( 93.75), SIMDE_FLOAT16_VALUE( 11.46),
|
||||
SIMDE_FLOAT16_VALUE( 72.62), SIMDE_FLOAT16_VALUE( 94.12), SIMDE_FLOAT16_VALUE( 99.69), SIMDE_FLOAT16_VALUE( 2.12),
|
||||
SIMDE_FLOAT16_VALUE( 93.88), SIMDE_FLOAT16_VALUE( 53.91), SIMDE_FLOAT16_VALUE( 31.56), SIMDE_FLOAT16_VALUE( 23.42) },
|
||||
{ SIMDE_FLOAT16_VALUE( 29.52), SIMDE_FLOAT16_VALUE( 29.75), SIMDE_FLOAT16_VALUE( -20.98), SIMDE_FLOAT16_VALUE( -14.67),
|
||||
SIMDE_FLOAT16_VALUE( 55.81), SIMDE_FLOAT16_VALUE( 97.12), SIMDE_FLOAT16_VALUE( 47.94), SIMDE_FLOAT16_VALUE( -8.49),
|
||||
SIMDE_FLOAT16_VALUE( 48.38), SIMDE_FLOAT16_VALUE( 51.22), SIMDE_FLOAT16_VALUE( -6.66), SIMDE_FLOAT16_VALUE( 56.41),
|
||||
SIMDE_FLOAT16_VALUE( 60.66), SIMDE_FLOAT16_VALUE( 16.80), SIMDE_FLOAT16_VALUE( 65.38), SIMDE_FLOAT16_VALUE( 52.44),
|
||||
SIMDE_FLOAT16_VALUE( -6.75), SIMDE_FLOAT16_VALUE( 66.94), SIMDE_FLOAT16_VALUE( 55.97), SIMDE_FLOAT16_VALUE( 41.06),
|
||||
SIMDE_FLOAT16_VALUE( -89.88), SIMDE_FLOAT16_VALUE( 73.06), SIMDE_FLOAT16_VALUE( 93.75), SIMDE_FLOAT16_VALUE( 52.47),
|
||||
SIMDE_FLOAT16_VALUE( 72.62), SIMDE_FLOAT16_VALUE( 99.56), SIMDE_FLOAT16_VALUE( 99.69), SIMDE_FLOAT16_VALUE( 2.12),
|
||||
SIMDE_FLOAT16_VALUE( 93.88), SIMDE_FLOAT16_VALUE( 99.75), SIMDE_FLOAT16_VALUE( 54.25), SIMDE_FLOAT16_VALUE( 23.42) } },
|
||||
};
|
||||
|
||||
for (size_t i = 0 ; i < (sizeof(test_vec) / sizeof(test_vec[0])) ; i++) {
|
||||
simde__m512h a = simde_mm512_loadu_ph(test_vec[i].a);
|
||||
simde__m512h b = simde_mm512_loadu_ph(test_vec[i].b);
|
||||
simde__m512h r = simde_mm512_max_ph(a, b);
|
||||
simde_test_x86_assert_equal_f16x32(r, simde_mm512_loadu_ph(test_vec[i].r), 1);
|
||||
}
|
||||
|
||||
return 0;
|
||||
#else
|
||||
fputc('\n', stdout);
|
||||
for (int i = 0 ; i < 8 ; i++) {
|
||||
simde__m512h a = simde_test_x86_random_f16x32(SIMDE_FLOAT16_VALUE(-100.0), SIMDE_FLOAT16_VALUE(100.0));
|
||||
simde__m512h b = simde_test_x86_random_f16x32(SIMDE_FLOAT16_VALUE(-100.0), SIMDE_FLOAT16_VALUE(100.0));
|
||||
simde__m512h r = simde_mm512_max_ph(a, b);
|
||||
|
||||
simde_test_x86_write_f16x32(2, a, SIMDE_TEST_VEC_POS_FIRST);
|
||||
simde_test_x86_write_f16x32(2, b, SIMDE_TEST_VEC_POS_MIDDLE);
|
||||
simde_test_x86_write_f16x32(2, r, SIMDE_TEST_VEC_POS_LAST);
|
||||
}
|
||||
|
||||
return 1;
|
||||
#endif
|
||||
}
|
||||
#endif
|
||||
|
||||
static int
|
||||
test_simde_mm512_max_ps (SIMDE_MUNIT_TEST_ARGS) {
|
||||
static const struct {
|
||||
|
|
@ -3870,6 +4098,10 @@ SIMDE_TEST_FUNC_LIST_BEGIN
|
|||
SIMDE_TEST_FUNC_LIST_ENTRY(mm512_mask_max_epu64)
|
||||
SIMDE_TEST_FUNC_LIST_ENTRY(mm512_maskz_max_epu64)
|
||||
|
||||
#if defined(SIMDE_FLOAT16_IS_SCALAR)
|
||||
SIMDE_TEST_FUNC_LIST_ENTRY(mm512_max_ph)
|
||||
#endif
|
||||
|
||||
SIMDE_TEST_FUNC_LIST_ENTRY(mm512_max_ps)
|
||||
SIMDE_TEST_FUNC_LIST_ENTRY(mm512_mask_max_ps)
|
||||
SIMDE_TEST_FUNC_LIST_ENTRY(mm512_maskz_max_ps)
|
||||
|
|
|
|||
232
thirdparty/simde/test/x86/avx512/min.c
vendored
232
thirdparty/simde/test/x86/avx512/min.c
vendored
|
|
@ -3207,6 +3207,234 @@ test_simde_mm512_maskz_min_epu64 (SIMDE_MUNIT_TEST_ARGS) {
|
|||
return 0;
|
||||
}
|
||||
|
||||
#if defined(SIMDE_FLOAT16_IS_SCALAR)
|
||||
static int
|
||||
test_simde_mm512_min_ph (SIMDE_MUNIT_TEST_ARGS) {
|
||||
#if 1
|
||||
static const struct {
|
||||
const simde_float16 a[32];
|
||||
const simde_float16 b[32];
|
||||
const simde_float16 r[32];
|
||||
} test_vec[] = {
|
||||
{ { SIMDE_FLOAT16_VALUE( -73.56), SIMDE_FLOAT16_VALUE( 70.50), SIMDE_FLOAT16_VALUE( -30.33), SIMDE_FLOAT16_VALUE( 98.31),
|
||||
SIMDE_FLOAT16_VALUE( -16.45), SIMDE_FLOAT16_VALUE( 70.12), SIMDE_FLOAT16_VALUE( -53.69), SIMDE_FLOAT16_VALUE( 31.05),
|
||||
SIMDE_FLOAT16_VALUE( 65.12), SIMDE_FLOAT16_VALUE( -59.31), SIMDE_FLOAT16_VALUE( 36.78), SIMDE_FLOAT16_VALUE( 69.12),
|
||||
SIMDE_FLOAT16_VALUE( 6.20), SIMDE_FLOAT16_VALUE( -27.27), SIMDE_FLOAT16_VALUE( 39.09), SIMDE_FLOAT16_VALUE( 47.09),
|
||||
SIMDE_FLOAT16_VALUE( 32.78), SIMDE_FLOAT16_VALUE( 48.31), SIMDE_FLOAT16_VALUE( -78.69), SIMDE_FLOAT16_VALUE( -48.75),
|
||||
SIMDE_FLOAT16_VALUE( 16.30), SIMDE_FLOAT16_VALUE( -39.81), SIMDE_FLOAT16_VALUE( -65.31), SIMDE_FLOAT16_VALUE( -21.08),
|
||||
SIMDE_FLOAT16_VALUE( 89.81), SIMDE_FLOAT16_VALUE( 23.73), SIMDE_FLOAT16_VALUE( 63.12), SIMDE_FLOAT16_VALUE( -87.44),
|
||||
SIMDE_FLOAT16_VALUE( -54.41), SIMDE_FLOAT16_VALUE( -59.25), SIMDE_FLOAT16_VALUE( -77.75), SIMDE_FLOAT16_VALUE( -28.00) },
|
||||
{ SIMDE_FLOAT16_VALUE( -88.75), SIMDE_FLOAT16_VALUE( -8.08), SIMDE_FLOAT16_VALUE( -29.67), SIMDE_FLOAT16_VALUE( -5.17),
|
||||
SIMDE_FLOAT16_VALUE( -37.94), SIMDE_FLOAT16_VALUE( 16.66), SIMDE_FLOAT16_VALUE( -74.12), SIMDE_FLOAT16_VALUE( -72.81),
|
||||
SIMDE_FLOAT16_VALUE( 57.34), SIMDE_FLOAT16_VALUE( 62.66), SIMDE_FLOAT16_VALUE( 96.31), SIMDE_FLOAT16_VALUE( -36.47),
|
||||
SIMDE_FLOAT16_VALUE( -64.62), SIMDE_FLOAT16_VALUE( 35.41), SIMDE_FLOAT16_VALUE( -89.38), SIMDE_FLOAT16_VALUE( 68.19),
|
||||
SIMDE_FLOAT16_VALUE( -16.25), SIMDE_FLOAT16_VALUE( -68.06), SIMDE_FLOAT16_VALUE( -80.56), SIMDE_FLOAT16_VALUE( -99.94),
|
||||
SIMDE_FLOAT16_VALUE( -7.88), SIMDE_FLOAT16_VALUE( -45.88), SIMDE_FLOAT16_VALUE( -21.05), SIMDE_FLOAT16_VALUE( -18.06),
|
||||
SIMDE_FLOAT16_VALUE( 77.88), SIMDE_FLOAT16_VALUE( -57.94), SIMDE_FLOAT16_VALUE( -5.49), SIMDE_FLOAT16_VALUE( -76.56),
|
||||
SIMDE_FLOAT16_VALUE( -17.17), SIMDE_FLOAT16_VALUE( 16.77), SIMDE_FLOAT16_VALUE( -4.56), SIMDE_FLOAT16_VALUE( -5.89) },
|
||||
{ SIMDE_FLOAT16_VALUE( -88.75), SIMDE_FLOAT16_VALUE( -8.08), SIMDE_FLOAT16_VALUE( -30.33), SIMDE_FLOAT16_VALUE( -5.17),
|
||||
SIMDE_FLOAT16_VALUE( -37.94), SIMDE_FLOAT16_VALUE( 16.66), SIMDE_FLOAT16_VALUE( -74.12), SIMDE_FLOAT16_VALUE( -72.81),
|
||||
SIMDE_FLOAT16_VALUE( 57.34), SIMDE_FLOAT16_VALUE( -59.31), SIMDE_FLOAT16_VALUE( 36.78), SIMDE_FLOAT16_VALUE( -36.47),
|
||||
SIMDE_FLOAT16_VALUE( -64.62), SIMDE_FLOAT16_VALUE( -27.27), SIMDE_FLOAT16_VALUE( -89.38), SIMDE_FLOAT16_VALUE( 47.09),
|
||||
SIMDE_FLOAT16_VALUE( -16.25), SIMDE_FLOAT16_VALUE( -68.06), SIMDE_FLOAT16_VALUE( -80.56), SIMDE_FLOAT16_VALUE( -99.94),
|
||||
SIMDE_FLOAT16_VALUE( -7.88), SIMDE_FLOAT16_VALUE( -45.88), SIMDE_FLOAT16_VALUE( -65.31), SIMDE_FLOAT16_VALUE( -21.08),
|
||||
SIMDE_FLOAT16_VALUE( 77.88), SIMDE_FLOAT16_VALUE( -57.94), SIMDE_FLOAT16_VALUE( -5.49), SIMDE_FLOAT16_VALUE( -87.44),
|
||||
SIMDE_FLOAT16_VALUE( -54.41), SIMDE_FLOAT16_VALUE( -59.25), SIMDE_FLOAT16_VALUE( -77.75), SIMDE_FLOAT16_VALUE( -28.00) } },
|
||||
{ { SIMDE_FLOAT16_VALUE( -91.31), SIMDE_FLOAT16_VALUE( 65.75), SIMDE_FLOAT16_VALUE( 88.94), SIMDE_FLOAT16_VALUE( -29.28),
|
||||
SIMDE_FLOAT16_VALUE( -17.56), SIMDE_FLOAT16_VALUE( -85.19), SIMDE_FLOAT16_VALUE( -2.09), SIMDE_FLOAT16_VALUE( -60.25),
|
||||
SIMDE_FLOAT16_VALUE( 77.50), SIMDE_FLOAT16_VALUE( -5.76), SIMDE_FLOAT16_VALUE( 3.29), SIMDE_FLOAT16_VALUE( -87.12),
|
||||
SIMDE_FLOAT16_VALUE( -70.31), SIMDE_FLOAT16_VALUE( 13.92), SIMDE_FLOAT16_VALUE( 81.06), SIMDE_FLOAT16_VALUE( 13.41),
|
||||
SIMDE_FLOAT16_VALUE( 45.88), SIMDE_FLOAT16_VALUE( -99.50), SIMDE_FLOAT16_VALUE( 13.45), SIMDE_FLOAT16_VALUE( -62.00),
|
||||
SIMDE_FLOAT16_VALUE( -45.38), SIMDE_FLOAT16_VALUE( 92.44), SIMDE_FLOAT16_VALUE( 19.92), SIMDE_FLOAT16_VALUE( -67.50),
|
||||
SIMDE_FLOAT16_VALUE( -65.50), SIMDE_FLOAT16_VALUE( -85.56), SIMDE_FLOAT16_VALUE( -44.06), SIMDE_FLOAT16_VALUE( 17.31),
|
||||
SIMDE_FLOAT16_VALUE( 31.19), SIMDE_FLOAT16_VALUE( 51.38), SIMDE_FLOAT16_VALUE( -88.56), SIMDE_FLOAT16_VALUE( 39.88) },
|
||||
{ SIMDE_FLOAT16_VALUE( 17.16), SIMDE_FLOAT16_VALUE( -99.62), SIMDE_FLOAT16_VALUE( -89.44), SIMDE_FLOAT16_VALUE( 99.56),
|
||||
SIMDE_FLOAT16_VALUE( -84.81), SIMDE_FLOAT16_VALUE( 8.49), SIMDE_FLOAT16_VALUE( -60.66), SIMDE_FLOAT16_VALUE( 92.69),
|
||||
SIMDE_FLOAT16_VALUE( -97.25), SIMDE_FLOAT16_VALUE( 42.62), SIMDE_FLOAT16_VALUE( -94.50), SIMDE_FLOAT16_VALUE( -67.62),
|
||||
SIMDE_FLOAT16_VALUE( -43.44), SIMDE_FLOAT16_VALUE( 86.56), SIMDE_FLOAT16_VALUE( 45.81), SIMDE_FLOAT16_VALUE( -97.56),
|
||||
SIMDE_FLOAT16_VALUE( 87.06), SIMDE_FLOAT16_VALUE( -40.72), SIMDE_FLOAT16_VALUE( -59.59), SIMDE_FLOAT16_VALUE( -58.34),
|
||||
SIMDE_FLOAT16_VALUE( -48.31), SIMDE_FLOAT16_VALUE( 60.31), SIMDE_FLOAT16_VALUE( -25.84), SIMDE_FLOAT16_VALUE( -13.82),
|
||||
SIMDE_FLOAT16_VALUE( 74.75), SIMDE_FLOAT16_VALUE( 30.08), SIMDE_FLOAT16_VALUE( -96.50), SIMDE_FLOAT16_VALUE( 5.94),
|
||||
SIMDE_FLOAT16_VALUE( -18.55), SIMDE_FLOAT16_VALUE( -85.06), SIMDE_FLOAT16_VALUE( -54.19), SIMDE_FLOAT16_VALUE( 98.62) },
|
||||
{ SIMDE_FLOAT16_VALUE( -91.31), SIMDE_FLOAT16_VALUE( -99.62), SIMDE_FLOAT16_VALUE( -89.44), SIMDE_FLOAT16_VALUE( -29.28),
|
||||
SIMDE_FLOAT16_VALUE( -84.81), SIMDE_FLOAT16_VALUE( -85.19), SIMDE_FLOAT16_VALUE( -60.66), SIMDE_FLOAT16_VALUE( -60.25),
|
||||
SIMDE_FLOAT16_VALUE( -97.25), SIMDE_FLOAT16_VALUE( -5.76), SIMDE_FLOAT16_VALUE( -94.50), SIMDE_FLOAT16_VALUE( -87.12),
|
||||
SIMDE_FLOAT16_VALUE( -70.31), SIMDE_FLOAT16_VALUE( 13.92), SIMDE_FLOAT16_VALUE( 45.81), SIMDE_FLOAT16_VALUE( -97.56),
|
||||
SIMDE_FLOAT16_VALUE( 45.88), SIMDE_FLOAT16_VALUE( -99.50), SIMDE_FLOAT16_VALUE( -59.59), SIMDE_FLOAT16_VALUE( -62.00),
|
||||
SIMDE_FLOAT16_VALUE( -48.31), SIMDE_FLOAT16_VALUE( 60.31), SIMDE_FLOAT16_VALUE( -25.84), SIMDE_FLOAT16_VALUE( -67.50),
|
||||
SIMDE_FLOAT16_VALUE( -65.50), SIMDE_FLOAT16_VALUE( -85.56), SIMDE_FLOAT16_VALUE( -96.50), SIMDE_FLOAT16_VALUE( 5.94),
|
||||
SIMDE_FLOAT16_VALUE( -18.55), SIMDE_FLOAT16_VALUE( -85.06), SIMDE_FLOAT16_VALUE( -88.56), SIMDE_FLOAT16_VALUE( 39.88) } },
|
||||
{ { SIMDE_FLOAT16_VALUE( -84.69), SIMDE_FLOAT16_VALUE( -43.62), SIMDE_FLOAT16_VALUE( 98.19), SIMDE_FLOAT16_VALUE( -69.50),
|
||||
SIMDE_FLOAT16_VALUE( 64.88), SIMDE_FLOAT16_VALUE( -62.50), SIMDE_FLOAT16_VALUE( -76.88), SIMDE_FLOAT16_VALUE( 67.62),
|
||||
SIMDE_FLOAT16_VALUE( 80.12), SIMDE_FLOAT16_VALUE( -71.31), SIMDE_FLOAT16_VALUE( -100.00), SIMDE_FLOAT16_VALUE( -63.31),
|
||||
SIMDE_FLOAT16_VALUE( -84.75), SIMDE_FLOAT16_VALUE( 45.81), SIMDE_FLOAT16_VALUE( -60.91), SIMDE_FLOAT16_VALUE( -97.75),
|
||||
SIMDE_FLOAT16_VALUE( -94.94), SIMDE_FLOAT16_VALUE( -20.52), SIMDE_FLOAT16_VALUE( -56.06), SIMDE_FLOAT16_VALUE( -43.22),
|
||||
SIMDE_FLOAT16_VALUE( -60.19), SIMDE_FLOAT16_VALUE( 18.09), SIMDE_FLOAT16_VALUE( 42.94), SIMDE_FLOAT16_VALUE( -85.44),
|
||||
SIMDE_FLOAT16_VALUE( -51.84), SIMDE_FLOAT16_VALUE( 46.44), SIMDE_FLOAT16_VALUE( 20.50), SIMDE_FLOAT16_VALUE( 29.61),
|
||||
SIMDE_FLOAT16_VALUE( 61.38), SIMDE_FLOAT16_VALUE( 66.31), SIMDE_FLOAT16_VALUE( 28.20), SIMDE_FLOAT16_VALUE( 76.69) },
|
||||
{ SIMDE_FLOAT16_VALUE( -77.31), SIMDE_FLOAT16_VALUE( 26.39), SIMDE_FLOAT16_VALUE( -92.81), SIMDE_FLOAT16_VALUE( 87.56),
|
||||
SIMDE_FLOAT16_VALUE( 63.91), SIMDE_FLOAT16_VALUE( -69.69), SIMDE_FLOAT16_VALUE( 55.16), SIMDE_FLOAT16_VALUE( 44.03),
|
||||
SIMDE_FLOAT16_VALUE( -41.03), SIMDE_FLOAT16_VALUE( 55.16), SIMDE_FLOAT16_VALUE( 80.75), SIMDE_FLOAT16_VALUE( -25.80),
|
||||
SIMDE_FLOAT16_VALUE( 0.99), SIMDE_FLOAT16_VALUE( -80.19), SIMDE_FLOAT16_VALUE( -23.52), SIMDE_FLOAT16_VALUE( 6.07),
|
||||
SIMDE_FLOAT16_VALUE( -0.70), SIMDE_FLOAT16_VALUE( 20.42), SIMDE_FLOAT16_VALUE( 62.84), SIMDE_FLOAT16_VALUE( 39.12),
|
||||
SIMDE_FLOAT16_VALUE( -61.50), SIMDE_FLOAT16_VALUE( 5.79), SIMDE_FLOAT16_VALUE( 53.66), SIMDE_FLOAT16_VALUE( -13.33),
|
||||
SIMDE_FLOAT16_VALUE( -47.78), SIMDE_FLOAT16_VALUE( -25.84), SIMDE_FLOAT16_VALUE( -83.75), SIMDE_FLOAT16_VALUE( -86.38),
|
||||
SIMDE_FLOAT16_VALUE( -59.53), SIMDE_FLOAT16_VALUE( 44.50), SIMDE_FLOAT16_VALUE( 90.31), SIMDE_FLOAT16_VALUE( -36.88) },
|
||||
{ SIMDE_FLOAT16_VALUE( -84.69), SIMDE_FLOAT16_VALUE( -43.62), SIMDE_FLOAT16_VALUE( -92.81), SIMDE_FLOAT16_VALUE( -69.50),
|
||||
SIMDE_FLOAT16_VALUE( 63.91), SIMDE_FLOAT16_VALUE( -69.69), SIMDE_FLOAT16_VALUE( -76.88), SIMDE_FLOAT16_VALUE( 44.03),
|
||||
SIMDE_FLOAT16_VALUE( -41.03), SIMDE_FLOAT16_VALUE( -71.31), SIMDE_FLOAT16_VALUE( -100.00), SIMDE_FLOAT16_VALUE( -63.31),
|
||||
SIMDE_FLOAT16_VALUE( -84.75), SIMDE_FLOAT16_VALUE( -80.19), SIMDE_FLOAT16_VALUE( -60.91), SIMDE_FLOAT16_VALUE( -97.75),
|
||||
SIMDE_FLOAT16_VALUE( -94.94), SIMDE_FLOAT16_VALUE( -20.52), SIMDE_FLOAT16_VALUE( -56.06), SIMDE_FLOAT16_VALUE( -43.22),
|
||||
SIMDE_FLOAT16_VALUE( -61.50), SIMDE_FLOAT16_VALUE( 5.79), SIMDE_FLOAT16_VALUE( 42.94), SIMDE_FLOAT16_VALUE( -85.44),
|
||||
SIMDE_FLOAT16_VALUE( -51.84), SIMDE_FLOAT16_VALUE( -25.84), SIMDE_FLOAT16_VALUE( -83.75), SIMDE_FLOAT16_VALUE( -86.38),
|
||||
SIMDE_FLOAT16_VALUE( -59.53), SIMDE_FLOAT16_VALUE( 44.50), SIMDE_FLOAT16_VALUE( 28.20), SIMDE_FLOAT16_VALUE( -36.88) } },
|
||||
{ { SIMDE_FLOAT16_VALUE( -29.12), SIMDE_FLOAT16_VALUE( 97.44), SIMDE_FLOAT16_VALUE( -49.31), SIMDE_FLOAT16_VALUE( -65.19),
|
||||
SIMDE_FLOAT16_VALUE( -72.25), SIMDE_FLOAT16_VALUE( -94.12), SIMDE_FLOAT16_VALUE( 78.81), SIMDE_FLOAT16_VALUE( -13.26),
|
||||
SIMDE_FLOAT16_VALUE( 61.03), SIMDE_FLOAT16_VALUE( 59.56), SIMDE_FLOAT16_VALUE( 60.94), SIMDE_FLOAT16_VALUE( -38.00),
|
||||
SIMDE_FLOAT16_VALUE( 79.38), SIMDE_FLOAT16_VALUE( -62.59), SIMDE_FLOAT16_VALUE( 68.06), SIMDE_FLOAT16_VALUE( -21.34),
|
||||
SIMDE_FLOAT16_VALUE( 57.84), SIMDE_FLOAT16_VALUE( 30.92), SIMDE_FLOAT16_VALUE( -82.25), SIMDE_FLOAT16_VALUE( 96.31),
|
||||
SIMDE_FLOAT16_VALUE( -63.28), SIMDE_FLOAT16_VALUE( 71.44), SIMDE_FLOAT16_VALUE( -16.98), SIMDE_FLOAT16_VALUE( -11.05),
|
||||
SIMDE_FLOAT16_VALUE( -54.41), SIMDE_FLOAT16_VALUE( -0.72), SIMDE_FLOAT16_VALUE( 2.56), SIMDE_FLOAT16_VALUE( -13.94),
|
||||
SIMDE_FLOAT16_VALUE( -56.22), SIMDE_FLOAT16_VALUE( -7.15), SIMDE_FLOAT16_VALUE( 49.19), SIMDE_FLOAT16_VALUE( 14.66) },
|
||||
{ SIMDE_FLOAT16_VALUE( -9.70), SIMDE_FLOAT16_VALUE( 99.88), SIMDE_FLOAT16_VALUE( 49.44), SIMDE_FLOAT16_VALUE( 18.06),
|
||||
SIMDE_FLOAT16_VALUE( -94.25), SIMDE_FLOAT16_VALUE( 28.27), SIMDE_FLOAT16_VALUE( -95.19), SIMDE_FLOAT16_VALUE( 66.75),
|
||||
SIMDE_FLOAT16_VALUE( -12.19), SIMDE_FLOAT16_VALUE( 65.75), SIMDE_FLOAT16_VALUE( -71.25), SIMDE_FLOAT16_VALUE( -32.84),
|
||||
SIMDE_FLOAT16_VALUE( -96.81), SIMDE_FLOAT16_VALUE( 96.81), SIMDE_FLOAT16_VALUE( 45.84), SIMDE_FLOAT16_VALUE( 61.03),
|
||||
SIMDE_FLOAT16_VALUE( 27.75), SIMDE_FLOAT16_VALUE( 63.59), SIMDE_FLOAT16_VALUE( 57.38), SIMDE_FLOAT16_VALUE( 64.44),
|
||||
SIMDE_FLOAT16_VALUE( 35.03), SIMDE_FLOAT16_VALUE( -59.62), SIMDE_FLOAT16_VALUE( -46.59), SIMDE_FLOAT16_VALUE( 80.62),
|
||||
SIMDE_FLOAT16_VALUE( 39.66), SIMDE_FLOAT16_VALUE( 55.97), SIMDE_FLOAT16_VALUE( -33.31), SIMDE_FLOAT16_VALUE( 83.44),
|
||||
SIMDE_FLOAT16_VALUE( -51.19), SIMDE_FLOAT16_VALUE( -84.12), SIMDE_FLOAT16_VALUE( -1.91), SIMDE_FLOAT16_VALUE( 39.12) },
|
||||
{ SIMDE_FLOAT16_VALUE( -29.12), SIMDE_FLOAT16_VALUE( 97.44), SIMDE_FLOAT16_VALUE( -49.31), SIMDE_FLOAT16_VALUE( -65.19),
|
||||
SIMDE_FLOAT16_VALUE( -94.25), SIMDE_FLOAT16_VALUE( -94.12), SIMDE_FLOAT16_VALUE( -95.19), SIMDE_FLOAT16_VALUE( -13.26),
|
||||
SIMDE_FLOAT16_VALUE( -12.19), SIMDE_FLOAT16_VALUE( 59.56), SIMDE_FLOAT16_VALUE( -71.25), SIMDE_FLOAT16_VALUE( -38.00),
|
||||
SIMDE_FLOAT16_VALUE( -96.81), SIMDE_FLOAT16_VALUE( -62.59), SIMDE_FLOAT16_VALUE( 45.84), SIMDE_FLOAT16_VALUE( -21.34),
|
||||
SIMDE_FLOAT16_VALUE( 27.75), SIMDE_FLOAT16_VALUE( 30.92), SIMDE_FLOAT16_VALUE( -82.25), SIMDE_FLOAT16_VALUE( 64.44),
|
||||
SIMDE_FLOAT16_VALUE( -63.28), SIMDE_FLOAT16_VALUE( -59.62), SIMDE_FLOAT16_VALUE( -46.59), SIMDE_FLOAT16_VALUE( -11.05),
|
||||
SIMDE_FLOAT16_VALUE( -54.41), SIMDE_FLOAT16_VALUE( -0.72), SIMDE_FLOAT16_VALUE( -33.31), SIMDE_FLOAT16_VALUE( -13.94),
|
||||
SIMDE_FLOAT16_VALUE( -56.22), SIMDE_FLOAT16_VALUE( -84.12), SIMDE_FLOAT16_VALUE( -1.91), SIMDE_FLOAT16_VALUE( 14.66) } },
|
||||
{ { SIMDE_FLOAT16_VALUE( -84.25), SIMDE_FLOAT16_VALUE( -52.47), SIMDE_FLOAT16_VALUE( -42.81), SIMDE_FLOAT16_VALUE( -78.50),
|
||||
SIMDE_FLOAT16_VALUE( 75.81), SIMDE_FLOAT16_VALUE( -38.00), SIMDE_FLOAT16_VALUE( 88.25), SIMDE_FLOAT16_VALUE( -36.38),
|
||||
SIMDE_FLOAT16_VALUE( -72.25), SIMDE_FLOAT16_VALUE( -83.00), SIMDE_FLOAT16_VALUE( 30.78), SIMDE_FLOAT16_VALUE( -69.06),
|
||||
SIMDE_FLOAT16_VALUE( -86.19), SIMDE_FLOAT16_VALUE( -23.39), SIMDE_FLOAT16_VALUE( 92.00), SIMDE_FLOAT16_VALUE( 41.59),
|
||||
SIMDE_FLOAT16_VALUE( -59.78), SIMDE_FLOAT16_VALUE( 49.34), SIMDE_FLOAT16_VALUE( 6.05), SIMDE_FLOAT16_VALUE( 75.25),
|
||||
SIMDE_FLOAT16_VALUE( 89.75), SIMDE_FLOAT16_VALUE( 59.47), SIMDE_FLOAT16_VALUE( 55.91), SIMDE_FLOAT16_VALUE( 29.38),
|
||||
SIMDE_FLOAT16_VALUE( 15.43), SIMDE_FLOAT16_VALUE( -77.38), SIMDE_FLOAT16_VALUE( 12.81), SIMDE_FLOAT16_VALUE( 64.25),
|
||||
SIMDE_FLOAT16_VALUE( -61.50), SIMDE_FLOAT16_VALUE( -89.12), SIMDE_FLOAT16_VALUE( 3.37), SIMDE_FLOAT16_VALUE( -45.72) },
|
||||
{ SIMDE_FLOAT16_VALUE( -41.59), SIMDE_FLOAT16_VALUE( 60.56), SIMDE_FLOAT16_VALUE( -24.20), SIMDE_FLOAT16_VALUE( -65.75),
|
||||
SIMDE_FLOAT16_VALUE( -77.44), SIMDE_FLOAT16_VALUE( -35.97), SIMDE_FLOAT16_VALUE( -2.18), SIMDE_FLOAT16_VALUE( -49.62),
|
||||
SIMDE_FLOAT16_VALUE( -18.95), SIMDE_FLOAT16_VALUE( -71.38), SIMDE_FLOAT16_VALUE( -18.69), SIMDE_FLOAT16_VALUE( -5.12),
|
||||
SIMDE_FLOAT16_VALUE( 5.22), SIMDE_FLOAT16_VALUE( -26.69), SIMDE_FLOAT16_VALUE( -63.53), SIMDE_FLOAT16_VALUE( 45.44),
|
||||
SIMDE_FLOAT16_VALUE( -77.31), SIMDE_FLOAT16_VALUE( 42.50), SIMDE_FLOAT16_VALUE( 20.70), SIMDE_FLOAT16_VALUE( -87.62),
|
||||
SIMDE_FLOAT16_VALUE( 1.97), SIMDE_FLOAT16_VALUE( -23.41), SIMDE_FLOAT16_VALUE( 41.75), SIMDE_FLOAT16_VALUE( -82.62),
|
||||
SIMDE_FLOAT16_VALUE( -0.79), SIMDE_FLOAT16_VALUE( -45.44), SIMDE_FLOAT16_VALUE( 81.62), SIMDE_FLOAT16_VALUE( 37.72),
|
||||
SIMDE_FLOAT16_VALUE( -34.53), SIMDE_FLOAT16_VALUE( -14.97), SIMDE_FLOAT16_VALUE( 92.00), SIMDE_FLOAT16_VALUE( 23.89) },
|
||||
{ SIMDE_FLOAT16_VALUE( -84.25), SIMDE_FLOAT16_VALUE( -52.47), SIMDE_FLOAT16_VALUE( -42.81), SIMDE_FLOAT16_VALUE( -78.50),
|
||||
SIMDE_FLOAT16_VALUE( -77.44), SIMDE_FLOAT16_VALUE( -38.00), SIMDE_FLOAT16_VALUE( -2.18), SIMDE_FLOAT16_VALUE( -49.62),
|
||||
SIMDE_FLOAT16_VALUE( -72.25), SIMDE_FLOAT16_VALUE( -83.00), SIMDE_FLOAT16_VALUE( -18.69), SIMDE_FLOAT16_VALUE( -69.06),
|
||||
SIMDE_FLOAT16_VALUE( -86.19), SIMDE_FLOAT16_VALUE( -26.69), SIMDE_FLOAT16_VALUE( -63.53), SIMDE_FLOAT16_VALUE( 41.59),
|
||||
SIMDE_FLOAT16_VALUE( -77.31), SIMDE_FLOAT16_VALUE( 42.50), SIMDE_FLOAT16_VALUE( 6.05), SIMDE_FLOAT16_VALUE( -87.62),
|
||||
SIMDE_FLOAT16_VALUE( 1.97), SIMDE_FLOAT16_VALUE( -23.41), SIMDE_FLOAT16_VALUE( 41.75), SIMDE_FLOAT16_VALUE( -82.62),
|
||||
SIMDE_FLOAT16_VALUE( -0.79), SIMDE_FLOAT16_VALUE( -77.38), SIMDE_FLOAT16_VALUE( 12.81), SIMDE_FLOAT16_VALUE( 37.72),
|
||||
SIMDE_FLOAT16_VALUE( -61.50), SIMDE_FLOAT16_VALUE( -89.12), SIMDE_FLOAT16_VALUE( 3.37), SIMDE_FLOAT16_VALUE( -45.72) } },
|
||||
{ { SIMDE_FLOAT16_VALUE( -54.41), SIMDE_FLOAT16_VALUE( -32.22), SIMDE_FLOAT16_VALUE( 58.12), SIMDE_FLOAT16_VALUE( -31.81),
|
||||
SIMDE_FLOAT16_VALUE( 31.81), SIMDE_FLOAT16_VALUE( -44.06), SIMDE_FLOAT16_VALUE( 18.55), SIMDE_FLOAT16_VALUE( -87.12),
|
||||
SIMDE_FLOAT16_VALUE( -15.46), SIMDE_FLOAT16_VALUE( 99.88), SIMDE_FLOAT16_VALUE( 7.74), SIMDE_FLOAT16_VALUE( 89.75),
|
||||
SIMDE_FLOAT16_VALUE( -26.84), SIMDE_FLOAT16_VALUE( 44.19), SIMDE_FLOAT16_VALUE( 35.19), SIMDE_FLOAT16_VALUE( -4.18),
|
||||
SIMDE_FLOAT16_VALUE( -13.29), SIMDE_FLOAT16_VALUE( -44.12), SIMDE_FLOAT16_VALUE( 8.20), SIMDE_FLOAT16_VALUE( 88.69),
|
||||
SIMDE_FLOAT16_VALUE( 32.50), SIMDE_FLOAT16_VALUE( -50.03), SIMDE_FLOAT16_VALUE( -93.94), SIMDE_FLOAT16_VALUE( -68.31),
|
||||
SIMDE_FLOAT16_VALUE( 4.53), SIMDE_FLOAT16_VALUE( 87.75), SIMDE_FLOAT16_VALUE( 69.38), SIMDE_FLOAT16_VALUE( 70.00),
|
||||
SIMDE_FLOAT16_VALUE( -27.23), SIMDE_FLOAT16_VALUE( 61.38), SIMDE_FLOAT16_VALUE( -6.11), SIMDE_FLOAT16_VALUE( 18.36) },
|
||||
{ SIMDE_FLOAT16_VALUE( -70.81), SIMDE_FLOAT16_VALUE( -48.00), SIMDE_FLOAT16_VALUE( 86.56), SIMDE_FLOAT16_VALUE( 61.00),
|
||||
SIMDE_FLOAT16_VALUE( 7.92), SIMDE_FLOAT16_VALUE( 5.07), SIMDE_FLOAT16_VALUE( 73.88), SIMDE_FLOAT16_VALUE( 92.44),
|
||||
SIMDE_FLOAT16_VALUE( 4.93), SIMDE_FLOAT16_VALUE( -18.41), SIMDE_FLOAT16_VALUE( 82.19), SIMDE_FLOAT16_VALUE( 78.06),
|
||||
SIMDE_FLOAT16_VALUE( -74.19), SIMDE_FLOAT16_VALUE( 17.41), SIMDE_FLOAT16_VALUE( -26.09), SIMDE_FLOAT16_VALUE( 12.50),
|
||||
SIMDE_FLOAT16_VALUE( 73.31), SIMDE_FLOAT16_VALUE( 82.12), SIMDE_FLOAT16_VALUE( 1.18), SIMDE_FLOAT16_VALUE( 5.78),
|
||||
SIMDE_FLOAT16_VALUE( -67.94), SIMDE_FLOAT16_VALUE( 7.26), SIMDE_FLOAT16_VALUE( 37.47), SIMDE_FLOAT16_VALUE( 36.62),
|
||||
SIMDE_FLOAT16_VALUE( -5.00), SIMDE_FLOAT16_VALUE( 6.88), SIMDE_FLOAT16_VALUE( 6.62), SIMDE_FLOAT16_VALUE( 67.75),
|
||||
SIMDE_FLOAT16_VALUE( -31.73), SIMDE_FLOAT16_VALUE( -99.50), SIMDE_FLOAT16_VALUE( -13.88), SIMDE_FLOAT16_VALUE( -2.56) },
|
||||
{ SIMDE_FLOAT16_VALUE( -70.81), SIMDE_FLOAT16_VALUE( -48.00), SIMDE_FLOAT16_VALUE( 58.12), SIMDE_FLOAT16_VALUE( -31.81),
|
||||
SIMDE_FLOAT16_VALUE( 7.92), SIMDE_FLOAT16_VALUE( -44.06), SIMDE_FLOAT16_VALUE( 18.55), SIMDE_FLOAT16_VALUE( -87.12),
|
||||
SIMDE_FLOAT16_VALUE( -15.46), SIMDE_FLOAT16_VALUE( -18.41), SIMDE_FLOAT16_VALUE( 7.74), SIMDE_FLOAT16_VALUE( 78.06),
|
||||
SIMDE_FLOAT16_VALUE( -74.19), SIMDE_FLOAT16_VALUE( 17.41), SIMDE_FLOAT16_VALUE( -26.09), SIMDE_FLOAT16_VALUE( -4.18),
|
||||
SIMDE_FLOAT16_VALUE( -13.29), SIMDE_FLOAT16_VALUE( -44.12), SIMDE_FLOAT16_VALUE( 1.18), SIMDE_FLOAT16_VALUE( 5.78),
|
||||
SIMDE_FLOAT16_VALUE( -67.94), SIMDE_FLOAT16_VALUE( -50.03), SIMDE_FLOAT16_VALUE( -93.94), SIMDE_FLOAT16_VALUE( -68.31),
|
||||
SIMDE_FLOAT16_VALUE( -5.00), SIMDE_FLOAT16_VALUE( 6.88), SIMDE_FLOAT16_VALUE( 6.62), SIMDE_FLOAT16_VALUE( 67.75),
|
||||
SIMDE_FLOAT16_VALUE( -31.73), SIMDE_FLOAT16_VALUE( -99.50), SIMDE_FLOAT16_VALUE( -13.88), SIMDE_FLOAT16_VALUE( -2.56) } },
|
||||
{ { SIMDE_FLOAT16_VALUE( -47.50), SIMDE_FLOAT16_VALUE( -27.34), SIMDE_FLOAT16_VALUE( -41.56), SIMDE_FLOAT16_VALUE( 60.41),
|
||||
SIMDE_FLOAT16_VALUE( 77.75), SIMDE_FLOAT16_VALUE( -67.75), SIMDE_FLOAT16_VALUE( 52.88), SIMDE_FLOAT16_VALUE( -17.34),
|
||||
SIMDE_FLOAT16_VALUE( 13.87), SIMDE_FLOAT16_VALUE( 35.09), SIMDE_FLOAT16_VALUE( -39.25), SIMDE_FLOAT16_VALUE( 39.66),
|
||||
SIMDE_FLOAT16_VALUE( -47.50), SIMDE_FLOAT16_VALUE( 34.66), SIMDE_FLOAT16_VALUE( -47.84), SIMDE_FLOAT16_VALUE( -74.19),
|
||||
SIMDE_FLOAT16_VALUE( 16.78), SIMDE_FLOAT16_VALUE( 53.34), SIMDE_FLOAT16_VALUE( 31.56), SIMDE_FLOAT16_VALUE( 48.88),
|
||||
SIMDE_FLOAT16_VALUE( -39.41), SIMDE_FLOAT16_VALUE( -30.95), SIMDE_FLOAT16_VALUE( -14.52), SIMDE_FLOAT16_VALUE( 55.59),
|
||||
SIMDE_FLOAT16_VALUE( 75.94), SIMDE_FLOAT16_VALUE( 92.06), SIMDE_FLOAT16_VALUE( 23.34), SIMDE_FLOAT16_VALUE( -55.81),
|
||||
SIMDE_FLOAT16_VALUE( 92.62), SIMDE_FLOAT16_VALUE( -90.50), SIMDE_FLOAT16_VALUE( 41.62), SIMDE_FLOAT16_VALUE( -54.91) },
|
||||
{ SIMDE_FLOAT16_VALUE( -17.88), SIMDE_FLOAT16_VALUE( -99.94), SIMDE_FLOAT16_VALUE( -94.50), SIMDE_FLOAT16_VALUE( -40.16),
|
||||
SIMDE_FLOAT16_VALUE( -67.62), SIMDE_FLOAT16_VALUE( 58.41), SIMDE_FLOAT16_VALUE( 42.50), SIMDE_FLOAT16_VALUE( 46.22),
|
||||
SIMDE_FLOAT16_VALUE( -6.51), SIMDE_FLOAT16_VALUE( -96.75), SIMDE_FLOAT16_VALUE( -14.12), SIMDE_FLOAT16_VALUE( 46.00),
|
||||
SIMDE_FLOAT16_VALUE( 37.91), SIMDE_FLOAT16_VALUE( 38.03), SIMDE_FLOAT16_VALUE( 71.75), SIMDE_FLOAT16_VALUE( -45.31),
|
||||
SIMDE_FLOAT16_VALUE( -8.64), SIMDE_FLOAT16_VALUE( 3.35), SIMDE_FLOAT16_VALUE( -96.44), SIMDE_FLOAT16_VALUE( 51.94),
|
||||
SIMDE_FLOAT16_VALUE( 72.38), SIMDE_FLOAT16_VALUE( -10.98), SIMDE_FLOAT16_VALUE( 7.53), SIMDE_FLOAT16_VALUE( 48.31),
|
||||
SIMDE_FLOAT16_VALUE( -18.89), SIMDE_FLOAT16_VALUE( -69.12), SIMDE_FLOAT16_VALUE( 92.50), SIMDE_FLOAT16_VALUE( -26.30),
|
||||
SIMDE_FLOAT16_VALUE( -59.66), SIMDE_FLOAT16_VALUE( 34.12), SIMDE_FLOAT16_VALUE( 18.80), SIMDE_FLOAT16_VALUE( 22.47) },
|
||||
{ SIMDE_FLOAT16_VALUE( -47.50), SIMDE_FLOAT16_VALUE( -99.94), SIMDE_FLOAT16_VALUE( -94.50), SIMDE_FLOAT16_VALUE( -40.16),
|
||||
SIMDE_FLOAT16_VALUE( -67.62), SIMDE_FLOAT16_VALUE( -67.75), SIMDE_FLOAT16_VALUE( 42.50), SIMDE_FLOAT16_VALUE( -17.34),
|
||||
SIMDE_FLOAT16_VALUE( -6.51), SIMDE_FLOAT16_VALUE( -96.75), SIMDE_FLOAT16_VALUE( -39.25), SIMDE_FLOAT16_VALUE( 39.66),
|
||||
SIMDE_FLOAT16_VALUE( -47.50), SIMDE_FLOAT16_VALUE( 34.66), SIMDE_FLOAT16_VALUE( -47.84), SIMDE_FLOAT16_VALUE( -74.19),
|
||||
SIMDE_FLOAT16_VALUE( -8.64), SIMDE_FLOAT16_VALUE( 3.35), SIMDE_FLOAT16_VALUE( -96.44), SIMDE_FLOAT16_VALUE( 48.88),
|
||||
SIMDE_FLOAT16_VALUE( -39.41), SIMDE_FLOAT16_VALUE( -30.95), SIMDE_FLOAT16_VALUE( -14.52), SIMDE_FLOAT16_VALUE( 48.31),
|
||||
SIMDE_FLOAT16_VALUE( -18.89), SIMDE_FLOAT16_VALUE( -69.12), SIMDE_FLOAT16_VALUE( 23.34), SIMDE_FLOAT16_VALUE( -55.81),
|
||||
SIMDE_FLOAT16_VALUE( -59.66), SIMDE_FLOAT16_VALUE( -90.50), SIMDE_FLOAT16_VALUE( 18.80), SIMDE_FLOAT16_VALUE( -54.91) } },
|
||||
{ { SIMDE_FLOAT16_VALUE( 34.22), SIMDE_FLOAT16_VALUE( 24.31), SIMDE_FLOAT16_VALUE( 82.31), SIMDE_FLOAT16_VALUE( 66.56),
|
||||
SIMDE_FLOAT16_VALUE( -17.28), SIMDE_FLOAT16_VALUE( 24.81), SIMDE_FLOAT16_VALUE( 12.77), SIMDE_FLOAT16_VALUE( 76.19),
|
||||
SIMDE_FLOAT16_VALUE( 28.06), SIMDE_FLOAT16_VALUE( 98.62), SIMDE_FLOAT16_VALUE( 22.19), SIMDE_FLOAT16_VALUE( -34.03),
|
||||
SIMDE_FLOAT16_VALUE( 36.66), SIMDE_FLOAT16_VALUE( -6.03), SIMDE_FLOAT16_VALUE( 20.64), SIMDE_FLOAT16_VALUE( -72.00),
|
||||
SIMDE_FLOAT16_VALUE( 97.31), SIMDE_FLOAT16_VALUE( 24.19), SIMDE_FLOAT16_VALUE( 80.00), SIMDE_FLOAT16_VALUE( 69.75),
|
||||
SIMDE_FLOAT16_VALUE( -86.81), SIMDE_FLOAT16_VALUE( -12.49), SIMDE_FLOAT16_VALUE( 18.05), SIMDE_FLOAT16_VALUE( -5.70),
|
||||
SIMDE_FLOAT16_VALUE( 18.39), SIMDE_FLOAT16_VALUE( 10.55), SIMDE_FLOAT16_VALUE( 68.00), SIMDE_FLOAT16_VALUE( 58.75),
|
||||
SIMDE_FLOAT16_VALUE( -55.31), SIMDE_FLOAT16_VALUE( -13.19), SIMDE_FLOAT16_VALUE( -18.80), SIMDE_FLOAT16_VALUE( 78.88) },
|
||||
{ SIMDE_FLOAT16_VALUE( -88.88), SIMDE_FLOAT16_VALUE( -36.47), SIMDE_FLOAT16_VALUE( 45.44), SIMDE_FLOAT16_VALUE( -6.15),
|
||||
SIMDE_FLOAT16_VALUE( 88.31), SIMDE_FLOAT16_VALUE( -41.78), SIMDE_FLOAT16_VALUE( -29.95), SIMDE_FLOAT16_VALUE( 16.41),
|
||||
SIMDE_FLOAT16_VALUE( -43.12), SIMDE_FLOAT16_VALUE( 92.25), SIMDE_FLOAT16_VALUE( 82.38), SIMDE_FLOAT16_VALUE( 93.56),
|
||||
SIMDE_FLOAT16_VALUE( -13.78), SIMDE_FLOAT16_VALUE( 3.01), SIMDE_FLOAT16_VALUE( -78.44), SIMDE_FLOAT16_VALUE( -16.45),
|
||||
SIMDE_FLOAT16_VALUE( -72.81), SIMDE_FLOAT16_VALUE( -98.44), SIMDE_FLOAT16_VALUE( -46.75), SIMDE_FLOAT16_VALUE( -59.62),
|
||||
SIMDE_FLOAT16_VALUE( -10.93), SIMDE_FLOAT16_VALUE( 71.31), SIMDE_FLOAT16_VALUE( 34.69), SIMDE_FLOAT16_VALUE( -92.56),
|
||||
SIMDE_FLOAT16_VALUE( -18.16), SIMDE_FLOAT16_VALUE( 2.69), SIMDE_FLOAT16_VALUE( 66.19), SIMDE_FLOAT16_VALUE( 26.53),
|
||||
SIMDE_FLOAT16_VALUE( 89.50), SIMDE_FLOAT16_VALUE( -52.59), SIMDE_FLOAT16_VALUE( 5.43), SIMDE_FLOAT16_VALUE( -99.38) },
|
||||
{ SIMDE_FLOAT16_VALUE( -88.88), SIMDE_FLOAT16_VALUE( -36.47), SIMDE_FLOAT16_VALUE( 45.44), SIMDE_FLOAT16_VALUE( -6.15),
|
||||
SIMDE_FLOAT16_VALUE( -17.28), SIMDE_FLOAT16_VALUE( -41.78), SIMDE_FLOAT16_VALUE( -29.95), SIMDE_FLOAT16_VALUE( 16.41),
|
||||
SIMDE_FLOAT16_VALUE( -43.12), SIMDE_FLOAT16_VALUE( 92.25), SIMDE_FLOAT16_VALUE( 22.19), SIMDE_FLOAT16_VALUE( -34.03),
|
||||
SIMDE_FLOAT16_VALUE( -13.78), SIMDE_FLOAT16_VALUE( -6.03), SIMDE_FLOAT16_VALUE( -78.44), SIMDE_FLOAT16_VALUE( -72.00),
|
||||
SIMDE_FLOAT16_VALUE( -72.81), SIMDE_FLOAT16_VALUE( -98.44), SIMDE_FLOAT16_VALUE( -46.75), SIMDE_FLOAT16_VALUE( -59.62),
|
||||
SIMDE_FLOAT16_VALUE( -86.81), SIMDE_FLOAT16_VALUE( -12.49), SIMDE_FLOAT16_VALUE( 18.05), SIMDE_FLOAT16_VALUE( -92.56),
|
||||
SIMDE_FLOAT16_VALUE( -18.16), SIMDE_FLOAT16_VALUE( 2.69), SIMDE_FLOAT16_VALUE( 66.19), SIMDE_FLOAT16_VALUE( 26.53),
|
||||
SIMDE_FLOAT16_VALUE( -55.31), SIMDE_FLOAT16_VALUE( -52.59), SIMDE_FLOAT16_VALUE( -18.80), SIMDE_FLOAT16_VALUE( -99.38) } },
|
||||
};
|
||||
|
||||
for (size_t i = 0 ; i < (sizeof(test_vec) / sizeof(test_vec[0])) ; i++) {
|
||||
simde__m512h a = simde_mm512_loadu_ph(test_vec[i].a);
|
||||
simde__m512h b = simde_mm512_loadu_ph(test_vec[i].b);
|
||||
simde__m512h r = simde_mm512_min_ph(a, b);
|
||||
simde_test_x86_assert_equal_f16x32(r, simde_mm512_loadu_ph(test_vec[i].r), 1);
|
||||
}
|
||||
|
||||
return 0;
|
||||
#else
|
||||
fputc('\n', stdout);
|
||||
for (int i = 0 ; i < 8 ; i++) {
|
||||
simde__m512h a = simde_test_x86_random_f16x32(SIMDE_FLOAT16_VALUE(-100.0), SIMDE_FLOAT16_VALUE(100.0));
|
||||
simde__m512h b = simde_test_x86_random_f16x32(SIMDE_FLOAT16_VALUE(-100.0), SIMDE_FLOAT16_VALUE(100.0));
|
||||
simde__m512h r = simde_mm512_min_ph(a, b);
|
||||
|
||||
simde_test_x86_write_f16x32(2, a, SIMDE_TEST_VEC_POS_FIRST);
|
||||
simde_test_x86_write_f16x32(2, b, SIMDE_TEST_VEC_POS_MIDDLE);
|
||||
simde_test_x86_write_f16x32(2, r, SIMDE_TEST_VEC_POS_LAST);
|
||||
}
|
||||
|
||||
return 1;
|
||||
#endif
|
||||
}
|
||||
#endif
|
||||
|
||||
static int
|
||||
test_simde_mm512_min_ps (SIMDE_MUNIT_TEST_ARGS) {
|
||||
static const struct {
|
||||
|
|
@ -3870,6 +4098,10 @@ SIMDE_TEST_FUNC_LIST_BEGIN
|
|||
SIMDE_TEST_FUNC_LIST_ENTRY(mm512_mask_min_epu64)
|
||||
SIMDE_TEST_FUNC_LIST_ENTRY(mm512_maskz_min_epu64)
|
||||
|
||||
#if defined(SIMDE_FLOAT16_IS_SCALAR)
|
||||
SIMDE_TEST_FUNC_LIST_ENTRY(mm512_min_ph)
|
||||
#endif
|
||||
|
||||
SIMDE_TEST_FUNC_LIST_ENTRY(mm512_min_ps)
|
||||
SIMDE_TEST_FUNC_LIST_ENTRY(mm512_mask_min_ps)
|
||||
SIMDE_TEST_FUNC_LIST_ENTRY(mm512_maskz_min_ps)
|
||||
|
|
|
|||
249
thirdparty/simde/test/x86/avx512/permutex.c
vendored
Normal file
249
thirdparty/simde/test/x86/avx512/permutex.c
vendored
Normal file
|
|
@ -0,0 +1,249 @@
|
|||
/* SPDX-License-Identifier: MIT
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person
|
||||
* obtaining a copy of this software and associated documentation
|
||||
* files (the "Software"), to deal in the Software without
|
||||
* restriction, including without limitation the rights to use, copy,
|
||||
* modify, merge, publish, distribute, sublicense, and/or sell copies
|
||||
* of the Software, and to permit persons to whom the Software is
|
||||
* furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be
|
||||
* included in all copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
|
||||
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
|
||||
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
|
||||
* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
|
||||
* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
|
||||
* SOFTWARE.
|
||||
*
|
||||
* Copyright:
|
||||
* 2023 Michael R. Crusoe <crusoe@debian.org>
|
||||
*/
|
||||
|
||||
#define SIMDE_TEST_X86_AVX512_INSN permutex
|
||||
|
||||
#include <test/x86/avx512/test-avx512.h>
|
||||
#include <simde/x86/avx512/set.h>
|
||||
#include <simde/x86/avx512/permutex.h>
|
||||
|
||||
static int
|
||||
test_simde_mm256_permutex_epi64(SIMDE_MUNIT_TEST_ARGS) {
|
||||
#if 1
|
||||
const struct {
|
||||
int64_t a[4];
|
||||
int64_t r[4];
|
||||
} test_vec[8] = {
|
||||
{ { INT64_C( 3380730272638549406), -INT64_C( 9153520704702256789), INT64_C( 9176172621361943730), -INT64_C( 224897000177715056) },
|
||||
{ INT64_C( 3380730272638549406), INT64_C( 3380730272638549406), INT64_C( 3380730272638549406), INT64_C( 3380730272638549406) } },
|
||||
{ { INT64_C( 1743540307420702910), INT64_C( 1594468214328802101), -INT64_C( 1070409334618582716), INT64_C( 4591284037861212252) },
|
||||
{ INT64_C( 1594468214328802101), INT64_C( 1743540307420702910), INT64_C( 1743540307420702910), INT64_C( 1743540307420702910) } },
|
||||
{ { -INT64_C( 7191838048563029396), -INT64_C( 2438034435728414288), INT64_C( 8629363194122729070), INT64_C( 6118960229233353769) },
|
||||
{ INT64_C( 8629363194122729070), -INT64_C( 7191838048563029396), -INT64_C( 7191838048563029396), -INT64_C( 7191838048563029396) } },
|
||||
{ { INT64_C( 5910585981377785091), INT64_C( 936626256355934855), INT64_C( 6059766109351740039), INT64_C( 3980592959627086337) },
|
||||
{ INT64_C( 3980592959627086337), INT64_C( 5910585981377785091), INT64_C( 5910585981377785091), INT64_C( 5910585981377785091) } },
|
||||
{ { -INT64_C( 3383989709936940267), -INT64_C( 8677045597436219415), INT64_C( 1076994787638800499), -INT64_C( 1155395570052370037) },
|
||||
{ -INT64_C( 3383989709936940267), -INT64_C( 3383989709936940267), -INT64_C( 3383989709936940267), -INT64_C( 3383989709936940267) } },
|
||||
{ { INT64_C( 3024923889355888864), INT64_C( 5883467878739602463), -INT64_C( 7218458691070079050), -INT64_C( 2334180723799635245) },
|
||||
{ INT64_C( 5883467878739602463), INT64_C( 3024923889355888864), INT64_C( 3024923889355888864), INT64_C( 3024923889355888864) } },
|
||||
{ { INT64_C( 1248627335310623466), INT64_C( 152796157942236655), -INT64_C( 4444321726930219610), -INT64_C( 1639298172395213470) },
|
||||
{ -INT64_C( 4444321726930219610), INT64_C( 1248627335310623466), INT64_C( 1248627335310623466), INT64_C( 1248627335310623466) } },
|
||||
{ { INT64_C( 4274030723042920780), -INT64_C( 19379610889715347), INT64_C( 8999888709901189428), -INT64_C( 6008612931454020172) },
|
||||
{ -INT64_C( 6008612931454020172), INT64_C( 4274030723042920780), INT64_C( 4274030723042920780), INT64_C( 4274030723042920780) } },
|
||||
};
|
||||
|
||||
for (size_t i = 0 ; i < (sizeof(test_vec) / sizeof(test_vec[0])); i++) {
|
||||
simde__m256i r, a = simde_mm256_loadu_epi64(test_vec[i].a);
|
||||
SIMDE_CONSTIFY_4_(simde_mm256_permutex_epi64, r, (HEDLEY_UNREACHABLE(), a), i & 3, a);
|
||||
simde_test_x86_assert_equal_i64x4(r, simde_mm256_loadu_epi64(test_vec[i].r));
|
||||
}
|
||||
|
||||
return 0;
|
||||
#else
|
||||
fputc('\n', stdout);
|
||||
for (int i = 0 ; i < 8 ; i++) {
|
||||
simde__m256i r, a = simde_test_x86_random_i64x4();
|
||||
SIMDE_CONSTIFY_4_(simde_mm256_permutex_epi64, r, (HEDLEY_UNREACHABLE(), a), i & 3, a);
|
||||
|
||||
simde_test_x86_write_i64x4(2, a, SIMDE_TEST_VEC_POS_FIRST);
|
||||
simde_test_x86_write_i64x4(2, r, SIMDE_TEST_VEC_POS_LAST);
|
||||
}
|
||||
return 1;
|
||||
#endif
|
||||
}
|
||||
|
||||
static int
|
||||
test_simde_mm512_permutex_epi64(SIMDE_MUNIT_TEST_ARGS) {
|
||||
#if 1
|
||||
const struct {
|
||||
int64_t a[8];
|
||||
int64_t r[8];
|
||||
} test_vec[8] = {
|
||||
{ { INT64_C( 7111032946101335276), INT64_C( 6531688641137234627), INT64_C( 7787813351878868649), -INT64_C( 3220229969086318870),
|
||||
INT64_C( 130996079200421797), INT64_C( 2469692755643154870), -INT64_C( 2935619158353571878), -INT64_C( 2070041481608049525) },
|
||||
{ INT64_C( 7111032946101335276), INT64_C( 7111032946101335276), INT64_C( 7111032946101335276), INT64_C( 7111032946101335276),
|
||||
INT64_C( 130996079200421797), INT64_C( 130996079200421797), INT64_C( 130996079200421797), INT64_C( 130996079200421797) } },
|
||||
{ { INT64_C( 1495796916117764740), INT64_C( 3458842952237857124), -INT64_C( 6766015125913173418), -INT64_C( 4019926367883393259),
|
||||
INT64_C( 1137243206246303829), INT64_C( 7281456449432963205), INT64_C( 8154263398216372848), -INT64_C( 1272554307253420470) },
|
||||
{ INT64_C( 3458842952237857124), INT64_C( 1495796916117764740), INT64_C( 1495796916117764740), INT64_C( 1495796916117764740),
|
||||
INT64_C( 7281456449432963205), INT64_C( 1137243206246303829), INT64_C( 1137243206246303829), INT64_C( 1137243206246303829) } },
|
||||
{ { -INT64_C( 5675545791928606590), -INT64_C( 8599736633982637518), INT64_C( 6735194892811587499), -INT64_C( 5116579326666785673),
|
||||
INT64_C( 4323210491161059106), -INT64_C( 3320521656765739957), -INT64_C( 6133251560306050445), INT64_C( 3637422031181106828) },
|
||||
{ INT64_C( 6735194892811587499), -INT64_C( 5675545791928606590), -INT64_C( 5675545791928606590), -INT64_C( 5675545791928606590),
|
||||
-INT64_C( 6133251560306050445), INT64_C( 4323210491161059106), INT64_C( 4323210491161059106), INT64_C( 4323210491161059106) } },
|
||||
{ { -INT64_C( 3703226079230533801), -INT64_C( 5908129820114479092), -INT64_C( 5264120643586827755), -INT64_C( 4888953830051894044),
|
||||
INT64_C( 3647555225090041425), -INT64_C( 91647695598137904), -INT64_C( 1647973297498427840), -INT64_C( 2448264346831316251) },
|
||||
{ -INT64_C( 4888953830051894044), -INT64_C( 3703226079230533801), -INT64_C( 3703226079230533801), -INT64_C( 3703226079230533801),
|
||||
-INT64_C( 2448264346831316251), INT64_C( 3647555225090041425), INT64_C( 3647555225090041425), INT64_C( 3647555225090041425) } },
|
||||
{ { -INT64_C( 6196303435597339990), INT64_C( 865378099963258395), INT64_C( 7443211590141691998), -INT64_C( 2909968377094002381),
|
||||
-INT64_C( 5233558131230356007), -INT64_C( 2095935773227674608), INT64_C( 3237684583516692485), INT64_C( 3440338171692097465) },
|
||||
{ -INT64_C( 6196303435597339990), -INT64_C( 6196303435597339990), -INT64_C( 6196303435597339990), -INT64_C( 6196303435597339990),
|
||||
-INT64_C( 5233558131230356007), -INT64_C( 5233558131230356007), -INT64_C( 5233558131230356007), -INT64_C( 5233558131230356007) } },
|
||||
{ { INT64_C( 2389513715711174359), -INT64_C( 6359673515922299818), INT64_C( 5507089338106511943), -INT64_C( 5097808824929920581),
|
||||
-INT64_C( 4861541899440479145), -INT64_C( 5511749067919096262), -INT64_C( 8703380222127067049), -INT64_C( 5596046499468776774) },
|
||||
{ -INT64_C( 6359673515922299818), INT64_C( 2389513715711174359), INT64_C( 2389513715711174359), INT64_C( 2389513715711174359),
|
||||
-INT64_C( 5511749067919096262), -INT64_C( 4861541899440479145), -INT64_C( 4861541899440479145), -INT64_C( 4861541899440479145) } },
|
||||
{ { INT64_C( 1233883868887089917), INT64_C( 7154090107906930472), INT64_C( 6301808691919076384), -INT64_C( 2090714877852971793),
|
||||
-INT64_C( 2327123268051069493), INT64_C( 3570153911500448028), INT64_C( 5615022670838880760), -INT64_C( 835818874319937634) },
|
||||
{ INT64_C( 6301808691919076384), INT64_C( 1233883868887089917), INT64_C( 1233883868887089917), INT64_C( 1233883868887089917),
|
||||
INT64_C( 5615022670838880760), -INT64_C( 2327123268051069493), -INT64_C( 2327123268051069493), -INT64_C( 2327123268051069493) } },
|
||||
{ { INT64_C( 3188632169402051497), INT64_C( 7507465879757829357), INT64_C( 8963827773462105529), INT64_C( 4172134877510041032),
|
||||
-INT64_C( 5238008759181476591), INT64_C( 4352418444976956302), INT64_C( 1481044688329007922), INT64_C( 324801177760206263) },
|
||||
{ INT64_C( 4172134877510041032), INT64_C( 3188632169402051497), INT64_C( 3188632169402051497), INT64_C( 3188632169402051497),
|
||||
INT64_C( 324801177760206263), -INT64_C( 5238008759181476591), -INT64_C( 5238008759181476591), -INT64_C( 5238008759181476591) } },
|
||||
};
|
||||
|
||||
for (size_t i = 0 ; i < (sizeof(test_vec) / sizeof(test_vec[0])); i++) {
|
||||
simde__m512i r, a = simde_mm512_loadu_epi64(test_vec[i].a);
|
||||
SIMDE_CONSTIFY_4_(simde_mm512_permutex_epi64, r, (HEDLEY_UNREACHABLE(), a), i & 3, a);
|
||||
simde_test_x86_assert_equal_i64x8(r, simde_mm512_loadu_epi64(test_vec[i].r));
|
||||
}
|
||||
|
||||
return 0;
|
||||
#else
|
||||
fputc('\n', stdout);
|
||||
for (int i = 0 ; i < 8 ; i++) {
|
||||
simde__m512i r, a = simde_test_x86_random_i64x8();
|
||||
SIMDE_CONSTIFY_4_(simde_mm512_permutex_epi64, r, (HEDLEY_UNREACHABLE(), a), i & 3, a);
|
||||
|
||||
simde_test_x86_write_i64x8(2, a, SIMDE_TEST_VEC_POS_FIRST);
|
||||
simde_test_x86_write_i64x8(2, r, SIMDE_TEST_VEC_POS_LAST);
|
||||
}
|
||||
return 1;
|
||||
#endif
|
||||
}
|
||||
|
||||
HEDLEY_DIAGNOSTIC_PUSH
|
||||
SIMDE_DIAGNOSTIC_DISABLE_UNREACHABLE_
|
||||
|
||||
static int
|
||||
test_simde_mm512_mask_permutex_epi64(SIMDE_MUNIT_TEST_ARGS) {
|
||||
#if 1
|
||||
const struct {
|
||||
int64_t src[8];
|
||||
simde__mmask8 k;
|
||||
int64_t a[8];
|
||||
int64_t r[8];
|
||||
} test_vec[8] = {
|
||||
{ { -INT64_C( 7486586679393816934), -INT64_C( 8343033559076131759), INT64_C( 1197459257425703975), -INT64_C( 6713388164491843233),
|
||||
INT64_C( 169843424140027055), INT64_C( 3732820038704264467), INT64_C( 4774229997178759512), INT64_C( 6344631420636588129) },
|
||||
UINT8_C(183),
|
||||
{ -INT64_C( 3116078896968410867), INT64_C( 3039054343813017324), -INT64_C( 2255567292687776116), INT64_C( 4253181656590615813),
|
||||
-INT64_C( 8988135271719951953), -INT64_C( 3970863992653719064), -INT64_C( 2157527836284927826), INT64_C( 6762601992202246256) },
|
||||
{ -INT64_C( 3116078896968410867), -INT64_C( 3116078896968410867), -INT64_C( 3116078896968410867), -INT64_C( 6713388164491843233),
|
||||
-INT64_C( 8988135271719951953), -INT64_C( 8988135271719951953), INT64_C( 4774229997178759512), -INT64_C( 8988135271719951953) } },
|
||||
{ { INT64_C( 7599492389766352083), INT64_C( 6171177330504183886), INT64_C( 4035529695841931942), INT64_C( 5544286804228087972),
|
||||
INT64_C( 6883840064914865935), INT64_C( 4749884303147871616), -INT64_C( 3106125636967457588), INT64_C( 2033937142011316851) },
|
||||
UINT8_C(168),
|
||||
{ -INT64_C( 1967857106333985985), -INT64_C( 3760957590054828558), -INT64_C( 1763903126588907392), -INT64_C( 3292397876720397275),
|
||||
INT64_C( 4713249348516023073), -INT64_C( 4133288204896902440), -INT64_C( 7162977996100920516), -INT64_C( 7352375464808256623) },
|
||||
{ INT64_C( 7599492389766352083), INT64_C( 6171177330504183886), INT64_C( 4035529695841931942), -INT64_C( 1967857106333985985),
|
||||
INT64_C( 6883840064914865935), INT64_C( 4713249348516023073), -INT64_C( 3106125636967457588), INT64_C( 4713249348516023073) } },
|
||||
{ { INT64_C( 7549503602037366298), INT64_C( 6692759446045498632), -INT64_C( 7819816680974806548), -INT64_C( 5763581032929714371),
|
||||
INT64_C( 4373666164843084739), -INT64_C( 4423165037818847232), INT64_C( 1949538425697431379), -INT64_C( 9148085459099510331) },
|
||||
UINT8_C( 29),
|
||||
{ INT64_C( 784889719804373107), -INT64_C( 2705000331639798307), INT64_C( 815542160741179480), -INT64_C( 5567169047966595459),
|
||||
-INT64_C( 2148710680891848679), -INT64_C( 5015309716648789500), -INT64_C( 7170503428392567765), INT64_C( 7996586806883181320) },
|
||||
{ INT64_C( 815542160741179480), INT64_C( 6692759446045498632), INT64_C( 784889719804373107), INT64_C( 784889719804373107),
|
||||
-INT64_C( 7170503428392567765), -INT64_C( 4423165037818847232), INT64_C( 1949538425697431379), -INT64_C( 9148085459099510331) } },
|
||||
{ { INT64_C( 4293905999164772948), INT64_C( 5102394255324554138), -INT64_C( 6804373069614464696), INT64_C( 2777707024676739546),
|
||||
INT64_C( 5544865394268417783), INT64_C( 3550174517511950708), -INT64_C( 8763637995539813887), -INT64_C( 5467508773957052634) },
|
||||
UINT8_C( 97),
|
||||
{ -INT64_C( 7048590629501347537), -INT64_C( 2230440838870261775), INT64_C( 4304598005180319627), INT64_C( 7118312164899992153),
|
||||
-INT64_C( 8649881519277197780), -INT64_C( 49138877861883247), INT64_C( 5513519694557409843), INT64_C( 3980103496302245798) },
|
||||
{ INT64_C( 7118312164899992153), INT64_C( 5102394255324554138), -INT64_C( 6804373069614464696), INT64_C( 2777707024676739546),
|
||||
INT64_C( 5544865394268417783), -INT64_C( 8649881519277197780), -INT64_C( 8649881519277197780), -INT64_C( 5467508773957052634) } },
|
||||
{ { INT64_C( 1478164203594812800), INT64_C( 3999063725834826975), INT64_C( 96958554672187325), -INT64_C( 1196194511210138919),
|
||||
-INT64_C( 4870812475003412784), INT64_C( 3807379478515609433), INT64_C( 5952418920687534415), -INT64_C( 4986120395978987665) },
|
||||
UINT8_C( 6),
|
||||
{ INT64_C( 7833014380530609691), -INT64_C( 7921865537967375260), -INT64_C( 6796838718533733150), -INT64_C( 2588922442487495826),
|
||||
-INT64_C( 469631562349797125), INT64_C( 5267772747979982404), INT64_C( 8911304304625927896), INT64_C( 8282654588835933011) },
|
||||
{ INT64_C( 1478164203594812800), INT64_C( 7833014380530609691), INT64_C( 7833014380530609691), -INT64_C( 1196194511210138919),
|
||||
-INT64_C( 4870812475003412784), INT64_C( 3807379478515609433), INT64_C( 5952418920687534415), -INT64_C( 4986120395978987665) } },
|
||||
{ { -INT64_C( 9037997690807680571), INT64_C( 8873272370331720297), INT64_C( 394351777350758101), INT64_C( 4955348817655139800),
|
||||
INT64_C( 6696330323863691120), -INT64_C( 2382460237360015553), INT64_C( 6186676492538509564), -INT64_C( 5274322890633554166) },
|
||||
UINT8_C( 67),
|
||||
{ -INT64_C( 4429835027955425482), -INT64_C( 518152564320620569), INT64_C( 6516894822334124958), -INT64_C( 7998761986363784447),
|
||||
INT64_C( 1753378211606700047), INT64_C( 5792993281516866671), -INT64_C( 2497847576637984085), -INT64_C( 483254147766535840) },
|
||||
{ -INT64_C( 518152564320620569), -INT64_C( 4429835027955425482), INT64_C( 394351777350758101), INT64_C( 4955348817655139800),
|
||||
INT64_C( 6696330323863691120), -INT64_C( 2382460237360015553), INT64_C( 1753378211606700047), -INT64_C( 5274322890633554166) } },
|
||||
{ { INT64_C( 7905098145102859269), -INT64_C( 5325382849591828587), -INT64_C( 6766535940265339940), INT64_C( 2592248327974933395),
|
||||
-INT64_C( 8115736143658980080), -INT64_C( 3786095792272670917), INT64_C( 663045603214952232), INT64_C( 6102580095367495535) },
|
||||
UINT8_C(117),
|
||||
{ INT64_C( 8047551227439224869), -INT64_C( 1666714771024598492), INT64_C( 7866291006134117034), -INT64_C( 4106250819517879956),
|
||||
INT64_C( 1397687017728788930), -INT64_C( 2096982838449040321), INT64_C( 8778127059739369575), INT64_C( 4071021476573662230) },
|
||||
{ INT64_C( 7866291006134117034), -INT64_C( 5325382849591828587), INT64_C( 8047551227439224869), INT64_C( 2592248327974933395),
|
||||
INT64_C( 8778127059739369575), INT64_C( 1397687017728788930), INT64_C( 1397687017728788930), INT64_C( 6102580095367495535) } },
|
||||
{ { INT64_C( 2898480416440987238), INT64_C( 9082706148361975967), INT64_C( 1190643843478548804), INT64_C( 2652268054834527789),
|
||||
INT64_C( 5380210198493148142), -INT64_C( 8129566549369550448), -INT64_C( 1531075724029478804), -INT64_C( 745889964335347772) },
|
||||
UINT8_C( 80),
|
||||
{ -INT64_C( 5964699819020139196), -INT64_C( 8213290138837768150), INT64_C( 5686075501991298113), -INT64_C( 9132605993466647738),
|
||||
INT64_C( 362164674830055740), INT64_C( 3135490412680733394), INT64_C( 530036897698398595), -INT64_C( 2235307532370039748) },
|
||||
{ INT64_C( 2898480416440987238), INT64_C( 9082706148361975967), INT64_C( 1190643843478548804), INT64_C( 2652268054834527789),
|
||||
-INT64_C( 2235307532370039748), -INT64_C( 8129566549369550448), INT64_C( 362164674830055740), -INT64_C( 745889964335347772) } },
|
||||
};
|
||||
|
||||
for (size_t i = 0 ; i < (sizeof(test_vec) / sizeof(test_vec[0])); i++) {
|
||||
simde__m512i r,
|
||||
src = simde_mm512_loadu_epi64(test_vec[i].src),
|
||||
a = simde_mm512_loadu_epi64(test_vec[i].a);
|
||||
switch(i & 3) {
|
||||
case 0: r = simde_mm512_mask_permutex_epi64(src, test_vec[i].k, a, 0); break;
|
||||
case 1: r = simde_mm512_mask_permutex_epi64(src, test_vec[i].k, a, 1); break;
|
||||
case 2: r = simde_mm512_mask_permutex_epi64(src, test_vec[i].k, a, 2); break;
|
||||
case 3: r = simde_mm512_mask_permutex_epi64(src, test_vec[i].k, a, 3); break;
|
||||
default: HEDLEY_UNREACHABLE(); r = simde_mm512_setzero_si512(); break;
|
||||
}
|
||||
simde_test_x86_assert_equal_i64x8(r, simde_mm512_loadu_epi64(test_vec[i].r));
|
||||
}
|
||||
|
||||
return 0;
|
||||
#else
|
||||
fputc('\n', stdout);
|
||||
for (int i = 0 ; i < 8 ; i++) {
|
||||
simde__m512i r,
|
||||
src = simde_test_x86_random_i64x8(),
|
||||
a = simde_test_x86_random_i64x8();
|
||||
simde__mmask8 k = simde_test_x86_random_mmask8();
|
||||
SIMDE_CONSTIFY_4_(simde_mm512_mask_permutex_epi64, r, (HEDLEY_UNREACHABLE(), a), i & 3, src, k, a);
|
||||
|
||||
simde_test_x86_write_i64x8(2, src, SIMDE_TEST_VEC_POS_FIRST);
|
||||
simde_test_x86_write_mmask8(2, k, SIMDE_TEST_VEC_POS_MIDDLE);
|
||||
simde_test_x86_write_i64x8(2, a, SIMDE_TEST_VEC_POS_MIDDLE);
|
||||
simde_test_x86_write_i64x8(2, r, SIMDE_TEST_VEC_POS_LAST);
|
||||
}
|
||||
return 1;
|
||||
#endif
|
||||
}
|
||||
HEDLEY_DIAGNOSTIC_POP //_DISABLE_UNREACHABLE_
|
||||
|
||||
SIMDE_TEST_FUNC_LIST_BEGIN
|
||||
SIMDE_TEST_FUNC_LIST_ENTRY(mm256_permutex_epi64)
|
||||
SIMDE_TEST_FUNC_LIST_ENTRY(mm512_permutex_epi64)
|
||||
SIMDE_TEST_FUNC_LIST_ENTRY(mm512_mask_permutex_epi64)
|
||||
SIMDE_TEST_FUNC_LIST_END
|
||||
|
||||
#include <test/x86/avx512/test-avx512-footer.h>
|
||||
199
thirdparty/simde/test/x86/avx512/permutexvar.c
vendored
199
thirdparty/simde/test/x86/avx512/permutexvar.c
vendored
|
|
@ -4897,6 +4897,201 @@ test_simde_mm512_maskz_permutexvar_ps(SIMDE_MUNIT_TEST_ARGS) {
|
|||
return 0;
|
||||
}
|
||||
|
||||
#if defined(SIMDE_FLOAT16_IS_SCALAR)
|
||||
static int
|
||||
test_simde_mm512_permutexvar_ph (SIMDE_MUNIT_TEST_ARGS) {
|
||||
#if 1
|
||||
static const struct {
|
||||
const int16_t idx[32];
|
||||
const simde_float16 a[32];
|
||||
const simde_float16 r[32];
|
||||
} test_vec[] = {
|
||||
{ { INT16_C( 19231), INT16_C( 6140), -INT16_C( 5262), INT16_C( 10909), INT16_C( 4796), -INT16_C( 15252), INT16_C( 18526), -INT16_C( 769),
|
||||
INT16_C( 9045), -INT16_C( 5190), INT16_C( 24637), -INT16_C( 2148), INT16_C( 27204), INT16_C( 18374), -INT16_C( 2945), -INT16_C( 25067),
|
||||
INT16_C( 4671), -INT16_C( 20043), INT16_C( 21501), -INT16_C( 17957), INT16_C( 18533), -INT16_C( 15491), INT16_C( 32144), -INT16_C( 6721),
|
||||
INT16_C( 31136), -INT16_C( 8752), INT16_C( 27865), INT16_C( 7892), -INT16_C( 25898), INT16_C( 22117), INT16_C( 31630), -INT16_C( 12812) },
|
||||
{ SIMDE_FLOAT16_VALUE( 424.75), SIMDE_FLOAT16_VALUE( 653.00), SIMDE_FLOAT16_VALUE( -887.00), SIMDE_FLOAT16_VALUE( -455.50),
|
||||
SIMDE_FLOAT16_VALUE( 917.00), SIMDE_FLOAT16_VALUE( 100.38), SIMDE_FLOAT16_VALUE( -7.92), SIMDE_FLOAT16_VALUE( -797.50),
|
||||
SIMDE_FLOAT16_VALUE( -758.00), SIMDE_FLOAT16_VALUE( -691.50), SIMDE_FLOAT16_VALUE( -618.50), SIMDE_FLOAT16_VALUE( -734.00),
|
||||
SIMDE_FLOAT16_VALUE( -638.50), SIMDE_FLOAT16_VALUE( -196.62), SIMDE_FLOAT16_VALUE( 411.50), SIMDE_FLOAT16_VALUE( 643.50),
|
||||
SIMDE_FLOAT16_VALUE( 736.50), SIMDE_FLOAT16_VALUE( -868.00), SIMDE_FLOAT16_VALUE( -880.50), SIMDE_FLOAT16_VALUE( -672.50),
|
||||
SIMDE_FLOAT16_VALUE( -526.00), SIMDE_FLOAT16_VALUE( 853.50), SIMDE_FLOAT16_VALUE( -930.50), SIMDE_FLOAT16_VALUE( 767.50),
|
||||
SIMDE_FLOAT16_VALUE( -236.12), SIMDE_FLOAT16_VALUE( -16.80), SIMDE_FLOAT16_VALUE( 133.62), SIMDE_FLOAT16_VALUE( 797.00),
|
||||
SIMDE_FLOAT16_VALUE( 291.75), SIMDE_FLOAT16_VALUE( -516.50), SIMDE_FLOAT16_VALUE( 17.03), SIMDE_FLOAT16_VALUE( -283.50) },
|
||||
{ SIMDE_FLOAT16_VALUE( -283.50), SIMDE_FLOAT16_VALUE( 291.75), SIMDE_FLOAT16_VALUE( -880.50), SIMDE_FLOAT16_VALUE( -516.50),
|
||||
SIMDE_FLOAT16_VALUE( 291.75), SIMDE_FLOAT16_VALUE( -638.50), SIMDE_FLOAT16_VALUE( 17.03), SIMDE_FLOAT16_VALUE( -283.50),
|
||||
SIMDE_FLOAT16_VALUE( 853.50), SIMDE_FLOAT16_VALUE( 133.62), SIMDE_FLOAT16_VALUE( -516.50), SIMDE_FLOAT16_VALUE( 291.75),
|
||||
SIMDE_FLOAT16_VALUE( 917.00), SIMDE_FLOAT16_VALUE( -7.92), SIMDE_FLOAT16_VALUE( -283.50), SIMDE_FLOAT16_VALUE( 853.50),
|
||||
SIMDE_FLOAT16_VALUE( -283.50), SIMDE_FLOAT16_VALUE( 853.50), SIMDE_FLOAT16_VALUE( -516.50), SIMDE_FLOAT16_VALUE( 797.00),
|
||||
SIMDE_FLOAT16_VALUE( 100.38), SIMDE_FLOAT16_VALUE( -516.50), SIMDE_FLOAT16_VALUE( 736.50), SIMDE_FLOAT16_VALUE( -283.50),
|
||||
SIMDE_FLOAT16_VALUE( 424.75), SIMDE_FLOAT16_VALUE( 736.50), SIMDE_FLOAT16_VALUE( -16.80), SIMDE_FLOAT16_VALUE( -526.00),
|
||||
SIMDE_FLOAT16_VALUE( -930.50), SIMDE_FLOAT16_VALUE( 100.38), SIMDE_FLOAT16_VALUE( 411.50), SIMDE_FLOAT16_VALUE( -526.00) } },
|
||||
{ { INT16_C( 1310), INT16_C( 6990), -INT16_C( 28321), INT16_C( 381), -INT16_C( 23726), -INT16_C( 28621), INT16_C( 19081), -INT16_C( 6033),
|
||||
INT16_C( 11057), -INT16_C( 31712), INT16_C( 30651), -INT16_C( 6482), INT16_C( 11571), INT16_C( 27296), INT16_C( 10145), -INT16_C( 16594),
|
||||
INT16_C( 31788), -INT16_C( 29478), INT16_C( 22541), INT16_C( 24717), -INT16_C( 15877), -INT16_C( 31504), INT16_C( 24331), INT16_C( 15724),
|
||||
-INT16_C( 29302), INT16_C( 18113), INT16_C( 28420), INT16_C( 14124), -INT16_C( 13155), INT16_C( 16033), -INT16_C( 12301), INT16_C( 8446) },
|
||||
{ SIMDE_FLOAT16_VALUE( 722.50), SIMDE_FLOAT16_VALUE( -193.12), SIMDE_FLOAT16_VALUE( -391.25), SIMDE_FLOAT16_VALUE( 802.50),
|
||||
SIMDE_FLOAT16_VALUE( 394.50), SIMDE_FLOAT16_VALUE( -440.75), SIMDE_FLOAT16_VALUE( -555.00), SIMDE_FLOAT16_VALUE( -380.25),
|
||||
SIMDE_FLOAT16_VALUE( 248.38), SIMDE_FLOAT16_VALUE( -989.50), SIMDE_FLOAT16_VALUE( 286.00), SIMDE_FLOAT16_VALUE( -913.00),
|
||||
SIMDE_FLOAT16_VALUE( -857.00), SIMDE_FLOAT16_VALUE( 129.62), SIMDE_FLOAT16_VALUE( 208.00), SIMDE_FLOAT16_VALUE( -38.38),
|
||||
SIMDE_FLOAT16_VALUE( -522.00), SIMDE_FLOAT16_VALUE( 84.69), SIMDE_FLOAT16_VALUE( -679.50), SIMDE_FLOAT16_VALUE( 400.75),
|
||||
SIMDE_FLOAT16_VALUE( 484.75), SIMDE_FLOAT16_VALUE( -16.88), SIMDE_FLOAT16_VALUE( -118.94), SIMDE_FLOAT16_VALUE( 542.00),
|
||||
SIMDE_FLOAT16_VALUE( -253.00), SIMDE_FLOAT16_VALUE( -789.50), SIMDE_FLOAT16_VALUE( 740.00), SIMDE_FLOAT16_VALUE( -371.00),
|
||||
SIMDE_FLOAT16_VALUE( -894.00), SIMDE_FLOAT16_VALUE( -784.50), SIMDE_FLOAT16_VALUE( 759.00), SIMDE_FLOAT16_VALUE( 828.50) },
|
||||
{ SIMDE_FLOAT16_VALUE( 759.00), SIMDE_FLOAT16_VALUE( 208.00), SIMDE_FLOAT16_VALUE( 828.50), SIMDE_FLOAT16_VALUE( -784.50),
|
||||
SIMDE_FLOAT16_VALUE( -679.50), SIMDE_FLOAT16_VALUE( 400.75), SIMDE_FLOAT16_VALUE( -989.50), SIMDE_FLOAT16_VALUE( -38.38),
|
||||
SIMDE_FLOAT16_VALUE( 84.69), SIMDE_FLOAT16_VALUE( 722.50), SIMDE_FLOAT16_VALUE( -371.00), SIMDE_FLOAT16_VALUE( 208.00),
|
||||
SIMDE_FLOAT16_VALUE( 400.75), SIMDE_FLOAT16_VALUE( 722.50), SIMDE_FLOAT16_VALUE( -193.12), SIMDE_FLOAT16_VALUE( 208.00),
|
||||
SIMDE_FLOAT16_VALUE( -857.00), SIMDE_FLOAT16_VALUE( 740.00), SIMDE_FLOAT16_VALUE( 129.62), SIMDE_FLOAT16_VALUE( 129.62),
|
||||
SIMDE_FLOAT16_VALUE( -371.00), SIMDE_FLOAT16_VALUE( -522.00), SIMDE_FLOAT16_VALUE( -913.00), SIMDE_FLOAT16_VALUE( -857.00),
|
||||
SIMDE_FLOAT16_VALUE( 286.00), SIMDE_FLOAT16_VALUE( -193.12), SIMDE_FLOAT16_VALUE( 394.50), SIMDE_FLOAT16_VALUE( -857.00),
|
||||
SIMDE_FLOAT16_VALUE( -784.50), SIMDE_FLOAT16_VALUE( -193.12), SIMDE_FLOAT16_VALUE( 400.75), SIMDE_FLOAT16_VALUE( 759.00) } },
|
||||
{ { -INT16_C( 28378), INT16_C( 22264), -INT16_C( 20021), -INT16_C( 14974), INT16_C( 13146), INT16_C( 25291), INT16_C( 3664), -INT16_C( 1291),
|
||||
-INT16_C( 12781), -INT16_C( 30808), -INT16_C( 29228), -INT16_C( 22888), -INT16_C( 6381), INT16_C( 26731), INT16_C( 20789), INT16_C( 23304),
|
||||
INT16_C( 226), -INT16_C( 21071), INT16_C( 13489), INT16_C( 2931), INT16_C( 15975), -INT16_C( 18578), INT16_C( 25421), INT16_C( 24753),
|
||||
INT16_C( 22834), INT16_C( 1767), INT16_C( 32742), -INT16_C( 1620), INT16_C( 5990), -INT16_C( 25759), INT16_C( 26984), INT16_C( 19446) },
|
||||
{ SIMDE_FLOAT16_VALUE( -441.50), SIMDE_FLOAT16_VALUE( 404.25), SIMDE_FLOAT16_VALUE( 240.50), SIMDE_FLOAT16_VALUE( -376.25),
|
||||
SIMDE_FLOAT16_VALUE( 417.25), SIMDE_FLOAT16_VALUE( -660.50), SIMDE_FLOAT16_VALUE( -224.75), SIMDE_FLOAT16_VALUE( 752.50),
|
||||
SIMDE_FLOAT16_VALUE( 701.50), SIMDE_FLOAT16_VALUE( 156.38), SIMDE_FLOAT16_VALUE( 540.50), SIMDE_FLOAT16_VALUE( -466.25),
|
||||
SIMDE_FLOAT16_VALUE( -271.50), SIMDE_FLOAT16_VALUE( 258.00), SIMDE_FLOAT16_VALUE( 921.50), SIMDE_FLOAT16_VALUE( 812.00),
|
||||
SIMDE_FLOAT16_VALUE( -693.50), SIMDE_FLOAT16_VALUE( 348.75), SIMDE_FLOAT16_VALUE( 390.25), SIMDE_FLOAT16_VALUE( 567.50),
|
||||
SIMDE_FLOAT16_VALUE( -642.00), SIMDE_FLOAT16_VALUE( -790.00), SIMDE_FLOAT16_VALUE( 250.50), SIMDE_FLOAT16_VALUE( -310.75),
|
||||
SIMDE_FLOAT16_VALUE( -99.81), SIMDE_FLOAT16_VALUE( 462.75), SIMDE_FLOAT16_VALUE( -442.50), SIMDE_FLOAT16_VALUE( 219.75),
|
||||
SIMDE_FLOAT16_VALUE( -967.50), SIMDE_FLOAT16_VALUE( -14.66), SIMDE_FLOAT16_VALUE( 536.00), SIMDE_FLOAT16_VALUE( -409.00) },
|
||||
{ SIMDE_FLOAT16_VALUE( -224.75), SIMDE_FLOAT16_VALUE( -99.81), SIMDE_FLOAT16_VALUE( -466.25), SIMDE_FLOAT16_VALUE( 240.50),
|
||||
SIMDE_FLOAT16_VALUE( -442.50), SIMDE_FLOAT16_VALUE( -466.25), SIMDE_FLOAT16_VALUE( -693.50), SIMDE_FLOAT16_VALUE( -790.00),
|
||||
SIMDE_FLOAT16_VALUE( 567.50), SIMDE_FLOAT16_VALUE( 701.50), SIMDE_FLOAT16_VALUE( -642.00), SIMDE_FLOAT16_VALUE( -99.81),
|
||||
SIMDE_FLOAT16_VALUE( 567.50), SIMDE_FLOAT16_VALUE( -466.25), SIMDE_FLOAT16_VALUE( -790.00), SIMDE_FLOAT16_VALUE( 701.50),
|
||||
SIMDE_FLOAT16_VALUE( 240.50), SIMDE_FLOAT16_VALUE( 348.75), SIMDE_FLOAT16_VALUE( 348.75), SIMDE_FLOAT16_VALUE( 567.50),
|
||||
SIMDE_FLOAT16_VALUE( 752.50), SIMDE_FLOAT16_VALUE( 921.50), SIMDE_FLOAT16_VALUE( 258.00), SIMDE_FLOAT16_VALUE( 348.75),
|
||||
SIMDE_FLOAT16_VALUE( 390.25), SIMDE_FLOAT16_VALUE( 752.50), SIMDE_FLOAT16_VALUE( -224.75), SIMDE_FLOAT16_VALUE( -271.50),
|
||||
SIMDE_FLOAT16_VALUE( -224.75), SIMDE_FLOAT16_VALUE( 404.25), SIMDE_FLOAT16_VALUE( 701.50), SIMDE_FLOAT16_VALUE( 250.50) } },
|
||||
{ { -INT16_C( 24739), INT16_C( 14641), INT16_C( 22539), -INT16_C( 19076), INT16_C( 30444), -INT16_C( 6996), INT16_C( 801), INT16_C( 9486),
|
||||
INT16_C( 15937), -INT16_C( 497), -INT16_C( 3558), INT16_C( 3617), -INT16_C( 8138), -INT16_C( 7318), INT16_C( 4502), -INT16_C( 3078),
|
||||
INT16_C( 11184), -INT16_C( 17619), -INT16_C( 22141), INT16_C( 28784), INT16_C( 7200), INT16_C( 16724), INT16_C( 25375), INT16_C( 24679),
|
||||
INT16_C( 30369), -INT16_C( 17314), -INT16_C( 32663), -INT16_C( 24630), INT16_C( 13408), -INT16_C( 2429), INT16_C( 32069), -INT16_C( 2582) },
|
||||
{ SIMDE_FLOAT16_VALUE( 76.81), SIMDE_FLOAT16_VALUE( 996.50), SIMDE_FLOAT16_VALUE( -58.75), SIMDE_FLOAT16_VALUE( 849.50),
|
||||
SIMDE_FLOAT16_VALUE( -36.19), SIMDE_FLOAT16_VALUE( -404.25), SIMDE_FLOAT16_VALUE( 769.00), SIMDE_FLOAT16_VALUE( 31.09),
|
||||
SIMDE_FLOAT16_VALUE( 601.50), SIMDE_FLOAT16_VALUE( 563.00), SIMDE_FLOAT16_VALUE( 456.25), SIMDE_FLOAT16_VALUE( 880.50),
|
||||
SIMDE_FLOAT16_VALUE( 43.81), SIMDE_FLOAT16_VALUE( -454.50), SIMDE_FLOAT16_VALUE( -218.62), SIMDE_FLOAT16_VALUE( 602.00),
|
||||
SIMDE_FLOAT16_VALUE( 866.50), SIMDE_FLOAT16_VALUE( -338.50), SIMDE_FLOAT16_VALUE( 448.00), SIMDE_FLOAT16_VALUE( -330.00),
|
||||
SIMDE_FLOAT16_VALUE( -789.50), SIMDE_FLOAT16_VALUE( 481.75), SIMDE_FLOAT16_VALUE( -581.50), SIMDE_FLOAT16_VALUE( 986.00),
|
||||
SIMDE_FLOAT16_VALUE( -77.44), SIMDE_FLOAT16_VALUE( 143.88), SIMDE_FLOAT16_VALUE( -26.84), SIMDE_FLOAT16_VALUE( 307.00),
|
||||
SIMDE_FLOAT16_VALUE( 437.75), SIMDE_FLOAT16_VALUE( 561.50), SIMDE_FLOAT16_VALUE( 411.75), SIMDE_FLOAT16_VALUE( -485.25) },
|
||||
{ SIMDE_FLOAT16_VALUE( 561.50), SIMDE_FLOAT16_VALUE( -338.50), SIMDE_FLOAT16_VALUE( 880.50), SIMDE_FLOAT16_VALUE( 437.75),
|
||||
SIMDE_FLOAT16_VALUE( 43.81), SIMDE_FLOAT16_VALUE( 43.81), SIMDE_FLOAT16_VALUE( 996.50), SIMDE_FLOAT16_VALUE( -218.62),
|
||||
SIMDE_FLOAT16_VALUE( 996.50), SIMDE_FLOAT16_VALUE( 602.00), SIMDE_FLOAT16_VALUE( -26.84), SIMDE_FLOAT16_VALUE( 996.50),
|
||||
SIMDE_FLOAT16_VALUE( -581.50), SIMDE_FLOAT16_VALUE( 456.25), SIMDE_FLOAT16_VALUE( -581.50), SIMDE_FLOAT16_VALUE( -26.84),
|
||||
SIMDE_FLOAT16_VALUE( 866.50), SIMDE_FLOAT16_VALUE( -454.50), SIMDE_FLOAT16_VALUE( 849.50), SIMDE_FLOAT16_VALUE( 866.50),
|
||||
SIMDE_FLOAT16_VALUE( 76.81), SIMDE_FLOAT16_VALUE( -789.50), SIMDE_FLOAT16_VALUE( -485.25), SIMDE_FLOAT16_VALUE( 31.09),
|
||||
SIMDE_FLOAT16_VALUE( 996.50), SIMDE_FLOAT16_VALUE( 411.75), SIMDE_FLOAT16_VALUE( 563.00), SIMDE_FLOAT16_VALUE( 456.25),
|
||||
SIMDE_FLOAT16_VALUE( 76.81), SIMDE_FLOAT16_VALUE( 849.50), SIMDE_FLOAT16_VALUE( -404.25), SIMDE_FLOAT16_VALUE( 456.25) } },
|
||||
{ { -INT16_C( 25868), -INT16_C( 18980), INT16_C( 30908), -INT16_C( 1387), -INT16_C( 18583), -INT16_C( 17321), INT16_C( 5440), INT16_C( 16561),
|
||||
INT16_C( 25138), -INT16_C( 12632), -INT16_C( 20259), -INT16_C( 29493), -INT16_C( 16581), INT16_C( 17280), INT16_C( 27292), -INT16_C( 28172),
|
||||
-INT16_C( 12284), -INT16_C( 16314), -INT16_C( 9399), -INT16_C( 19782), INT16_C( 4755), -INT16_C( 11410), INT16_C( 8231), INT16_C( 22803),
|
||||
-INT16_C( 17278), INT16_C( 24616), -INT16_C( 3220), -INT16_C( 22292), INT16_C( 28082), INT16_C( 20459), -INT16_C( 8233), -INT16_C( 9248) },
|
||||
{ SIMDE_FLOAT16_VALUE( 141.62), SIMDE_FLOAT16_VALUE( -65.62), SIMDE_FLOAT16_VALUE( -969.00), SIMDE_FLOAT16_VALUE( 244.75),
|
||||
SIMDE_FLOAT16_VALUE( 171.62), SIMDE_FLOAT16_VALUE( -204.38), SIMDE_FLOAT16_VALUE( 43.88), SIMDE_FLOAT16_VALUE( -582.50),
|
||||
SIMDE_FLOAT16_VALUE( 991.50), SIMDE_FLOAT16_VALUE( 582.50), SIMDE_FLOAT16_VALUE( 217.62), SIMDE_FLOAT16_VALUE( -600.50),
|
||||
SIMDE_FLOAT16_VALUE( -536.50), SIMDE_FLOAT16_VALUE( 438.75), SIMDE_FLOAT16_VALUE( -318.75), SIMDE_FLOAT16_VALUE( 134.00),
|
||||
SIMDE_FLOAT16_VALUE( 751.00), SIMDE_FLOAT16_VALUE( 48.03), SIMDE_FLOAT16_VALUE( 76.38), SIMDE_FLOAT16_VALUE( -427.50),
|
||||
SIMDE_FLOAT16_VALUE( 485.50), SIMDE_FLOAT16_VALUE( 213.00), SIMDE_FLOAT16_VALUE( 47.12), SIMDE_FLOAT16_VALUE( -33.06),
|
||||
SIMDE_FLOAT16_VALUE( -149.12), SIMDE_FLOAT16_VALUE( -387.00), SIMDE_FLOAT16_VALUE( 53.72), SIMDE_FLOAT16_VALUE( 401.75),
|
||||
SIMDE_FLOAT16_VALUE( 784.50), SIMDE_FLOAT16_VALUE( 303.50), SIMDE_FLOAT16_VALUE( 218.25), SIMDE_FLOAT16_VALUE( -73.94) },
|
||||
{ SIMDE_FLOAT16_VALUE( 485.50), SIMDE_FLOAT16_VALUE( 784.50), SIMDE_FLOAT16_VALUE( 784.50), SIMDE_FLOAT16_VALUE( 213.00),
|
||||
SIMDE_FLOAT16_VALUE( 582.50), SIMDE_FLOAT16_VALUE( -33.06), SIMDE_FLOAT16_VALUE( 141.62), SIMDE_FLOAT16_VALUE( 48.03),
|
||||
SIMDE_FLOAT16_VALUE( 76.38), SIMDE_FLOAT16_VALUE( 991.50), SIMDE_FLOAT16_VALUE( 303.50), SIMDE_FLOAT16_VALUE( -600.50),
|
||||
SIMDE_FLOAT16_VALUE( 401.75), SIMDE_FLOAT16_VALUE( 141.62), SIMDE_FLOAT16_VALUE( 784.50), SIMDE_FLOAT16_VALUE( 485.50),
|
||||
SIMDE_FLOAT16_VALUE( 171.62), SIMDE_FLOAT16_VALUE( 43.88), SIMDE_FLOAT16_VALUE( 582.50), SIMDE_FLOAT16_VALUE( 53.72),
|
||||
SIMDE_FLOAT16_VALUE( -427.50), SIMDE_FLOAT16_VALUE( -318.75), SIMDE_FLOAT16_VALUE( -582.50), SIMDE_FLOAT16_VALUE( -427.50),
|
||||
SIMDE_FLOAT16_VALUE( -969.00), SIMDE_FLOAT16_VALUE( 991.50), SIMDE_FLOAT16_VALUE( -536.50), SIMDE_FLOAT16_VALUE( -536.50),
|
||||
SIMDE_FLOAT16_VALUE( 76.38), SIMDE_FLOAT16_VALUE( -600.50), SIMDE_FLOAT16_VALUE( -33.06), SIMDE_FLOAT16_VALUE( 141.62) } },
|
||||
{ { -INT16_C( 15348), INT16_C( 3776), INT16_C( 27418), -INT16_C( 31838), INT16_C( 2692), -INT16_C( 16877), -INT16_C( 890), -INT16_C( 17030),
|
||||
-INT16_C( 27122), INT16_C( 4961), -INT16_C( 21090), INT16_C( 5322), -INT16_C( 11803), -INT16_C( 928), -INT16_C( 30537), -INT16_C( 15165),
|
||||
-INT16_C( 31924), INT16_C( 26578), INT16_C( 29934), INT16_C( 29418), -INT16_C( 641), INT16_C( 1328), -INT16_C( 21767), INT16_C( 1986),
|
||||
INT16_C( 9280), -INT16_C( 8422), -INT16_C( 6703), -INT16_C( 18701), INT16_C( 21430), INT16_C( 28082), INT16_C( 30172), INT16_C( 10289) },
|
||||
{ SIMDE_FLOAT16_VALUE( -884.00), SIMDE_FLOAT16_VALUE( 947.50), SIMDE_FLOAT16_VALUE( -350.75), SIMDE_FLOAT16_VALUE( -321.25),
|
||||
SIMDE_FLOAT16_VALUE( -603.50), SIMDE_FLOAT16_VALUE( -866.00), SIMDE_FLOAT16_VALUE( -961.00), SIMDE_FLOAT16_VALUE( 890.00),
|
||||
SIMDE_FLOAT16_VALUE( -946.50), SIMDE_FLOAT16_VALUE( -340.00), SIMDE_FLOAT16_VALUE( 866.50), SIMDE_FLOAT16_VALUE( 90.06),
|
||||
SIMDE_FLOAT16_VALUE( 675.50), SIMDE_FLOAT16_VALUE( -922.00), SIMDE_FLOAT16_VALUE( -709.00), SIMDE_FLOAT16_VALUE( -837.50),
|
||||
SIMDE_FLOAT16_VALUE( 96.19), SIMDE_FLOAT16_VALUE( 142.25), SIMDE_FLOAT16_VALUE( 333.00), SIMDE_FLOAT16_VALUE( 968.50),
|
||||
SIMDE_FLOAT16_VALUE( -389.50), SIMDE_FLOAT16_VALUE( -961.50), SIMDE_FLOAT16_VALUE( 307.25), SIMDE_FLOAT16_VALUE( 749.50),
|
||||
SIMDE_FLOAT16_VALUE( 681.00), SIMDE_FLOAT16_VALUE( -102.38), SIMDE_FLOAT16_VALUE( 863.00), SIMDE_FLOAT16_VALUE( 477.75),
|
||||
SIMDE_FLOAT16_VALUE( 665.50), SIMDE_FLOAT16_VALUE( 188.62), SIMDE_FLOAT16_VALUE( -321.25), SIMDE_FLOAT16_VALUE( 781.00) },
|
||||
{ SIMDE_FLOAT16_VALUE( 675.50), SIMDE_FLOAT16_VALUE( -884.00), SIMDE_FLOAT16_VALUE( 863.00), SIMDE_FLOAT16_VALUE( -350.75),
|
||||
SIMDE_FLOAT16_VALUE( -603.50), SIMDE_FLOAT16_VALUE( 968.50), SIMDE_FLOAT16_VALUE( -961.00), SIMDE_FLOAT16_VALUE( 863.00),
|
||||
SIMDE_FLOAT16_VALUE( -709.00), SIMDE_FLOAT16_VALUE( 947.50), SIMDE_FLOAT16_VALUE( -321.25), SIMDE_FLOAT16_VALUE( 866.50),
|
||||
SIMDE_FLOAT16_VALUE( -866.00), SIMDE_FLOAT16_VALUE( -884.00), SIMDE_FLOAT16_VALUE( 749.50), SIMDE_FLOAT16_VALUE( -321.25),
|
||||
SIMDE_FLOAT16_VALUE( 675.50), SIMDE_FLOAT16_VALUE( 333.00), SIMDE_FLOAT16_VALUE( -709.00), SIMDE_FLOAT16_VALUE( 866.50),
|
||||
SIMDE_FLOAT16_VALUE( 781.00), SIMDE_FLOAT16_VALUE( 96.19), SIMDE_FLOAT16_VALUE( -102.38), SIMDE_FLOAT16_VALUE( -350.75),
|
||||
SIMDE_FLOAT16_VALUE( -884.00), SIMDE_FLOAT16_VALUE( 863.00), SIMDE_FLOAT16_VALUE( 142.25), SIMDE_FLOAT16_VALUE( 968.50),
|
||||
SIMDE_FLOAT16_VALUE( 307.25), SIMDE_FLOAT16_VALUE( 333.00), SIMDE_FLOAT16_VALUE( 665.50), SIMDE_FLOAT16_VALUE( 142.25) } },
|
||||
{ { INT16_C( 11983), INT16_C( 18289), -INT16_C( 13657), INT16_C( 7742), INT16_C( 14932), -INT16_C( 30578), INT16_C( 1529), -INT16_C( 9220),
|
||||
INT16_C( 20631), INT16_C( 3727), -INT16_C( 1386), INT16_C( 12347), -INT16_C( 10729), -INT16_C( 22106), INT16_C( 17826), INT16_C( 28980),
|
||||
-INT16_C( 22925), INT16_C( 6841), -INT16_C( 2192), -INT16_C( 15304), -INT16_C( 14798), INT16_C( 11084), INT16_C( 18892), INT16_C( 25350),
|
||||
-INT16_C( 26983), INT16_C( 12146), -INT16_C( 21104), -INT16_C( 22688), INT16_C( 1667), INT16_C( 9552), -INT16_C( 31413), -INT16_C( 16745) },
|
||||
{ SIMDE_FLOAT16_VALUE( -606.50), SIMDE_FLOAT16_VALUE( 519.00), SIMDE_FLOAT16_VALUE( 48.22), SIMDE_FLOAT16_VALUE( 435.25),
|
||||
SIMDE_FLOAT16_VALUE( 59.91), SIMDE_FLOAT16_VALUE( 560.00), SIMDE_FLOAT16_VALUE( 636.00), SIMDE_FLOAT16_VALUE( 890.00),
|
||||
SIMDE_FLOAT16_VALUE( -322.75), SIMDE_FLOAT16_VALUE( -328.00), SIMDE_FLOAT16_VALUE( -913.50), SIMDE_FLOAT16_VALUE( -308.75),
|
||||
SIMDE_FLOAT16_VALUE( -294.75), SIMDE_FLOAT16_VALUE( -253.88), SIMDE_FLOAT16_VALUE( -256.00), SIMDE_FLOAT16_VALUE( 68.94),
|
||||
SIMDE_FLOAT16_VALUE( 837.00), SIMDE_FLOAT16_VALUE( 446.00), SIMDE_FLOAT16_VALUE( 801.50), SIMDE_FLOAT16_VALUE( -333.00),
|
||||
SIMDE_FLOAT16_VALUE( -452.75), SIMDE_FLOAT16_VALUE( -415.50), SIMDE_FLOAT16_VALUE( -867.00), SIMDE_FLOAT16_VALUE( 910.00),
|
||||
SIMDE_FLOAT16_VALUE( -104.88), SIMDE_FLOAT16_VALUE( 901.00), SIMDE_FLOAT16_VALUE( -276.50), SIMDE_FLOAT16_VALUE( 412.50),
|
||||
SIMDE_FLOAT16_VALUE( 751.50), SIMDE_FLOAT16_VALUE( -876.50), SIMDE_FLOAT16_VALUE( 464.25), SIMDE_FLOAT16_VALUE( -855.50) },
|
||||
{ SIMDE_FLOAT16_VALUE( 68.94), SIMDE_FLOAT16_VALUE( 446.00), SIMDE_FLOAT16_VALUE( 890.00), SIMDE_FLOAT16_VALUE( 464.25),
|
||||
SIMDE_FLOAT16_VALUE( -452.75), SIMDE_FLOAT16_VALUE( -256.00), SIMDE_FLOAT16_VALUE( 901.00), SIMDE_FLOAT16_VALUE( 751.50),
|
||||
SIMDE_FLOAT16_VALUE( 910.00), SIMDE_FLOAT16_VALUE( 68.94), SIMDE_FLOAT16_VALUE( -867.00), SIMDE_FLOAT16_VALUE( 412.50),
|
||||
SIMDE_FLOAT16_VALUE( 910.00), SIMDE_FLOAT16_VALUE( 636.00), SIMDE_FLOAT16_VALUE( 48.22), SIMDE_FLOAT16_VALUE( -452.75),
|
||||
SIMDE_FLOAT16_VALUE( -333.00), SIMDE_FLOAT16_VALUE( 901.00), SIMDE_FLOAT16_VALUE( 837.00), SIMDE_FLOAT16_VALUE( -104.88),
|
||||
SIMDE_FLOAT16_VALUE( 801.50), SIMDE_FLOAT16_VALUE( -294.75), SIMDE_FLOAT16_VALUE( -294.75), SIMDE_FLOAT16_VALUE( 636.00),
|
||||
SIMDE_FLOAT16_VALUE( 901.00), SIMDE_FLOAT16_VALUE( 801.50), SIMDE_FLOAT16_VALUE( 837.00), SIMDE_FLOAT16_VALUE( -606.50),
|
||||
SIMDE_FLOAT16_VALUE( 435.25), SIMDE_FLOAT16_VALUE( 837.00), SIMDE_FLOAT16_VALUE( -308.75), SIMDE_FLOAT16_VALUE( 910.00) } },
|
||||
{ { INT16_C( 1975), -INT16_C( 492), INT16_C( 29721), -INT16_C( 3720), INT16_C( 7200), INT16_C( 5781), -INT16_C( 25401), INT16_C( 2212),
|
||||
INT16_C( 25110), INT16_C( 15833), INT16_C( 20864), -INT16_C( 23065), -INT16_C( 18662), INT16_C( 26389), INT16_C( 17182), -INT16_C( 10784),
|
||||
-INT16_C( 2997), INT16_C( 25812), INT16_C( 19560), -INT16_C( 30635), -INT16_C( 5528), INT16_C( 12446), INT16_C( 17286), -INT16_C( 25544),
|
||||
INT16_C( 4773), INT16_C( 9945), -INT16_C( 16029), INT16_C( 32203), -INT16_C( 8072), -INT16_C( 26651), -INT16_C( 15069), INT16_C( 28268) },
|
||||
{ SIMDE_FLOAT16_VALUE( -801.00), SIMDE_FLOAT16_VALUE( -714.50), SIMDE_FLOAT16_VALUE( -831.50), SIMDE_FLOAT16_VALUE( -146.88),
|
||||
SIMDE_FLOAT16_VALUE( -842.50), SIMDE_FLOAT16_VALUE( 323.50), SIMDE_FLOAT16_VALUE( 395.25), SIMDE_FLOAT16_VALUE( -292.25),
|
||||
SIMDE_FLOAT16_VALUE( 920.00), SIMDE_FLOAT16_VALUE( -469.00), SIMDE_FLOAT16_VALUE( -317.25), SIMDE_FLOAT16_VALUE( -298.75),
|
||||
SIMDE_FLOAT16_VALUE( 329.00), SIMDE_FLOAT16_VALUE( 919.50), SIMDE_FLOAT16_VALUE( 113.94), SIMDE_FLOAT16_VALUE( 591.00),
|
||||
SIMDE_FLOAT16_VALUE( 84.44), SIMDE_FLOAT16_VALUE( 705.00), SIMDE_FLOAT16_VALUE( 901.50), SIMDE_FLOAT16_VALUE( -689.00),
|
||||
SIMDE_FLOAT16_VALUE( -615.00), SIMDE_FLOAT16_VALUE( 155.88), SIMDE_FLOAT16_VALUE( 500.25), SIMDE_FLOAT16_VALUE( 876.50),
|
||||
SIMDE_FLOAT16_VALUE( -234.00), SIMDE_FLOAT16_VALUE( -597.00), SIMDE_FLOAT16_VALUE( -696.00), SIMDE_FLOAT16_VALUE( -803.50),
|
||||
SIMDE_FLOAT16_VALUE( 163.88), SIMDE_FLOAT16_VALUE( 309.25), SIMDE_FLOAT16_VALUE( 959.50), SIMDE_FLOAT16_VALUE( 363.00) },
|
||||
{ SIMDE_FLOAT16_VALUE( 876.50), SIMDE_FLOAT16_VALUE( -615.00), SIMDE_FLOAT16_VALUE( -597.00), SIMDE_FLOAT16_VALUE( -234.00),
|
||||
SIMDE_FLOAT16_VALUE( -801.00), SIMDE_FLOAT16_VALUE( 155.88), SIMDE_FLOAT16_VALUE( -292.25), SIMDE_FLOAT16_VALUE( -842.50),
|
||||
SIMDE_FLOAT16_VALUE( 500.25), SIMDE_FLOAT16_VALUE( -597.00), SIMDE_FLOAT16_VALUE( -801.00), SIMDE_FLOAT16_VALUE( -292.25),
|
||||
SIMDE_FLOAT16_VALUE( -696.00), SIMDE_FLOAT16_VALUE( 155.88), SIMDE_FLOAT16_VALUE( 959.50), SIMDE_FLOAT16_VALUE( -801.00),
|
||||
SIMDE_FLOAT16_VALUE( -298.75), SIMDE_FLOAT16_VALUE( -615.00), SIMDE_FLOAT16_VALUE( 920.00), SIMDE_FLOAT16_VALUE( 155.88),
|
||||
SIMDE_FLOAT16_VALUE( 920.00), SIMDE_FLOAT16_VALUE( 959.50), SIMDE_FLOAT16_VALUE( 395.25), SIMDE_FLOAT16_VALUE( -234.00),
|
||||
SIMDE_FLOAT16_VALUE( 323.50), SIMDE_FLOAT16_VALUE( -597.00), SIMDE_FLOAT16_VALUE( -146.88), SIMDE_FLOAT16_VALUE( -298.75),
|
||||
SIMDE_FLOAT16_VALUE( -234.00), SIMDE_FLOAT16_VALUE( 323.50), SIMDE_FLOAT16_VALUE( -146.88), SIMDE_FLOAT16_VALUE( 329.00) } },
|
||||
};
|
||||
|
||||
for (size_t i = 0 ; i < (sizeof(test_vec) / sizeof(test_vec[0])) ; i++) {
|
||||
simde__m512i idx = simde_mm512_loadu_epi16(test_vec[i].idx);
|
||||
simde__m512h a = simde_mm512_loadu_ph(test_vec[i].a);
|
||||
simde__m512h r = simde_mm512_permutexvar_ph(idx, a);
|
||||
simde_test_x86_assert_equal_f16x32(r, simde_mm512_loadu_ph(test_vec[i].r), 1);
|
||||
}
|
||||
|
||||
return 0;
|
||||
#else
|
||||
fputc('\n', stdout);
|
||||
for (int i = 0 ; i < 8 ; i++) {
|
||||
simde__m512i idx = simde_test_x86_random_i16x32();
|
||||
simde__m512h a = simde_test_x86_random_f16x32(SIMDE_FLOAT16_VALUE(-1000.0), SIMDE_FLOAT16_VALUE(1000.0));
|
||||
simde__m512h r = simde_mm512_permutexvar_ph(idx, a);
|
||||
|
||||
simde_test_x86_write_i16x32(2, idx, SIMDE_TEST_VEC_POS_FIRST);
|
||||
simde_test_x86_write_f16x32(2, a, SIMDE_TEST_VEC_POS_MIDDLE);
|
||||
simde_test_x86_write_f16x32(2, r, SIMDE_TEST_VEC_POS_LAST);
|
||||
}
|
||||
return 1;
|
||||
#endif
|
||||
}
|
||||
#endif
|
||||
|
||||
SIMDE_TEST_FUNC_LIST_BEGIN
|
||||
SIMDE_TEST_FUNC_LIST_ENTRY(mm_permutexvar_epi16)
|
||||
SIMDE_TEST_FUNC_LIST_ENTRY(mm_mask_permutexvar_epi16)
|
||||
|
|
@ -4953,6 +5148,10 @@ SIMDE_TEST_FUNC_LIST_BEGIN
|
|||
SIMDE_TEST_FUNC_LIST_ENTRY(mm512_permutexvar_ps)
|
||||
SIMDE_TEST_FUNC_LIST_ENTRY(mm512_mask_permutexvar_ps)
|
||||
SIMDE_TEST_FUNC_LIST_ENTRY(mm512_maskz_permutexvar_ps)
|
||||
|
||||
#if defined(SIMDE_FLOAT16_IS_SCALAR)
|
||||
SIMDE_TEST_FUNC_LIST_ENTRY(mm512_permutexvar_ph)
|
||||
#endif
|
||||
SIMDE_TEST_FUNC_LIST_END
|
||||
|
||||
#include <test/x86/avx512/test-avx512-footer.h>
|
||||
|
|
|
|||
132
thirdparty/simde/test/x86/avx512/rcp.c
vendored
Normal file
132
thirdparty/simde/test/x86/avx512/rcp.c
vendored
Normal file
|
|
@ -0,0 +1,132 @@
|
|||
/* SPDX-License-Identifier: MIT
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person
|
||||
* obtaining a copy of this software and associated documentation
|
||||
* files (the "Software"), to deal in the Software without
|
||||
* restriction, including without limitation the rights to use, copy,
|
||||
* modify, merge, publish, distribute, sublicense, and/or sell copies
|
||||
* of the Software, and to permit persons to whom the Software is
|
||||
* furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be
|
||||
* included in all copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
|
||||
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
|
||||
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
|
||||
* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
|
||||
* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
|
||||
* SOFTWARE.
|
||||
*
|
||||
* Copyright:
|
||||
* 2020 Evan Nemerson <evan@nemerson.com>
|
||||
* 2020 Christopher Moore <moore@free.fr>
|
||||
*/
|
||||
|
||||
#define SIMDE_TEST_X86_AVX512_INSN rcp
|
||||
|
||||
#include <test/x86/avx512/test-avx512.h>
|
||||
#include <simde/x86/avx512/set.h>
|
||||
#include <simde/x86/avx512/rcp.h>
|
||||
|
||||
static int
|
||||
test_simde_mm512_rcp14_ps (SIMDE_MUNIT_TEST_ARGS) {
|
||||
#if 1
|
||||
static const struct {
|
||||
const simde_float32 a[16];
|
||||
const simde_float32 r[16];
|
||||
} test_vec[] = {
|
||||
{ { SIMDE_FLOAT32_C( 1.00), SIMDE_FLOAT32_C( 0.31), SIMDE_FLOAT32_C( -0.24), SIMDE_FLOAT32_C( 0.27),
|
||||
SIMDE_FLOAT32_C( 0.34), SIMDE_FLOAT32_C( -0.76), SIMDE_FLOAT32_C( 0.06), SIMDE_FLOAT32_C( 0.27),
|
||||
SIMDE_FLOAT32_C( -0.84), SIMDE_FLOAT32_C( 0.20), SIMDE_FLOAT32_C( 0.87), SIMDE_FLOAT32_C( 0.07),
|
||||
SIMDE_FLOAT32_C( -0.76), SIMDE_FLOAT32_C( 0.18), SIMDE_FLOAT32_C( 0.10), SIMDE_FLOAT32_C( -0.50) },
|
||||
{ SIMDE_FLOAT32_C( 1.00), SIMDE_FLOAT32_C( 3.23), SIMDE_FLOAT32_C( -4.17), SIMDE_FLOAT32_C( 3.70),
|
||||
SIMDE_FLOAT32_C( 2.94), SIMDE_FLOAT32_C( -1.32), SIMDE_FLOAT32_C( 16.67), SIMDE_FLOAT32_C( 3.70),
|
||||
SIMDE_FLOAT32_C( -1.19), SIMDE_FLOAT32_C( 5.00), SIMDE_FLOAT32_C( 1.15), SIMDE_FLOAT32_C( 14.29),
|
||||
SIMDE_FLOAT32_C( -1.32), SIMDE_FLOAT32_C( 5.56), SIMDE_FLOAT32_C( 10.00), SIMDE_FLOAT32_C( -2.00) } },
|
||||
{ { SIMDE_FLOAT32_C( -0.37), SIMDE_FLOAT32_C( 0.99), SIMDE_FLOAT32_C( 0.34), SIMDE_FLOAT32_C( -0.49),
|
||||
SIMDE_FLOAT32_C( -0.69), SIMDE_FLOAT32_C( -0.04), SIMDE_FLOAT32_C( -0.65), SIMDE_FLOAT32_C( 0.95),
|
||||
SIMDE_FLOAT32_C( -0.16), SIMDE_FLOAT32_C( -0.86), SIMDE_FLOAT32_C( -0.21), SIMDE_FLOAT32_C( -0.59),
|
||||
SIMDE_FLOAT32_C( 0.73), SIMDE_FLOAT32_C( -0.65), SIMDE_FLOAT32_C( 0.61), SIMDE_FLOAT32_C( 0.73) },
|
||||
{ SIMDE_FLOAT32_C( -2.70), SIMDE_FLOAT32_C( 1.01), SIMDE_FLOAT32_C( 2.94), SIMDE_FLOAT32_C( -2.04),
|
||||
SIMDE_FLOAT32_C( -1.45), SIMDE_FLOAT32_C( -25.00), SIMDE_FLOAT32_C( -1.54), SIMDE_FLOAT32_C( 1.05),
|
||||
SIMDE_FLOAT32_C( -6.25), SIMDE_FLOAT32_C( -1.16), SIMDE_FLOAT32_C( -4.76), SIMDE_FLOAT32_C( -1.69),
|
||||
SIMDE_FLOAT32_C( 1.37), SIMDE_FLOAT32_C( -1.54), SIMDE_FLOAT32_C( 1.64), SIMDE_FLOAT32_C( 1.37) } },
|
||||
{ { SIMDE_FLOAT32_C( -0.07), SIMDE_FLOAT32_C( 0.33), SIMDE_FLOAT32_C( -0.54), SIMDE_FLOAT32_C( 0.24),
|
||||
SIMDE_FLOAT32_C( -0.71), SIMDE_FLOAT32_C( -0.19), SIMDE_FLOAT32_C( 0.19), SIMDE_FLOAT32_C( 0.13),
|
||||
SIMDE_FLOAT32_C( -0.05), SIMDE_FLOAT32_C( 0.98), SIMDE_FLOAT32_C( 0.54), SIMDE_FLOAT32_C( -0.32),
|
||||
SIMDE_FLOAT32_C( -0.67), SIMDE_FLOAT32_C( 0.14), SIMDE_FLOAT32_C( -0.59), SIMDE_FLOAT32_C( 0.99) },
|
||||
{ SIMDE_FLOAT32_C( -14.29), SIMDE_FLOAT32_C( 3.03), SIMDE_FLOAT32_C( -1.85), SIMDE_FLOAT32_C( 4.17),
|
||||
SIMDE_FLOAT32_C( -1.41), SIMDE_FLOAT32_C( -5.26), SIMDE_FLOAT32_C( 5.26), SIMDE_FLOAT32_C( 7.69),
|
||||
SIMDE_FLOAT32_C( -20.00), SIMDE_FLOAT32_C( 1.02), SIMDE_FLOAT32_C( 1.85), SIMDE_FLOAT32_C( -3.12),
|
||||
SIMDE_FLOAT32_C( -1.49), SIMDE_FLOAT32_C( 7.14), SIMDE_FLOAT32_C( -1.69), SIMDE_FLOAT32_C( 1.01) } },
|
||||
{ { SIMDE_FLOAT32_C( 0.51), SIMDE_FLOAT32_C( 0.40), SIMDE_FLOAT32_C( -0.01), SIMDE_FLOAT32_C( -0.88),
|
||||
SIMDE_FLOAT32_C( 0.45), SIMDE_FLOAT32_C( 0.25), SIMDE_FLOAT32_C( -0.12), SIMDE_FLOAT32_C( -0.30),
|
||||
SIMDE_FLOAT32_C( 0.39), SIMDE_FLOAT32_C( -0.29), SIMDE_FLOAT32_C( -0.80), SIMDE_FLOAT32_C( -0.29),
|
||||
SIMDE_FLOAT32_C( 0.65), SIMDE_FLOAT32_C( -0.81), SIMDE_FLOAT32_C( -0.34), SIMDE_FLOAT32_C( -0.42) },
|
||||
{ SIMDE_FLOAT32_C( 1.96), SIMDE_FLOAT32_C( 2.50), SIMDE_FLOAT32_C( -100.00), SIMDE_FLOAT32_C( -1.14),
|
||||
SIMDE_FLOAT32_C( 2.22), SIMDE_FLOAT32_C( 4.00), SIMDE_FLOAT32_C( -8.33), SIMDE_FLOAT32_C( -3.33),
|
||||
SIMDE_FLOAT32_C( 2.56), SIMDE_FLOAT32_C( -3.45), SIMDE_FLOAT32_C( -1.25), SIMDE_FLOAT32_C( -3.45),
|
||||
SIMDE_FLOAT32_C( 1.54), SIMDE_FLOAT32_C( -1.23), SIMDE_FLOAT32_C( -2.94), SIMDE_FLOAT32_C( -2.38) } },
|
||||
{ { SIMDE_FLOAT32_C( 0.76), SIMDE_FLOAT32_C( -0.49), SIMDE_FLOAT32_C( 0.49), SIMDE_FLOAT32_C( 0.55),
|
||||
SIMDE_FLOAT32_C( -0.83), SIMDE_FLOAT32_C( -0.95), SIMDE_FLOAT32_C( 0.91), SIMDE_FLOAT32_C( -0.04),
|
||||
SIMDE_FLOAT32_C( 0.86), SIMDE_FLOAT32_C( -0.87), SIMDE_FLOAT32_C( 0.15), SIMDE_FLOAT32_C( 0.88),
|
||||
SIMDE_FLOAT32_C( -0.78), SIMDE_FLOAT32_C( -0.39), SIMDE_FLOAT32_C( 0.65), SIMDE_FLOAT32_C( -0.29) },
|
||||
{ SIMDE_FLOAT32_C( 1.32), SIMDE_FLOAT32_C( -2.04), SIMDE_FLOAT32_C( 2.04), SIMDE_FLOAT32_C( 1.82),
|
||||
SIMDE_FLOAT32_C( -1.20), SIMDE_FLOAT32_C( -1.05), SIMDE_FLOAT32_C( 1.10), SIMDE_FLOAT32_C( -25.00),
|
||||
SIMDE_FLOAT32_C( 1.16), SIMDE_FLOAT32_C( -1.15), SIMDE_FLOAT32_C( 6.67), SIMDE_FLOAT32_C( 1.14),
|
||||
SIMDE_FLOAT32_C( -1.28), SIMDE_FLOAT32_C( -2.56), SIMDE_FLOAT32_C( 1.54), SIMDE_FLOAT32_C( -3.45) } },
|
||||
{ { SIMDE_FLOAT32_C( 0.51), SIMDE_FLOAT32_C( 0.12), SIMDE_FLOAT32_C( 0.82), SIMDE_FLOAT32_C( 0.80),
|
||||
SIMDE_FLOAT32_C( 0.93), SIMDE_FLOAT32_C( 0.01), SIMDE_FLOAT32_C( -0.07), SIMDE_FLOAT32_C( -0.12),
|
||||
SIMDE_FLOAT32_C( -0.02), SIMDE_FLOAT32_C( -0.53), SIMDE_FLOAT32_C( 0.56), SIMDE_FLOAT32_C( 0.31),
|
||||
SIMDE_FLOAT32_C( 0.61), SIMDE_FLOAT32_C( 0.97), SIMDE_FLOAT32_C( 0.31), SIMDE_FLOAT32_C( 0.12) },
|
||||
{ SIMDE_FLOAT32_C( 1.96), SIMDE_FLOAT32_C( 8.33), SIMDE_FLOAT32_C( 1.22), SIMDE_FLOAT32_C( 1.25),
|
||||
SIMDE_FLOAT32_C( 1.08), SIMDE_FLOAT32_C( 100.00), SIMDE_FLOAT32_C( -14.29), SIMDE_FLOAT32_C( -8.33),
|
||||
SIMDE_FLOAT32_C( -50.00), SIMDE_FLOAT32_C( -1.89), SIMDE_FLOAT32_C( 1.79), SIMDE_FLOAT32_C( 3.23),
|
||||
SIMDE_FLOAT32_C( 1.64), SIMDE_FLOAT32_C( 1.03), SIMDE_FLOAT32_C( 3.23), SIMDE_FLOAT32_C( 8.33) } },
|
||||
{ { SIMDE_FLOAT32_C( 0.37), SIMDE_FLOAT32_C( -0.70), SIMDE_FLOAT32_C( 0.24), SIMDE_FLOAT32_C( -0.18),
|
||||
SIMDE_FLOAT32_C( 0.55), SIMDE_FLOAT32_C( -0.87), SIMDE_FLOAT32_C( 0.53), SIMDE_FLOAT32_C( -0.06),
|
||||
SIMDE_FLOAT32_C( -0.16), SIMDE_FLOAT32_C( 0.72), SIMDE_FLOAT32_C( 0.65), SIMDE_FLOAT32_C( -0.51),
|
||||
SIMDE_FLOAT32_C( 0.91), SIMDE_FLOAT32_C( -0.69), SIMDE_FLOAT32_C( 0.07), SIMDE_FLOAT32_C( 0.43) },
|
||||
{ SIMDE_FLOAT32_C( 2.70), SIMDE_FLOAT32_C( -1.43), SIMDE_FLOAT32_C( 4.17), SIMDE_FLOAT32_C( -5.56),
|
||||
SIMDE_FLOAT32_C( 1.82), SIMDE_FLOAT32_C( -1.15), SIMDE_FLOAT32_C( 1.89), SIMDE_FLOAT32_C( -16.67),
|
||||
SIMDE_FLOAT32_C( -6.25), SIMDE_FLOAT32_C( 1.39), SIMDE_FLOAT32_C( 1.54), SIMDE_FLOAT32_C( -1.96),
|
||||
SIMDE_FLOAT32_C( 1.10), SIMDE_FLOAT32_C( -1.45), SIMDE_FLOAT32_C( 14.29), SIMDE_FLOAT32_C( 2.33) } },
|
||||
{ { SIMDE_FLOAT32_C( 0.42), SIMDE_FLOAT32_C( -0.12), SIMDE_FLOAT32_C( 0.23), SIMDE_FLOAT32_C( 0.35),
|
||||
SIMDE_FLOAT32_C( 0.89), SIMDE_FLOAT32_C( -0.84), SIMDE_FLOAT32_C( -0.77), SIMDE_FLOAT32_C( -0.12),
|
||||
SIMDE_FLOAT32_C( -0.37), SIMDE_FLOAT32_C( 0.80), SIMDE_FLOAT32_C( -0.81), SIMDE_FLOAT32_C( -0.76),
|
||||
SIMDE_FLOAT32_C( 0.77), SIMDE_FLOAT32_C( 0.50), SIMDE_FLOAT32_C( 0.36), SIMDE_FLOAT32_C( 0.14) },
|
||||
{ SIMDE_FLOAT32_C( 2.38), SIMDE_FLOAT32_C( -8.33), SIMDE_FLOAT32_C( 4.35), SIMDE_FLOAT32_C( 2.86),
|
||||
SIMDE_FLOAT32_C( 1.12), SIMDE_FLOAT32_C( -1.19), SIMDE_FLOAT32_C( -1.30), SIMDE_FLOAT32_C( -8.33),
|
||||
SIMDE_FLOAT32_C( -2.70), SIMDE_FLOAT32_C( 1.25), SIMDE_FLOAT32_C( -1.23), SIMDE_FLOAT32_C( -1.32),
|
||||
SIMDE_FLOAT32_C( 1.30), SIMDE_FLOAT32_C( 2.00), SIMDE_FLOAT32_C( 2.78), SIMDE_FLOAT32_C( 7.14) } },
|
||||
};
|
||||
|
||||
for (size_t i = 0 ; i < (sizeof(test_vec) / sizeof(test_vec[0])) ; i++) {
|
||||
simde__m512 a = simde_mm512_loadu_ps(test_vec[i].a);
|
||||
simde__m512 r = simde_mm512_rcp14_ps(a);
|
||||
simde_test_x86_assert_equal_f32x16(r, simde_mm512_loadu_ps(test_vec[i].r), 1);
|
||||
}
|
||||
|
||||
return 0;
|
||||
#else
|
||||
fputc('\n', stdout);
|
||||
for (int i = 0 ; i < 8 ; i++) {
|
||||
simde__m512 a = simde_test_x86_random_f32x16(SIMDE_FLOAT32_C(-1.0), SIMDE_FLOAT32_C(1.0));
|
||||
// TODO: generate smaller floating point numbers and test with greater accuracy
|
||||
// as rcp14 is defined as "The maximum relative error for this approximation is less than 2^-14."
|
||||
simde__m512 r = simde_mm512_rcp14_ps(a);
|
||||
|
||||
simde_test_x86_write_f32x16(2, a, SIMDE_TEST_VEC_POS_FIRST);
|
||||
simde_test_x86_write_f32x16(2, r, SIMDE_TEST_VEC_POS_LAST);
|
||||
}
|
||||
return 1;
|
||||
#endif
|
||||
}
|
||||
SIMDE_TEST_FUNC_LIST_BEGIN
|
||||
SIMDE_TEST_FUNC_LIST_ENTRY(mm512_rcp14_ps)
|
||||
SIMDE_TEST_FUNC_LIST_END
|
||||
|
||||
#include <test/x86/avx512/test-avx512-footer.h>
|
||||
938
thirdparty/simde/test/x86/avx512/reduce.c
vendored
Normal file
938
thirdparty/simde/test/x86/avx512/reduce.c
vendored
Normal file
|
|
@ -0,0 +1,938 @@
|
|||
/* SPDX-License-Identifier: MIT
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person
|
||||
* obtaining a copy of this software and associated documentation
|
||||
* files (the "Software"), to deal in the Software without
|
||||
* restriction, including without limitation the rights to use, copy,
|
||||
* modify, merge, publish, distribute, sublicense, and/or sell copies
|
||||
* of the Software, and to permit persons to whom the Software is
|
||||
* furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be
|
||||
* included in all copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
|
||||
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
|
||||
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
|
||||
* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
|
||||
* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
|
||||
* SOFTWARE.
|
||||
*
|
||||
* Copyright:
|
||||
* 2023 Michael R. Crusoe <crusoe@debian.org>
|
||||
*/
|
||||
|
||||
#define SIMDE_TEST_X86_AVX512_INSN reduce
|
||||
|
||||
#include <test/x86/avx512/test-avx512.h>
|
||||
#include <simde/x86/avx512/reduce.h>
|
||||
|
||||
#if defined(SIMDE_FLOAT16_IS_SCALAR)
|
||||
static int
|
||||
test_simde_mm512_reduce_max_ph (SIMDE_MUNIT_TEST_ARGS) {
|
||||
#if 1
|
||||
static const struct {
|
||||
const simde_float16 a[32];
|
||||
const simde_float16 r;
|
||||
} test_vec[] = {
|
||||
{ { SIMDE_FLOAT16_VALUE( -185.88), SIMDE_FLOAT16_VALUE( -986.50), SIMDE_FLOAT16_VALUE( 2.45), SIMDE_FLOAT16_VALUE( 247.38),
|
||||
SIMDE_FLOAT16_VALUE( -727.00), SIMDE_FLOAT16_VALUE( -893.50), SIMDE_FLOAT16_VALUE( 875.50), SIMDE_FLOAT16_VALUE( 709.00),
|
||||
SIMDE_FLOAT16_VALUE( 406.75), SIMDE_FLOAT16_VALUE( -130.75), SIMDE_FLOAT16_VALUE( -631.00), SIMDE_FLOAT16_VALUE( 933.50),
|
||||
SIMDE_FLOAT16_VALUE( 90.00), SIMDE_FLOAT16_VALUE( -937.00), SIMDE_FLOAT16_VALUE( -754.00), SIMDE_FLOAT16_VALUE( 60.22),
|
||||
SIMDE_FLOAT16_VALUE( 233.00), SIMDE_FLOAT16_VALUE( -323.25), SIMDE_FLOAT16_VALUE( 83.06), SIMDE_FLOAT16_VALUE( -224.38),
|
||||
SIMDE_FLOAT16_VALUE( 860.50), SIMDE_FLOAT16_VALUE( -115.75), SIMDE_FLOAT16_VALUE( 962.00), SIMDE_FLOAT16_VALUE( -706.50),
|
||||
SIMDE_FLOAT16_VALUE( 742.00), SIMDE_FLOAT16_VALUE( -185.25), SIMDE_FLOAT16_VALUE( -100.25), SIMDE_FLOAT16_VALUE( -953.00),
|
||||
SIMDE_FLOAT16_VALUE( 934.50), SIMDE_FLOAT16_VALUE( -124.06), SIMDE_FLOAT16_VALUE( 835.00), SIMDE_FLOAT16_VALUE( -251.38) },
|
||||
SIMDE_FLOAT16_VALUE( 962.00) },
|
||||
{ { SIMDE_FLOAT16_VALUE( -110.44), SIMDE_FLOAT16_VALUE( -162.62), SIMDE_FLOAT16_VALUE( 996.00), SIMDE_FLOAT16_VALUE( 162.62),
|
||||
SIMDE_FLOAT16_VALUE( -56.28), SIMDE_FLOAT16_VALUE( 871.50), SIMDE_FLOAT16_VALUE( -128.38), SIMDE_FLOAT16_VALUE( -649.50),
|
||||
SIMDE_FLOAT16_VALUE( -259.25), SIMDE_FLOAT16_VALUE( 240.50), SIMDE_FLOAT16_VALUE( -716.50), SIMDE_FLOAT16_VALUE( 830.50),
|
||||
SIMDE_FLOAT16_VALUE( 303.50), SIMDE_FLOAT16_VALUE( -470.00), SIMDE_FLOAT16_VALUE( -109.06), SIMDE_FLOAT16_VALUE( -463.50),
|
||||
SIMDE_FLOAT16_VALUE( 206.75), SIMDE_FLOAT16_VALUE( 974.00), SIMDE_FLOAT16_VALUE( 312.25), SIMDE_FLOAT16_VALUE( 67.25),
|
||||
SIMDE_FLOAT16_VALUE( -141.75), SIMDE_FLOAT16_VALUE( 274.25), SIMDE_FLOAT16_VALUE( 360.75), SIMDE_FLOAT16_VALUE( -400.00),
|
||||
SIMDE_FLOAT16_VALUE( -911.00), SIMDE_FLOAT16_VALUE( -739.50), SIMDE_FLOAT16_VALUE( -353.00), SIMDE_FLOAT16_VALUE( -976.50),
|
||||
SIMDE_FLOAT16_VALUE( 136.38), SIMDE_FLOAT16_VALUE( -518.00), SIMDE_FLOAT16_VALUE( -227.88), SIMDE_FLOAT16_VALUE( -974.00) },
|
||||
SIMDE_FLOAT16_VALUE( 996.00) },
|
||||
{ { SIMDE_FLOAT16_VALUE( 319.25), SIMDE_FLOAT16_VALUE( -232.00), SIMDE_FLOAT16_VALUE( 188.62), SIMDE_FLOAT16_VALUE( -737.00),
|
||||
SIMDE_FLOAT16_VALUE( -360.50), SIMDE_FLOAT16_VALUE( -940.00), SIMDE_FLOAT16_VALUE( -386.50), SIMDE_FLOAT16_VALUE( 380.25),
|
||||
SIMDE_FLOAT16_VALUE( 300.75), SIMDE_FLOAT16_VALUE( -102.81), SIMDE_FLOAT16_VALUE( 211.00), SIMDE_FLOAT16_VALUE( -395.50),
|
||||
SIMDE_FLOAT16_VALUE( 427.00), SIMDE_FLOAT16_VALUE( -898.00), SIMDE_FLOAT16_VALUE( 141.00), SIMDE_FLOAT16_VALUE( -366.25),
|
||||
SIMDE_FLOAT16_VALUE( -924.00), SIMDE_FLOAT16_VALUE( -546.50), SIMDE_FLOAT16_VALUE( 701.00), SIMDE_FLOAT16_VALUE( -65.81),
|
||||
SIMDE_FLOAT16_VALUE( 727.50), SIMDE_FLOAT16_VALUE( 61.84), SIMDE_FLOAT16_VALUE( 534.00), SIMDE_FLOAT16_VALUE( 816.50),
|
||||
SIMDE_FLOAT16_VALUE( 322.25), SIMDE_FLOAT16_VALUE( -819.00), SIMDE_FLOAT16_VALUE( 840.50), SIMDE_FLOAT16_VALUE( -541.50),
|
||||
SIMDE_FLOAT16_VALUE( -336.75), SIMDE_FLOAT16_VALUE( -387.50), SIMDE_FLOAT16_VALUE( -515.50), SIMDE_FLOAT16_VALUE( 982.50) },
|
||||
SIMDE_FLOAT16_VALUE( 982.50) },
|
||||
{ { SIMDE_FLOAT16_VALUE( 380.50), SIMDE_FLOAT16_VALUE( 673.00), SIMDE_FLOAT16_VALUE( -754.50), SIMDE_FLOAT16_VALUE( -980.00),
|
||||
SIMDE_FLOAT16_VALUE( 733.50), SIMDE_FLOAT16_VALUE( -140.88), SIMDE_FLOAT16_VALUE( 400.25), SIMDE_FLOAT16_VALUE( 34.25),
|
||||
SIMDE_FLOAT16_VALUE( 756.50), SIMDE_FLOAT16_VALUE( -388.75), SIMDE_FLOAT16_VALUE( 638.50), SIMDE_FLOAT16_VALUE( 183.38),
|
||||
SIMDE_FLOAT16_VALUE( -286.75), SIMDE_FLOAT16_VALUE( -220.38), SIMDE_FLOAT16_VALUE( 817.00), SIMDE_FLOAT16_VALUE( -210.75),
|
||||
SIMDE_FLOAT16_VALUE( 233.00), SIMDE_FLOAT16_VALUE( 518.50), SIMDE_FLOAT16_VALUE( 723.50), SIMDE_FLOAT16_VALUE( -39.44),
|
||||
SIMDE_FLOAT16_VALUE( -419.75), SIMDE_FLOAT16_VALUE( 257.50), SIMDE_FLOAT16_VALUE( -222.75), SIMDE_FLOAT16_VALUE( 902.50),
|
||||
SIMDE_FLOAT16_VALUE( 438.75), SIMDE_FLOAT16_VALUE( -382.50), SIMDE_FLOAT16_VALUE( -639.00), SIMDE_FLOAT16_VALUE( -898.00),
|
||||
SIMDE_FLOAT16_VALUE( 230.12), SIMDE_FLOAT16_VALUE( -154.12), SIMDE_FLOAT16_VALUE( -915.50), SIMDE_FLOAT16_VALUE( -389.50) },
|
||||
SIMDE_FLOAT16_VALUE( 902.50) },
|
||||
{ { SIMDE_FLOAT16_VALUE( -481.00), SIMDE_FLOAT16_VALUE( -670.00), SIMDE_FLOAT16_VALUE( -369.25), SIMDE_FLOAT16_VALUE( -747.50),
|
||||
SIMDE_FLOAT16_VALUE( 189.25), SIMDE_FLOAT16_VALUE( -969.00), SIMDE_FLOAT16_VALUE( 286.75), SIMDE_FLOAT16_VALUE( -54.47),
|
||||
SIMDE_FLOAT16_VALUE( -357.75), SIMDE_FLOAT16_VALUE( -74.56), SIMDE_FLOAT16_VALUE( -871.00), SIMDE_FLOAT16_VALUE( 355.50),
|
||||
SIMDE_FLOAT16_VALUE( 705.00), SIMDE_FLOAT16_VALUE( 946.00), SIMDE_FLOAT16_VALUE( -855.00), SIMDE_FLOAT16_VALUE( -61.97),
|
||||
SIMDE_FLOAT16_VALUE( 464.50), SIMDE_FLOAT16_VALUE( 868.00), SIMDE_FLOAT16_VALUE( 898.50), SIMDE_FLOAT16_VALUE( -955.50),
|
||||
SIMDE_FLOAT16_VALUE( 125.81), SIMDE_FLOAT16_VALUE( -324.25), SIMDE_FLOAT16_VALUE( 947.00), SIMDE_FLOAT16_VALUE( -435.25),
|
||||
SIMDE_FLOAT16_VALUE( 293.50), SIMDE_FLOAT16_VALUE( -691.50), SIMDE_FLOAT16_VALUE( -333.50), SIMDE_FLOAT16_VALUE( -476.50),
|
||||
SIMDE_FLOAT16_VALUE( 154.25), SIMDE_FLOAT16_VALUE( -248.88), SIMDE_FLOAT16_VALUE( 134.12), SIMDE_FLOAT16_VALUE( 673.50) },
|
||||
SIMDE_FLOAT16_VALUE( 947.00) },
|
||||
{ { SIMDE_FLOAT16_VALUE( 81.25), SIMDE_FLOAT16_VALUE( 765.00), SIMDE_FLOAT16_VALUE( 926.00), SIMDE_FLOAT16_VALUE( -729.50),
|
||||
SIMDE_FLOAT16_VALUE( 796.00), SIMDE_FLOAT16_VALUE( 212.62), SIMDE_FLOAT16_VALUE( 216.00), SIMDE_FLOAT16_VALUE( -562.00),
|
||||
SIMDE_FLOAT16_VALUE( -862.00), SIMDE_FLOAT16_VALUE( 345.00), SIMDE_FLOAT16_VALUE( 794.00), SIMDE_FLOAT16_VALUE( 843.00),
|
||||
SIMDE_FLOAT16_VALUE( 291.00), SIMDE_FLOAT16_VALUE( 938.50), SIMDE_FLOAT16_VALUE( -218.88), SIMDE_FLOAT16_VALUE( -244.38),
|
||||
SIMDE_FLOAT16_VALUE( 807.00), SIMDE_FLOAT16_VALUE( -320.25), SIMDE_FLOAT16_VALUE( -199.62), SIMDE_FLOAT16_VALUE( -67.38),
|
||||
SIMDE_FLOAT16_VALUE( 355.50), SIMDE_FLOAT16_VALUE( -252.38), SIMDE_FLOAT16_VALUE( 497.25), SIMDE_FLOAT16_VALUE( -351.00),
|
||||
SIMDE_FLOAT16_VALUE( 56.03), SIMDE_FLOAT16_VALUE( -836.00), SIMDE_FLOAT16_VALUE( 172.50), SIMDE_FLOAT16_VALUE( -789.50),
|
||||
SIMDE_FLOAT16_VALUE( -85.00), SIMDE_FLOAT16_VALUE( -693.50), SIMDE_FLOAT16_VALUE( 883.50), SIMDE_FLOAT16_VALUE( 996.00) },
|
||||
SIMDE_FLOAT16_VALUE( 996.00) },
|
||||
{ { SIMDE_FLOAT16_VALUE( -928.50), SIMDE_FLOAT16_VALUE( 809.50), SIMDE_FLOAT16_VALUE( -733.50), SIMDE_FLOAT16_VALUE( 867.50),
|
||||
SIMDE_FLOAT16_VALUE( 22.09), SIMDE_FLOAT16_VALUE( 482.75), SIMDE_FLOAT16_VALUE( -694.50), SIMDE_FLOAT16_VALUE( 160.12),
|
||||
SIMDE_FLOAT16_VALUE( -172.25), SIMDE_FLOAT16_VALUE( -901.00), SIMDE_FLOAT16_VALUE( 3.27), SIMDE_FLOAT16_VALUE( -881.00),
|
||||
SIMDE_FLOAT16_VALUE( -962.00), SIMDE_FLOAT16_VALUE( 784.50), SIMDE_FLOAT16_VALUE( -125.56), SIMDE_FLOAT16_VALUE( 844.50),
|
||||
SIMDE_FLOAT16_VALUE( -536.00), SIMDE_FLOAT16_VALUE( 675.00), SIMDE_FLOAT16_VALUE( -222.75), SIMDE_FLOAT16_VALUE( 820.00),
|
||||
SIMDE_FLOAT16_VALUE( -577.50), SIMDE_FLOAT16_VALUE( -725.50), SIMDE_FLOAT16_VALUE( -531.00), SIMDE_FLOAT16_VALUE( 478.50),
|
||||
SIMDE_FLOAT16_VALUE( -561.50), SIMDE_FLOAT16_VALUE( 641.50), SIMDE_FLOAT16_VALUE( 689.00), SIMDE_FLOAT16_VALUE( 353.50),
|
||||
SIMDE_FLOAT16_VALUE( 948.00), SIMDE_FLOAT16_VALUE( 572.50), SIMDE_FLOAT16_VALUE( 349.75), SIMDE_FLOAT16_VALUE( -980.50) },
|
||||
SIMDE_FLOAT16_VALUE( 948.00) },
|
||||
{ { SIMDE_FLOAT16_VALUE( 381.75), SIMDE_FLOAT16_VALUE( 616.50), SIMDE_FLOAT16_VALUE( 887.00), SIMDE_FLOAT16_VALUE( -596.00),
|
||||
SIMDE_FLOAT16_VALUE( 99.12), SIMDE_FLOAT16_VALUE( -807.50), SIMDE_FLOAT16_VALUE( 564.00), SIMDE_FLOAT16_VALUE( 927.00),
|
||||
SIMDE_FLOAT16_VALUE( -708.50), SIMDE_FLOAT16_VALUE( -432.75), SIMDE_FLOAT16_VALUE( -954.50), SIMDE_FLOAT16_VALUE( -670.50),
|
||||
SIMDE_FLOAT16_VALUE( -648.00), SIMDE_FLOAT16_VALUE( -79.81), SIMDE_FLOAT16_VALUE( -826.00), SIMDE_FLOAT16_VALUE( -184.00),
|
||||
SIMDE_FLOAT16_VALUE( -405.00), SIMDE_FLOAT16_VALUE( -48.72), SIMDE_FLOAT16_VALUE( -364.25), SIMDE_FLOAT16_VALUE( 17.39),
|
||||
SIMDE_FLOAT16_VALUE( 225.88), SIMDE_FLOAT16_VALUE( 104.50), SIMDE_FLOAT16_VALUE( -504.25), SIMDE_FLOAT16_VALUE( 664.50),
|
||||
SIMDE_FLOAT16_VALUE( -254.25), SIMDE_FLOAT16_VALUE( -815.50), SIMDE_FLOAT16_VALUE( 17.67), SIMDE_FLOAT16_VALUE( -306.25),
|
||||
SIMDE_FLOAT16_VALUE( 757.00), SIMDE_FLOAT16_VALUE( -632.50), SIMDE_FLOAT16_VALUE( -286.75), SIMDE_FLOAT16_VALUE( 138.88) },
|
||||
SIMDE_FLOAT16_VALUE( 927.00) },
|
||||
};
|
||||
|
||||
for (size_t i = 0 ; i < (sizeof(test_vec) / sizeof(test_vec[0])) ; i++) {
|
||||
simde__m512h a = simde_mm512_loadu_ph(test_vec[i].a);
|
||||
simde_float16 r = simde_mm512_reduce_max_ph(a);
|
||||
simde_assert_equal_f16(r, test_vec[i].r, 1);
|
||||
}
|
||||
|
||||
return 0;
|
||||
#else
|
||||
fputc('\n', stdout);
|
||||
|
||||
for (int i = 0; i < 8; i++) {
|
||||
simde__m512h a = simde_test_x86_random_f16x32(SIMDE_FLOAT16_VALUE(-1000.0), SIMDE_FLOAT16_VALUE(1000.0));
|
||||
simde_float16 r = simde_mm512_reduce_max_ph(a);
|
||||
|
||||
simde_test_x86_write_f16x32(2, a, SIMDE_TEST_VEC_POS_FIRST);
|
||||
simde_test_codegen_write_f16(2, r, SIMDE_TEST_VEC_POS_LAST);
|
||||
}
|
||||
return 1;
|
||||
#endif
|
||||
}
|
||||
|
||||
static int
|
||||
test_simde_mm512_reduce_min_ph (SIMDE_MUNIT_TEST_ARGS) {
|
||||
#if 1
|
||||
static const struct {
|
||||
const simde_float16 a[32];
|
||||
const simde_float16 r;
|
||||
} test_vec[] = {
|
||||
{ { SIMDE_FLOAT16_VALUE( 844.50), SIMDE_FLOAT16_VALUE( -114.81), SIMDE_FLOAT16_VALUE( -922.00), SIMDE_FLOAT16_VALUE( -790.50),
|
||||
SIMDE_FLOAT16_VALUE( -598.00), SIMDE_FLOAT16_VALUE( 970.00), SIMDE_FLOAT16_VALUE( 305.00), SIMDE_FLOAT16_VALUE( -214.62),
|
||||
SIMDE_FLOAT16_VALUE( 798.00), SIMDE_FLOAT16_VALUE( 346.25), SIMDE_FLOAT16_VALUE( 477.00), SIMDE_FLOAT16_VALUE( 573.00),
|
||||
SIMDE_FLOAT16_VALUE( 247.00), SIMDE_FLOAT16_VALUE( -550.00), SIMDE_FLOAT16_VALUE( -505.25), SIMDE_FLOAT16_VALUE( 688.00),
|
||||
SIMDE_FLOAT16_VALUE( 446.75), SIMDE_FLOAT16_VALUE( -639.00), SIMDE_FLOAT16_VALUE( -624.00), SIMDE_FLOAT16_VALUE( 541.00),
|
||||
SIMDE_FLOAT16_VALUE( 638.50), SIMDE_FLOAT16_VALUE( 643.50), SIMDE_FLOAT16_VALUE( 948.50), SIMDE_FLOAT16_VALUE( 328.50),
|
||||
SIMDE_FLOAT16_VALUE( -432.25), SIMDE_FLOAT16_VALUE( -517.50), SIMDE_FLOAT16_VALUE( -562.50), SIMDE_FLOAT16_VALUE( 839.50),
|
||||
SIMDE_FLOAT16_VALUE( -883.00), SIMDE_FLOAT16_VALUE( 450.25), SIMDE_FLOAT16_VALUE( -607.50), SIMDE_FLOAT16_VALUE( 962.00) },
|
||||
SIMDE_FLOAT16_VALUE( -922.00) },
|
||||
{ { SIMDE_FLOAT16_VALUE( -664.50), SIMDE_FLOAT16_VALUE( -530.00), SIMDE_FLOAT16_VALUE( -829.00), SIMDE_FLOAT16_VALUE( -262.50),
|
||||
SIMDE_FLOAT16_VALUE( -560.00), SIMDE_FLOAT16_VALUE( 476.25), SIMDE_FLOAT16_VALUE( 523.00), SIMDE_FLOAT16_VALUE( -762.00),
|
||||
SIMDE_FLOAT16_VALUE( -177.62), SIMDE_FLOAT16_VALUE( 0.05), SIMDE_FLOAT16_VALUE( 811.00), SIMDE_FLOAT16_VALUE( -930.50),
|
||||
SIMDE_FLOAT16_VALUE( 450.00), SIMDE_FLOAT16_VALUE( -694.00), SIMDE_FLOAT16_VALUE( 757.50), SIMDE_FLOAT16_VALUE( -103.44),
|
||||
SIMDE_FLOAT16_VALUE( -333.00), SIMDE_FLOAT16_VALUE( -866.50), SIMDE_FLOAT16_VALUE( -562.50), SIMDE_FLOAT16_VALUE( -694.50),
|
||||
SIMDE_FLOAT16_VALUE( 776.50), SIMDE_FLOAT16_VALUE( -614.00), SIMDE_FLOAT16_VALUE( 634.00), SIMDE_FLOAT16_VALUE( -655.50),
|
||||
SIMDE_FLOAT16_VALUE( -131.38), SIMDE_FLOAT16_VALUE( -928.50), SIMDE_FLOAT16_VALUE( -816.00), SIMDE_FLOAT16_VALUE( -14.12),
|
||||
SIMDE_FLOAT16_VALUE( 521.50), SIMDE_FLOAT16_VALUE( -423.50), SIMDE_FLOAT16_VALUE( -52.28), SIMDE_FLOAT16_VALUE( 857.00) },
|
||||
SIMDE_FLOAT16_VALUE( -930.50) },
|
||||
{ { SIMDE_FLOAT16_VALUE( 46.66), SIMDE_FLOAT16_VALUE( 118.94), SIMDE_FLOAT16_VALUE( -405.50), SIMDE_FLOAT16_VALUE( 486.75),
|
||||
SIMDE_FLOAT16_VALUE( -404.75), SIMDE_FLOAT16_VALUE( -882.50), SIMDE_FLOAT16_VALUE( 724.50), SIMDE_FLOAT16_VALUE( 417.50),
|
||||
SIMDE_FLOAT16_VALUE( 117.50), SIMDE_FLOAT16_VALUE( 536.00), SIMDE_FLOAT16_VALUE( 487.00), SIMDE_FLOAT16_VALUE( -432.75),
|
||||
SIMDE_FLOAT16_VALUE( 842.00), SIMDE_FLOAT16_VALUE( 244.38), SIMDE_FLOAT16_VALUE( 464.00), SIMDE_FLOAT16_VALUE( -491.25),
|
||||
SIMDE_FLOAT16_VALUE( 377.75), SIMDE_FLOAT16_VALUE( 901.50), SIMDE_FLOAT16_VALUE( -185.75), SIMDE_FLOAT16_VALUE( 154.38),
|
||||
SIMDE_FLOAT16_VALUE( -712.50), SIMDE_FLOAT16_VALUE( -551.50), SIMDE_FLOAT16_VALUE( 498.75), SIMDE_FLOAT16_VALUE( 156.38),
|
||||
SIMDE_FLOAT16_VALUE( -480.25), SIMDE_FLOAT16_VALUE( 683.00), SIMDE_FLOAT16_VALUE( -858.00), SIMDE_FLOAT16_VALUE( -959.00),
|
||||
SIMDE_FLOAT16_VALUE( -741.00), SIMDE_FLOAT16_VALUE( 90.00), SIMDE_FLOAT16_VALUE( 898.00), SIMDE_FLOAT16_VALUE( 306.00) },
|
||||
SIMDE_FLOAT16_VALUE( -959.00) },
|
||||
{ { SIMDE_FLOAT16_VALUE( -791.00), SIMDE_FLOAT16_VALUE( -507.50), SIMDE_FLOAT16_VALUE( -207.38), SIMDE_FLOAT16_VALUE( -195.88),
|
||||
SIMDE_FLOAT16_VALUE( -390.00), SIMDE_FLOAT16_VALUE( -482.75), SIMDE_FLOAT16_VALUE( -778.50), SIMDE_FLOAT16_VALUE( 727.50),
|
||||
SIMDE_FLOAT16_VALUE( -946.50), SIMDE_FLOAT16_VALUE( 708.50), SIMDE_FLOAT16_VALUE( -705.00), SIMDE_FLOAT16_VALUE( 895.00),
|
||||
SIMDE_FLOAT16_VALUE( -46.94), SIMDE_FLOAT16_VALUE( 758.50), SIMDE_FLOAT16_VALUE( -596.00), SIMDE_FLOAT16_VALUE( -669.00),
|
||||
SIMDE_FLOAT16_VALUE( 660.00), SIMDE_FLOAT16_VALUE( 218.25), SIMDE_FLOAT16_VALUE( 485.25), SIMDE_FLOAT16_VALUE( 948.00),
|
||||
SIMDE_FLOAT16_VALUE( 666.50), SIMDE_FLOAT16_VALUE( -16.06), SIMDE_FLOAT16_VALUE( 104.25), SIMDE_FLOAT16_VALUE( -813.50),
|
||||
SIMDE_FLOAT16_VALUE( -333.25), SIMDE_FLOAT16_VALUE( 246.50), SIMDE_FLOAT16_VALUE( -772.50), SIMDE_FLOAT16_VALUE( -74.06),
|
||||
SIMDE_FLOAT16_VALUE( -663.50), SIMDE_FLOAT16_VALUE( -874.50), SIMDE_FLOAT16_VALUE( -768.00), SIMDE_FLOAT16_VALUE( -454.50) },
|
||||
SIMDE_FLOAT16_VALUE( -946.50) },
|
||||
{ { SIMDE_FLOAT16_VALUE( -382.00), SIMDE_FLOAT16_VALUE( 24.48), SIMDE_FLOAT16_VALUE( 349.50), SIMDE_FLOAT16_VALUE( 228.00),
|
||||
SIMDE_FLOAT16_VALUE( 542.00), SIMDE_FLOAT16_VALUE( 571.00), SIMDE_FLOAT16_VALUE( -44.53), SIMDE_FLOAT16_VALUE( 595.00),
|
||||
SIMDE_FLOAT16_VALUE( 279.75), SIMDE_FLOAT16_VALUE( 250.25), SIMDE_FLOAT16_VALUE( 490.25), SIMDE_FLOAT16_VALUE( -767.00),
|
||||
SIMDE_FLOAT16_VALUE( 8.94), SIMDE_FLOAT16_VALUE( 894.00), SIMDE_FLOAT16_VALUE( -436.25), SIMDE_FLOAT16_VALUE( -330.75),
|
||||
SIMDE_FLOAT16_VALUE( 112.38), SIMDE_FLOAT16_VALUE( -951.00), SIMDE_FLOAT16_VALUE( -383.00), SIMDE_FLOAT16_VALUE( -221.12),
|
||||
SIMDE_FLOAT16_VALUE( 32.81), SIMDE_FLOAT16_VALUE( 721.50), SIMDE_FLOAT16_VALUE( -34.78), SIMDE_FLOAT16_VALUE( 699.50),
|
||||
SIMDE_FLOAT16_VALUE( -32.19), SIMDE_FLOAT16_VALUE( 192.75), SIMDE_FLOAT16_VALUE( -374.50), SIMDE_FLOAT16_VALUE( 304.25),
|
||||
SIMDE_FLOAT16_VALUE( 318.25), SIMDE_FLOAT16_VALUE( -142.62), SIMDE_FLOAT16_VALUE( 849.50), SIMDE_FLOAT16_VALUE( 936.50) },
|
||||
SIMDE_FLOAT16_VALUE( -951.00) },
|
||||
{ { SIMDE_FLOAT16_VALUE( 882.00), SIMDE_FLOAT16_VALUE( 199.12), SIMDE_FLOAT16_VALUE( 164.50), SIMDE_FLOAT16_VALUE( 423.75),
|
||||
SIMDE_FLOAT16_VALUE( -229.62), SIMDE_FLOAT16_VALUE( -880.00), SIMDE_FLOAT16_VALUE( 18.75), SIMDE_FLOAT16_VALUE( -950.00),
|
||||
SIMDE_FLOAT16_VALUE( 370.25), SIMDE_FLOAT16_VALUE( -491.00), SIMDE_FLOAT16_VALUE( -717.00), SIMDE_FLOAT16_VALUE( -621.00),
|
||||
SIMDE_FLOAT16_VALUE( -597.00), SIMDE_FLOAT16_VALUE( -153.25), SIMDE_FLOAT16_VALUE( 48.25), SIMDE_FLOAT16_VALUE( 515.50),
|
||||
SIMDE_FLOAT16_VALUE( -104.31), SIMDE_FLOAT16_VALUE( 665.50), SIMDE_FLOAT16_VALUE( -705.50), SIMDE_FLOAT16_VALUE( 928.50),
|
||||
SIMDE_FLOAT16_VALUE( 386.50), SIMDE_FLOAT16_VALUE( 259.75), SIMDE_FLOAT16_VALUE( 628.00), SIMDE_FLOAT16_VALUE( -645.50),
|
||||
SIMDE_FLOAT16_VALUE( -547.50), SIMDE_FLOAT16_VALUE( -746.50), SIMDE_FLOAT16_VALUE( 658.50), SIMDE_FLOAT16_VALUE( 770.50),
|
||||
SIMDE_FLOAT16_VALUE( 110.81), SIMDE_FLOAT16_VALUE( 508.50), SIMDE_FLOAT16_VALUE( 707.00), SIMDE_FLOAT16_VALUE( -7.41) },
|
||||
SIMDE_FLOAT16_VALUE( -950.00) },
|
||||
{ { SIMDE_FLOAT16_VALUE( -292.50), SIMDE_FLOAT16_VALUE( -128.38), SIMDE_FLOAT16_VALUE( -584.00), SIMDE_FLOAT16_VALUE( 478.00),
|
||||
SIMDE_FLOAT16_VALUE( -8.43), SIMDE_FLOAT16_VALUE( 435.00), SIMDE_FLOAT16_VALUE( 528.00), SIMDE_FLOAT16_VALUE( -638.00),
|
||||
SIMDE_FLOAT16_VALUE( 944.00), SIMDE_FLOAT16_VALUE( 811.00), SIMDE_FLOAT16_VALUE( -259.00), SIMDE_FLOAT16_VALUE( -653.00),
|
||||
SIMDE_FLOAT16_VALUE( -342.00), SIMDE_FLOAT16_VALUE( 789.00), SIMDE_FLOAT16_VALUE( 862.50), SIMDE_FLOAT16_VALUE( 553.50),
|
||||
SIMDE_FLOAT16_VALUE( 454.50), SIMDE_FLOAT16_VALUE( -843.00), SIMDE_FLOAT16_VALUE( 482.00), SIMDE_FLOAT16_VALUE( -159.00),
|
||||
SIMDE_FLOAT16_VALUE( 416.75), SIMDE_FLOAT16_VALUE( 110.12), SIMDE_FLOAT16_VALUE( 195.38), SIMDE_FLOAT16_VALUE( 869.00),
|
||||
SIMDE_FLOAT16_VALUE( 363.50), SIMDE_FLOAT16_VALUE( -146.00), SIMDE_FLOAT16_VALUE( 640.00), SIMDE_FLOAT16_VALUE( -525.50),
|
||||
SIMDE_FLOAT16_VALUE( -637.50), SIMDE_FLOAT16_VALUE( 347.00), SIMDE_FLOAT16_VALUE( 467.00), SIMDE_FLOAT16_VALUE( 70.00) },
|
||||
SIMDE_FLOAT16_VALUE( -843.00) },
|
||||
{ { SIMDE_FLOAT16_VALUE( -781.50), SIMDE_FLOAT16_VALUE( 883.00), SIMDE_FLOAT16_VALUE( -452.00), SIMDE_FLOAT16_VALUE( 210.25),
|
||||
SIMDE_FLOAT16_VALUE( 318.25), SIMDE_FLOAT16_VALUE( -924.00), SIMDE_FLOAT16_VALUE( 572.00), SIMDE_FLOAT16_VALUE( 262.25),
|
||||
SIMDE_FLOAT16_VALUE( 887.00), SIMDE_FLOAT16_VALUE( -687.00), SIMDE_FLOAT16_VALUE( 609.50), SIMDE_FLOAT16_VALUE( -454.75),
|
||||
SIMDE_FLOAT16_VALUE( -898.00), SIMDE_FLOAT16_VALUE( 472.00), SIMDE_FLOAT16_VALUE( -901.00), SIMDE_FLOAT16_VALUE( 556.50),
|
||||
SIMDE_FLOAT16_VALUE( 629.00), SIMDE_FLOAT16_VALUE( 581.00), SIMDE_FLOAT16_VALUE( -602.50), SIMDE_FLOAT16_VALUE( 46.00),
|
||||
SIMDE_FLOAT16_VALUE( -309.00), SIMDE_FLOAT16_VALUE( 593.00), SIMDE_FLOAT16_VALUE( -84.81), SIMDE_FLOAT16_VALUE( -945.50),
|
||||
SIMDE_FLOAT16_VALUE( -553.00), SIMDE_FLOAT16_VALUE( -445.00), SIMDE_FLOAT16_VALUE( -471.00), SIMDE_FLOAT16_VALUE( -190.75),
|
||||
SIMDE_FLOAT16_VALUE( 902.00), SIMDE_FLOAT16_VALUE( 996.00), SIMDE_FLOAT16_VALUE( 879.50), SIMDE_FLOAT16_VALUE( -879.00) },
|
||||
SIMDE_FLOAT16_VALUE( -945.50) },
|
||||
};
|
||||
|
||||
for (size_t i = 0 ; i < (sizeof(test_vec) / sizeof(test_vec[0])) ; i++) {
|
||||
simde__m512h a = simde_mm512_loadu_ph(test_vec[i].a);
|
||||
simde_float16 r = simde_mm512_reduce_min_ph(a);
|
||||
simde_assert_equal_f16(r, test_vec[i].r, 1);
|
||||
}
|
||||
|
||||
return 0;
|
||||
#else
|
||||
fputc('\n', stdout);
|
||||
|
||||
for (int i = 0; i < 8; i++) {
|
||||
simde__m512h a = simde_test_x86_random_f16x32(SIMDE_FLOAT16_VALUE(-1000.0), SIMDE_FLOAT16_VALUE(1000.0));
|
||||
simde_float16 r = simde_mm512_reduce_min_ph(a);
|
||||
|
||||
simde_test_x86_write_f16x32(2, a, SIMDE_TEST_VEC_POS_FIRST);
|
||||
simde_test_codegen_write_f16(2, r, SIMDE_TEST_VEC_POS_LAST);
|
||||
}
|
||||
return 1;
|
||||
#endif
|
||||
}
|
||||
#endif // SIMDE_FLOAT16_IS_SCALAR
|
||||
|
||||
static int
|
||||
test_simde_mm512_reduce_max_epi32 (SIMDE_MUNIT_TEST_ARGS) {
|
||||
#if 1
|
||||
static const struct {
|
||||
const int32_t a[16];
|
||||
int32_t r;
|
||||
} test_vec[] = {
|
||||
{ { -INT32_C( 813481257), INT32_C( 546817848), -INT32_C( 1757264748), INT32_C( 769874228), INT32_C( 460183175), -INT32_C( 678992654), INT32_C( 4370223), INT32_C( 1518532483),
|
||||
INT32_C( 1915356473), INT32_C( 1637007821), INT32_C( 989385734), -INT32_C( 1251484626), -INT32_C( 1513040718), INT32_C( 1736202040), -INT32_C( 1989689850), -INT32_C( 270210379) },
|
||||
INT32_C( 1915356473) },
|
||||
{ { -INT32_C( 1134489873), -INT32_C( 719457329), -INT32_C( 166783288), -INT32_C( 1532266766), -INT32_C( 2109113526), -INT32_C( 655702574), INT32_C( 962744707), INT32_C( 724059707),
|
||||
INT32_C( 602376532), INT32_C( 1157170556), INT32_C( 221906971), -INT32_C( 911088257), INT32_C( 843905888), INT32_C( 1141585600), -INT32_C( 1015190137), INT32_C( 133080499) },
|
||||
INT32_C( 1157170556) },
|
||||
{ { -INT32_C( 1440033490), -INT32_C( 168877094), -INT32_C( 1425921748), INT32_C( 1869919247), INT32_C( 1872937135), INT32_C( 2125704694), -INT32_C( 851365862), INT32_C( 64237525),
|
||||
-INT32_C( 542179836), INT32_C( 1322556706), -INT32_C( 705046586), INT32_C( 977628555), INT32_C( 615114542), -INT32_C( 1365090924), INT32_C( 1669063565), INT32_C( 392580882) },
|
||||
INT32_C( 2125704694) },
|
||||
{ { INT32_C( 1878398029), INT32_C( 2025704113), INT32_C( 743290529), INT32_C( 1382453796), INT32_C( 225841273), -INT32_C( 88401555), INT32_C( 257767164), -INT32_C( 752434043),
|
||||
-INT32_C( 1975378728), -INT32_C( 2013134618), -INT32_C( 625717322), INT32_C( 1529617378), -INT32_C( 1737907413), -INT32_C( 1198381892), -INT32_C( 523767717), -INT32_C( 1934365260) },
|
||||
INT32_C( 2025704113) },
|
||||
{ { -INT32_C( 266930679), -INT32_C( 1401415434), INT32_C( 1250372712), INT32_C( 1923461959), INT32_C( 302648918), -INT32_C( 1899258573), INT32_C( 1097765517), -INT32_C( 1983044992),
|
||||
INT32_C( 242869272), INT32_C( 1689973244), INT32_C( 1705918750), INT32_C( 1272468725), -INT32_C( 1788943774), INT32_C( 203630975), INT32_C( 994939579), -INT32_C( 859497548) },
|
||||
INT32_C( 1923461959) },
|
||||
{ { -INT32_C( 69583105), INT32_C( 1314952240), -INT32_C( 877457706), -INT32_C( 988378270), -INT32_C( 312839058), INT32_C( 1509588637), -INT32_C( 996915440), INT32_C( 1636850018),
|
||||
-INT32_C( 933401960), -INT32_C( 736707074), INT32_C( 782223819), -INT32_C( 1007438251), -INT32_C( 927970006), -INT32_C( 618550581), INT32_C( 1419752946), -INT32_C( 1481232625) },
|
||||
INT32_C( 1636850018) },
|
||||
{ { -INT32_C( 1737550951), -INT32_C( 1687386672), -INT32_C( 1547105202), -INT32_C( 328811326), -INT32_C( 709617910), -INT32_C( 1280191039), -INT32_C( 1710731125), INT32_C( 423739008),
|
||||
-INT32_C( 1582190383), -INT32_C( 2093212107), -INT32_C( 332986838), -INT32_C( 858223166), INT32_C( 1721929124), -INT32_C( 317107358), INT32_C( 596058531), -INT32_C( 1338128161) },
|
||||
INT32_C( 1721929124) },
|
||||
{ { -INT32_C( 1387139464), INT32_C( 909217292), INT32_C( 1445091476), -INT32_C( 1977353243), -INT32_C( 353319544), -INT32_C( 1143469800), INT32_C( 182411051), -INT32_C( 1598350296),
|
||||
INT32_C( 390990858), INT32_C( 776830874), -INT32_C( 1132105513), -INT32_C( 213473173), -INT32_C( 2049100179), INT32_C( 1799402816), INT32_C( 1031085845), INT32_C( 1188900923) },
|
||||
INT32_C( 1799402816) },
|
||||
};
|
||||
|
||||
for (size_t i = 0 ; i < (sizeof(test_vec) / sizeof(test_vec[0])) ; i++) {
|
||||
simde__m512i a = simde_mm512_loadu_epi32(test_vec[i].a);
|
||||
int32_t r = simde_mm512_reduce_max_epi32(a);
|
||||
simde_assert_equal_i32(r, test_vec[i].r);
|
||||
}
|
||||
|
||||
return 0;
|
||||
#else
|
||||
fputc('\n', stdout);
|
||||
|
||||
for (int i = 0; i < 8; i++) {
|
||||
simde__m512i a = simde_test_x86_random_i32x16();
|
||||
int32_t r = simde_mm512_reduce_max_epi32(a);
|
||||
|
||||
simde_test_x86_write_i32x16(2, a, SIMDE_TEST_VEC_POS_FIRST);
|
||||
simde_test_codegen_write_i32(2, r, SIMDE_TEST_VEC_POS_LAST);
|
||||
}
|
||||
return 1;
|
||||
#endif
|
||||
}
|
||||
|
||||
static int
|
||||
test_simde_mm512_reduce_max_epi64 (SIMDE_MUNIT_TEST_ARGS) {
|
||||
#if 1
|
||||
static const struct {
|
||||
const int64_t a[8];
|
||||
int64_t r;
|
||||
} test_vec[] = {
|
||||
{ { -INT64_C( 7414994043216169726), -INT64_C( 7605818785096979682), INT64_C( 8143719191631782972), -INT64_C( 1937506738173131693),
|
||||
INT64_C( 6330432945267905037), INT64_C( 1735163336545740898), INT64_C( 8346079544720478957), -INT64_C( 4987558819094325760) },
|
||||
INT64_C( 8346079544720478957) },
|
||||
{ { -INT64_C( 9096191391897426125), INT64_C( 5832746886490020606), INT64_C( 7312303613956729575), -INT64_C( 3241729026166292581),
|
||||
-INT64_C( 3127745723160789000), -INT64_C( 7740947043993020194), INT64_C( 7320062202497156299), -INT64_C( 1762962511517262060) },
|
||||
INT64_C( 7320062202497156299) },
|
||||
{ { -INT64_C( 6242948083026573135), INT64_C( 8678574663337184047), INT64_C( 3886957366707030977), INT64_C( 285259843876069150),
|
||||
-INT64_C( 4994519976962755526), -INT64_C( 2876103514003105039), INT64_C( 2119319649943600915), -INT64_C( 51473889080159244) },
|
||||
INT64_C( 8678574663337184047) },
|
||||
{ { -INT64_C( 6099364031695039724), INT64_C( 809909028452430158), -INT64_C( 1496697051629510370), -INT64_C( 7295415206456236548),
|
||||
-INT64_C( 3984679092976236979), INT64_C( 8829425114441186436), INT64_C( 7921499077913069580), -INT64_C( 1849024954399514826) },
|
||||
INT64_C( 8829425114441186436) },
|
||||
{ { -INT64_C( 6342579952647499849), -INT64_C( 6956744673328879459), INT64_C( 1392615992519166837), INT64_C( 3111747048904295343),
|
||||
INT64_C( 6593085956190707125), -INT64_C( 4129016558291409792), -INT64_C( 7654430629652834860), INT64_C( 8007977084563330178) },
|
||||
INT64_C( 8007977084563330178) },
|
||||
{ { INT64_C( 6288088135339835177), INT64_C( 3855395061599213674), -INT64_C( 5770047711820173966), INT64_C( 29775698208410176),
|
||||
-INT64_C( 2200524676799156153), INT64_C( 8095535882043253186), INT64_C( 3181992064485638220), -INT64_C( 2426155323914465666) },
|
||||
INT64_C( 8095535882043253186) },
|
||||
{ { INT64_C( 2997553912019237953), -INT64_C( 6790683502249757100), -INT64_C( 4828348912931009819), -INT64_C( 683027937610423023),
|
||||
INT64_C( 5345852979216810657), INT64_C( 609216452785700222), -INT64_C( 2097595708107813143), -INT64_C( 385040890218285828) },
|
||||
INT64_C( 5345852979216810657) },
|
||||
{ { INT64_C( 2148835632955348881), -INT64_C( 5126954761824669777), -INT64_C( 8671747556685925388), -INT64_C( 3383644509044133705),
|
||||
-INT64_C( 1372144066370204872), INT64_C( 4548801973779883673), INT64_C( 8745053429732540234), -INT64_C( 5770074887091022372) },
|
||||
INT64_C( 8745053429732540234) },
|
||||
};
|
||||
|
||||
for (size_t i = 0 ; i < (sizeof(test_vec) / sizeof(test_vec[0])) ; i++) {
|
||||
simde__m512i a = simde_mm512_loadu_epi64(test_vec[i].a);
|
||||
int64_t r = simde_mm512_reduce_max_epi64(a);
|
||||
simde_assert_equal_i64(r, test_vec[i].r);
|
||||
}
|
||||
|
||||
return 0;
|
||||
#else
|
||||
fputc('\n', stdout);
|
||||
|
||||
for (int i = 0; i < 8; i++) {
|
||||
simde__m512i a = simde_test_x86_random_i64x8();
|
||||
int64_t r = simde_mm512_reduce_max_epi64(a);
|
||||
|
||||
simde_test_x86_write_i64x8(2, a, SIMDE_TEST_VEC_POS_FIRST);
|
||||
simde_test_codegen_write_i64(2, r, SIMDE_TEST_VEC_POS_LAST);
|
||||
}
|
||||
return 1;
|
||||
#endif
|
||||
}
|
||||
|
||||
static int
|
||||
test_simde_mm512_reduce_max_epu32 (SIMDE_MUNIT_TEST_ARGS) {
|
||||
#if 1
|
||||
static const struct {
|
||||
const uint32_t a[16];
|
||||
uint32_t r;
|
||||
} test_vec[] = {
|
||||
{ { UINT32_C( 343028045), UINT32_C(3568367038), UINT32_C(1711941916), UINT32_C(1858791686), UINT32_C(1934254942), UINT32_C( 861200181), UINT32_C(2206274930), UINT32_C(3805222293),
|
||||
UINT32_C( 83247430), UINT32_C(1389930038), UINT32_C(3585663695), UINT32_C( 692355787), UINT32_C( 463245030), UINT32_C(3746492525), UINT32_C(2607009541), UINT32_C( 712848100) },
|
||||
UINT32_C(3805222293) },
|
||||
{ { UINT32_C(2855171187), UINT32_C(3942385178), UINT32_C(3015685608), UINT32_C( 501023543), UINT32_C(4265114001), UINT32_C(1876854634), UINT32_C( 990527830), UINT32_C(3865413747),
|
||||
UINT32_C( 378574076), UINT32_C(2197851546), UINT32_C(2033631298), UINT32_C(1435964355), UINT32_C(4149464973), UINT32_C(2909155670), UINT32_C(3857215858), UINT32_C(4123807225) },
|
||||
UINT32_C(4265114001) },
|
||||
{ { UINT32_C(2081119457), UINT32_C( 738135273), UINT32_C(2409969100), UINT32_C(3605281865), UINT32_C(1657616395), UINT32_C(3691983721), UINT32_C(2646734756), UINT32_C( 647138628),
|
||||
UINT32_C(3550650090), UINT32_C(1996464554), UINT32_C( 520463574), UINT32_C(3958762208), UINT32_C(2337128994), UINT32_C(2590465270), UINT32_C(2553817427), UINT32_C(2696858294) },
|
||||
UINT32_C(3958762208) },
|
||||
{ { UINT32_C( 309616744), UINT32_C(3616043777), UINT32_C(4160196119), UINT32_C(2598562936), UINT32_C(2770677935), UINT32_C(3762261388), UINT32_C(1819834294), UINT32_C(2852992578),
|
||||
UINT32_C(2545779094), UINT32_C( 191776244), UINT32_C(1258448339), UINT32_C( 31843410), UINT32_C(2712013588), UINT32_C(1317135768), UINT32_C(2679830877), UINT32_C(3309946671) },
|
||||
UINT32_C(4160196119) },
|
||||
{ { UINT32_C(1012663880), UINT32_C( 524798540), UINT32_C(2188069168), UINT32_C(1115901998), UINT32_C(4091750747), UINT32_C(1799447566), UINT32_C(2349530205), UINT32_C( 206656707),
|
||||
UINT32_C(2789780826), UINT32_C(2831585400), UINT32_C( 120205785), UINT32_C(3712658817), UINT32_C(3838848470), UINT32_C(4015002258), UINT32_C(3514587662), UINT32_C( 165531054) },
|
||||
UINT32_C(4091750747) },
|
||||
{ { UINT32_C(4088342139), UINT32_C(2409330102), UINT32_C( 681035174), UINT32_C(1208344946), UINT32_C(2687292686), UINT32_C(4119887079), UINT32_C(2244414679), UINT32_C(1418634457),
|
||||
UINT32_C(2152152778), UINT32_C(1511056051), UINT32_C( 427992999), UINT32_C(2522974088), UINT32_C(1144491612), UINT32_C(3778660106), UINT32_C(2892431571), UINT32_C(1862399397) },
|
||||
UINT32_C(4119887079) },
|
||||
{ { UINT32_C(3891284019), UINT32_C(3527475243), UINT32_C( 804045735), UINT32_C(2797948234), UINT32_C(3874159835), UINT32_C(2529633475), UINT32_C(3376623140), UINT32_C(1463370788),
|
||||
UINT32_C(3074304396), UINT32_C(3498737449), UINT32_C(2365552194), UINT32_C(2670970051), UINT32_C(2223316417), UINT32_C(1713065025), UINT32_C(2670681723), UINT32_C( 787900578) },
|
||||
UINT32_C(3891284019) },
|
||||
{ { UINT32_C(3135649169), UINT32_C(4153045172), UINT32_C(2843970022), UINT32_C( 256423502), UINT32_C( 362008020), UINT32_C(2507910682), UINT32_C(2922687244), UINT32_C(2782734867),
|
||||
UINT32_C( 341820255), UINT32_C( 420211251), UINT32_C(3250753139), UINT32_C( 433064773), UINT32_C(4063126744), UINT32_C( 528984594), UINT32_C(1758313301), UINT32_C(1158523622) },
|
||||
UINT32_C(4153045172) },
|
||||
};
|
||||
|
||||
for (size_t i = 0 ; i < (sizeof(test_vec) / sizeof(test_vec[0])) ; i++) {
|
||||
simde__m512i a = simde_mm512_loadu_epi32(test_vec[i].a);
|
||||
uint32_t r = simde_mm512_reduce_max_epu32(a);
|
||||
simde_assert_equal_u32(r, test_vec[i].r);
|
||||
}
|
||||
|
||||
return 0;
|
||||
#else
|
||||
fputc('\n', stdout);
|
||||
|
||||
for (int i = 0; i < 8; i++) {
|
||||
simde__m512i a = simde_test_x86_random_u32x16();
|
||||
uint32_t r = simde_mm512_reduce_max_epu32(a);
|
||||
|
||||
simde_test_x86_write_u32x16(2, a, SIMDE_TEST_VEC_POS_FIRST);
|
||||
simde_test_codegen_write_u32(2, r, SIMDE_TEST_VEC_POS_LAST);
|
||||
}
|
||||
return 1;
|
||||
#endif
|
||||
}
|
||||
|
||||
static int
|
||||
test_simde_mm512_reduce_max_epu64 (SIMDE_MUNIT_TEST_ARGS) {
|
||||
#if 1
|
||||
static const struct {
|
||||
const uint64_t a[8];
|
||||
uint64_t r;
|
||||
} test_vec[] = {
|
||||
{ { UINT64_C(12696813536712629165), UINT64_C( 7789281467542717539), UINT64_C( 4525567160522043380), UINT64_C(11227443008793002145),
|
||||
UINT64_C( 8562164309004119934), UINT64_C( 5139803803857927599), UINT64_C( 1713891746710645295), UINT64_C( 3981527010801014199) },
|
||||
UINT64_C(12696813536712629165) },
|
||||
{ { UINT64_C(10570560629856925736), UINT64_C( 5189218905104243049), UINT64_C(15908573315603770681), UINT64_C(10475306114705666160),
|
||||
UINT64_C( 5634706707999209916), UINT64_C(13094512215385091160), UINT64_C(10897351171457190970), UINT64_C( 4347697128206744923) },
|
||||
UINT64_C(15908573315603770681) },
|
||||
{ { UINT64_C(18017510826358612952), UINT64_C( 6767543693926405562), UINT64_C(15451840953525751729), UINT64_C( 2698202965668998836),
|
||||
UINT64_C( 1563572998833851669), UINT64_C(17546646755910294786), UINT64_C(16849719055174286982), UINT64_C( 8708992338335986025) },
|
||||
UINT64_C(18017510826358612952) },
|
||||
{ { UINT64_C(12559661590589193947), UINT64_C( 6067850417307621375), UINT64_C(11867314028861980819), UINT64_C( 4140838159734460316),
|
||||
UINT64_C( 9750217913778808821), UINT64_C( 897903492646642515), UINT64_C(10510705488852994558), UINT64_C( 7199857700817090645) },
|
||||
UINT64_C(12559661590589193947) },
|
||||
{ { UINT64_C( 7619901548923214767), UINT64_C( 9582533587170396279), UINT64_C(12343974425522000073), UINT64_C(10855163734446170067),
|
||||
UINT64_C( 8441026627282774692), UINT64_C( 8583685717822320148), UINT64_C( 5490313974412270896), UINT64_C( 8925909986216676962) },
|
||||
UINT64_C(12343974425522000073) },
|
||||
{ { UINT64_C( 5571051943594732765), UINT64_C( 4984648152413418760), UINT64_C( 5163655034814816996), UINT64_C( 5178417649256773258),
|
||||
UINT64_C( 8548521956102837019), UINT64_C( 8467429829253040680), UINT64_C(15341646587303644604), UINT64_C( 171721619091650736) },
|
||||
UINT64_C(15341646587303644604) },
|
||||
{ { UINT64_C( 2380990199054697767), UINT64_C( 5587244825958037379), UINT64_C( 9605288313324722734), UINT64_C(13562310543210938958),
|
||||
UINT64_C( 765712574167748230), UINT64_C( 1040516090731363986), UINT64_C( 9393332572190563842), UINT64_C( 9486533534634474324) },
|
||||
UINT64_C(13562310543210938958) },
|
||||
{ { UINT64_C(16505589632491255677), UINT64_C(15532486122730434208), UINT64_C( 4219320784552596695), UINT64_C(12863627665166517764),
|
||||
UINT64_C(14481543576753243840), UINT64_C( 5882499881872392437), UINT64_C( 6776487360312725738), UINT64_C(13265884829110447665) },
|
||||
UINT64_C(16505589632491255677) },
|
||||
};
|
||||
|
||||
for (size_t i = 0 ; i < (sizeof(test_vec) / sizeof(test_vec[0])) ; i++) {
|
||||
simde__m512i a = simde_mm512_loadu_epi64(test_vec[i].a);
|
||||
uint64_t r = simde_mm512_reduce_max_epu64(a);
|
||||
simde_assert_equal_u64(r, test_vec[i].r);
|
||||
}
|
||||
|
||||
return 0;
|
||||
#else
|
||||
fputc('\n', stdout);
|
||||
|
||||
for (int i = 0; i < 8; i++) {
|
||||
simde__m512i a = simde_test_x86_random_u64x8();
|
||||
uint64_t r = simde_mm512_reduce_max_epu64(a);
|
||||
|
||||
simde_test_x86_write_u64x8(2, a, SIMDE_TEST_VEC_POS_FIRST);
|
||||
simde_test_codegen_write_u64(2, r, SIMDE_TEST_VEC_POS_LAST);
|
||||
}
|
||||
return 1;
|
||||
#endif
|
||||
}
|
||||
|
||||
static int
|
||||
test_simde_mm512_reduce_max_ps (SIMDE_MUNIT_TEST_ARGS) {
|
||||
#if 1
|
||||
static const struct {
|
||||
const simde_float32 a[16];
|
||||
simde_float32 r;
|
||||
} test_vec[] = {
|
||||
{ { SIMDE_FLOAT32_C( -227.80), SIMDE_FLOAT32_C( -813.20), SIMDE_FLOAT32_C( -774.12), SIMDE_FLOAT32_C( 352.82),
|
||||
SIMDE_FLOAT32_C( 578.16), SIMDE_FLOAT32_C( -784.99), SIMDE_FLOAT32_C( 476.83), SIMDE_FLOAT32_C( -137.24),
|
||||
SIMDE_FLOAT32_C( 387.10), SIMDE_FLOAT32_C( -103.78), SIMDE_FLOAT32_C( 749.70), SIMDE_FLOAT32_C( -117.98),
|
||||
SIMDE_FLOAT32_C( 705.36), SIMDE_FLOAT32_C( 729.23), SIMDE_FLOAT32_C( -858.49), SIMDE_FLOAT32_C( 4.86) },
|
||||
SIMDE_FLOAT32_C( 749.70) },
|
||||
{ { SIMDE_FLOAT32_C( -623.44), SIMDE_FLOAT32_C( 632.93), SIMDE_FLOAT32_C( 553.05), SIMDE_FLOAT32_C( -971.84),
|
||||
SIMDE_FLOAT32_C( -455.67), SIMDE_FLOAT32_C( 249.48), SIMDE_FLOAT32_C( -32.31), SIMDE_FLOAT32_C( 544.55),
|
||||
SIMDE_FLOAT32_C( 698.98), SIMDE_FLOAT32_C( 403.02), SIMDE_FLOAT32_C( 222.74), SIMDE_FLOAT32_C( -155.96),
|
||||
SIMDE_FLOAT32_C( -18.78), SIMDE_FLOAT32_C( -866.45), SIMDE_FLOAT32_C( -946.22), SIMDE_FLOAT32_C( 753.43) },
|
||||
SIMDE_FLOAT32_C( 753.43) },
|
||||
{ { SIMDE_FLOAT32_C( -679.65), SIMDE_FLOAT32_C( -720.34), SIMDE_FLOAT32_C( 106.25), SIMDE_FLOAT32_C( 898.51),
|
||||
SIMDE_FLOAT32_C( -505.33), SIMDE_FLOAT32_C( -416.92), SIMDE_FLOAT32_C( -238.73), SIMDE_FLOAT32_C( 881.77),
|
||||
SIMDE_FLOAT32_C( 479.30), SIMDE_FLOAT32_C( -489.03), SIMDE_FLOAT32_C( -236.21), SIMDE_FLOAT32_C( 184.67),
|
||||
SIMDE_FLOAT32_C( -759.81), SIMDE_FLOAT32_C( -94.70), SIMDE_FLOAT32_C( -810.47), SIMDE_FLOAT32_C( -383.24) },
|
||||
SIMDE_FLOAT32_C( 898.51) },
|
||||
{ { SIMDE_FLOAT32_C( -461.76), SIMDE_FLOAT32_C( 742.58), SIMDE_FLOAT32_C( -355.08), SIMDE_FLOAT32_C( 82.57),
|
||||
SIMDE_FLOAT32_C( -7.94), SIMDE_FLOAT32_C( 612.61), SIMDE_FLOAT32_C( -372.89), SIMDE_FLOAT32_C( -308.96),
|
||||
SIMDE_FLOAT32_C( 15.63), SIMDE_FLOAT32_C( 849.86), SIMDE_FLOAT32_C( 535.09), SIMDE_FLOAT32_C( 996.85),
|
||||
SIMDE_FLOAT32_C( 983.41), SIMDE_FLOAT32_C( 588.87), SIMDE_FLOAT32_C( 750.28), SIMDE_FLOAT32_C( -696.25) },
|
||||
SIMDE_FLOAT32_C( 996.85) },
|
||||
{ { SIMDE_FLOAT32_C( 868.54), SIMDE_FLOAT32_C( -143.47), SIMDE_FLOAT32_C( -797.74), SIMDE_FLOAT32_C( -636.79),
|
||||
SIMDE_FLOAT32_C( 439.61), SIMDE_FLOAT32_C( -36.47), SIMDE_FLOAT32_C( -755.02), SIMDE_FLOAT32_C( -81.08),
|
||||
SIMDE_FLOAT32_C( 474.49), SIMDE_FLOAT32_C( 8.77), SIMDE_FLOAT32_C( -896.42), SIMDE_FLOAT32_C( 714.69),
|
||||
SIMDE_FLOAT32_C( 914.07), SIMDE_FLOAT32_C( -706.89), SIMDE_FLOAT32_C( -668.55), SIMDE_FLOAT32_C( -547.69) },
|
||||
SIMDE_FLOAT32_C( 914.07) },
|
||||
{ { SIMDE_FLOAT32_C( -964.31), SIMDE_FLOAT32_C( -23.63), SIMDE_FLOAT32_C( 534.87), SIMDE_FLOAT32_C( 27.75),
|
||||
SIMDE_FLOAT32_C( -411.02), SIMDE_FLOAT32_C( -838.01), SIMDE_FLOAT32_C( 718.79), SIMDE_FLOAT32_C( 604.61),
|
||||
SIMDE_FLOAT32_C( -988.15), SIMDE_FLOAT32_C( 253.88), SIMDE_FLOAT32_C( 601.47), SIMDE_FLOAT32_C( 995.25),
|
||||
SIMDE_FLOAT32_C( -157.24), SIMDE_FLOAT32_C( 351.75), SIMDE_FLOAT32_C( -701.00), SIMDE_FLOAT32_C( -288.71) },
|
||||
SIMDE_FLOAT32_C( 995.25) },
|
||||
{ { SIMDE_FLOAT32_C( -791.72), SIMDE_FLOAT32_C( -498.74), SIMDE_FLOAT32_C( 74.50), SIMDE_FLOAT32_C( 647.89),
|
||||
SIMDE_FLOAT32_C( 464.79), SIMDE_FLOAT32_C( 319.48), SIMDE_FLOAT32_C( -433.19), SIMDE_FLOAT32_C( -60.72),
|
||||
SIMDE_FLOAT32_C( -671.76), SIMDE_FLOAT32_C( -329.60), SIMDE_FLOAT32_C( -346.03), SIMDE_FLOAT32_C( -757.68),
|
||||
SIMDE_FLOAT32_C( -36.49), SIMDE_FLOAT32_C( -14.58), SIMDE_FLOAT32_C( -305.38), SIMDE_FLOAT32_C( -0.80) },
|
||||
SIMDE_FLOAT32_C( 647.89) },
|
||||
{ { SIMDE_FLOAT32_C( 961.78), SIMDE_FLOAT32_C( -770.51), SIMDE_FLOAT32_C( -973.05), SIMDE_FLOAT32_C( -449.24),
|
||||
SIMDE_FLOAT32_C( -608.52), SIMDE_FLOAT32_C( 745.74), SIMDE_FLOAT32_C( -844.63), SIMDE_FLOAT32_C( -596.67),
|
||||
SIMDE_FLOAT32_C( -0.38), SIMDE_FLOAT32_C( 756.84), SIMDE_FLOAT32_C( -601.42), SIMDE_FLOAT32_C( 842.38),
|
||||
SIMDE_FLOAT32_C( 108.59), SIMDE_FLOAT32_C( -302.42), SIMDE_FLOAT32_C( -446.33), SIMDE_FLOAT32_C( 316.87) },
|
||||
SIMDE_FLOAT32_C( 961.78) },
|
||||
};
|
||||
|
||||
for (size_t i = 0 ; i < (sizeof(test_vec) / sizeof(test_vec[0])) ; i++) {
|
||||
simde__m512 a = simde_mm512_loadu_ps(test_vec[i].a);
|
||||
simde_float32 r = simde_mm512_reduce_max_ps(a);
|
||||
simde_assert_equal_f32(r, test_vec[i].r, 1);
|
||||
}
|
||||
|
||||
return 0;
|
||||
#else
|
||||
fputc('\n', stdout);
|
||||
|
||||
for (int i = 0; i < 8; i++) {
|
||||
simde__m512 a = simde_test_x86_random_f32x16(SIMDE_FLOAT64_C(-1000.0), SIMDE_FLOAT64_C(1000.0));
|
||||
simde_float32 r = simde_mm512_reduce_max_ps(a);
|
||||
|
||||
simde_test_x86_write_f32x16(2, a, SIMDE_TEST_VEC_POS_FIRST);
|
||||
simde_test_codegen_write_f32(2, r, SIMDE_TEST_VEC_POS_LAST);
|
||||
}
|
||||
return 1;
|
||||
#endif
|
||||
}
|
||||
|
||||
static int
|
||||
test_simde_mm512_reduce_max_pd (SIMDE_MUNIT_TEST_ARGS) {
|
||||
#if 1
|
||||
static const struct {
|
||||
const simde_float64 a[8];
|
||||
simde_float64 r;
|
||||
} test_vec[] = {
|
||||
{ { SIMDE_FLOAT64_C( 459.52), SIMDE_FLOAT64_C( 440.89), SIMDE_FLOAT64_C( -235.09), SIMDE_FLOAT64_C( 407.51),
|
||||
SIMDE_FLOAT64_C( 179.69), SIMDE_FLOAT64_C( -281.61), SIMDE_FLOAT64_C( 76.27), SIMDE_FLOAT64_C( -950.23) },
|
||||
SIMDE_FLOAT64_C( 459.52) },
|
||||
{ { SIMDE_FLOAT64_C( 718.04), SIMDE_FLOAT64_C( -735.14), SIMDE_FLOAT64_C( 120.42), SIMDE_FLOAT64_C( -576.22),
|
||||
SIMDE_FLOAT64_C( -212.79), SIMDE_FLOAT64_C( -981.04), SIMDE_FLOAT64_C( 830.57), SIMDE_FLOAT64_C( -876.03) },
|
||||
SIMDE_FLOAT64_C( 830.57) },
|
||||
{ { SIMDE_FLOAT64_C( 465.45), SIMDE_FLOAT64_C( -568.15), SIMDE_FLOAT64_C( -493.75), SIMDE_FLOAT64_C( 185.65),
|
||||
SIMDE_FLOAT64_C( -605.41), SIMDE_FLOAT64_C( -901.91), SIMDE_FLOAT64_C( -404.42), SIMDE_FLOAT64_C( -47.69) },
|
||||
SIMDE_FLOAT64_C( 465.45) },
|
||||
{ { SIMDE_FLOAT64_C( -830.44), SIMDE_FLOAT64_C( -2.10), SIMDE_FLOAT64_C( 825.03), SIMDE_FLOAT64_C( 384.89),
|
||||
SIMDE_FLOAT64_C( 282.54), SIMDE_FLOAT64_C( -224.42), SIMDE_FLOAT64_C( -197.52), SIMDE_FLOAT64_C( -257.94) },
|
||||
SIMDE_FLOAT64_C( 825.03) },
|
||||
{ { SIMDE_FLOAT64_C( -783.53), SIMDE_FLOAT64_C( 567.39), SIMDE_FLOAT64_C( -850.43), SIMDE_FLOAT64_C( 396.16),
|
||||
SIMDE_FLOAT64_C( -714.22), SIMDE_FLOAT64_C( 225.84), SIMDE_FLOAT64_C( 445.93), SIMDE_FLOAT64_C( -996.19) },
|
||||
SIMDE_FLOAT64_C( 567.39) },
|
||||
{ { SIMDE_FLOAT64_C( 490.70), SIMDE_FLOAT64_C( -433.65), SIMDE_FLOAT64_C( -572.41), SIMDE_FLOAT64_C( -722.09),
|
||||
SIMDE_FLOAT64_C( -414.69), SIMDE_FLOAT64_C( -741.84), SIMDE_FLOAT64_C( -598.12), SIMDE_FLOAT64_C( -949.24) },
|
||||
SIMDE_FLOAT64_C( 490.70) },
|
||||
{ { SIMDE_FLOAT64_C( -309.98), SIMDE_FLOAT64_C( -91.87), SIMDE_FLOAT64_C( 236.42), SIMDE_FLOAT64_C( 84.60),
|
||||
SIMDE_FLOAT64_C( 6.22), SIMDE_FLOAT64_C( 832.00), SIMDE_FLOAT64_C( -963.09), SIMDE_FLOAT64_C( 175.77) },
|
||||
SIMDE_FLOAT64_C( 832.00) },
|
||||
{ { SIMDE_FLOAT64_C( -170.11), SIMDE_FLOAT64_C( 861.94), SIMDE_FLOAT64_C( -439.33), SIMDE_FLOAT64_C( -887.56),
|
||||
SIMDE_FLOAT64_C( -362.48), SIMDE_FLOAT64_C( 363.15), SIMDE_FLOAT64_C( -145.50), SIMDE_FLOAT64_C( -146.00) },
|
||||
SIMDE_FLOAT64_C( 861.94) },
|
||||
};
|
||||
|
||||
for (size_t i = 0 ; i < (sizeof(test_vec) / sizeof(test_vec[0])) ; i++) {
|
||||
simde__m512d a = simde_mm512_loadu_pd(test_vec[i].a);
|
||||
simde_float64 r = simde_mm512_reduce_max_pd(a);
|
||||
simde_assert_equal_f64(r, test_vec[i].r, 1);
|
||||
}
|
||||
|
||||
return 0;
|
||||
#else
|
||||
fputc('\n', stdout);
|
||||
|
||||
for (int i = 0; i < 8; i++) {
|
||||
simde__m512d a = simde_test_x86_random_f64x8(SIMDE_FLOAT64_C(-1000.0), SIMDE_FLOAT64_C(1000.0));
|
||||
simde_float64 r = simde_mm512_reduce_max_pd(a);
|
||||
|
||||
simde_test_x86_write_f64x8(2, a, SIMDE_TEST_VEC_POS_FIRST);
|
||||
simde_test_codegen_write_f64(2, r, SIMDE_TEST_VEC_POS_LAST);
|
||||
}
|
||||
return 1;
|
||||
#endif
|
||||
}
|
||||
|
||||
static int
|
||||
test_simde_mm512_reduce_min_epi32 (SIMDE_MUNIT_TEST_ARGS) {
|
||||
#if 1
|
||||
static const struct {
|
||||
const int32_t a[16];
|
||||
int32_t r;
|
||||
} test_vec[] = {
|
||||
{ { INT32_C( 566551290), -INT32_C( 1323765948), -INT32_C( 1751293148), INT32_C( 1255507603), -INT32_C( 1340035191), INT32_C( 449616932), -INT32_C( 1739109821), INT32_C( 725375793),
|
||||
-INT32_C( 2125725635), INT32_C( 338846960), INT32_C( 1537986503), -INT32_C( 559579051), INT32_C( 1418642735), -INT32_C( 1536271519), -INT32_C( 700594779), INT32_C( 1560377632) },
|
||||
-INT32_C( 2125725635) },
|
||||
{ { INT32_C( 1792953978), INT32_C( 2055082162), INT32_C( 886385119), -INT32_C( 653034838), -INT32_C( 1590845120), -INT32_C( 1572430852), -INT32_C( 2139585696), INT32_C( 1994226428),
|
||||
INT32_C( 2061548488), -INT32_C( 1426825525), INT32_C( 853526920), -INT32_C( 2079591868), -INT32_C( 1876608621), INT32_C( 892496852), -INT32_C( 340415762), -INT32_C( 329149660) },
|
||||
-INT32_C( 2139585696) },
|
||||
{ { INT32_C( 442974798), INT32_C( 683957152), INT32_C( 1767547685), INT32_C( 703424149), INT32_C( 1941508767), INT32_C( 1823009662), -INT32_C( 1168679275), INT32_C( 1067891185),
|
||||
-INT32_C( 1688662533), -INT32_C( 1899749783), INT32_C( 1475813057), INT32_C( 595649668), INT32_C( 1956067830), -INT32_C( 1176420572), -INT32_C( 1905051491), -INT32_C( 322037007) },
|
||||
-INT32_C( 1905051491) },
|
||||
{ { -INT32_C( 1870125273), INT32_C( 119426117), -INT32_C( 279046806), -INT32_C( 267198727), INT32_C( 996452631), -INT32_C( 2030811671), INT32_C( 1863673982), -INT32_C( 1453530238),
|
||||
INT32_C( 1346036746), -INT32_C( 1705551824), INT32_C( 1737078126), -INT32_C( 1437098861), INT32_C( 786807877), INT32_C( 2142624001), -INT32_C( 1007695295), -INT32_C( 1217573971) },
|
||||
-INT32_C( 2030811671) },
|
||||
{ { INT32_C( 1594337071), INT32_C( 1845059327), -INT32_C( 1495956717), INT32_C( 1682975775), -INT32_C( 359451160), INT32_C( 1349077007), -INT32_C( 1089185774), -INT32_C( 763985501),
|
||||
INT32_C( 657554984), -INT32_C( 258659364), -INT32_C( 845780306), INT32_C( 2133976982), INT32_C( 728351772), INT32_C( 511496716), -INT32_C( 824340437), INT32_C( 966874129) },
|
||||
-INT32_C( 1495956717) },
|
||||
{ { -INT32_C( 1369386286), -INT32_C( 1415645699), -INT32_C( 159894177), INT32_C( 947235356), INT32_C( 2070208110), -INT32_C( 610672464), -INT32_C( 2119534736), -INT32_C( 1648735285),
|
||||
INT32_C( 457906717), INT32_C( 1875307024), INT32_C( 996491039), INT32_C( 1467210473), INT32_C( 1775425464), INT32_C( 658795703), -INT32_C( 1364660509), INT32_C( 1464558137) },
|
||||
-INT32_C( 2119534736) },
|
||||
{ { -INT32_C( 1921870211), -INT32_C( 1610860416), INT32_C( 1624924791), -INT32_C( 172470724), -INT32_C( 581006811), -INT32_C( 654007562), -INT32_C( 897077871), -INT32_C( 1943940593),
|
||||
-INT32_C( 384199831), INT32_C( 1133057740), -INT32_C( 1264295048), -INT32_C( 676766543), -INT32_C( 575404058), INT32_C( 1001830570), INT32_C( 1963277925), INT32_C( 2030118672) },
|
||||
-INT32_C( 1943940593) },
|
||||
{ { -INT32_C( 2040325190), -INT32_C( 1446319055), INT32_C( 22900303), -INT32_C( 1328019510), -INT32_C( 1198683122), -INT32_C( 1426897852), -INT32_C( 1843398270), -INT32_C( 636739552),
|
||||
INT32_C( 1818324795), -INT32_C( 1441453221), INT32_C( 1672180633), -INT32_C( 2011987078), INT32_C( 1413587215), INT32_C( 1744712933), INT32_C( 1308171565), INT32_C( 2032665917) },
|
||||
-INT32_C( 2040325190) },
|
||||
};
|
||||
|
||||
for (size_t i = 0 ; i < (sizeof(test_vec) / sizeof(test_vec[0])) ; i++) {
|
||||
simde__m512i a = simde_mm512_loadu_epi32(test_vec[i].a);
|
||||
int32_t r = simde_mm512_reduce_min_epi32(a);
|
||||
simde_assert_equal_i32(r, test_vec[i].r);
|
||||
}
|
||||
|
||||
return 0;
|
||||
#else
|
||||
fputc('\n', stdout);
|
||||
|
||||
for (int i = 0; i < 8; i++) {
|
||||
simde__m512i a = simde_test_x86_random_i32x16();
|
||||
int32_t r = simde_mm512_reduce_min_epi32(a);
|
||||
|
||||
simde_test_x86_write_i32x16(2, a, SIMDE_TEST_VEC_POS_FIRST);
|
||||
simde_test_codegen_write_i32(2, r, SIMDE_TEST_VEC_POS_LAST);
|
||||
}
|
||||
return 1;
|
||||
#endif
|
||||
}
|
||||
|
||||
static int
|
||||
test_simde_mm512_reduce_min_epi64 (SIMDE_MUNIT_TEST_ARGS) {
|
||||
#if 1
|
||||
static const struct {
|
||||
const int64_t a[8];
|
||||
int64_t r;
|
||||
} test_vec[] = {
|
||||
{ { INT64_C( 5583051442079762804), -INT64_C( 5156406438818470546), INT64_C( 1418645866806030692), INT64_C( 2656712216608352807),
|
||||
INT64_C( 3176002828375409426), -INT64_C( 1444382768898980973), INT64_C( 3688699930697007414), INT64_C( 3198248540477886863) },
|
||||
-INT64_C( 5156406438818470546) },
|
||||
{ { INT64_C( 6207092525676779065), -INT64_C( 848497803350885944), -INT64_C( 2105923948543644024), INT64_C( 1015706666489896658),
|
||||
-INT64_C( 2885916689683838247), -INT64_C( 7775923200908229277), INT64_C( 4180165535136753613), INT64_C( 9092555051630993997) },
|
||||
-INT64_C( 7775923200908229277) },
|
||||
{ { -INT64_C( 4382549580443863736), INT64_C( 9166227886227936147), -INT64_C( 7438643338688898014), INT64_C( 8136009086626556612),
|
||||
-INT64_C( 6610451847536245986), INT64_C( 4934389532889196360), INT64_C( 9203267170938526421), INT64_C( 8724828569662485116) },
|
||||
-INT64_C( 7438643338688898014) },
|
||||
{ { INT64_C( 1768008997605530580), INT64_C( 2073782591220338273), -INT64_C( 6637191876296469080), INT64_C( 8159497358015974503),
|
||||
-INT64_C( 3522132194911439818), INT64_C( 7498803171072029357), -INT64_C( 6090926889645683026), INT64_C( 5803074049394196346) },
|
||||
-INT64_C( 6637191876296469080) },
|
||||
{ { INT64_C( 7717609272109358813), INT64_C( 3733045958898904230), -INT64_C( 4346677018582541633), -INT64_C( 6725734873528919233),
|
||||
INT64_C( 1903624566097182529), -INT64_C( 347534472918217868), -INT64_C( 651425772057315607), INT64_C( 8371339802839076806) },
|
||||
-INT64_C( 6725734873528919233) },
|
||||
{ { -INT64_C( 7599861606734685448), INT64_C( 4747003291971356841), INT64_C( 5737700865749540596), -INT64_C( 2171290370756186057),
|
||||
-INT64_C( 2749213169262112480), INT64_C( 1978662602036701661), -INT64_C( 8622873417633896323), INT64_C( 6134131619603296086) },
|
||||
-INT64_C( 8622873417633896323) },
|
||||
{ { INT64_C( 2318068768134622753), INT64_C( 511944201703123672), -INT64_C( 7166525229679910733), INT64_C( 8006550549042003346),
|
||||
-INT64_C( 302045590810741910), -INT64_C( 6888794470754933803), INT64_C( 7554559497107436533), INT64_C( 1686962746025816749) },
|
||||
-INT64_C( 7166525229679910733) },
|
||||
{ { -INT64_C( 1505166456478422274), INT64_C( 2325177009099642550), -INT64_C( 4295816015992068061), -INT64_C( 2546459182186392860),
|
||||
-INT64_C( 5236814447854653870), INT64_C( 8105247108977368367), -INT64_C( 1268945228792146041), -INT64_C( 7126901011494460833) },
|
||||
-INT64_C( 7126901011494460833) },
|
||||
};
|
||||
|
||||
for (size_t i = 0 ; i < (sizeof(test_vec) / sizeof(test_vec[0])) ; i++) {
|
||||
simde__m512i a = simde_mm512_loadu_epi64(test_vec[i].a);
|
||||
int64_t r = simde_mm512_reduce_min_epi64(a);
|
||||
simde_assert_equal_i64(r, test_vec[i].r);
|
||||
}
|
||||
|
||||
return 0;
|
||||
#else
|
||||
fputc('\n', stdout);
|
||||
|
||||
for (int i = 0; i < 8; i++) {
|
||||
simde__m512i a = simde_test_x86_random_i64x8();
|
||||
int64_t r = simde_mm512_reduce_min_epi64(a);
|
||||
|
||||
simde_test_x86_write_i64x8(2, a, SIMDE_TEST_VEC_POS_FIRST);
|
||||
simde_test_codegen_write_i64(2, r, SIMDE_TEST_VEC_POS_LAST);
|
||||
}
|
||||
return 1;
|
||||
#endif
|
||||
}
|
||||
|
||||
static int
|
||||
test_simde_mm512_reduce_min_epu32 (SIMDE_MUNIT_TEST_ARGS) {
|
||||
#if 1
|
||||
static const struct {
|
||||
const uint32_t a[16];
|
||||
uint32_t r;
|
||||
} test_vec[] = {
|
||||
{ { UINT32_C(2567247256), UINT32_C(1582389294), UINT32_C(1119464693), UINT32_C(3534894155), UINT32_C( 359669003), UINT32_C(1224987626), UINT32_C(1082491893), UINT32_C(1155374764),
|
||||
UINT32_C(3806257843), UINT32_C( 792735546), UINT32_C( 645003739), UINT32_C( 972563245), UINT32_C( 709781568), UINT32_C( 829641020), UINT32_C(2154953172), UINT32_C(1254444695) },
|
||||
UINT32_C( 359669003) },
|
||||
{ { UINT32_C(1781310256), UINT32_C(2912513234), UINT32_C(2480081509), UINT32_C(1858915118), UINT32_C(1872304691), UINT32_C(1067519083), UINT32_C(2629767685), UINT32_C(2447869025),
|
||||
UINT32_C(4194046759), UINT32_C(3852899712), UINT32_C(3464001952), UINT32_C(2017215556), UINT32_C(3387413854), UINT32_C(3876096226), UINT32_C(4236560539), UINT32_C(1955425100) },
|
||||
UINT32_C(1067519083) },
|
||||
{ { UINT32_C(4268591486), UINT32_C(3219395615), UINT32_C(3532479629), UINT32_C(4283091361), UINT32_C(2177446303), UINT32_C(1432932794), UINT32_C(3864128665), UINT32_C(3596279383),
|
||||
UINT32_C(2278868840), UINT32_C(1766242523), UINT32_C(3057373973), UINT32_C(1001751964), UINT32_C(1891401398), UINT32_C(3922011472), UINT32_C(1775179281), UINT32_C(1564420597) },
|
||||
UINT32_C(1001751964) },
|
||||
{ { UINT32_C(3437499377), UINT32_C(3778357964), UINT32_C(2576838909), UINT32_C(2899660021), UINT32_C( 454857163), UINT32_C(3355763382), UINT32_C(3979465976), UINT32_C(3997855997),
|
||||
UINT32_C(1337667203), UINT32_C(1429270616), UINT32_C(1458554721), UINT32_C(3741500436), UINT32_C( 217718613), UINT32_C(4191485441), UINT32_C(3504801234), UINT32_C(4173214069) },
|
||||
UINT32_C( 217718613) },
|
||||
{ { UINT32_C(3091757408), UINT32_C(3406723178), UINT32_C(1411513664), UINT32_C( 372450497), UINT32_C(1143090499), UINT32_C(4265473579), UINT32_C(1892558075), UINT32_C(3060370518),
|
||||
UINT32_C(1886302470), UINT32_C(1765506089), UINT32_C( 985488505), UINT32_C(3276927104), UINT32_C(1225224989), UINT32_C(1699169642), UINT32_C(3218478441), UINT32_C(2809479073) },
|
||||
UINT32_C( 372450497) },
|
||||
{ { UINT32_C( 420996336), UINT32_C(3666039392), UINT32_C( 789856431), UINT32_C(1324574001), UINT32_C(1134033625), UINT32_C(2846416447), UINT32_C(2506653427), UINT32_C(2906447549),
|
||||
UINT32_C( 583488706), UINT32_C(1442597542), UINT32_C(3146060170), UINT32_C(1326086262), UINT32_C(2995954034), UINT32_C(1935358848), UINT32_C(1997063097), UINT32_C(1663321505) },
|
||||
UINT32_C( 420996336) },
|
||||
{ { UINT32_C(1065806745), UINT32_C(3231023669), UINT32_C( 175839891), UINT32_C( 72975762), UINT32_C(2813783079), UINT32_C(3759804711), UINT32_C(1985422293), UINT32_C( 31095912),
|
||||
UINT32_C(2638241895), UINT32_C(1985861090), UINT32_C(2172705007), UINT32_C(2240207198), UINT32_C(3962322117), UINT32_C( 600655438), UINT32_C(3516474473), UINT32_C( 148009888) },
|
||||
UINT32_C( 31095912) },
|
||||
{ { UINT32_C(3064271827), UINT32_C(3626762984), UINT32_C( 945401050), UINT32_C(1270734725), UINT32_C(1782049052), UINT32_C(2576155696), UINT32_C(3379242537), UINT32_C(1842429338),
|
||||
UINT32_C( 958625360), UINT32_C(1393643384), UINT32_C(2173397755), UINT32_C(1724664138), UINT32_C(1657799474), UINT32_C( 838622472), UINT32_C( 502949763), UINT32_C(4119579812) },
|
||||
UINT32_C( 502949763) },
|
||||
};
|
||||
|
||||
for (size_t i = 0 ; i < (sizeof(test_vec) / sizeof(test_vec[0])) ; i++) {
|
||||
simde__m512i a = simde_mm512_loadu_epi32(test_vec[i].a);
|
||||
uint32_t r = simde_mm512_reduce_min_epu32(a);
|
||||
simde_assert_equal_u32(r, test_vec[i].r);
|
||||
}
|
||||
|
||||
return 0;
|
||||
#else
|
||||
fputc('\n', stdout);
|
||||
|
||||
for (int i = 0; i < 8; i++) {
|
||||
simde__m512i a = simde_test_x86_random_u32x16();
|
||||
uint32_t r = simde_mm512_reduce_min_epu32(a);
|
||||
|
||||
simde_test_x86_write_u32x16(2, a, SIMDE_TEST_VEC_POS_FIRST);
|
||||
simde_test_codegen_write_u32(2, r, SIMDE_TEST_VEC_POS_LAST);
|
||||
}
|
||||
return 1;
|
||||
#endif
|
||||
}
|
||||
|
||||
static int
|
||||
test_simde_mm512_reduce_min_epu64 (SIMDE_MUNIT_TEST_ARGS) {
|
||||
#if 1
|
||||
static const struct {
|
||||
const uint64_t a[8];
|
||||
uint64_t r;
|
||||
} test_vec[] = {
|
||||
{ { UINT64_C(17946351928412646978), UINT64_C( 1538338688285186473), UINT64_C( 757576183074728266), UINT64_C(10120910291343998426),
|
||||
UINT64_C( 9968812201639125601), UINT64_C( 7198677560287220718), UINT64_C(12362724924684852481), UINT64_C(14739048392179759542) },
|
||||
UINT64_C( 757576183074728266) },
|
||||
{ { UINT64_C( 1633826068423758400), UINT64_C( 204013289211374167), UINT64_C( 8693948129919797546), UINT64_C(12685518031048659412),
|
||||
UINT64_C( 1374581661455497429), UINT64_C(17414390374188972712), UINT64_C( 2745951476175943393), UINT64_C( 7748006196793479781) },
|
||||
UINT64_C( 204013289211374167) },
|
||||
{ { UINT64_C( 9113451481732241578), UINT64_C( 3831951216702127477), UINT64_C( 1477730082944981513), UINT64_C( 326070451542026118),
|
||||
UINT64_C(16004636843054919367), UINT64_C( 2336040091939128289), UINT64_C(13629577160753365858), UINT64_C( 4990093382917820131) },
|
||||
UINT64_C( 326070451542026118) },
|
||||
{ { UINT64_C( 8112670196996746061), UINT64_C( 6518979119443980353), UINT64_C(15152520304798724948), UINT64_C(14799478732859777183),
|
||||
UINT64_C( 9653775058400986618), UINT64_C( 224148294821846729), UINT64_C(13189308383230854984), UINT64_C( 7008505263121766646) },
|
||||
UINT64_C( 224148294821846729) },
|
||||
{ { UINT64_C(12269463314289575804), UINT64_C(13921619823410488193), UINT64_C(10294668646449463567), UINT64_C( 7269451812451955226),
|
||||
UINT64_C( 3501666014127770638), UINT64_C(11152764852041221261), UINT64_C(15815410171708030806), UINT64_C(15320752003464593233) },
|
||||
UINT64_C( 3501666014127770638) },
|
||||
{ { UINT64_C(13468396412576449290), UINT64_C( 3856636952203709023), UINT64_C( 4098731846666438469), UINT64_C( 9635469527058890013),
|
||||
UINT64_C( 3943508228091837395), UINT64_C( 5009875255299242610), UINT64_C( 7209185786234382574), UINT64_C( 7091199706281836137) },
|
||||
UINT64_C( 3856636952203709023) },
|
||||
{ { UINT64_C( 4650280862236256124), UINT64_C( 4673636156801395607), UINT64_C(13576700667129767872), UINT64_C( 3427531456591737503),
|
||||
UINT64_C(12231507282743194800), UINT64_C( 2902602292492521910), UINT64_C( 2113482894141775172), UINT64_C(12623270892840744268) },
|
||||
UINT64_C( 2113482894141775172) },
|
||||
{ { UINT64_C( 8253952133295943889), UINT64_C( 3301072460190501950), UINT64_C(16481796504093589024), UINT64_C(13095361487669757711),
|
||||
UINT64_C( 1652297526001855169), UINT64_C( 5478221220497156591), UINT64_C(17584205673660074891), UINT64_C(13567022390155864749) },
|
||||
UINT64_C( 1652297526001855169) },
|
||||
};
|
||||
|
||||
for (size_t i = 0 ; i < (sizeof(test_vec) / sizeof(test_vec[0])) ; i++) {
|
||||
simde__m512i a = simde_mm512_loadu_epi64(test_vec[i].a);
|
||||
uint64_t r = simde_mm512_reduce_min_epu64(a);
|
||||
simde_assert_equal_u64(r, test_vec[i].r);
|
||||
}
|
||||
|
||||
return 0;
|
||||
#else
|
||||
fputc('\n', stdout);
|
||||
|
||||
for (int i = 0; i < 8; i++) {
|
||||
simde__m512i a = simde_test_x86_random_u64x8();
|
||||
uint64_t r = simde_mm512_reduce_min_epu64(a);
|
||||
|
||||
simde_test_x86_write_u64x8(2, a, SIMDE_TEST_VEC_POS_FIRST);
|
||||
simde_test_codegen_write_u64(2, r, SIMDE_TEST_VEC_POS_LAST);
|
||||
}
|
||||
return 1;
|
||||
#endif
|
||||
}
|
||||
|
||||
static int
|
||||
test_simde_mm512_reduce_min_ps (SIMDE_MUNIT_TEST_ARGS) {
|
||||
#if 1
|
||||
static const struct {
|
||||
const simde_float32 a[16];
|
||||
simde_float32 r;
|
||||
} test_vec[] = {
|
||||
{ { SIMDE_FLOAT32_C( 23.88), SIMDE_FLOAT32_C( -394.98), SIMDE_FLOAT32_C( -337.60), SIMDE_FLOAT32_C( 448.65),
|
||||
SIMDE_FLOAT32_C( 394.23), SIMDE_FLOAT32_C( -42.09), SIMDE_FLOAT32_C( -242.50), SIMDE_FLOAT32_C( -896.14),
|
||||
SIMDE_FLOAT32_C( 614.19), SIMDE_FLOAT32_C( -304.36), SIMDE_FLOAT32_C( 58.80), SIMDE_FLOAT32_C( 464.53),
|
||||
SIMDE_FLOAT32_C( 655.43), SIMDE_FLOAT32_C( 825.60), SIMDE_FLOAT32_C( 454.22), SIMDE_FLOAT32_C( -577.87) },
|
||||
SIMDE_FLOAT32_C( -896.14) },
|
||||
{ { SIMDE_FLOAT32_C( 130.11), SIMDE_FLOAT32_C( 524.75), SIMDE_FLOAT32_C( 955.85), SIMDE_FLOAT32_C( -59.90),
|
||||
SIMDE_FLOAT32_C( 585.38), SIMDE_FLOAT32_C( 145.67), SIMDE_FLOAT32_C( -74.43), SIMDE_FLOAT32_C( -10.85),
|
||||
SIMDE_FLOAT32_C( 83.80), SIMDE_FLOAT32_C( 735.99), SIMDE_FLOAT32_C( 936.68), SIMDE_FLOAT32_C( -462.75),
|
||||
SIMDE_FLOAT32_C( -180.18), SIMDE_FLOAT32_C( -559.41), SIMDE_FLOAT32_C( 198.33), SIMDE_FLOAT32_C( 843.71) },
|
||||
SIMDE_FLOAT32_C( -559.41) },
|
||||
{ { SIMDE_FLOAT32_C( 45.61), SIMDE_FLOAT32_C( 860.74), SIMDE_FLOAT32_C( 292.36), SIMDE_FLOAT32_C( -560.16),
|
||||
SIMDE_FLOAT32_C( -181.35), SIMDE_FLOAT32_C( -950.14), SIMDE_FLOAT32_C( -456.30), SIMDE_FLOAT32_C( -567.16),
|
||||
SIMDE_FLOAT32_C( -254.50), SIMDE_FLOAT32_C( 602.50), SIMDE_FLOAT32_C( 897.36), SIMDE_FLOAT32_C( -599.07),
|
||||
SIMDE_FLOAT32_C( 428.10), SIMDE_FLOAT32_C( 351.58), SIMDE_FLOAT32_C( -176.95), SIMDE_FLOAT32_C( -441.79) },
|
||||
SIMDE_FLOAT32_C( -950.14) },
|
||||
{ { SIMDE_FLOAT32_C( -123.67), SIMDE_FLOAT32_C( -221.09), SIMDE_FLOAT32_C( 498.31), SIMDE_FLOAT32_C( -538.29),
|
||||
SIMDE_FLOAT32_C( 924.58), SIMDE_FLOAT32_C( -576.11), SIMDE_FLOAT32_C( 450.86), SIMDE_FLOAT32_C( 8.38),
|
||||
SIMDE_FLOAT32_C( -840.12), SIMDE_FLOAT32_C( 387.54), SIMDE_FLOAT32_C( 545.64), SIMDE_FLOAT32_C( -20.30),
|
||||
SIMDE_FLOAT32_C( 828.13), SIMDE_FLOAT32_C( -256.03), SIMDE_FLOAT32_C( -176.59), SIMDE_FLOAT32_C( -126.25) },
|
||||
SIMDE_FLOAT32_C( -840.12) },
|
||||
{ { SIMDE_FLOAT32_C( -395.29), SIMDE_FLOAT32_C( -884.23), SIMDE_FLOAT32_C( 313.59), SIMDE_FLOAT32_C( 423.35),
|
||||
SIMDE_FLOAT32_C( -834.37), SIMDE_FLOAT32_C( 857.28), SIMDE_FLOAT32_C( 856.19), SIMDE_FLOAT32_C( -88.88),
|
||||
SIMDE_FLOAT32_C( 459.78), SIMDE_FLOAT32_C( 753.55), SIMDE_FLOAT32_C( 312.05), SIMDE_FLOAT32_C( -112.12),
|
||||
SIMDE_FLOAT32_C( 105.13), SIMDE_FLOAT32_C( -864.89), SIMDE_FLOAT32_C( 446.09), SIMDE_FLOAT32_C( 981.46) },
|
||||
SIMDE_FLOAT32_C( -884.23) },
|
||||
{ { SIMDE_FLOAT32_C( -85.99), SIMDE_FLOAT32_C( -55.60), SIMDE_FLOAT32_C( -556.83), SIMDE_FLOAT32_C( -161.41),
|
||||
SIMDE_FLOAT32_C( 368.28), SIMDE_FLOAT32_C( 894.03), SIMDE_FLOAT32_C( 846.97), SIMDE_FLOAT32_C( 528.17),
|
||||
SIMDE_FLOAT32_C( 281.57), SIMDE_FLOAT32_C( 392.61), SIMDE_FLOAT32_C( -492.13), SIMDE_FLOAT32_C( 109.70),
|
||||
SIMDE_FLOAT32_C( -863.42), SIMDE_FLOAT32_C( 331.28), SIMDE_FLOAT32_C( 983.45), SIMDE_FLOAT32_C( -258.71) },
|
||||
SIMDE_FLOAT32_C( -863.42) },
|
||||
{ { SIMDE_FLOAT32_C( 447.05), SIMDE_FLOAT32_C( 297.03), SIMDE_FLOAT32_C( -835.36), SIMDE_FLOAT32_C( 612.68),
|
||||
SIMDE_FLOAT32_C( 154.31), SIMDE_FLOAT32_C( -979.17), SIMDE_FLOAT32_C( -476.20), SIMDE_FLOAT32_C( -385.91),
|
||||
SIMDE_FLOAT32_C( 774.38), SIMDE_FLOAT32_C( 835.86), SIMDE_FLOAT32_C( 501.97), SIMDE_FLOAT32_C( -120.49),
|
||||
SIMDE_FLOAT32_C( 970.96), SIMDE_FLOAT32_C( -51.94), SIMDE_FLOAT32_C( -139.03), SIMDE_FLOAT32_C( -115.03) },
|
||||
SIMDE_FLOAT32_C( -979.17) },
|
||||
{ { SIMDE_FLOAT32_C( 892.46), SIMDE_FLOAT32_C( 304.14), SIMDE_FLOAT32_C( 723.56), SIMDE_FLOAT32_C( 260.74),
|
||||
SIMDE_FLOAT32_C( 198.16), SIMDE_FLOAT32_C( 570.54), SIMDE_FLOAT32_C( -211.09), SIMDE_FLOAT32_C( -520.27),
|
||||
SIMDE_FLOAT32_C( -36.85), SIMDE_FLOAT32_C( 296.78), SIMDE_FLOAT32_C( 589.43), SIMDE_FLOAT32_C( 99.73),
|
||||
SIMDE_FLOAT32_C( -371.95), SIMDE_FLOAT32_C( 572.88), SIMDE_FLOAT32_C( 841.02), SIMDE_FLOAT32_C( -924.90) },
|
||||
SIMDE_FLOAT32_C( -924.90) },
|
||||
};
|
||||
|
||||
for (size_t i = 0 ; i < (sizeof(test_vec) / sizeof(test_vec[0])) ; i++) {
|
||||
simde__m512 a = simde_mm512_loadu_ps(test_vec[i].a);
|
||||
simde_float32 r = simde_mm512_reduce_min_ps(a);
|
||||
simde_assert_equal_f32(r, test_vec[i].r, 1);
|
||||
}
|
||||
|
||||
return 0;
|
||||
#else
|
||||
fputc('\n', stdout);
|
||||
|
||||
for (int i = 0; i < 8; i++) {
|
||||
simde__m512 a = simde_test_x86_random_f32x16(SIMDE_FLOAT64_C(-1000.0), SIMDE_FLOAT64_C(1000.0));
|
||||
simde_float32 r = simde_mm512_reduce_min_ps(a);
|
||||
|
||||
simde_test_x86_write_f32x16(2, a, SIMDE_TEST_VEC_POS_FIRST);
|
||||
simde_test_codegen_write_f32(2, r, SIMDE_TEST_VEC_POS_LAST);
|
||||
}
|
||||
return 1;
|
||||
#endif
|
||||
}
|
||||
|
||||
static int
|
||||
test_simde_mm512_reduce_min_pd (SIMDE_MUNIT_TEST_ARGS) {
|
||||
#if 1
|
||||
static const struct {
|
||||
const simde_float64 a[8];
|
||||
simde_float64 r;
|
||||
} test_vec[] = {
|
||||
{ { SIMDE_FLOAT64_C( -130.09), SIMDE_FLOAT64_C( -994.34), SIMDE_FLOAT64_C( 687.78), SIMDE_FLOAT64_C( -975.78),
|
||||
SIMDE_FLOAT64_C( -973.51), SIMDE_FLOAT64_C( -788.41), SIMDE_FLOAT64_C( -361.68), SIMDE_FLOAT64_C( 800.87) },
|
||||
SIMDE_FLOAT64_C( -994.34) },
|
||||
{ { SIMDE_FLOAT64_C( -952.56), SIMDE_FLOAT64_C( -859.71), SIMDE_FLOAT64_C( -319.62), SIMDE_FLOAT64_C( -981.60),
|
||||
SIMDE_FLOAT64_C( 88.34), SIMDE_FLOAT64_C( 541.34), SIMDE_FLOAT64_C( -96.62), SIMDE_FLOAT64_C( -19.20) },
|
||||
SIMDE_FLOAT64_C( -981.60) },
|
||||
{ { SIMDE_FLOAT64_C( -154.52), SIMDE_FLOAT64_C( -373.06), SIMDE_FLOAT64_C( -758.46), SIMDE_FLOAT64_C( -956.36),
|
||||
SIMDE_FLOAT64_C( -802.52), SIMDE_FLOAT64_C( 30.45), SIMDE_FLOAT64_C( -476.63), SIMDE_FLOAT64_C( 160.63) },
|
||||
SIMDE_FLOAT64_C( -956.36) },
|
||||
{ { SIMDE_FLOAT64_C( -672.78), SIMDE_FLOAT64_C( -887.20), SIMDE_FLOAT64_C( -739.65), SIMDE_FLOAT64_C( -44.72),
|
||||
SIMDE_FLOAT64_C( 685.68), SIMDE_FLOAT64_C( -898.63), SIMDE_FLOAT64_C( 30.38), SIMDE_FLOAT64_C( -444.41) },
|
||||
SIMDE_FLOAT64_C( -898.63) },
|
||||
{ { SIMDE_FLOAT64_C( -892.97), SIMDE_FLOAT64_C( -281.83), SIMDE_FLOAT64_C( -420.19), SIMDE_FLOAT64_C( -866.48),
|
||||
SIMDE_FLOAT64_C( -70.25), SIMDE_FLOAT64_C( 218.13), SIMDE_FLOAT64_C( 934.39), SIMDE_FLOAT64_C( -22.81) },
|
||||
SIMDE_FLOAT64_C( -892.97) },
|
||||
{ { SIMDE_FLOAT64_C( 358.41), SIMDE_FLOAT64_C( -385.23), SIMDE_FLOAT64_C( -4.40), SIMDE_FLOAT64_C( -553.24),
|
||||
SIMDE_FLOAT64_C( -843.89), SIMDE_FLOAT64_C( 898.97), SIMDE_FLOAT64_C( 427.56), SIMDE_FLOAT64_C( 1.59) },
|
||||
SIMDE_FLOAT64_C( -843.89) },
|
||||
{ { SIMDE_FLOAT64_C( -474.09), SIMDE_FLOAT64_C( 669.10), SIMDE_FLOAT64_C( 45.24), SIMDE_FLOAT64_C( -276.61),
|
||||
SIMDE_FLOAT64_C( -300.46), SIMDE_FLOAT64_C( 568.61), SIMDE_FLOAT64_C( 884.01), SIMDE_FLOAT64_C( 26.76) },
|
||||
SIMDE_FLOAT64_C( -474.09) },
|
||||
{ { SIMDE_FLOAT64_C( 681.41), SIMDE_FLOAT64_C( -855.63), SIMDE_FLOAT64_C( 982.04), SIMDE_FLOAT64_C( 367.09),
|
||||
SIMDE_FLOAT64_C( -754.26), SIMDE_FLOAT64_C( 12.42), SIMDE_FLOAT64_C( 922.68), SIMDE_FLOAT64_C( -647.23) },
|
||||
SIMDE_FLOAT64_C( -855.63) },
|
||||
};
|
||||
|
||||
for (size_t i = 0 ; i < (sizeof(test_vec) / sizeof(test_vec[0])) ; i++) {
|
||||
simde__m512d a = simde_mm512_loadu_pd(test_vec[i].a);
|
||||
simde_float64 r = simde_mm512_reduce_min_pd(a);
|
||||
simde_assert_equal_f64(r, test_vec[i].r, 1);
|
||||
}
|
||||
|
||||
return 0;
|
||||
#else
|
||||
fputc('\n', stdout);
|
||||
|
||||
for (int i = 0; i < 8; i++) {
|
||||
simde__m512d a = simde_test_x86_random_f64x8(SIMDE_FLOAT64_C(-1000.0), SIMDE_FLOAT64_C(1000.0));
|
||||
simde_float64 r = simde_mm512_reduce_min_pd(a);
|
||||
|
||||
simde_test_x86_write_f64x8(2, a, SIMDE_TEST_VEC_POS_FIRST);
|
||||
simde_test_codegen_write_f64(2, r, SIMDE_TEST_VEC_POS_LAST);
|
||||
}
|
||||
return 1;
|
||||
#endif
|
||||
}
|
||||
|
||||
SIMDE_TEST_FUNC_LIST_BEGIN
|
||||
#if defined(SIMDE_FLOAT16_IS_SCALAR)
|
||||
SIMDE_TEST_FUNC_LIST_ENTRY(mm512_reduce_max_ph)
|
||||
SIMDE_TEST_FUNC_LIST_ENTRY(mm512_reduce_min_ph)
|
||||
#endif
|
||||
SIMDE_TEST_FUNC_LIST_ENTRY(mm512_reduce_max_epi32)
|
||||
SIMDE_TEST_FUNC_LIST_ENTRY(mm512_reduce_max_epi64)
|
||||
SIMDE_TEST_FUNC_LIST_ENTRY(mm512_reduce_max_epu32)
|
||||
SIMDE_TEST_FUNC_LIST_ENTRY(mm512_reduce_max_epu64)
|
||||
SIMDE_TEST_FUNC_LIST_ENTRY(mm512_reduce_max_ps)
|
||||
SIMDE_TEST_FUNC_LIST_ENTRY(mm512_reduce_max_pd)
|
||||
SIMDE_TEST_FUNC_LIST_ENTRY(mm512_reduce_min_epi32)
|
||||
SIMDE_TEST_FUNC_LIST_ENTRY(mm512_reduce_min_epi64)
|
||||
SIMDE_TEST_FUNC_LIST_ENTRY(mm512_reduce_min_epu32)
|
||||
SIMDE_TEST_FUNC_LIST_ENTRY(mm512_reduce_min_epu64)
|
||||
SIMDE_TEST_FUNC_LIST_ENTRY(mm512_reduce_min_ps)
|
||||
SIMDE_TEST_FUNC_LIST_ENTRY(mm512_reduce_min_pd)
|
||||
|
||||
SIMDE_TEST_FUNC_LIST_END
|
||||
|
||||
#include <test/x86/avx512/test-avx512-footer.h>
|
||||
531
thirdparty/simde/test/x86/avx512/rol.c
vendored
531
thirdparty/simde/test/x86/avx512/rol.c
vendored
File diff suppressed because it is too large
Load diff
1078
thirdparty/simde/test/x86/avx512/ror.c
vendored
1078
thirdparty/simde/test/x86/avx512/ror.c
vendored
File diff suppressed because it is too large
Load diff
24
thirdparty/simde/test/x86/avx512/round.c
vendored
24
thirdparty/simde/test/x86/avx512/round.c
vendored
|
|
@ -176,22 +176,22 @@ test_simde_x_mm512_round_ps (SIMDE_MUNIT_TEST_ARGS) {
|
|||
};
|
||||
|
||||
for (size_t i = 0 ; i < (sizeof(test_vec) / sizeof(test_vec[0])) ; i++) {
|
||||
simde__m512 r;
|
||||
simde__m512 a = simde_mm512_loadu_ps(test_vec[i].a);
|
||||
simde__m512 r, a, nearest, neginf, posinf, truncate;
|
||||
a = simde_mm512_loadu_ps(test_vec[i].a);
|
||||
|
||||
simde__m512 nearest = simde_mm512_loadu_ps(test_vec[i].nearest);
|
||||
nearest = simde_mm512_loadu_ps(test_vec[i].nearest);
|
||||
r = simde_x_mm512_round_ps(a, SIMDE_MM_FROUND_TO_NEAREST_INT);
|
||||
simde_assert_m512_close(r, nearest, 1);
|
||||
|
||||
simde__m512 neginf = simde_mm512_loadu_ps(test_vec[i].neginf);
|
||||
neginf = simde_mm512_loadu_ps(test_vec[i].neginf);
|
||||
r = simde_x_mm512_round_ps(a, SIMDE_MM_FROUND_TO_NEG_INF);
|
||||
simde_assert_m512_close(r, neginf, 1);
|
||||
|
||||
simde__m512 posinf = simde_mm512_loadu_ps(test_vec[i].posinf);
|
||||
posinf = simde_mm512_loadu_ps(test_vec[i].posinf);
|
||||
r = simde_x_mm512_round_ps(a, SIMDE_MM_FROUND_TO_POS_INF);
|
||||
simde_assert_m512_close(r, posinf, 1);
|
||||
|
||||
simde__m512 truncate = simde_mm512_loadu_ps(test_vec[i].truncate);
|
||||
truncate = simde_mm512_loadu_ps(test_vec[i].truncate);
|
||||
r = simde_x_mm512_round_ps(a, SIMDE_MM_FROUND_TO_ZERO);
|
||||
simde_assert_m512_close(r, truncate, 1);
|
||||
}
|
||||
|
|
@ -309,22 +309,22 @@ test_simde_x_mm512_round_pd (SIMDE_MUNIT_TEST_ARGS) {
|
|||
};
|
||||
|
||||
for (size_t i = 0 ; i < (sizeof(test_vec) / sizeof(test_vec[0])) ; i++) {
|
||||
simde__m512d r;
|
||||
simde__m512d a = simde_mm512_loadu_pd(test_vec[i].a);
|
||||
simde__m512d r, a, nearest, neginf, posinf, truncate;
|
||||
a = simde_mm512_loadu_pd(test_vec[i].a);
|
||||
|
||||
simde__m512d nearest = simde_mm512_loadu_pd(test_vec[i].nearest);
|
||||
nearest = simde_mm512_loadu_pd(test_vec[i].nearest);
|
||||
r = simde_x_mm512_round_pd(a, SIMDE_MM_FROUND_TO_NEAREST_INT);
|
||||
simde_assert_m512d_close(r, nearest, 1);
|
||||
|
||||
simde__m512d neginf = simde_mm512_loadu_pd(test_vec[i].neginf);
|
||||
neginf = simde_mm512_loadu_pd(test_vec[i].neginf);
|
||||
r = simde_x_mm512_round_pd(a, SIMDE_MM_FROUND_TO_NEG_INF);
|
||||
simde_assert_m512d_close(r, neginf, 1);
|
||||
|
||||
simde__m512d posinf = simde_mm512_loadu_pd(test_vec[i].posinf);
|
||||
posinf = simde_mm512_loadu_pd(test_vec[i].posinf);
|
||||
r = simde_x_mm512_round_pd(a, SIMDE_MM_FROUND_TO_POS_INF);
|
||||
simde_assert_m512d_close(r, posinf, 1);
|
||||
|
||||
simde__m512d truncate = simde_mm512_loadu_pd(test_vec[i].truncate);
|
||||
truncate = simde_mm512_loadu_pd(test_vec[i].truncate);
|
||||
r = simde_x_mm512_round_pd(a, SIMDE_MM_FROUND_TO_ZERO);
|
||||
simde_assert_m512d_close(r, truncate, 1);
|
||||
}
|
||||
|
|
|
|||
|
|
@ -970,6 +970,7 @@ test_simde_mm512_maskz_roundscale_round_pd (SIMDE_MUNIT_TEST_ARGS) {
|
|||
#endif
|
||||
}
|
||||
|
||||
#if !(defined(HEDLEY_MSVC_VERSION) && defined(SIMDE_X86_AVX_NATIVE))
|
||||
static int
|
||||
test_simde_mm_roundscale_round_ss (SIMDE_MUNIT_TEST_ARGS) {
|
||||
#if 1
|
||||
|
|
@ -1821,6 +1822,7 @@ test_simde_mm_maskz_roundscale_round_sd (SIMDE_MUNIT_TEST_ARGS) {
|
|||
return 1;
|
||||
#endif
|
||||
}
|
||||
#endif
|
||||
|
||||
SIMDE_TEST_FUNC_LIST_BEGIN
|
||||
SIMDE_TEST_FUNC_LIST_ENTRY(mm512_roundscale_round_ps)
|
||||
|
|
@ -1829,12 +1831,14 @@ SIMDE_TEST_FUNC_LIST_BEGIN
|
|||
SIMDE_TEST_FUNC_LIST_ENTRY(mm512_roundscale_round_pd)
|
||||
SIMDE_TEST_FUNC_LIST_ENTRY(mm512_mask_roundscale_round_pd)
|
||||
SIMDE_TEST_FUNC_LIST_ENTRY(mm512_maskz_roundscale_round_pd)
|
||||
#if !(defined(HEDLEY_MSVC_VERSION) && defined(SIMDE_X86_AVX_NATIVE))
|
||||
SIMDE_TEST_FUNC_LIST_ENTRY(mm_roundscale_round_ss)
|
||||
SIMDE_TEST_FUNC_LIST_ENTRY(mm_mask_roundscale_round_ss)
|
||||
SIMDE_TEST_FUNC_LIST_ENTRY(mm_maskz_roundscale_round_ss)
|
||||
SIMDE_TEST_FUNC_LIST_ENTRY(mm_roundscale_round_sd)
|
||||
SIMDE_TEST_FUNC_LIST_ENTRY(mm_mask_roundscale_round_sd)
|
||||
SIMDE_TEST_FUNC_LIST_ENTRY(mm_maskz_roundscale_round_sd)
|
||||
#endif
|
||||
SIMDE_TEST_FUNC_LIST_END
|
||||
|
||||
#include <test/x86/avx512/test-avx512-footer.h>
|
||||
|
|
|
|||
891
thirdparty/simde/test/x86/avx512/set.c
vendored
891
thirdparty/simde/test/x86/avx512/set.c
vendored
|
|
@ -553,6 +553,886 @@ test_simde_mm512_set_ps (SIMDE_MUNIT_TEST_ARGS) {
|
|||
#endif
|
||||
}
|
||||
|
||||
#if defined(SIMDE_FLOAT16_IS_SCALAR)
|
||||
static int
|
||||
test_simde_mm512_set_ph (SIMDE_MUNIT_TEST_ARGS) {
|
||||
#if 1
|
||||
static const struct {
|
||||
const simde_float16 a[32];
|
||||
const simde_float16 r[32];
|
||||
} test_vec[] = {
|
||||
{ { SIMDE_FLOAT16_VALUE( 282.25), SIMDE_FLOAT16_VALUE( 386.50), SIMDE_FLOAT16_VALUE( -50.12), SIMDE_FLOAT16_VALUE( 737.50),
|
||||
SIMDE_FLOAT16_VALUE( -190.00), SIMDE_FLOAT16_VALUE( 104.19), SIMDE_FLOAT16_VALUE( 655.00), SIMDE_FLOAT16_VALUE( 400.75),
|
||||
SIMDE_FLOAT16_VALUE( -452.50), SIMDE_FLOAT16_VALUE( -606.50), SIMDE_FLOAT16_VALUE( 463.75), SIMDE_FLOAT16_VALUE( 894.50),
|
||||
SIMDE_FLOAT16_VALUE( 273.50), SIMDE_FLOAT16_VALUE( -503.50), SIMDE_FLOAT16_VALUE( -643.50), SIMDE_FLOAT16_VALUE( 728.50),
|
||||
SIMDE_FLOAT16_VALUE( -947.50), SIMDE_FLOAT16_VALUE( -852.50), SIMDE_FLOAT16_VALUE( -635.50), SIMDE_FLOAT16_VALUE( 796.00),
|
||||
SIMDE_FLOAT16_VALUE( 24.80), SIMDE_FLOAT16_VALUE( 897.00), SIMDE_FLOAT16_VALUE( -993.00), SIMDE_FLOAT16_VALUE( 685.00),
|
||||
SIMDE_FLOAT16_VALUE( -913.00), SIMDE_FLOAT16_VALUE( 547.50), SIMDE_FLOAT16_VALUE( -630.00), SIMDE_FLOAT16_VALUE( 433.00),
|
||||
SIMDE_FLOAT16_VALUE( 177.25), SIMDE_FLOAT16_VALUE( 580.50), SIMDE_FLOAT16_VALUE( -988.50), SIMDE_FLOAT16_VALUE( -540.50) },
|
||||
{ SIMDE_FLOAT16_VALUE( 282.25), SIMDE_FLOAT16_VALUE( 386.50), SIMDE_FLOAT16_VALUE( -50.12), SIMDE_FLOAT16_VALUE( 737.50),
|
||||
SIMDE_FLOAT16_VALUE( -190.00), SIMDE_FLOAT16_VALUE( 104.19), SIMDE_FLOAT16_VALUE( 655.00), SIMDE_FLOAT16_VALUE( 400.75),
|
||||
SIMDE_FLOAT16_VALUE( -452.50), SIMDE_FLOAT16_VALUE( -606.50), SIMDE_FLOAT16_VALUE( 463.75), SIMDE_FLOAT16_VALUE( 894.50),
|
||||
SIMDE_FLOAT16_VALUE( 273.50), SIMDE_FLOAT16_VALUE( -503.50), SIMDE_FLOAT16_VALUE( -643.50), SIMDE_FLOAT16_VALUE( 728.50),
|
||||
SIMDE_FLOAT16_VALUE( -947.50), SIMDE_FLOAT16_VALUE( -852.50), SIMDE_FLOAT16_VALUE( -635.50), SIMDE_FLOAT16_VALUE( 796.00),
|
||||
SIMDE_FLOAT16_VALUE( 24.80), SIMDE_FLOAT16_VALUE( 897.00), SIMDE_FLOAT16_VALUE( -993.00), SIMDE_FLOAT16_VALUE( 685.00),
|
||||
SIMDE_FLOAT16_VALUE( -913.00), SIMDE_FLOAT16_VALUE( 547.50), SIMDE_FLOAT16_VALUE( -630.00), SIMDE_FLOAT16_VALUE( 433.00),
|
||||
SIMDE_FLOAT16_VALUE( 177.25), SIMDE_FLOAT16_VALUE( 580.50), SIMDE_FLOAT16_VALUE( -988.50), SIMDE_FLOAT16_VALUE( -540.50) } },
|
||||
{ { SIMDE_FLOAT16_VALUE( -32.94), SIMDE_FLOAT16_VALUE( -38.66), SIMDE_FLOAT16_VALUE( -803.00), SIMDE_FLOAT16_VALUE( 777.00),
|
||||
SIMDE_FLOAT16_VALUE( -934.50), SIMDE_FLOAT16_VALUE( 851.50), SIMDE_FLOAT16_VALUE( 177.88), SIMDE_FLOAT16_VALUE( -387.00),
|
||||
SIMDE_FLOAT16_VALUE( -754.50), SIMDE_FLOAT16_VALUE( -358.25), SIMDE_FLOAT16_VALUE( -492.75), SIMDE_FLOAT16_VALUE( 519.00),
|
||||
SIMDE_FLOAT16_VALUE( 138.25), SIMDE_FLOAT16_VALUE( -136.25), SIMDE_FLOAT16_VALUE( 247.25), SIMDE_FLOAT16_VALUE( 190.88),
|
||||
SIMDE_FLOAT16_VALUE( 11.31), SIMDE_FLOAT16_VALUE( 612.00), SIMDE_FLOAT16_VALUE( -13.18), SIMDE_FLOAT16_VALUE( -964.00),
|
||||
SIMDE_FLOAT16_VALUE( 508.75), SIMDE_FLOAT16_VALUE( -6.03), SIMDE_FLOAT16_VALUE( 721.00), SIMDE_FLOAT16_VALUE( 595.50),
|
||||
SIMDE_FLOAT16_VALUE( -458.50), SIMDE_FLOAT16_VALUE( -909.00), SIMDE_FLOAT16_VALUE( 28.56), SIMDE_FLOAT16_VALUE( 719.00),
|
||||
SIMDE_FLOAT16_VALUE( 671.50), SIMDE_FLOAT16_VALUE( 40.03), SIMDE_FLOAT16_VALUE( -822.00), SIMDE_FLOAT16_VALUE( -361.50) },
|
||||
{ SIMDE_FLOAT16_VALUE( -32.94), SIMDE_FLOAT16_VALUE( -38.66), SIMDE_FLOAT16_VALUE( -803.00), SIMDE_FLOAT16_VALUE( 777.00),
|
||||
SIMDE_FLOAT16_VALUE( -934.50), SIMDE_FLOAT16_VALUE( 851.50), SIMDE_FLOAT16_VALUE( 177.88), SIMDE_FLOAT16_VALUE( -387.00),
|
||||
SIMDE_FLOAT16_VALUE( -754.50), SIMDE_FLOAT16_VALUE( -358.25), SIMDE_FLOAT16_VALUE( -492.75), SIMDE_FLOAT16_VALUE( 519.00),
|
||||
SIMDE_FLOAT16_VALUE( 138.25), SIMDE_FLOAT16_VALUE( -136.25), SIMDE_FLOAT16_VALUE( 247.25), SIMDE_FLOAT16_VALUE( 190.88),
|
||||
SIMDE_FLOAT16_VALUE( 11.31), SIMDE_FLOAT16_VALUE( 612.00), SIMDE_FLOAT16_VALUE( -13.18), SIMDE_FLOAT16_VALUE( -964.00),
|
||||
SIMDE_FLOAT16_VALUE( 508.75), SIMDE_FLOAT16_VALUE( -6.03), SIMDE_FLOAT16_VALUE( 721.00), SIMDE_FLOAT16_VALUE( 595.50),
|
||||
SIMDE_FLOAT16_VALUE( -458.50), SIMDE_FLOAT16_VALUE( -909.00), SIMDE_FLOAT16_VALUE( 28.56), SIMDE_FLOAT16_VALUE( 719.00),
|
||||
SIMDE_FLOAT16_VALUE( 671.50), SIMDE_FLOAT16_VALUE( 40.03), SIMDE_FLOAT16_VALUE( -822.00), SIMDE_FLOAT16_VALUE( -361.50) } },
|
||||
{ { SIMDE_FLOAT16_VALUE( -998.50), SIMDE_FLOAT16_VALUE( -625.00), SIMDE_FLOAT16_VALUE( -584.50), SIMDE_FLOAT16_VALUE( -933.00),
|
||||
SIMDE_FLOAT16_VALUE( -773.00), SIMDE_FLOAT16_VALUE( 593.50), SIMDE_FLOAT16_VALUE( -320.25), SIMDE_FLOAT16_VALUE( -528.00),
|
||||
SIMDE_FLOAT16_VALUE( -765.00), SIMDE_FLOAT16_VALUE( 187.12), SIMDE_FLOAT16_VALUE( 991.00), SIMDE_FLOAT16_VALUE( 373.25),
|
||||
SIMDE_FLOAT16_VALUE( -949.00), SIMDE_FLOAT16_VALUE( 238.25), SIMDE_FLOAT16_VALUE( -435.75), SIMDE_FLOAT16_VALUE( 62.16),
|
||||
SIMDE_FLOAT16_VALUE( -149.75), SIMDE_FLOAT16_VALUE( 551.00), SIMDE_FLOAT16_VALUE( 98.25), SIMDE_FLOAT16_VALUE( -641.00),
|
||||
SIMDE_FLOAT16_VALUE( -455.00), SIMDE_FLOAT16_VALUE( -180.62), SIMDE_FLOAT16_VALUE( 954.50), SIMDE_FLOAT16_VALUE( 86.62),
|
||||
SIMDE_FLOAT16_VALUE( -89.69), SIMDE_FLOAT16_VALUE( -16.88), SIMDE_FLOAT16_VALUE( -194.62), SIMDE_FLOAT16_VALUE( -418.25),
|
||||
SIMDE_FLOAT16_VALUE( -977.00), SIMDE_FLOAT16_VALUE( -16.39), SIMDE_FLOAT16_VALUE( 220.38), SIMDE_FLOAT16_VALUE( -975.50) },
|
||||
{ SIMDE_FLOAT16_VALUE( -998.50), SIMDE_FLOAT16_VALUE( -625.00), SIMDE_FLOAT16_VALUE( -584.50), SIMDE_FLOAT16_VALUE( -933.00),
|
||||
SIMDE_FLOAT16_VALUE( -773.00), SIMDE_FLOAT16_VALUE( 593.50), SIMDE_FLOAT16_VALUE( -320.25), SIMDE_FLOAT16_VALUE( -528.00),
|
||||
SIMDE_FLOAT16_VALUE( -765.00), SIMDE_FLOAT16_VALUE( 187.12), SIMDE_FLOAT16_VALUE( 991.00), SIMDE_FLOAT16_VALUE( 373.25),
|
||||
SIMDE_FLOAT16_VALUE( -949.00), SIMDE_FLOAT16_VALUE( 238.25), SIMDE_FLOAT16_VALUE( -435.75), SIMDE_FLOAT16_VALUE( 62.16),
|
||||
SIMDE_FLOAT16_VALUE( -149.75), SIMDE_FLOAT16_VALUE( 551.00), SIMDE_FLOAT16_VALUE( 98.25), SIMDE_FLOAT16_VALUE( -641.00),
|
||||
SIMDE_FLOAT16_VALUE( -455.00), SIMDE_FLOAT16_VALUE( -180.62), SIMDE_FLOAT16_VALUE( 954.50), SIMDE_FLOAT16_VALUE( 86.62),
|
||||
SIMDE_FLOAT16_VALUE( -89.69), SIMDE_FLOAT16_VALUE( -16.88), SIMDE_FLOAT16_VALUE( -194.62), SIMDE_FLOAT16_VALUE( -418.25),
|
||||
SIMDE_FLOAT16_VALUE( -977.00), SIMDE_FLOAT16_VALUE( -16.39), SIMDE_FLOAT16_VALUE( 220.38), SIMDE_FLOAT16_VALUE( -975.50) } },
|
||||
{ { SIMDE_FLOAT16_VALUE( 358.75), SIMDE_FLOAT16_VALUE( 636.00), SIMDE_FLOAT16_VALUE( -908.50), SIMDE_FLOAT16_VALUE( 585.50),
|
||||
SIMDE_FLOAT16_VALUE( 229.38), SIMDE_FLOAT16_VALUE( -228.75), SIMDE_FLOAT16_VALUE( -942.50), SIMDE_FLOAT16_VALUE( 464.50),
|
||||
SIMDE_FLOAT16_VALUE( 958.50), SIMDE_FLOAT16_VALUE( -951.00), SIMDE_FLOAT16_VALUE( -162.12), SIMDE_FLOAT16_VALUE( -991.00),
|
||||
SIMDE_FLOAT16_VALUE( 287.00), SIMDE_FLOAT16_VALUE( 402.25), SIMDE_FLOAT16_VALUE( 71.38), SIMDE_FLOAT16_VALUE( -862.50),
|
||||
SIMDE_FLOAT16_VALUE( -46.75), SIMDE_FLOAT16_VALUE( -830.50), SIMDE_FLOAT16_VALUE( -503.75), SIMDE_FLOAT16_VALUE( 498.25),
|
||||
SIMDE_FLOAT16_VALUE( -10.93), SIMDE_FLOAT16_VALUE( -549.00), SIMDE_FLOAT16_VALUE( -415.00), SIMDE_FLOAT16_VALUE( 899.50),
|
||||
SIMDE_FLOAT16_VALUE( 433.75), SIMDE_FLOAT16_VALUE( 390.25), SIMDE_FLOAT16_VALUE( -519.00), SIMDE_FLOAT16_VALUE( 457.00),
|
||||
SIMDE_FLOAT16_VALUE( -626.00), SIMDE_FLOAT16_VALUE( 701.50), SIMDE_FLOAT16_VALUE( 481.50), SIMDE_FLOAT16_VALUE( 732.50) },
|
||||
{ SIMDE_FLOAT16_VALUE( 358.75), SIMDE_FLOAT16_VALUE( 636.00), SIMDE_FLOAT16_VALUE( -908.50), SIMDE_FLOAT16_VALUE( 585.50),
|
||||
SIMDE_FLOAT16_VALUE( 229.38), SIMDE_FLOAT16_VALUE( -228.75), SIMDE_FLOAT16_VALUE( -942.50), SIMDE_FLOAT16_VALUE( 464.50),
|
||||
SIMDE_FLOAT16_VALUE( 958.50), SIMDE_FLOAT16_VALUE( -951.00), SIMDE_FLOAT16_VALUE( -162.12), SIMDE_FLOAT16_VALUE( -991.00),
|
||||
SIMDE_FLOAT16_VALUE( 287.00), SIMDE_FLOAT16_VALUE( 402.25), SIMDE_FLOAT16_VALUE( 71.38), SIMDE_FLOAT16_VALUE( -862.50),
|
||||
SIMDE_FLOAT16_VALUE( -46.75), SIMDE_FLOAT16_VALUE( -830.50), SIMDE_FLOAT16_VALUE( -503.75), SIMDE_FLOAT16_VALUE( 498.25),
|
||||
SIMDE_FLOAT16_VALUE( -10.93), SIMDE_FLOAT16_VALUE( -549.00), SIMDE_FLOAT16_VALUE( -415.00), SIMDE_FLOAT16_VALUE( 899.50),
|
||||
SIMDE_FLOAT16_VALUE( 433.75), SIMDE_FLOAT16_VALUE( 390.25), SIMDE_FLOAT16_VALUE( -519.00), SIMDE_FLOAT16_VALUE( 457.00),
|
||||
SIMDE_FLOAT16_VALUE( -626.00), SIMDE_FLOAT16_VALUE( 701.50), SIMDE_FLOAT16_VALUE( 481.50), SIMDE_FLOAT16_VALUE( 732.50) } },
|
||||
{ { SIMDE_FLOAT16_VALUE( 337.50), SIMDE_FLOAT16_VALUE( 573.00), SIMDE_FLOAT16_VALUE( 318.25), SIMDE_FLOAT16_VALUE( -433.00),
|
||||
SIMDE_FLOAT16_VALUE( -656.00), SIMDE_FLOAT16_VALUE( 376.00), SIMDE_FLOAT16_VALUE( -968.50), SIMDE_FLOAT16_VALUE( -697.50),
|
||||
SIMDE_FLOAT16_VALUE( 424.75), SIMDE_FLOAT16_VALUE( -130.62), SIMDE_FLOAT16_VALUE( -688.00), SIMDE_FLOAT16_VALUE( -288.25),
|
||||
SIMDE_FLOAT16_VALUE( -728.50), SIMDE_FLOAT16_VALUE( 383.25), SIMDE_FLOAT16_VALUE( -151.00), SIMDE_FLOAT16_VALUE( 224.75),
|
||||
SIMDE_FLOAT16_VALUE( 553.00), SIMDE_FLOAT16_VALUE( 345.25), SIMDE_FLOAT16_VALUE( -277.00), SIMDE_FLOAT16_VALUE( -458.25),
|
||||
SIMDE_FLOAT16_VALUE( 796.00), SIMDE_FLOAT16_VALUE( 308.00), SIMDE_FLOAT16_VALUE( -558.50), SIMDE_FLOAT16_VALUE( 229.88),
|
||||
SIMDE_FLOAT16_VALUE( -301.75), SIMDE_FLOAT16_VALUE( -77.50), SIMDE_FLOAT16_VALUE( -313.00), SIMDE_FLOAT16_VALUE( 72.25),
|
||||
SIMDE_FLOAT16_VALUE( -376.00), SIMDE_FLOAT16_VALUE( -831.50), SIMDE_FLOAT16_VALUE( -195.12), SIMDE_FLOAT16_VALUE( 961.50) },
|
||||
{ SIMDE_FLOAT16_VALUE( 337.50), SIMDE_FLOAT16_VALUE( 573.00), SIMDE_FLOAT16_VALUE( 318.25), SIMDE_FLOAT16_VALUE( -433.00),
|
||||
SIMDE_FLOAT16_VALUE( -656.00), SIMDE_FLOAT16_VALUE( 376.00), SIMDE_FLOAT16_VALUE( -968.50), SIMDE_FLOAT16_VALUE( -697.50),
|
||||
SIMDE_FLOAT16_VALUE( 424.75), SIMDE_FLOAT16_VALUE( -130.62), SIMDE_FLOAT16_VALUE( -688.00), SIMDE_FLOAT16_VALUE( -288.25),
|
||||
SIMDE_FLOAT16_VALUE( -728.50), SIMDE_FLOAT16_VALUE( 383.25), SIMDE_FLOAT16_VALUE( -151.00), SIMDE_FLOAT16_VALUE( 224.75),
|
||||
SIMDE_FLOAT16_VALUE( 553.00), SIMDE_FLOAT16_VALUE( 345.25), SIMDE_FLOAT16_VALUE( -277.00), SIMDE_FLOAT16_VALUE( -458.25),
|
||||
SIMDE_FLOAT16_VALUE( 796.00), SIMDE_FLOAT16_VALUE( 308.00), SIMDE_FLOAT16_VALUE( -558.50), SIMDE_FLOAT16_VALUE( 229.88),
|
||||
SIMDE_FLOAT16_VALUE( -301.75), SIMDE_FLOAT16_VALUE( -77.50), SIMDE_FLOAT16_VALUE( -313.00), SIMDE_FLOAT16_VALUE( 72.25),
|
||||
SIMDE_FLOAT16_VALUE( -376.00), SIMDE_FLOAT16_VALUE( -831.50), SIMDE_FLOAT16_VALUE( -195.12), SIMDE_FLOAT16_VALUE( 961.50) } },
|
||||
{ { SIMDE_FLOAT16_VALUE( 741.50), SIMDE_FLOAT16_VALUE( -877.00), SIMDE_FLOAT16_VALUE( -471.50), SIMDE_FLOAT16_VALUE( -914.50),
|
||||
SIMDE_FLOAT16_VALUE( 499.00), SIMDE_FLOAT16_VALUE( -440.00), SIMDE_FLOAT16_VALUE( -612.00), SIMDE_FLOAT16_VALUE( -76.31),
|
||||
SIMDE_FLOAT16_VALUE( 429.25), SIMDE_FLOAT16_VALUE( -300.25), SIMDE_FLOAT16_VALUE( 635.50), SIMDE_FLOAT16_VALUE( 701.00),
|
||||
SIMDE_FLOAT16_VALUE( -917.00), SIMDE_FLOAT16_VALUE( -515.50), SIMDE_FLOAT16_VALUE( -74.44), SIMDE_FLOAT16_VALUE( 636.00),
|
||||
SIMDE_FLOAT16_VALUE( 830.00), SIMDE_FLOAT16_VALUE( 648.50), SIMDE_FLOAT16_VALUE( -822.50), SIMDE_FLOAT16_VALUE( 626.00),
|
||||
SIMDE_FLOAT16_VALUE( -43.28), SIMDE_FLOAT16_VALUE( -381.00), SIMDE_FLOAT16_VALUE( -144.25), SIMDE_FLOAT16_VALUE( 655.00),
|
||||
SIMDE_FLOAT16_VALUE( 541.50), SIMDE_FLOAT16_VALUE( 542.50), SIMDE_FLOAT16_VALUE( -272.75), SIMDE_FLOAT16_VALUE( -834.50),
|
||||
SIMDE_FLOAT16_VALUE( 711.00), SIMDE_FLOAT16_VALUE( 532.00), SIMDE_FLOAT16_VALUE( -873.00), SIMDE_FLOAT16_VALUE( 452.50) },
|
||||
{ SIMDE_FLOAT16_VALUE( 741.50), SIMDE_FLOAT16_VALUE( -877.00), SIMDE_FLOAT16_VALUE( -471.50), SIMDE_FLOAT16_VALUE( -914.50),
|
||||
SIMDE_FLOAT16_VALUE( 499.00), SIMDE_FLOAT16_VALUE( -440.00), SIMDE_FLOAT16_VALUE( -612.00), SIMDE_FLOAT16_VALUE( -76.31),
|
||||
SIMDE_FLOAT16_VALUE( 429.25), SIMDE_FLOAT16_VALUE( -300.25), SIMDE_FLOAT16_VALUE( 635.50), SIMDE_FLOAT16_VALUE( 701.00),
|
||||
SIMDE_FLOAT16_VALUE( -917.00), SIMDE_FLOAT16_VALUE( -515.50), SIMDE_FLOAT16_VALUE( -74.44), SIMDE_FLOAT16_VALUE( 636.00),
|
||||
SIMDE_FLOAT16_VALUE( 830.00), SIMDE_FLOAT16_VALUE( 648.50), SIMDE_FLOAT16_VALUE( -822.50), SIMDE_FLOAT16_VALUE( 626.00),
|
||||
SIMDE_FLOAT16_VALUE( -43.28), SIMDE_FLOAT16_VALUE( -381.00), SIMDE_FLOAT16_VALUE( -144.25), SIMDE_FLOAT16_VALUE( 655.00),
|
||||
SIMDE_FLOAT16_VALUE( 541.50), SIMDE_FLOAT16_VALUE( 542.50), SIMDE_FLOAT16_VALUE( -272.75), SIMDE_FLOAT16_VALUE( -834.50),
|
||||
SIMDE_FLOAT16_VALUE( 711.00), SIMDE_FLOAT16_VALUE( 532.00), SIMDE_FLOAT16_VALUE( -873.00), SIMDE_FLOAT16_VALUE( 452.50) } },
|
||||
{ { SIMDE_FLOAT16_VALUE( 655.00), SIMDE_FLOAT16_VALUE( -344.50), SIMDE_FLOAT16_VALUE( 538.00), SIMDE_FLOAT16_VALUE( 154.25),
|
||||
SIMDE_FLOAT16_VALUE( 215.38), SIMDE_FLOAT16_VALUE( 926.00), SIMDE_FLOAT16_VALUE( -922.00), SIMDE_FLOAT16_VALUE( -355.50),
|
||||
SIMDE_FLOAT16_VALUE( -374.00), SIMDE_FLOAT16_VALUE( 713.50), SIMDE_FLOAT16_VALUE( -654.50), SIMDE_FLOAT16_VALUE( -291.00),
|
||||
SIMDE_FLOAT16_VALUE( -802.00), SIMDE_FLOAT16_VALUE( 271.00), SIMDE_FLOAT16_VALUE( -655.50), SIMDE_FLOAT16_VALUE( -972.00),
|
||||
SIMDE_FLOAT16_VALUE( -80.31), SIMDE_FLOAT16_VALUE( -477.75), SIMDE_FLOAT16_VALUE( 653.50), SIMDE_FLOAT16_VALUE( 876.50),
|
||||
SIMDE_FLOAT16_VALUE( 141.25), SIMDE_FLOAT16_VALUE( -490.75), SIMDE_FLOAT16_VALUE( 531.50), SIMDE_FLOAT16_VALUE( -317.25),
|
||||
SIMDE_FLOAT16_VALUE( -948.00), SIMDE_FLOAT16_VALUE( -741.50), SIMDE_FLOAT16_VALUE( -151.75), SIMDE_FLOAT16_VALUE( 763.00),
|
||||
SIMDE_FLOAT16_VALUE( 791.00), SIMDE_FLOAT16_VALUE( -24.83), SIMDE_FLOAT16_VALUE( 215.38), SIMDE_FLOAT16_VALUE( 446.00) },
|
||||
{ SIMDE_FLOAT16_VALUE( 655.00), SIMDE_FLOAT16_VALUE( -344.50), SIMDE_FLOAT16_VALUE( 538.00), SIMDE_FLOAT16_VALUE( 154.25),
|
||||
SIMDE_FLOAT16_VALUE( 215.38), SIMDE_FLOAT16_VALUE( 926.00), SIMDE_FLOAT16_VALUE( -922.00), SIMDE_FLOAT16_VALUE( -355.50),
|
||||
SIMDE_FLOAT16_VALUE( -374.00), SIMDE_FLOAT16_VALUE( 713.50), SIMDE_FLOAT16_VALUE( -654.50), SIMDE_FLOAT16_VALUE( -291.00),
|
||||
SIMDE_FLOAT16_VALUE( -802.00), SIMDE_FLOAT16_VALUE( 271.00), SIMDE_FLOAT16_VALUE( -655.50), SIMDE_FLOAT16_VALUE( -972.00),
|
||||
SIMDE_FLOAT16_VALUE( -80.31), SIMDE_FLOAT16_VALUE( -477.75), SIMDE_FLOAT16_VALUE( 653.50), SIMDE_FLOAT16_VALUE( 876.50),
|
||||
SIMDE_FLOAT16_VALUE( 141.25), SIMDE_FLOAT16_VALUE( -490.75), SIMDE_FLOAT16_VALUE( 531.50), SIMDE_FLOAT16_VALUE( -317.25),
|
||||
SIMDE_FLOAT16_VALUE( -948.00), SIMDE_FLOAT16_VALUE( -741.50), SIMDE_FLOAT16_VALUE( -151.75), SIMDE_FLOAT16_VALUE( 763.00),
|
||||
SIMDE_FLOAT16_VALUE( 791.00), SIMDE_FLOAT16_VALUE( -24.83), SIMDE_FLOAT16_VALUE( 215.38), SIMDE_FLOAT16_VALUE( 446.00) } },
|
||||
{ { SIMDE_FLOAT16_VALUE( 630.50), SIMDE_FLOAT16_VALUE( -246.75), SIMDE_FLOAT16_VALUE( -399.75), SIMDE_FLOAT16_VALUE( -154.00),
|
||||
SIMDE_FLOAT16_VALUE( -320.75), SIMDE_FLOAT16_VALUE( -321.75), SIMDE_FLOAT16_VALUE( 490.50), SIMDE_FLOAT16_VALUE( 305.25),
|
||||
SIMDE_FLOAT16_VALUE( -608.50), SIMDE_FLOAT16_VALUE( 836.00), SIMDE_FLOAT16_VALUE( -986.00), SIMDE_FLOAT16_VALUE( -410.50),
|
||||
SIMDE_FLOAT16_VALUE( 107.00), SIMDE_FLOAT16_VALUE( -641.00), SIMDE_FLOAT16_VALUE( -382.75), SIMDE_FLOAT16_VALUE( -973.50),
|
||||
SIMDE_FLOAT16_VALUE( -118.75), SIMDE_FLOAT16_VALUE( -729.00), SIMDE_FLOAT16_VALUE( 903.00), SIMDE_FLOAT16_VALUE( -977.50),
|
||||
SIMDE_FLOAT16_VALUE( -219.75), SIMDE_FLOAT16_VALUE( 434.50), SIMDE_FLOAT16_VALUE( -294.75), SIMDE_FLOAT16_VALUE( -167.88),
|
||||
SIMDE_FLOAT16_VALUE( 693.50), SIMDE_FLOAT16_VALUE( 553.50), SIMDE_FLOAT16_VALUE( -405.00), SIMDE_FLOAT16_VALUE( 484.25),
|
||||
SIMDE_FLOAT16_VALUE( -471.25), SIMDE_FLOAT16_VALUE( 810.50), SIMDE_FLOAT16_VALUE( -69.81), SIMDE_FLOAT16_VALUE( -840.50) },
|
||||
{ SIMDE_FLOAT16_VALUE( 630.50), SIMDE_FLOAT16_VALUE( -246.75), SIMDE_FLOAT16_VALUE( -399.75), SIMDE_FLOAT16_VALUE( -154.00),
|
||||
SIMDE_FLOAT16_VALUE( -320.75), SIMDE_FLOAT16_VALUE( -321.75), SIMDE_FLOAT16_VALUE( 490.50), SIMDE_FLOAT16_VALUE( 305.25),
|
||||
SIMDE_FLOAT16_VALUE( -608.50), SIMDE_FLOAT16_VALUE( 836.00), SIMDE_FLOAT16_VALUE( -986.00), SIMDE_FLOAT16_VALUE( -410.50),
|
||||
SIMDE_FLOAT16_VALUE( 107.00), SIMDE_FLOAT16_VALUE( -641.00), SIMDE_FLOAT16_VALUE( -382.75), SIMDE_FLOAT16_VALUE( -973.50),
|
||||
SIMDE_FLOAT16_VALUE( -118.75), SIMDE_FLOAT16_VALUE( -729.00), SIMDE_FLOAT16_VALUE( 903.00), SIMDE_FLOAT16_VALUE( -977.50),
|
||||
SIMDE_FLOAT16_VALUE( -219.75), SIMDE_FLOAT16_VALUE( 434.50), SIMDE_FLOAT16_VALUE( -294.75), SIMDE_FLOAT16_VALUE( -167.88),
|
||||
SIMDE_FLOAT16_VALUE( 693.50), SIMDE_FLOAT16_VALUE( 553.50), SIMDE_FLOAT16_VALUE( -405.00), SIMDE_FLOAT16_VALUE( 484.25),
|
||||
SIMDE_FLOAT16_VALUE( -471.25), SIMDE_FLOAT16_VALUE( 810.50), SIMDE_FLOAT16_VALUE( -69.81), SIMDE_FLOAT16_VALUE( -840.50) } }
|
||||
};
|
||||
|
||||
for (size_t i = 0 ; i < (sizeof(test_vec) / sizeof(test_vec[0])) ; i++) {
|
||||
simde__m512h r = simde_mm512_set_ph(
|
||||
test_vec[i].a[31], test_vec[i].a[30], test_vec[i].a[29], test_vec[i].a[28],
|
||||
test_vec[i].a[27], test_vec[i].a[26], test_vec[i].a[25], test_vec[i].a[24],
|
||||
test_vec[i].a[23], test_vec[i].a[22], test_vec[i].a[21], test_vec[i].a[20],
|
||||
test_vec[i].a[19], test_vec[i].a[18], test_vec[i].a[17], test_vec[i].a[16],
|
||||
test_vec[i].a[15], test_vec[i].a[14], test_vec[i].a[13], test_vec[i].a[12],
|
||||
test_vec[i].a[11], test_vec[i].a[10], test_vec[i].a[ 9], test_vec[i].a[ 8],
|
||||
test_vec[i].a[ 7], test_vec[i].a[ 6], test_vec[i].a[ 5], test_vec[i].a[ 4],
|
||||
test_vec[i].a[ 3], test_vec[i].a[ 2], test_vec[i].a[ 1], test_vec[i].a[ 0]);
|
||||
simde_test_x86_assert_equal_f16x32(r, simde_mm512_loadu_ph(test_vec[i].r), 1);
|
||||
}
|
||||
|
||||
return 0;
|
||||
#else
|
||||
fputc('\n', stdout);
|
||||
for (int i = 0 ; i < 8 ; i++) {
|
||||
simde__m512h a = simde_test_x86_random_f16x32(SIMDE_FLOAT16_VALUE(-1000.0), SIMDE_FLOAT16_VALUE(1000.0));
|
||||
simde__m512h r = a;
|
||||
|
||||
simde_test_x86_write_f16x32(2, a, SIMDE_TEST_VEC_POS_FIRST);
|
||||
simde_test_x86_write_f16x32(2, r, SIMDE_TEST_VEC_POS_LAST);
|
||||
}
|
||||
return 1;
|
||||
#endif
|
||||
}
|
||||
#endif
|
||||
|
||||
static int
|
||||
test_simde_x_mm512_set_epu8 (SIMDE_MUNIT_TEST_ARGS) {
|
||||
#if 1
|
||||
static const struct {
|
||||
const uint8_t a[64];
|
||||
const uint8_t r[64];
|
||||
} test_vec[] = {
|
||||
{ { UINT8_C( 95), UINT8_C( 0), UINT8_C( 21), UINT8_C( 49), UINT8_C(138), UINT8_C(176), UINT8_C( 81), UINT8_C(112),
|
||||
UINT8_C(154), UINT8_C( 14), UINT8_C( 32), UINT8_C(204), UINT8_C( 42), UINT8_C( 19), UINT8_C( 48), UINT8_C(192),
|
||||
UINT8_C(242), UINT8_C(170), UINT8_C( 39), UINT8_C( 54), UINT8_C(129), UINT8_C(142), UINT8_C( 42), UINT8_C( 41),
|
||||
UINT8_C(228), UINT8_C( 22), UINT8_C(187), UINT8_C(131), UINT8_C( 86), UINT8_C( 78), UINT8_C( 36), UINT8_C(182),
|
||||
UINT8_C( 78), UINT8_C( 57), UINT8_C(231), UINT8_C(216), UINT8_C(233), UINT8_C( 56), UINT8_C( 72), UINT8_C(131),
|
||||
UINT8_C( 71), UINT8_C(104), UINT8_C( 79), UINT8_C(113), UINT8_C(124), UINT8_C(127), UINT8_C( 49), UINT8_C(110),
|
||||
UINT8_C( 42), UINT8_C( 88), UINT8_C(165), UINT8_C(171), UINT8_C(230), UINT8_C(207), UINT8_C(212), UINT8_C(202),
|
||||
UINT8_C(229), UINT8_C(143), UINT8_C( 77), UINT8_C( 59), UINT8_C(221), UINT8_C(113), UINT8_C(241), UINT8_C( 43) },
|
||||
{ UINT8_C( 95), UINT8_C( 0), UINT8_C( 21), UINT8_C( 49), UINT8_C(138), UINT8_C(176), UINT8_C( 81), UINT8_C(112),
|
||||
UINT8_C(154), UINT8_C( 14), UINT8_C( 32), UINT8_C(204), UINT8_C( 42), UINT8_C( 19), UINT8_C( 48), UINT8_C(192),
|
||||
UINT8_C(242), UINT8_C(170), UINT8_C( 39), UINT8_C( 54), UINT8_C(129), UINT8_C(142), UINT8_C( 42), UINT8_C( 41),
|
||||
UINT8_C(228), UINT8_C( 22), UINT8_C(187), UINT8_C(131), UINT8_C( 86), UINT8_C( 78), UINT8_C( 36), UINT8_C(182),
|
||||
UINT8_C( 78), UINT8_C( 57), UINT8_C(231), UINT8_C(216), UINT8_C(233), UINT8_C( 56), UINT8_C( 72), UINT8_C(131),
|
||||
UINT8_C( 71), UINT8_C(104), UINT8_C( 79), UINT8_C(113), UINT8_C(124), UINT8_C(127), UINT8_C( 49), UINT8_C(110),
|
||||
UINT8_C( 42), UINT8_C( 88), UINT8_C(165), UINT8_C(171), UINT8_C(230), UINT8_C(207), UINT8_C(212), UINT8_C(202),
|
||||
UINT8_C(229), UINT8_C(143), UINT8_C( 77), UINT8_C( 59), UINT8_C(221), UINT8_C(113), UINT8_C(241), UINT8_C( 43) } },
|
||||
{ { UINT8_C(170), UINT8_C(216), UINT8_C( 3), UINT8_C(148), UINT8_C( 17), UINT8_C( 75), UINT8_C( 23), UINT8_C( 88),
|
||||
UINT8_C(179), UINT8_C(103), UINT8_C(201), UINT8_C( 47), UINT8_C(230), UINT8_C(250), UINT8_C(158), UINT8_C( 16),
|
||||
UINT8_C( 82), UINT8_C( 67), UINT8_C(187), UINT8_C( 56), UINT8_C( 18), UINT8_C(143), UINT8_C( 2), UINT8_C(247),
|
||||
UINT8_C( 30), UINT8_C( 79), UINT8_C( 50), UINT8_C(251), UINT8_C(193), UINT8_C( 36), UINT8_C( 38), UINT8_C(107),
|
||||
UINT8_C(252), UINT8_C( 41), UINT8_MAX, UINT8_C( 13), UINT8_C(116), UINT8_C( 23), UINT8_C(101), UINT8_C( 40),
|
||||
UINT8_C(126), UINT8_C( 46), UINT8_C( 87), UINT8_C(100), UINT8_C( 40), UINT8_C(245), UINT8_C(117), UINT8_C(122),
|
||||
UINT8_C( 56), UINT8_C( 48), UINT8_C(178), UINT8_C( 74), UINT8_C(192), UINT8_C(180), UINT8_C( 65), UINT8_C(222),
|
||||
UINT8_C( 4), UINT8_C(116), UINT8_C(218), UINT8_C(197), UINT8_C(152), UINT8_C( 0), UINT8_C( 48), UINT8_C(148) },
|
||||
{ UINT8_C(170), UINT8_C(216), UINT8_C( 3), UINT8_C(148), UINT8_C( 17), UINT8_C( 75), UINT8_C( 23), UINT8_C( 88),
|
||||
UINT8_C(179), UINT8_C(103), UINT8_C(201), UINT8_C( 47), UINT8_C(230), UINT8_C(250), UINT8_C(158), UINT8_C( 16),
|
||||
UINT8_C( 82), UINT8_C( 67), UINT8_C(187), UINT8_C( 56), UINT8_C( 18), UINT8_C(143), UINT8_C( 2), UINT8_C(247),
|
||||
UINT8_C( 30), UINT8_C( 79), UINT8_C( 50), UINT8_C(251), UINT8_C(193), UINT8_C( 36), UINT8_C( 38), UINT8_C(107),
|
||||
UINT8_C(252), UINT8_C( 41), UINT8_MAX, UINT8_C( 13), UINT8_C(116), UINT8_C( 23), UINT8_C(101), UINT8_C( 40),
|
||||
UINT8_C(126), UINT8_C( 46), UINT8_C( 87), UINT8_C(100), UINT8_C( 40), UINT8_C(245), UINT8_C(117), UINT8_C(122),
|
||||
UINT8_C( 56), UINT8_C( 48), UINT8_C(178), UINT8_C( 74), UINT8_C(192), UINT8_C(180), UINT8_C( 65), UINT8_C(222),
|
||||
UINT8_C( 4), UINT8_C(116), UINT8_C(218), UINT8_C(197), UINT8_C(152), UINT8_C( 0), UINT8_C( 48), UINT8_C(148) } },
|
||||
{ { UINT8_C( 42), UINT8_C( 48), UINT8_C(162), UINT8_C(158), UINT8_C( 71), UINT8_C( 7), UINT8_C(198), UINT8_C(197),
|
||||
UINT8_C( 54), UINT8_C( 30), UINT8_C( 41), UINT8_C( 94), UINT8_C( 19), UINT8_C(158), UINT8_C(217), UINT8_C( 76),
|
||||
UINT8_C(207), UINT8_C(139), UINT8_C(150), UINT8_C(143), UINT8_C( 64), UINT8_C(216), UINT8_C(109), UINT8_C( 68),
|
||||
UINT8_C( 76), UINT8_C( 71), UINT8_C( 9), UINT8_C(228), UINT8_C( 72), UINT8_C( 57), UINT8_C(120), UINT8_C(114),
|
||||
UINT8_C(105), UINT8_C( 26), UINT8_C( 16), UINT8_C(176), UINT8_C( 34), UINT8_C(215), UINT8_C(117), UINT8_C( 88),
|
||||
UINT8_C(245), UINT8_C(159), UINT8_C(182), UINT8_C( 8), UINT8_C( 61), UINT8_C(143), UINT8_C( 84), UINT8_C( 12),
|
||||
UINT8_C( 27), UINT8_C(235), UINT8_C(155), UINT8_C( 91), UINT8_C(195), UINT8_C( 9), UINT8_C(159), UINT8_C( 15),
|
||||
UINT8_C( 80), UINT8_C(168), UINT8_C(243), UINT8_C(152), UINT8_C(225), UINT8_C(107), UINT8_C( 10), UINT8_C( 75) },
|
||||
{ UINT8_C( 42), UINT8_C( 48), UINT8_C(162), UINT8_C(158), UINT8_C( 71), UINT8_C( 7), UINT8_C(198), UINT8_C(197),
|
||||
UINT8_C( 54), UINT8_C( 30), UINT8_C( 41), UINT8_C( 94), UINT8_C( 19), UINT8_C(158), UINT8_C(217), UINT8_C( 76),
|
||||
UINT8_C(207), UINT8_C(139), UINT8_C(150), UINT8_C(143), UINT8_C( 64), UINT8_C(216), UINT8_C(109), UINT8_C( 68),
|
||||
UINT8_C( 76), UINT8_C( 71), UINT8_C( 9), UINT8_C(228), UINT8_C( 72), UINT8_C( 57), UINT8_C(120), UINT8_C(114),
|
||||
UINT8_C(105), UINT8_C( 26), UINT8_C( 16), UINT8_C(176), UINT8_C( 34), UINT8_C(215), UINT8_C(117), UINT8_C( 88),
|
||||
UINT8_C(245), UINT8_C(159), UINT8_C(182), UINT8_C( 8), UINT8_C( 61), UINT8_C(143), UINT8_C( 84), UINT8_C( 12),
|
||||
UINT8_C( 27), UINT8_C(235), UINT8_C(155), UINT8_C( 91), UINT8_C(195), UINT8_C( 9), UINT8_C(159), UINT8_C( 15),
|
||||
UINT8_C( 80), UINT8_C(168), UINT8_C(243), UINT8_C(152), UINT8_C(225), UINT8_C(107), UINT8_C( 10), UINT8_C( 75) } },
|
||||
{ { UINT8_C(134), UINT8_C( 27), UINT8_C(251), UINT8_C(168), UINT8_C(242), UINT8_C(113), UINT8_C( 0), UINT8_C(231),
|
||||
UINT8_C( 16), UINT8_C(182), UINT8_C(239), UINT8_C( 77), UINT8_C( 70), UINT8_C( 68), UINT8_C( 90), UINT8_C( 97),
|
||||
UINT8_C( 47), UINT8_C(245), UINT8_C(188), UINT8_C(242), UINT8_C(254), UINT8_C( 91), UINT8_C( 1), UINT8_C( 79),
|
||||
UINT8_C( 3), UINT8_C(244), UINT8_C(231), UINT8_C(228), UINT8_C( 95), UINT8_C(242), UINT8_C( 47), UINT8_C(229),
|
||||
UINT8_C( 13), UINT8_C( 43), UINT8_C(141), UINT8_MAX, UINT8_C(156), UINT8_C(141), UINT8_C(230), UINT8_C(172),
|
||||
UINT8_C( 68), UINT8_C(213), UINT8_C(249), UINT8_C(138), UINT8_C( 25), UINT8_C( 83), UINT8_C(235), UINT8_C( 72),
|
||||
UINT8_C( 73), UINT8_C(167), UINT8_C( 58), UINT8_C( 71), UINT8_C( 2), UINT8_C( 59), UINT8_C(150), UINT8_C( 5),
|
||||
UINT8_C( 47), UINT8_C(126), UINT8_C(233), UINT8_C(143), UINT8_C(112), UINT8_C( 25), UINT8_C(116), UINT8_C(125) },
|
||||
{ UINT8_C(134), UINT8_C( 27), UINT8_C(251), UINT8_C(168), UINT8_C(242), UINT8_C(113), UINT8_C( 0), UINT8_C(231),
|
||||
UINT8_C( 16), UINT8_C(182), UINT8_C(239), UINT8_C( 77), UINT8_C( 70), UINT8_C( 68), UINT8_C( 90), UINT8_C( 97),
|
||||
UINT8_C( 47), UINT8_C(245), UINT8_C(188), UINT8_C(242), UINT8_C(254), UINT8_C( 91), UINT8_C( 1), UINT8_C( 79),
|
||||
UINT8_C( 3), UINT8_C(244), UINT8_C(231), UINT8_C(228), UINT8_C( 95), UINT8_C(242), UINT8_C( 47), UINT8_C(229),
|
||||
UINT8_C( 13), UINT8_C( 43), UINT8_C(141), UINT8_MAX, UINT8_C(156), UINT8_C(141), UINT8_C(230), UINT8_C(172),
|
||||
UINT8_C( 68), UINT8_C(213), UINT8_C(249), UINT8_C(138), UINT8_C( 25), UINT8_C( 83), UINT8_C(235), UINT8_C( 72),
|
||||
UINT8_C( 73), UINT8_C(167), UINT8_C( 58), UINT8_C( 71), UINT8_C( 2), UINT8_C( 59), UINT8_C(150), UINT8_C( 5),
|
||||
UINT8_C( 47), UINT8_C(126), UINT8_C(233), UINT8_C(143), UINT8_C(112), UINT8_C( 25), UINT8_C(116), UINT8_C(125) } },
|
||||
{ { UINT8_C( 68), UINT8_C( 2), UINT8_C(124), UINT8_C(224), UINT8_C(143), UINT8_C( 98), UINT8_C(140), UINT8_C(211),
|
||||
UINT8_C( 55), UINT8_C(133), UINT8_C( 93), UINT8_C( 81), UINT8_C(217), UINT8_C( 72), UINT8_C(153), UINT8_C( 34),
|
||||
UINT8_C(239), UINT8_C(212), UINT8_C(105), UINT8_C(241), UINT8_C( 15), UINT8_C( 0), UINT8_C(246), UINT8_C( 63),
|
||||
UINT8_C(126), UINT8_C(224), UINT8_C(206), UINT8_C(238), UINT8_C(249), UINT8_C( 66), UINT8_C(107), UINT8_C( 61),
|
||||
UINT8_C( 68), UINT8_C(231), UINT8_C( 29), UINT8_C(212), UINT8_C( 73), UINT8_C(169), UINT8_C(167), UINT8_C(128),
|
||||
UINT8_C( 46), UINT8_C( 5), UINT8_C(209), UINT8_C( 7), UINT8_C( 77), UINT8_C(107), UINT8_C( 41), UINT8_C( 61),
|
||||
UINT8_C( 63), UINT8_C(147), UINT8_C( 46), UINT8_C( 78), UINT8_C(147), UINT8_C( 37), UINT8_C(141), UINT8_C( 17),
|
||||
UINT8_C( 5), UINT8_C( 91), UINT8_MAX, UINT8_C(254), UINT8_C(158), UINT8_C(106), UINT8_C( 59), UINT8_C(226) },
|
||||
{ UINT8_C( 68), UINT8_C( 2), UINT8_C(124), UINT8_C(224), UINT8_C(143), UINT8_C( 98), UINT8_C(140), UINT8_C(211),
|
||||
UINT8_C( 55), UINT8_C(133), UINT8_C( 93), UINT8_C( 81), UINT8_C(217), UINT8_C( 72), UINT8_C(153), UINT8_C( 34),
|
||||
UINT8_C(239), UINT8_C(212), UINT8_C(105), UINT8_C(241), UINT8_C( 15), UINT8_C( 0), UINT8_C(246), UINT8_C( 63),
|
||||
UINT8_C(126), UINT8_C(224), UINT8_C(206), UINT8_C(238), UINT8_C(249), UINT8_C( 66), UINT8_C(107), UINT8_C( 61),
|
||||
UINT8_C( 68), UINT8_C(231), UINT8_C( 29), UINT8_C(212), UINT8_C( 73), UINT8_C(169), UINT8_C(167), UINT8_C(128),
|
||||
UINT8_C( 46), UINT8_C( 5), UINT8_C(209), UINT8_C( 7), UINT8_C( 77), UINT8_C(107), UINT8_C( 41), UINT8_C( 61),
|
||||
UINT8_C( 63), UINT8_C(147), UINT8_C( 46), UINT8_C( 78), UINT8_C(147), UINT8_C( 37), UINT8_C(141), UINT8_C( 17),
|
||||
UINT8_C( 5), UINT8_C( 91), UINT8_MAX, UINT8_C(254), UINT8_C(158), UINT8_C(106), UINT8_C( 59), UINT8_C(226) } },
|
||||
{ { UINT8_C( 81), UINT8_C( 88), UINT8_C(182), UINT8_C(154), UINT8_C( 1), UINT8_C( 94), UINT8_C( 26), UINT8_C( 47),
|
||||
UINT8_C( 99), UINT8_C(236), UINT8_C( 55), UINT8_C(176), UINT8_C( 87), UINT8_C( 96), UINT8_C(237), UINT8_C(150),
|
||||
UINT8_C(243), UINT8_C( 28), UINT8_C(228), UINT8_C(134), UINT8_C( 65), UINT8_C(114), UINT8_C(151), UINT8_C( 70),
|
||||
UINT8_C(205), UINT8_C(150), UINT8_C( 68), UINT8_C(107), UINT8_C( 0), UINT8_C(127), UINT8_C( 78), UINT8_C( 81),
|
||||
UINT8_C(215), UINT8_C( 4), UINT8_C(235), UINT8_C(216), UINT8_C( 98), UINT8_C( 6), UINT8_C( 7), UINT8_C(197),
|
||||
UINT8_C(242), UINT8_C( 62), UINT8_C(118), UINT8_C( 73), UINT8_C(159), UINT8_C( 99), UINT8_C(223), UINT8_C(146),
|
||||
UINT8_C(127), UINT8_C(195), UINT8_C( 25), UINT8_C(192), UINT8_C( 53), UINT8_C(176), UINT8_C( 6), UINT8_C( 3),
|
||||
UINT8_C( 71), UINT8_C( 74), UINT8_C(110), UINT8_C( 71), UINT8_C(201), UINT8_C(188), UINT8_C(153), UINT8_C(160) },
|
||||
{ UINT8_C( 81), UINT8_C( 88), UINT8_C(182), UINT8_C(154), UINT8_C( 1), UINT8_C( 94), UINT8_C( 26), UINT8_C( 47),
|
||||
UINT8_C( 99), UINT8_C(236), UINT8_C( 55), UINT8_C(176), UINT8_C( 87), UINT8_C( 96), UINT8_C(237), UINT8_C(150),
|
||||
UINT8_C(243), UINT8_C( 28), UINT8_C(228), UINT8_C(134), UINT8_C( 65), UINT8_C(114), UINT8_C(151), UINT8_C( 70),
|
||||
UINT8_C(205), UINT8_C(150), UINT8_C( 68), UINT8_C(107), UINT8_C( 0), UINT8_C(127), UINT8_C( 78), UINT8_C( 81),
|
||||
UINT8_C(215), UINT8_C( 4), UINT8_C(235), UINT8_C(216), UINT8_C( 98), UINT8_C( 6), UINT8_C( 7), UINT8_C(197),
|
||||
UINT8_C(242), UINT8_C( 62), UINT8_C(118), UINT8_C( 73), UINT8_C(159), UINT8_C( 99), UINT8_C(223), UINT8_C(146),
|
||||
UINT8_C(127), UINT8_C(195), UINT8_C( 25), UINT8_C(192), UINT8_C( 53), UINT8_C(176), UINT8_C( 6), UINT8_C( 3),
|
||||
UINT8_C( 71), UINT8_C( 74), UINT8_C(110), UINT8_C( 71), UINT8_C(201), UINT8_C(188), UINT8_C(153), UINT8_C(160) } },
|
||||
{ { UINT8_C(193), UINT8_C(132), UINT8_C(120), UINT8_C( 35), UINT8_C(138), UINT8_C(128), UINT8_C(233), UINT8_C(124),
|
||||
UINT8_C(190), UINT8_C( 95), UINT8_C(197), UINT8_C( 93), UINT8_C(194), UINT8_C(164), UINT8_C(240), UINT8_C( 66),
|
||||
UINT8_C(104), UINT8_C( 9), UINT8_C( 2), UINT8_C(157), UINT8_C(185), UINT8_C( 9), UINT8_C(160), UINT8_C( 0),
|
||||
UINT8_C( 83), UINT8_C( 15), UINT8_C( 72), UINT8_C( 29), UINT8_C(203), UINT8_C(225), UINT8_C(189), UINT8_C(140),
|
||||
UINT8_C(101), UINT8_C( 54), UINT8_C(176), UINT8_C(240), UINT8_C(182), UINT8_C(153), UINT8_C(108), UINT8_C(116),
|
||||
UINT8_C(248), UINT8_C( 50), UINT8_C(210), UINT8_C(186), UINT8_C(214), UINT8_C(194), UINT8_C(252), UINT8_C( 62),
|
||||
UINT8_C(203), UINT8_MAX, UINT8_C(220), UINT8_C(132), UINT8_C( 8), UINT8_C(124), UINT8_C(133), UINT8_C( 91),
|
||||
UINT8_C(139), UINT8_C(205), UINT8_C(120), UINT8_C( 87), UINT8_C(174), UINT8_C( 54), UINT8_C(227), UINT8_C( 19) },
|
||||
{ UINT8_C(193), UINT8_C(132), UINT8_C(120), UINT8_C( 35), UINT8_C(138), UINT8_C(128), UINT8_C(233), UINT8_C(124),
|
||||
UINT8_C(190), UINT8_C( 95), UINT8_C(197), UINT8_C( 93), UINT8_C(194), UINT8_C(164), UINT8_C(240), UINT8_C( 66),
|
||||
UINT8_C(104), UINT8_C( 9), UINT8_C( 2), UINT8_C(157), UINT8_C(185), UINT8_C( 9), UINT8_C(160), UINT8_C( 0),
|
||||
UINT8_C( 83), UINT8_C( 15), UINT8_C( 72), UINT8_C( 29), UINT8_C(203), UINT8_C(225), UINT8_C(189), UINT8_C(140),
|
||||
UINT8_C(101), UINT8_C( 54), UINT8_C(176), UINT8_C(240), UINT8_C(182), UINT8_C(153), UINT8_C(108), UINT8_C(116),
|
||||
UINT8_C(248), UINT8_C( 50), UINT8_C(210), UINT8_C(186), UINT8_C(214), UINT8_C(194), UINT8_C(252), UINT8_C( 62),
|
||||
UINT8_C(203), UINT8_MAX, UINT8_C(220), UINT8_C(132), UINT8_C( 8), UINT8_C(124), UINT8_C(133), UINT8_C( 91),
|
||||
UINT8_C(139), UINT8_C(205), UINT8_C(120), UINT8_C( 87), UINT8_C(174), UINT8_C( 54), UINT8_C(227), UINT8_C( 19) } },
|
||||
{ { UINT8_C(108), UINT8_C(147), UINT8_C( 3), UINT8_C( 34), UINT8_C( 44), UINT8_C(112), UINT8_C(150), UINT8_C( 36),
|
||||
UINT8_C(162), UINT8_C(104), UINT8_C(223), UINT8_C(120), UINT8_C( 42), UINT8_C(219), UINT8_C(183), UINT8_C(245),
|
||||
UINT8_C(218), UINT8_C(147), UINT8_C(122), UINT8_C(226), UINT8_C( 15), UINT8_MAX, UINT8_C( 62), UINT8_C(155),
|
||||
UINT8_C(204), UINT8_C(182), UINT8_C(242), UINT8_C(122), UINT8_C(236), UINT8_C(213), UINT8_C(141), UINT8_C( 88),
|
||||
UINT8_C(105), UINT8_C(145), UINT8_C(122), UINT8_C(149), UINT8_C( 1), UINT8_C( 17), UINT8_C(186), UINT8_C(163),
|
||||
UINT8_C(121), UINT8_C(153), UINT8_C( 27), UINT8_C(164), UINT8_C(116), UINT8_C(210), UINT8_C(153), UINT8_C( 79),
|
||||
UINT8_C(101), UINT8_C( 19), UINT8_C( 49), UINT8_C(117), UINT8_C( 18), UINT8_C(111), UINT8_C( 16), UINT8_C(222),
|
||||
UINT8_C( 38), UINT8_C( 2), UINT8_C( 88), UINT8_C( 18), UINT8_C(215), UINT8_C(230), UINT8_C(107), UINT8_C( 64) },
|
||||
{ UINT8_C(108), UINT8_C(147), UINT8_C( 3), UINT8_C( 34), UINT8_C( 44), UINT8_C(112), UINT8_C(150), UINT8_C( 36),
|
||||
UINT8_C(162), UINT8_C(104), UINT8_C(223), UINT8_C(120), UINT8_C( 42), UINT8_C(219), UINT8_C(183), UINT8_C(245),
|
||||
UINT8_C(218), UINT8_C(147), UINT8_C(122), UINT8_C(226), UINT8_C( 15), UINT8_MAX, UINT8_C( 62), UINT8_C(155),
|
||||
UINT8_C(204), UINT8_C(182), UINT8_C(242), UINT8_C(122), UINT8_C(236), UINT8_C(213), UINT8_C(141), UINT8_C( 88),
|
||||
UINT8_C(105), UINT8_C(145), UINT8_C(122), UINT8_C(149), UINT8_C( 1), UINT8_C( 17), UINT8_C(186), UINT8_C(163),
|
||||
UINT8_C(121), UINT8_C(153), UINT8_C( 27), UINT8_C(164), UINT8_C(116), UINT8_C(210), UINT8_C(153), UINT8_C( 79),
|
||||
UINT8_C(101), UINT8_C( 19), UINT8_C( 49), UINT8_C(117), UINT8_C( 18), UINT8_C(111), UINT8_C( 16), UINT8_C(222),
|
||||
UINT8_C( 38), UINT8_C( 2), UINT8_C( 88), UINT8_C( 18), UINT8_C(215), UINT8_C(230), UINT8_C(107), UINT8_C( 64) } },
|
||||
};
|
||||
|
||||
for (size_t i = 0 ; i < (sizeof(test_vec) / sizeof(test_vec[0])) ; i++) {
|
||||
simde__m512i r = simde_x_mm512_set_epu8(
|
||||
test_vec[i].a[63], test_vec[i].a[62], test_vec[i].a[61], test_vec[i].a[60],
|
||||
test_vec[i].a[59], test_vec[i].a[58], test_vec[i].a[57], test_vec[i].a[56],
|
||||
test_vec[i].a[55], test_vec[i].a[54], test_vec[i].a[53], test_vec[i].a[52],
|
||||
test_vec[i].a[51], test_vec[i].a[50], test_vec[i].a[49], test_vec[i].a[48],
|
||||
test_vec[i].a[47], test_vec[i].a[46], test_vec[i].a[45], test_vec[i].a[44],
|
||||
test_vec[i].a[43], test_vec[i].a[42], test_vec[i].a[41], test_vec[i].a[40],
|
||||
test_vec[i].a[39], test_vec[i].a[38], test_vec[i].a[37], test_vec[i].a[36],
|
||||
test_vec[i].a[35], test_vec[i].a[34], test_vec[i].a[33], test_vec[i].a[32],
|
||||
test_vec[i].a[31], test_vec[i].a[30], test_vec[i].a[29], test_vec[i].a[28],
|
||||
test_vec[i].a[27], test_vec[i].a[26], test_vec[i].a[25], test_vec[i].a[24],
|
||||
test_vec[i].a[23], test_vec[i].a[22], test_vec[i].a[21], test_vec[i].a[20],
|
||||
test_vec[i].a[19], test_vec[i].a[18], test_vec[i].a[17], test_vec[i].a[16],
|
||||
test_vec[i].a[15], test_vec[i].a[14], test_vec[i].a[13], test_vec[i].a[12],
|
||||
test_vec[i].a[11], test_vec[i].a[10], test_vec[i].a[ 9], test_vec[i].a[ 8],
|
||||
test_vec[i].a[ 7], test_vec[i].a[ 6], test_vec[i].a[ 5], test_vec[i].a[ 4],
|
||||
test_vec[i].a[ 3], test_vec[i].a[ 2], test_vec[i].a[ 1], test_vec[i].a[ 0]);
|
||||
simde_test_x86_assert_equal_u8x64(r, simde_mm512_loadu_si512(test_vec[i].r));
|
||||
}
|
||||
|
||||
return 0;
|
||||
#else
|
||||
fputc('\n', stdout);
|
||||
for (int i = 0 ; i < 8 ; i++) {
|
||||
simde__m512i a = simde_test_x86_random_u8x64();
|
||||
simde__m512i r = a;
|
||||
|
||||
simde_test_x86_write_u8x64(2, a, SIMDE_TEST_VEC_POS_FIRST);
|
||||
simde_test_x86_write_u8x64(2, r, SIMDE_TEST_VEC_POS_LAST);
|
||||
}
|
||||
return 1;
|
||||
#endif
|
||||
}
|
||||
|
||||
static int
|
||||
test_simde_x_mm512_set_epu16 (SIMDE_MUNIT_TEST_ARGS) {
|
||||
#if 1
|
||||
static const struct {
|
||||
const uint16_t a[32];
|
||||
const uint16_t r[32];
|
||||
} test_vec[] = {
|
||||
{ { UINT16_C( 4444), UINT16_C( 2014), UINT16_C(59869), UINT16_C(26792), UINT16_C(16109), UINT16_C(65375), UINT16_C(55446), UINT16_C(23385),
|
||||
UINT16_C(13676), UINT16_C(40345), UINT16_C(34579), UINT16_C(59195), UINT16_C(62220), UINT16_C(34651), UINT16_C(15434), UINT16_C(42737),
|
||||
UINT16_C(53070), UINT16_C(11181), UINT16_C(22200), UINT16_C(42387), UINT16_C(62100), UINT16_C(11172), UINT16_C(65226), UINT16_C(13958),
|
||||
UINT16_C( 7987), UINT16_C(18132), UINT16_C( 4007), UINT16_C(45870), UINT16_C(35074), UINT16_C(19770), UINT16_C(11205), UINT16_C( 5107) },
|
||||
{ UINT16_C( 4444), UINT16_C( 2014), UINT16_C(59869), UINT16_C(26792), UINT16_C(16109), UINT16_C(65375), UINT16_C(55446), UINT16_C(23385),
|
||||
UINT16_C(13676), UINT16_C(40345), UINT16_C(34579), UINT16_C(59195), UINT16_C(62220), UINT16_C(34651), UINT16_C(15434), UINT16_C(42737),
|
||||
UINT16_C(53070), UINT16_C(11181), UINT16_C(22200), UINT16_C(42387), UINT16_C(62100), UINT16_C(11172), UINT16_C(65226), UINT16_C(13958),
|
||||
UINT16_C( 7987), UINT16_C(18132), UINT16_C( 4007), UINT16_C(45870), UINT16_C(35074), UINT16_C(19770), UINT16_C(11205), UINT16_C( 5107) } },
|
||||
{ { UINT16_C(41467), UINT16_C(45887), UINT16_C(54007), UINT16_C(35673), UINT16_C(64965), UINT16_C(36790), UINT16_C(15611), UINT16_C(11974),
|
||||
UINT16_C(39516), UINT16_C( 885), UINT16_C(41897), UINT16_C(44214), UINT16_C(61484), UINT16_C(61945), UINT16_C(60444), UINT16_C( 5893),
|
||||
UINT16_C(17549), UINT16_C(33994), UINT16_C( 8982), UINT16_C(56080), UINT16_C(50721), UINT16_C( 7275), UINT16_C(12547), UINT16_C(24395),
|
||||
UINT16_C(49355), UINT16_C(29794), UINT16_C( 6243), UINT16_C(36640), UINT16_C( 6408), UINT16_C( 9344), UINT16_C(34054), UINT16_C(37691) },
|
||||
{ UINT16_C(41467), UINT16_C(45887), UINT16_C(54007), UINT16_C(35673), UINT16_C(64965), UINT16_C(36790), UINT16_C(15611), UINT16_C(11974),
|
||||
UINT16_C(39516), UINT16_C( 885), UINT16_C(41897), UINT16_C(44214), UINT16_C(61484), UINT16_C(61945), UINT16_C(60444), UINT16_C( 5893),
|
||||
UINT16_C(17549), UINT16_C(33994), UINT16_C( 8982), UINT16_C(56080), UINT16_C(50721), UINT16_C( 7275), UINT16_C(12547), UINT16_C(24395),
|
||||
UINT16_C(49355), UINT16_C(29794), UINT16_C( 6243), UINT16_C(36640), UINT16_C( 6408), UINT16_C( 9344), UINT16_C(34054), UINT16_C(37691) } },
|
||||
{ { UINT16_C( 1737), UINT16_C(57368), UINT16_C(10281), UINT16_C(19131), UINT16_C( 9966), UINT16_C(61799), UINT16_C(45655), UINT16_C( 8784),
|
||||
UINT16_C(45682), UINT16_C(54679), UINT16_C(47050), UINT16_C(54116), UINT16_C(58577), UINT16_C(55287), UINT16_C(13162), UINT16_C(13162),
|
||||
UINT16_C(33337), UINT16_C(25107), UINT16_C(53162), UINT16_C(39341), UINT16_C( 5365), UINT16_C(19850), UINT16_C(56262), UINT16_C(14447),
|
||||
UINT16_C( 1677), UINT16_C(22541), UINT16_C(29118), UINT16_C(36651), UINT16_C( 8789), UINT16_C(48998), UINT16_C(53333), UINT16_C(36595) },
|
||||
{ UINT16_C( 1737), UINT16_C(57368), UINT16_C(10281), UINT16_C(19131), UINT16_C( 9966), UINT16_C(61799), UINT16_C(45655), UINT16_C( 8784),
|
||||
UINT16_C(45682), UINT16_C(54679), UINT16_C(47050), UINT16_C(54116), UINT16_C(58577), UINT16_C(55287), UINT16_C(13162), UINT16_C(13162),
|
||||
UINT16_C(33337), UINT16_C(25107), UINT16_C(53162), UINT16_C(39341), UINT16_C( 5365), UINT16_C(19850), UINT16_C(56262), UINT16_C(14447),
|
||||
UINT16_C( 1677), UINT16_C(22541), UINT16_C(29118), UINT16_C(36651), UINT16_C( 8789), UINT16_C(48998), UINT16_C(53333), UINT16_C(36595) } },
|
||||
{ { UINT16_C( 1619), UINT16_C(65009), UINT16_C(40661), UINT16_C(52118), UINT16_C( 8626), UINT16_C(30744), UINT16_C(34812), UINT16_C(35248),
|
||||
UINT16_C(48526), UINT16_C(19681), UINT16_C( 3118), UINT16_C(33755), UINT16_C(16687), UINT16_C(33859), UINT16_C(13841), UINT16_C(25619),
|
||||
UINT16_C( 1084), UINT16_C( 4706), UINT16_C(63650), UINT16_C(21725), UINT16_C(62745), UINT16_C( 5580), UINT16_C(31868), UINT16_C( 2719),
|
||||
UINT16_C(32825), UINT16_C(26454), UINT16_C(12685), UINT16_C(48362), UINT16_C(11634), UINT16_C(33856), UINT16_C(21347), UINT16_C(41192) },
|
||||
{ UINT16_C( 1619), UINT16_C(65009), UINT16_C(40661), UINT16_C(52118), UINT16_C( 8626), UINT16_C(30744), UINT16_C(34812), UINT16_C(35248),
|
||||
UINT16_C(48526), UINT16_C(19681), UINT16_C( 3118), UINT16_C(33755), UINT16_C(16687), UINT16_C(33859), UINT16_C(13841), UINT16_C(25619),
|
||||
UINT16_C( 1084), UINT16_C( 4706), UINT16_C(63650), UINT16_C(21725), UINT16_C(62745), UINT16_C( 5580), UINT16_C(31868), UINT16_C( 2719),
|
||||
UINT16_C(32825), UINT16_C(26454), UINT16_C(12685), UINT16_C(48362), UINT16_C(11634), UINT16_C(33856), UINT16_C(21347), UINT16_C(41192) } },
|
||||
{ { UINT16_C(19031), UINT16_C(63922), UINT16_C(36675), UINT16_C(23629), UINT16_C( 6532), UINT16_C( 114), UINT16_C( 4501), UINT16_C(52747),
|
||||
UINT16_C(24977), UINT16_C( 7733), UINT16_C( 8339), UINT16_C( 1498), UINT16_C( 6989), UINT16_C(45449), UINT16_C(29294), UINT16_C(50769),
|
||||
UINT16_C( 956), UINT16_C(65471), UINT16_C( 3474), UINT16_C( 5724), UINT16_C(52774), UINT16_C(48150), UINT16_C( 8671), UINT16_C(28810),
|
||||
UINT16_C(49283), UINT16_C( 5775), UINT16_C(27104), UINT16_C(11547), UINT16_C(42372), UINT16_C(62430), UINT16_C(12055), UINT16_C(54201) },
|
||||
{ UINT16_C(19031), UINT16_C(63922), UINT16_C(36675), UINT16_C(23629), UINT16_C( 6532), UINT16_C( 114), UINT16_C( 4501), UINT16_C(52747),
|
||||
UINT16_C(24977), UINT16_C( 7733), UINT16_C( 8339), UINT16_C( 1498), UINT16_C( 6989), UINT16_C(45449), UINT16_C(29294), UINT16_C(50769),
|
||||
UINT16_C( 956), UINT16_C(65471), UINT16_C( 3474), UINT16_C( 5724), UINT16_C(52774), UINT16_C(48150), UINT16_C( 8671), UINT16_C(28810),
|
||||
UINT16_C(49283), UINT16_C( 5775), UINT16_C(27104), UINT16_C(11547), UINT16_C(42372), UINT16_C(62430), UINT16_C(12055), UINT16_C(54201) } },
|
||||
{ { UINT16_C(30770), UINT16_C(50387), UINT16_C(12165), UINT16_C(44250), UINT16_C(61949), UINT16_C(56424), UINT16_C(61970), UINT16_C(38220),
|
||||
UINT16_C(56242), UINT16_C(37547), UINT16_C(51013), UINT16_C(51648), UINT16_C(40556), UINT16_C(33724), UINT16_C(30158), UINT16_C( 86),
|
||||
UINT16_C(10734), UINT16_C(29637), UINT16_C(40792), UINT16_C(21791), UINT16_C(34704), UINT16_C(41777), UINT16_C(32378), UINT16_C(11320),
|
||||
UINT16_C(58457), UINT16_C(40639), UINT16_C(32683), UINT16_C( 5992), UINT16_C( 9245), UINT16_C(60314), UINT16_C(61594), UINT16_C(35052) },
|
||||
{ UINT16_C(30770), UINT16_C(50387), UINT16_C(12165), UINT16_C(44250), UINT16_C(61949), UINT16_C(56424), UINT16_C(61970), UINT16_C(38220),
|
||||
UINT16_C(56242), UINT16_C(37547), UINT16_C(51013), UINT16_C(51648), UINT16_C(40556), UINT16_C(33724), UINT16_C(30158), UINT16_C( 86),
|
||||
UINT16_C(10734), UINT16_C(29637), UINT16_C(40792), UINT16_C(21791), UINT16_C(34704), UINT16_C(41777), UINT16_C(32378), UINT16_C(11320),
|
||||
UINT16_C(58457), UINT16_C(40639), UINT16_C(32683), UINT16_C( 5992), UINT16_C( 9245), UINT16_C(60314), UINT16_C(61594), UINT16_C(35052) } },
|
||||
{ { UINT16_C(45338), UINT16_C(29435), UINT16_C( 6992), UINT16_C(57800), UINT16_C(63906), UINT16_C( 7300), UINT16_C(48247), UINT16_C(53577),
|
||||
UINT16_C( 2208), UINT16_C(19311), UINT16_C(55175), UINT16_C(42082), UINT16_C(64764), UINT16_C(38544), UINT16_C(31981), UINT16_C( 1822),
|
||||
UINT16_C( 6445), UINT16_C(32121), UINT16_C(16692), UINT16_C(55134), UINT16_C(57915), UINT16_C(45811), UINT16_C(15519), UINT16_C(16259),
|
||||
UINT16_C(62276), UINT16_C(52107), UINT16_C(60874), UINT16_C(50800), UINT16_C( 234), UINT16_C(55132), UINT16_C(31356), UINT16_C(43486) },
|
||||
{ UINT16_C(45338), UINT16_C(29435), UINT16_C( 6992), UINT16_C(57800), UINT16_C(63906), UINT16_C( 7300), UINT16_C(48247), UINT16_C(53577),
|
||||
UINT16_C( 2208), UINT16_C(19311), UINT16_C(55175), UINT16_C(42082), UINT16_C(64764), UINT16_C(38544), UINT16_C(31981), UINT16_C( 1822),
|
||||
UINT16_C( 6445), UINT16_C(32121), UINT16_C(16692), UINT16_C(55134), UINT16_C(57915), UINT16_C(45811), UINT16_C(15519), UINT16_C(16259),
|
||||
UINT16_C(62276), UINT16_C(52107), UINT16_C(60874), UINT16_C(50800), UINT16_C( 234), UINT16_C(55132), UINT16_C(31356), UINT16_C(43486) } },
|
||||
{ { UINT16_C(22420), UINT16_C(51238), UINT16_C(34201), UINT16_C(54431), UINT16_C(37735), UINT16_C( 1670), UINT16_C( 2767), UINT16_C( 5190),
|
||||
UINT16_C(53757), UINT16_C(51167), UINT16_C(20414), UINT16_C(43150), UINT16_C(59983), UINT16_C(52095), UINT16_C(23909), UINT16_C(63860),
|
||||
UINT16_C(39861), UINT16_C(20161), UINT16_C(24864), UINT16_C(34594), UINT16_C(43252), UINT16_C(50062), UINT16_C(54450), UINT16_C(45015),
|
||||
UINT16_C(47013), UINT16_C(25463), UINT16_C( 1286), UINT16_C(22028), UINT16_C(35823), UINT16_C(21537), UINT16_C(38633), UINT16_C(40525) },
|
||||
{ UINT16_C(22420), UINT16_C(51238), UINT16_C(34201), UINT16_C(54431), UINT16_C(37735), UINT16_C( 1670), UINT16_C( 2767), UINT16_C( 5190),
|
||||
UINT16_C(53757), UINT16_C(51167), UINT16_C(20414), UINT16_C(43150), UINT16_C(59983), UINT16_C(52095), UINT16_C(23909), UINT16_C(63860),
|
||||
UINT16_C(39861), UINT16_C(20161), UINT16_C(24864), UINT16_C(34594), UINT16_C(43252), UINT16_C(50062), UINT16_C(54450), UINT16_C(45015),
|
||||
UINT16_C(47013), UINT16_C(25463), UINT16_C( 1286), UINT16_C(22028), UINT16_C(35823), UINT16_C(21537), UINT16_C(38633), UINT16_C(40525) } },
|
||||
};
|
||||
|
||||
for (size_t i = 0 ; i < (sizeof(test_vec) / sizeof(test_vec[0])) ; i++) {
|
||||
simde__m512i r = simde_x_mm512_set_epu16(
|
||||
test_vec[i].a[31], test_vec[i].a[30], test_vec[i].a[29], test_vec[i].a[28],
|
||||
test_vec[i].a[27], test_vec[i].a[26], test_vec[i].a[25], test_vec[i].a[24],
|
||||
test_vec[i].a[23], test_vec[i].a[22], test_vec[i].a[21], test_vec[i].a[20],
|
||||
test_vec[i].a[19], test_vec[i].a[18], test_vec[i].a[17], test_vec[i].a[16],
|
||||
test_vec[i].a[15], test_vec[i].a[14], test_vec[i].a[13], test_vec[i].a[12],
|
||||
test_vec[i].a[11], test_vec[i].a[10], test_vec[i].a[ 9], test_vec[i].a[ 8],
|
||||
test_vec[i].a[ 7], test_vec[i].a[ 6], test_vec[i].a[ 5], test_vec[i].a[ 4],
|
||||
test_vec[i].a[ 3], test_vec[i].a[ 2], test_vec[i].a[ 1], test_vec[i].a[ 0]);
|
||||
simde_test_x86_assert_equal_u16x32(r, simde_mm512_loadu_si512(test_vec[i].r));
|
||||
}
|
||||
|
||||
return 0;
|
||||
#else
|
||||
fputc('\n', stdout);
|
||||
for (int i = 0 ; i < 8 ; i++) {
|
||||
simde__m512i a = simde_test_x86_random_u16x32();
|
||||
simde__m512i r = a;
|
||||
|
||||
simde_test_x86_write_u16x32(2, a, SIMDE_TEST_VEC_POS_FIRST);
|
||||
simde_test_x86_write_u16x32(2, r, SIMDE_TEST_VEC_POS_LAST);
|
||||
}
|
||||
return 1;
|
||||
#endif
|
||||
}
|
||||
|
||||
static int
|
||||
test_simde_x_mm512_set_epu32 (SIMDE_MUNIT_TEST_ARGS) {
|
||||
#if 1
|
||||
static const struct {
|
||||
const uint32_t a[16];
|
||||
const uint32_t r[16];
|
||||
} test_vec[] = {
|
||||
{ { UINT32_C(1205155406), UINT32_C(3238136312), UINT32_C(2341122395), UINT32_C(3153248567), UINT32_C( 74890403), UINT32_C(2746889127), UINT32_C( 159224512), UINT32_C(2569338698),
|
||||
UINT32_C( 769718581), UINT32_C(1592713731), UINT32_C(3421141395), UINT32_C(3716602938), UINT32_C(1071775128), UINT32_C(4041382704), UINT32_C(2029608749), UINT32_C(2484149854) },
|
||||
{ UINT32_C(1205155406), UINT32_C(3238136312), UINT32_C(2341122395), UINT32_C(3153248567), UINT32_C( 74890403), UINT32_C(2746889127), UINT32_C( 159224512), UINT32_C(2569338698),
|
||||
UINT32_C( 769718581), UINT32_C(1592713731), UINT32_C(3421141395), UINT32_C(3716602938), UINT32_C(1071775128), UINT32_C(4041382704), UINT32_C(2029608749), UINT32_C(2484149854) } },
|
||||
{ { UINT32_C( 448917783), UINT32_C(1719251155), UINT32_C(1664181033), UINT32_C(3611342911), UINT32_C(3843432885), UINT32_C(3923179964), UINT32_C(3076640600), UINT32_C( 88830701),
|
||||
UINT32_C( 908004451), UINT32_C(3852310716), UINT32_C( 977850107), UINT32_C( 991004806), UINT32_C(1696671913), UINT32_C(2035283745), UINT32_C(3023089862), UINT32_C(2260302627) },
|
||||
{ UINT32_C( 448917783), UINT32_C(1719251155), UINT32_C(1664181033), UINT32_C(3611342911), UINT32_C(3843432885), UINT32_C(3923179964), UINT32_C(3076640600), UINT32_C( 88830701),
|
||||
UINT32_C( 908004451), UINT32_C(3852310716), UINT32_C( 977850107), UINT32_C( 991004806), UINT32_C(1696671913), UINT32_C(2035283745), UINT32_C(3023089862), UINT32_C(2260302627) } },
|
||||
{ { UINT32_C(1153292424), UINT32_C(1814714993), UINT32_C(2946986536), UINT32_C(2766846203), UINT32_C( 17435616), UINT32_C(3380304130), UINT32_C( 746433289), UINT32_C(2947757607),
|
||||
UINT32_C(2146660366), UINT32_C(4075560394), UINT32_C(2342622096), UINT32_C( 741313611), UINT32_C(2586655127), UINT32_C(2623776914), UINT32_C(2076762196), UINT32_C( 606763798) },
|
||||
{ UINT32_C(1153292424), UINT32_C(1814714993), UINT32_C(2946986536), UINT32_C(2766846203), UINT32_C( 17435616), UINT32_C(3380304130), UINT32_C( 746433289), UINT32_C(2947757607),
|
||||
UINT32_C(2146660366), UINT32_C(4075560394), UINT32_C(2342622096), UINT32_C( 741313611), UINT32_C(2586655127), UINT32_C(2623776914), UINT32_C(2076762196), UINT32_C( 606763798) } },
|
||||
{ { UINT32_C(3047431659), UINT32_C(3416821819), UINT32_C(1851148579), UINT32_C(1838843349), UINT32_C(1359464639), UINT32_C(3303893616), UINT32_C(1614788170), UINT32_C( 495216945),
|
||||
UINT32_C(3268552839), UINT32_C(3683482296), UINT32_C(2571822020), UINT32_C( 654763112), UINT32_C( 494472620), UINT32_C(3252774519), UINT32_C(1310794012), UINT32_C( 292267658) },
|
||||
{ UINT32_C(3047431659), UINT32_C(3416821819), UINT32_C(1851148579), UINT32_C(1838843349), UINT32_C(1359464639), UINT32_C(3303893616), UINT32_C(1614788170), UINT32_C( 495216945),
|
||||
UINT32_C(3268552839), UINT32_C(3683482296), UINT32_C(2571822020), UINT32_C( 654763112), UINT32_C( 494472620), UINT32_C(3252774519), UINT32_C(1310794012), UINT32_C( 292267658) } },
|
||||
{ { UINT32_C(2278768078), UINT32_C(2086822072), UINT32_C(2887101507), UINT32_C(1037245585), UINT32_C(2707049513), UINT32_C(3479321779), UINT32_C(3877471325), UINT32_C(4177102890),
|
||||
UINT32_C(2122304710), UINT32_C(1895490093), UINT32_C( 521932686), UINT32_C(1432219691), UINT32_C(4025923388), UINT32_C(1354717427), UINT32_C( 104389852), UINT32_C( 738144613) },
|
||||
{ UINT32_C(2278768078), UINT32_C(2086822072), UINT32_C(2887101507), UINT32_C(1037245585), UINT32_C(2707049513), UINT32_C(3479321779), UINT32_C(3877471325), UINT32_C(4177102890),
|
||||
UINT32_C(2122304710), UINT32_C(1895490093), UINT32_C( 521932686), UINT32_C(1432219691), UINT32_C(4025923388), UINT32_C(1354717427), UINT32_C( 104389852), UINT32_C( 738144613) } },
|
||||
{ { UINT32_C( 715751165), UINT32_C(4019954528), UINT32_C(3725506482), UINT32_C(3828575143), UINT32_C( 382937379), UINT32_C(1583846017), UINT32_C(3563364207), UINT32_C(3456066512),
|
||||
UINT32_C(1123592418), UINT32_C(4247884619), UINT32_C(4074455114), UINT32_C(3470134955), UINT32_C(3118836023), UINT32_C(2870430780), UINT32_C(3145694187), UINT32_C(3246948063) },
|
||||
{ UINT32_C( 715751165), UINT32_C(4019954528), UINT32_C(3725506482), UINT32_C(3828575143), UINT32_C( 382937379), UINT32_C(1583846017), UINT32_C(3563364207), UINT32_C(3456066512),
|
||||
UINT32_C(1123592418), UINT32_C(4247884619), UINT32_C(4074455114), UINT32_C(3470134955), UINT32_C(3118836023), UINT32_C(2870430780), UINT32_C(3145694187), UINT32_C(3246948063) } },
|
||||
{ { UINT32_C(1896054822), UINT32_C(1584280851), UINT32_C( 542132853), UINT32_C(2431592024), UINT32_C( 189387983), UINT32_C( 196501536), UINT32_C(3133552091), UINT32_C(3648736947),
|
||||
UINT32_C(3796533199), UINT32_C( 692107700), UINT32_C(1531547651), UINT32_C(2263562422), UINT32_C( 747713548), UINT32_C(1882671252), UINT32_C( 824900989), UINT32_C( 453682764) },
|
||||
{ UINT32_C(1896054822), UINT32_C(1584280851), UINT32_C( 542132853), UINT32_C(2431592024), UINT32_C( 189387983), UINT32_C( 196501536), UINT32_C(3133552091), UINT32_C(3648736947),
|
||||
UINT32_C(3796533199), UINT32_C( 692107700), UINT32_C(1531547651), UINT32_C(2263562422), UINT32_C( 747713548), UINT32_C(1882671252), UINT32_C( 824900989), UINT32_C( 453682764) } },
|
||||
{ { UINT32_C(3657258277), UINT32_C( 285359630), UINT32_C(2238467022), UINT32_C(2416662660), UINT32_C( 566074508), UINT32_C(1653732580), UINT32_C(1049869298), UINT32_C(2254019937),
|
||||
UINT32_C( 6248178), UINT32_C(1662083476), UINT32_C( 837320365), UINT32_C(1656878038), UINT32_C(1954774671), UINT32_C(1708528755), UINT32_C( 832793040), UINT32_C(4189649926) },
|
||||
{ UINT32_C(3657258277), UINT32_C( 285359630), UINT32_C(2238467022), UINT32_C(2416662660), UINT32_C( 566074508), UINT32_C(1653732580), UINT32_C(1049869298), UINT32_C(2254019937),
|
||||
UINT32_C( 6248178), UINT32_C(1662083476), UINT32_C( 837320365), UINT32_C(1656878038), UINT32_C(1954774671), UINT32_C(1708528755), UINT32_C( 832793040), UINT32_C(4189649926) } },
|
||||
};
|
||||
|
||||
for (size_t i = 0 ; i < (sizeof(test_vec) / sizeof(test_vec[0])) ; i++) {
|
||||
simde__m512i r = simde_x_mm512_set_epu32(
|
||||
test_vec[i].a[15], test_vec[i].a[14], test_vec[i].a[13], test_vec[i].a[12],
|
||||
test_vec[i].a[11], test_vec[i].a[10], test_vec[i].a[ 9], test_vec[i].a[ 8],
|
||||
test_vec[i].a[ 7], test_vec[i].a[ 6], test_vec[i].a[ 5], test_vec[i].a[ 4],
|
||||
test_vec[i].a[ 3], test_vec[i].a[ 2], test_vec[i].a[ 1], test_vec[i].a[ 0]);
|
||||
simde_test_x86_assert_equal_u32x16(r, simde_mm512_loadu_si512(test_vec[i].r));
|
||||
}
|
||||
|
||||
return 0;
|
||||
#else
|
||||
fputc('\n', stdout);
|
||||
for (int i = 0 ; i < 8 ; i++) {
|
||||
simde__m512i a = simde_test_x86_random_u32x16();
|
||||
simde__m512i r = a;
|
||||
|
||||
simde_test_x86_write_u32x16(2, a, SIMDE_TEST_VEC_POS_FIRST);
|
||||
simde_test_x86_write_u32x16(2, r, SIMDE_TEST_VEC_POS_LAST);
|
||||
}
|
||||
return 1;
|
||||
#endif
|
||||
}
|
||||
|
||||
static int
|
||||
test_simde_x_mm512_set_epu64 (SIMDE_MUNIT_TEST_ARGS) {
|
||||
#if 1
|
||||
static const struct {
|
||||
const uint64_t a[8];
|
||||
const uint64_t r[8];
|
||||
} test_vec[] = {
|
||||
{ { UINT64_C( 9568876967930616576), UINT64_C( 1977685269037764613), UINT64_C(12099231501399065555), UINT64_C(11415431664820641660),
|
||||
UINT64_C(15423112186462623646), UINT64_C( 9806705514186837686), UINT64_C(14593810477667070957), UINT64_C( 5277464135911991297) },
|
||||
{ UINT64_C( 9568876967930616576), UINT64_C( 1977685269037764613), UINT64_C(12099231501399065555), UINT64_C(11415431664820641660),
|
||||
UINT64_C(15423112186462623646), UINT64_C( 9806705514186837686), UINT64_C(14593810477667070957), UINT64_C( 5277464135911991297) } },
|
||||
{ { UINT64_C(17604808701939439528), UINT64_C(11574824657151412326), UINT64_C(18254505445852994108), UINT64_C( 3739352784258743024),
|
||||
UINT64_C(17321685887824540208), UINT64_C(10996010580011864901), UINT64_C( 1225392656820148488), UINT64_C(11993526120196382130) },
|
||||
{ UINT64_C(17604808701939439528), UINT64_C(11574824657151412326), UINT64_C(18254505445852994108), UINT64_C( 3739352784258743024),
|
||||
UINT64_C(17321685887824540208), UINT64_C(10996010580011864901), UINT64_C( 1225392656820148488), UINT64_C(11993526120196382130) } },
|
||||
{ { UINT64_C( 7042915254054166082), UINT64_C( 9133003683600648393), UINT64_C( 810229402012147980), UINT64_C(13563922312914922016),
|
||||
UINT64_C(10472636907640148441), UINT64_C(12538994028906458895), UINT64_C( 2934685632269354325), UINT64_C(10969075163009516291) },
|
||||
{ UINT64_C( 7042915254054166082), UINT64_C( 9133003683600648393), UINT64_C( 810229402012147980), UINT64_C(13563922312914922016),
|
||||
UINT64_C(10472636907640148441), UINT64_C(12538994028906458895), UINT64_C( 2934685632269354325), UINT64_C(10969075163009516291) } },
|
||||
{ { UINT64_C( 1847851379545981772), UINT64_C( 2729923334964730770), UINT64_C(15661705130239311144), UINT64_C( 6838592967500240785),
|
||||
UINT64_C(16894715616612742227), UINT64_C(16169613402998445425), UINT64_C( 6372146828696107454), UINT64_C(12173950340448109953) },
|
||||
{ UINT64_C( 1847851379545981772), UINT64_C( 2729923334964730770), UINT64_C(15661705130239311144), UINT64_C( 6838592967500240785),
|
||||
UINT64_C(16894715616612742227), UINT64_C(16169613402998445425), UINT64_C( 6372146828696107454), UINT64_C(12173950340448109953) } },
|
||||
{ { UINT64_C(17025149731787334659), UINT64_C( 2533718324306338705), UINT64_C( 2660262488892258764), UINT64_C( 2731619138579960811),
|
||||
UINT64_C(18047266663832808717), UINT64_C( 49658568865194281), UINT64_C( 8821566023486695589), UINT64_C(15806125943958479890) },
|
||||
{ UINT64_C(17025149731787334659), UINT64_C( 2533718324306338705), UINT64_C( 2660262488892258764), UINT64_C( 2731619138579960811),
|
||||
UINT64_C(18047266663832808717), UINT64_C( 49658568865194281), UINT64_C( 8821566023486695589), UINT64_C(15806125943958479890) } },
|
||||
{ { UINT64_C(14552493382336502417), UINT64_C( 5236568866277439352), UINT64_C(15166432225493336175), UINT64_C( 7550955305296147489),
|
||||
UINT64_C( 8981398135744113979), UINT64_C( 8176799704330861453), UINT64_C( 3001623896520657429), UINT64_C( 5430745283826331165) },
|
||||
{ UINT64_C(14552493382336502417), UINT64_C( 5236568866277439352), UINT64_C(15166432225493336175), UINT64_C( 7550955305296147489),
|
||||
UINT64_C( 8981398135744113979), UINT64_C( 8176799704330861453), UINT64_C( 3001623896520657429), UINT64_C( 5430745283826331165) } },
|
||||
{ { UINT64_C(11785862045522902799), UINT64_C(11545344382506153926), UINT64_C(12648110592980527447), UINT64_C(10386991247824035787),
|
||||
UINT64_C(15959123307507436736), UINT64_C(17444094590476177129), UINT64_C( 8343719476181633928), UINT64_C( 3497454609902759543) },
|
||||
{ UINT64_C(11785862045522902799), UINT64_C(11545344382506153926), UINT64_C(12648110592980527447), UINT64_C(10386991247824035787),
|
||||
UINT64_C(15959123307507436736), UINT64_C(17444094590476177129), UINT64_C( 8343719476181633928), UINT64_C( 3497454609902759543) } },
|
||||
{ { UINT64_C( 5311573959664610753), UINT64_C(14077077308112264142), UINT64_C(18120981335683017822), UINT64_C(18353996134117328919),
|
||||
UINT64_C( 888207745324858795), UINT64_C( 4892547352263725544), UINT64_C( 9510692481256833917), UINT64_C( 1929722551698321804) },
|
||||
{ UINT64_C( 5311573959664610753), UINT64_C(14077077308112264142), UINT64_C(18120981335683017822), UINT64_C(18353996134117328919),
|
||||
UINT64_C( 888207745324858795), UINT64_C( 4892547352263725544), UINT64_C( 9510692481256833917), UINT64_C( 1929722551698321804) } },
|
||||
};
|
||||
|
||||
for (size_t i = 0 ; i < (sizeof(test_vec) / sizeof(test_vec[0])) ; i++) {
|
||||
simde__m512i r = simde_x_mm512_set_epu64(
|
||||
test_vec[i].a[ 7], test_vec[i].a[ 6], test_vec[i].a[ 5], test_vec[i].a[ 4],
|
||||
test_vec[i].a[ 3], test_vec[i].a[ 2], test_vec[i].a[ 1], test_vec[i].a[ 0]);
|
||||
simde_test_x86_assert_equal_u32x16(r, simde_mm512_loadu_si512(test_vec[i].r));
|
||||
}
|
||||
|
||||
return 0;
|
||||
#else
|
||||
fputc('\n', stdout);
|
||||
for (int i = 0 ; i < 8 ; i++) {
|
||||
simde__m512i a = simde_test_x86_random_u64x8();
|
||||
simde__m512i r = a;
|
||||
|
||||
simde_test_x86_write_u64x8(2, a, SIMDE_TEST_VEC_POS_FIRST);
|
||||
simde_test_x86_write_u64x8(2, r, SIMDE_TEST_VEC_POS_LAST);
|
||||
}
|
||||
return 1;
|
||||
#endif
|
||||
}
|
||||
|
||||
static int
|
||||
test_simde_x_mm512_set_m128i (SIMDE_MUNIT_TEST_ARGS) {
|
||||
#if 1
|
||||
static const struct {
|
||||
const int64_t a[2];
|
||||
const int64_t b[2];
|
||||
const int64_t c[2];
|
||||
const int64_t d[2];
|
||||
const int64_t r[8];
|
||||
} test_vec[] = {
|
||||
{ { -INT64_C( 4945782109098626019), -INT64_C( 8008920059667144479) },
|
||||
{ INT64_C( 124491825340358826), -INT64_C( 2233212823795404972) },
|
||||
{ -INT64_C( 6712500070265408579), INT64_C( 2791111895643054729) },
|
||||
{ INT64_C( 3661060217106896421), INT64_C( 7441641663673639585) },
|
||||
{ INT64_C( 3661060217106896421), INT64_C( 7441641663673639585), -INT64_C( 6712500070265408579), INT64_C( 2791111895643054729),
|
||||
INT64_C( 124491825340358826), -INT64_C( 2233212823795404972), -INT64_C( 4945782109098626019), -INT64_C( 8008920059667144479) } },
|
||||
{ { INT64_C( 4835561680396374457), INT64_C( 8277945198645823295) },
|
||||
{ INT64_C( 3301716370139371969), -INT64_C( 7727655949450422865) },
|
||||
{ -INT64_C( 2150704513163639254), -INT64_C( 9066169629291997584) },
|
||||
{ INT64_C( 3031191362149182807), -INT64_C( 6469343367862639927) },
|
||||
{ INT64_C( 3031191362149182807), -INT64_C( 6469343367862639927), -INT64_C( 2150704513163639254), -INT64_C( 9066169629291997584),
|
||||
INT64_C( 3301716370139371969), -INT64_C( 7727655949450422865), INT64_C( 4835561680396374457), INT64_C( 8277945198645823295) } },
|
||||
{ { -INT64_C( 2372919338038835572), -INT64_C( 8823455275125330104) },
|
||||
{ INT64_C( 7844558766122511927), INT64_C( 3691906778662986010) },
|
||||
{ -INT64_C( 4477294391523621233), INT64_C( 8851076585001547811) },
|
||||
{ -INT64_C( 3453124338471125754), -INT64_C( 196290940105251477) },
|
||||
{ -INT64_C( 3453124338471125754), -INT64_C( 196290940105251477), -INT64_C( 4477294391523621233), INT64_C( 8851076585001547811),
|
||||
INT64_C( 7844558766122511927), INT64_C( 3691906778662986010), -INT64_C( 2372919338038835572), -INT64_C( 8823455275125330104) } },
|
||||
{ { INT64_C( 4585464989178636392), -INT64_C( 3887339008387158704) },
|
||||
{ -INT64_C( 5897314988725159517), -INT64_C( 7415451457765208404) },
|
||||
{ INT64_C( 4254526067743265455), -INT64_C( 6694360051734373495) },
|
||||
{ -INT64_C( 4682296576377582828), INT64_C( 8898252826075580083) },
|
||||
{ -INT64_C( 4682296576377582828), INT64_C( 8898252826075580083), INT64_C( 4254526067743265455), -INT64_C( 6694360051734373495),
|
||||
-INT64_C( 5897314988725159517), -INT64_C( 7415451457765208404), INT64_C( 4585464989178636392), -INT64_C( 3887339008387158704) } },
|
||||
{ { -INT64_C( 7266186282525002237), -INT64_C( 1832681567916787731) },
|
||||
{ INT64_C( 7232011006770056588), INT64_C( 3121491696417257225) },
|
||||
{ -INT64_C( 2924732906769639237), -INT64_C( 2309688744207887815) },
|
||||
{ INT64_C( 9077527813400899811), -INT64_C( 4583076703419285230) },
|
||||
{ INT64_C( 9077527813400899811), -INT64_C( 4583076703419285230), -INT64_C( 2924732906769639237), -INT64_C( 2309688744207887815),
|
||||
INT64_C( 7232011006770056588), INT64_C( 3121491696417257225), -INT64_C( 7266186282525002237), -INT64_C( 1832681567916787731) } },
|
||||
{ { -INT64_C( 288239442164023491), -INT64_C( 181278566807845815) },
|
||||
{ -INT64_C( 1938365523136743384), INT64_C( 5589394919817964747) },
|
||||
{ INT64_C( 6899642270282489604), -INT64_C( 1707015169647065288) },
|
||||
{ INT64_C( 3902542161119600751), -INT64_C( 3429603489347057911) },
|
||||
{ INT64_C( 3902542161119600751), -INT64_C( 3429603489347057911), INT64_C( 6899642270282489604), -INT64_C( 1707015169647065288),
|
||||
-INT64_C( 1938365523136743384), INT64_C( 5589394919817964747), -INT64_C( 288239442164023491), -INT64_C( 181278566807845815) } },
|
||||
{ { -INT64_C( 8633868530542519112), INT64_C( 1136360251874486813) },
|
||||
{ -INT64_C( 1176711747414636279), INT64_C( 314811394258678465) },
|
||||
{ INT64_C( 7503842828377912395), INT64_C( 3520418695472348459) },
|
||||
{ INT64_C( 7577393952696053075), -INT64_C( 1418258260653821694) },
|
||||
{ INT64_C( 7577393952696053075), -INT64_C( 1418258260653821694), INT64_C( 7503842828377912395), INT64_C( 3520418695472348459),
|
||||
-INT64_C( 1176711747414636279), INT64_C( 314811394258678465), -INT64_C( 8633868530542519112), INT64_C( 1136360251874486813) } },
|
||||
{ { INT64_C( 5908066468385727562), -INT64_C( 6773421201959337048) },
|
||||
{ -INT64_C( 777148065015749850), -INT64_C( 3620730806483145164) },
|
||||
{ -INT64_C( 7264199598424307528), INT64_C( 7895207375159315875) },
|
||||
{ -INT64_C( 6632269055162356723), -INT64_C( 8867243746191263840) },
|
||||
{ -INT64_C( 6632269055162356723), -INT64_C( 8867243746191263840), -INT64_C( 7264199598424307528), INT64_C( 7895207375159315875),
|
||||
-INT64_C( 777148065015749850), -INT64_C( 3620730806483145164), INT64_C( 5908066468385727562), -INT64_C( 6773421201959337048) } },
|
||||
};
|
||||
|
||||
for (size_t i = 0 ; i < (sizeof(test_vec) / sizeof(test_vec[0])) ; i++) {
|
||||
simde__m128i a = simde_mm_loadu_epi64(test_vec[i].a);
|
||||
simde__m128i b = simde_mm_loadu_epi64(test_vec[i].b);
|
||||
simde__m128i c = simde_mm_loadu_epi64(test_vec[i].c);
|
||||
simde__m128i d = simde_mm_loadu_epi64(test_vec[i].d);
|
||||
simde__m512i r = simde_x_mm512_set_m128i(a, b, c, d);
|
||||
simde_test_x86_assert_equal_i64x8(r, simde_mm512_loadu_si512(test_vec[i].r));
|
||||
}
|
||||
|
||||
return 0;
|
||||
#else
|
||||
fputc('\n', stdout);
|
||||
for (int i = 0 ; i < 8 ; i++) {
|
||||
simde__m128i a = simde_test_x86_random_i64x2();
|
||||
simde__m128i b = simde_test_x86_random_i64x2();
|
||||
simde__m128i c = simde_test_x86_random_i64x2();
|
||||
simde__m128i d = simde_test_x86_random_i64x2();
|
||||
simde__m512i r = simde_x_mm512_set_m128i(a, b, c, d);
|
||||
|
||||
simde_test_x86_write_i64x2(2, a, SIMDE_TEST_VEC_POS_FIRST);
|
||||
simde_test_x86_write_i64x2(2, b, SIMDE_TEST_VEC_POS_MIDDLE);
|
||||
simde_test_x86_write_i64x2(2, c, SIMDE_TEST_VEC_POS_MIDDLE);
|
||||
simde_test_x86_write_i64x2(2, d, SIMDE_TEST_VEC_POS_MIDDLE);
|
||||
simde_test_x86_write_i64x8(2, r, SIMDE_TEST_VEC_POS_LAST);
|
||||
}
|
||||
return 1;
|
||||
#endif
|
||||
}
|
||||
|
||||
static int
|
||||
test_simde_x_mm512_set_m256 (SIMDE_MUNIT_TEST_ARGS) {
|
||||
#if 1
|
||||
static const struct {
|
||||
const simde_float32 a[8];
|
||||
const simde_float32 b[8];
|
||||
const simde_float32 r[16];
|
||||
} test_vec[] = {
|
||||
{ { SIMDE_FLOAT32_C( -637.31), SIMDE_FLOAT32_C( 760.63), SIMDE_FLOAT32_C( -460.69), SIMDE_FLOAT32_C( -66.62),
|
||||
SIMDE_FLOAT32_C( -340.31), SIMDE_FLOAT32_C( 918.64), SIMDE_FLOAT32_C( 34.24), SIMDE_FLOAT32_C( 333.18) },
|
||||
{ SIMDE_FLOAT32_C( -803.92), SIMDE_FLOAT32_C( -213.48), SIMDE_FLOAT32_C( -929.53), SIMDE_FLOAT32_C( 348.90),
|
||||
SIMDE_FLOAT32_C( 283.65), SIMDE_FLOAT32_C( -184.83), SIMDE_FLOAT32_C( 487.65), SIMDE_FLOAT32_C( -858.64) },
|
||||
{ SIMDE_FLOAT32_C( -803.92), SIMDE_FLOAT32_C( -213.48), SIMDE_FLOAT32_C( -929.53), SIMDE_FLOAT32_C( 348.90),
|
||||
SIMDE_FLOAT32_C( 283.65), SIMDE_FLOAT32_C( -184.83), SIMDE_FLOAT32_C( 487.65), SIMDE_FLOAT32_C( -858.64),
|
||||
SIMDE_FLOAT32_C( -637.31), SIMDE_FLOAT32_C( 760.63), SIMDE_FLOAT32_C( -460.69), SIMDE_FLOAT32_C( -66.62),
|
||||
SIMDE_FLOAT32_C( -340.31), SIMDE_FLOAT32_C( 918.64), SIMDE_FLOAT32_C( 34.24), SIMDE_FLOAT32_C( 333.18) } },
|
||||
{ { SIMDE_FLOAT32_C( -921.22), SIMDE_FLOAT32_C( -836.03), SIMDE_FLOAT32_C( 170.20), SIMDE_FLOAT32_C( -248.66),
|
||||
SIMDE_FLOAT32_C( -471.75), SIMDE_FLOAT32_C( -816.60), SIMDE_FLOAT32_C( -262.88), SIMDE_FLOAT32_C( 275.76) },
|
||||
{ SIMDE_FLOAT32_C( -882.42), SIMDE_FLOAT32_C( 473.83), SIMDE_FLOAT32_C( -459.78), SIMDE_FLOAT32_C( 549.62),
|
||||
SIMDE_FLOAT32_C( -780.98), SIMDE_FLOAT32_C( -139.94), SIMDE_FLOAT32_C( -217.48), SIMDE_FLOAT32_C( -418.29) },
|
||||
{ SIMDE_FLOAT32_C( -882.42), SIMDE_FLOAT32_C( 473.83), SIMDE_FLOAT32_C( -459.78), SIMDE_FLOAT32_C( 549.62),
|
||||
SIMDE_FLOAT32_C( -780.98), SIMDE_FLOAT32_C( -139.94), SIMDE_FLOAT32_C( -217.48), SIMDE_FLOAT32_C( -418.29),
|
||||
SIMDE_FLOAT32_C( -921.22), SIMDE_FLOAT32_C( -836.03), SIMDE_FLOAT32_C( 170.20), SIMDE_FLOAT32_C( -248.66),
|
||||
SIMDE_FLOAT32_C( -471.75), SIMDE_FLOAT32_C( -816.60), SIMDE_FLOAT32_C( -262.88), SIMDE_FLOAT32_C( 275.76) } },
|
||||
{ { SIMDE_FLOAT32_C( -379.31), SIMDE_FLOAT32_C( 321.82), SIMDE_FLOAT32_C( 515.09), SIMDE_FLOAT32_C( 280.38),
|
||||
SIMDE_FLOAT32_C( 240.46), SIMDE_FLOAT32_C( -450.67), SIMDE_FLOAT32_C( -386.44), SIMDE_FLOAT32_C( 436.54) },
|
||||
{ SIMDE_FLOAT32_C( 335.85), SIMDE_FLOAT32_C( -315.97), SIMDE_FLOAT32_C( -214.56), SIMDE_FLOAT32_C( -380.50),
|
||||
SIMDE_FLOAT32_C( 499.20), SIMDE_FLOAT32_C( -726.90), SIMDE_FLOAT32_C( -239.14), SIMDE_FLOAT32_C( 577.98) },
|
||||
{ SIMDE_FLOAT32_C( 335.85), SIMDE_FLOAT32_C( -315.97), SIMDE_FLOAT32_C( -214.56), SIMDE_FLOAT32_C( -380.50),
|
||||
SIMDE_FLOAT32_C( 499.20), SIMDE_FLOAT32_C( -726.90), SIMDE_FLOAT32_C( -239.14), SIMDE_FLOAT32_C( 577.98),
|
||||
SIMDE_FLOAT32_C( -379.31), SIMDE_FLOAT32_C( 321.82), SIMDE_FLOAT32_C( 515.09), SIMDE_FLOAT32_C( 280.38),
|
||||
SIMDE_FLOAT32_C( 240.46), SIMDE_FLOAT32_C( -450.67), SIMDE_FLOAT32_C( -386.44), SIMDE_FLOAT32_C( 436.54) } },
|
||||
{ { SIMDE_FLOAT32_C( -562.93), SIMDE_FLOAT32_C( 931.06), SIMDE_FLOAT32_C( -670.68), SIMDE_FLOAT32_C( -34.68),
|
||||
SIMDE_FLOAT32_C( -885.55), SIMDE_FLOAT32_C( 66.44), SIMDE_FLOAT32_C( -758.92), SIMDE_FLOAT32_C( -767.96) },
|
||||
{ SIMDE_FLOAT32_C( -459.73), SIMDE_FLOAT32_C( -218.69), SIMDE_FLOAT32_C( 781.65), SIMDE_FLOAT32_C( -240.71),
|
||||
SIMDE_FLOAT32_C( 641.36), SIMDE_FLOAT32_C( -435.83), SIMDE_FLOAT32_C( 341.00), SIMDE_FLOAT32_C( -737.95) },
|
||||
{ SIMDE_FLOAT32_C( -459.73), SIMDE_FLOAT32_C( -218.69), SIMDE_FLOAT32_C( 781.65), SIMDE_FLOAT32_C( -240.71),
|
||||
SIMDE_FLOAT32_C( 641.36), SIMDE_FLOAT32_C( -435.83), SIMDE_FLOAT32_C( 341.00), SIMDE_FLOAT32_C( -737.95),
|
||||
SIMDE_FLOAT32_C( -562.93), SIMDE_FLOAT32_C( 931.06), SIMDE_FLOAT32_C( -670.68), SIMDE_FLOAT32_C( -34.68),
|
||||
SIMDE_FLOAT32_C( -885.55), SIMDE_FLOAT32_C( 66.44), SIMDE_FLOAT32_C( -758.92), SIMDE_FLOAT32_C( -767.96) } },
|
||||
{ { SIMDE_FLOAT32_C( 886.00), SIMDE_FLOAT32_C( -143.91), SIMDE_FLOAT32_C( 542.43), SIMDE_FLOAT32_C( 126.46),
|
||||
SIMDE_FLOAT32_C( 405.42), SIMDE_FLOAT32_C( -844.01), SIMDE_FLOAT32_C( -437.00), SIMDE_FLOAT32_C( -258.74) },
|
||||
{ SIMDE_FLOAT32_C( -159.98), SIMDE_FLOAT32_C( 348.44), SIMDE_FLOAT32_C( 360.76), SIMDE_FLOAT32_C( -660.78),
|
||||
SIMDE_FLOAT32_C( 621.54), SIMDE_FLOAT32_C( -878.38), SIMDE_FLOAT32_C( 917.20), SIMDE_FLOAT32_C( -941.40) },
|
||||
{ SIMDE_FLOAT32_C( -159.98), SIMDE_FLOAT32_C( 348.44), SIMDE_FLOAT32_C( 360.76), SIMDE_FLOAT32_C( -660.78),
|
||||
SIMDE_FLOAT32_C( 621.54), SIMDE_FLOAT32_C( -878.38), SIMDE_FLOAT32_C( 917.20), SIMDE_FLOAT32_C( -941.40),
|
||||
SIMDE_FLOAT32_C( 886.00), SIMDE_FLOAT32_C( -143.91), SIMDE_FLOAT32_C( 542.43), SIMDE_FLOAT32_C( 126.46),
|
||||
SIMDE_FLOAT32_C( 405.42), SIMDE_FLOAT32_C( -844.01), SIMDE_FLOAT32_C( -437.00), SIMDE_FLOAT32_C( -258.74) } },
|
||||
{ { SIMDE_FLOAT32_C( -947.32), SIMDE_FLOAT32_C( -753.48), SIMDE_FLOAT32_C( 23.92), SIMDE_FLOAT32_C( -832.87),
|
||||
SIMDE_FLOAT32_C( 312.97), SIMDE_FLOAT32_C( 265.00), SIMDE_FLOAT32_C( -600.84), SIMDE_FLOAT32_C( 853.24) },
|
||||
{ SIMDE_FLOAT32_C( -953.69), SIMDE_FLOAT32_C( -819.18), SIMDE_FLOAT32_C( -387.47), SIMDE_FLOAT32_C( 687.68),
|
||||
SIMDE_FLOAT32_C( -255.01), SIMDE_FLOAT32_C( 953.53), SIMDE_FLOAT32_C( 949.73), SIMDE_FLOAT32_C( -369.02) },
|
||||
{ SIMDE_FLOAT32_C( -953.69), SIMDE_FLOAT32_C( -819.18), SIMDE_FLOAT32_C( -387.47), SIMDE_FLOAT32_C( 687.68),
|
||||
SIMDE_FLOAT32_C( -255.01), SIMDE_FLOAT32_C( 953.53), SIMDE_FLOAT32_C( 949.73), SIMDE_FLOAT32_C( -369.02),
|
||||
SIMDE_FLOAT32_C( -947.32), SIMDE_FLOAT32_C( -753.48), SIMDE_FLOAT32_C( 23.92), SIMDE_FLOAT32_C( -832.87),
|
||||
SIMDE_FLOAT32_C( 312.97), SIMDE_FLOAT32_C( 265.00), SIMDE_FLOAT32_C( -600.84), SIMDE_FLOAT32_C( 853.24) } },
|
||||
{ { SIMDE_FLOAT32_C( -190.38), SIMDE_FLOAT32_C( 492.16), SIMDE_FLOAT32_C( 757.44), SIMDE_FLOAT32_C( -784.97),
|
||||
SIMDE_FLOAT32_C( 648.15), SIMDE_FLOAT32_C( -679.57), SIMDE_FLOAT32_C( -43.70), SIMDE_FLOAT32_C( -511.83) },
|
||||
{ SIMDE_FLOAT32_C( 668.88), SIMDE_FLOAT32_C( -682.94), SIMDE_FLOAT32_C( -172.61), SIMDE_FLOAT32_C( 290.41),
|
||||
SIMDE_FLOAT32_C( -561.32), SIMDE_FLOAT32_C( -255.40), SIMDE_FLOAT32_C( 349.01), SIMDE_FLOAT32_C( -508.64) },
|
||||
{ SIMDE_FLOAT32_C( 668.88), SIMDE_FLOAT32_C( -682.94), SIMDE_FLOAT32_C( -172.61), SIMDE_FLOAT32_C( 290.41),
|
||||
SIMDE_FLOAT32_C( -561.32), SIMDE_FLOAT32_C( -255.40), SIMDE_FLOAT32_C( 349.01), SIMDE_FLOAT32_C( -508.64),
|
||||
SIMDE_FLOAT32_C( -190.38), SIMDE_FLOAT32_C( 492.16), SIMDE_FLOAT32_C( 757.44), SIMDE_FLOAT32_C( -784.97),
|
||||
SIMDE_FLOAT32_C( 648.15), SIMDE_FLOAT32_C( -679.57), SIMDE_FLOAT32_C( -43.70), SIMDE_FLOAT32_C( -511.83) } },
|
||||
{ { SIMDE_FLOAT32_C( -8.88), SIMDE_FLOAT32_C( -627.06), SIMDE_FLOAT32_C( -341.51), SIMDE_FLOAT32_C( -695.91),
|
||||
SIMDE_FLOAT32_C( 637.94), SIMDE_FLOAT32_C( 57.65), SIMDE_FLOAT32_C( -842.68), SIMDE_FLOAT32_C( 684.25) },
|
||||
{ SIMDE_FLOAT32_C( 238.47), SIMDE_FLOAT32_C( -230.15), SIMDE_FLOAT32_C( 371.93), SIMDE_FLOAT32_C( 983.45),
|
||||
SIMDE_FLOAT32_C( -276.62), SIMDE_FLOAT32_C( 321.66), SIMDE_FLOAT32_C( -385.57), SIMDE_FLOAT32_C( 533.00) },
|
||||
{ SIMDE_FLOAT32_C( 238.47), SIMDE_FLOAT32_C( -230.15), SIMDE_FLOAT32_C( 371.93), SIMDE_FLOAT32_C( 983.45),
|
||||
SIMDE_FLOAT32_C( -276.62), SIMDE_FLOAT32_C( 321.66), SIMDE_FLOAT32_C( -385.57), SIMDE_FLOAT32_C( 533.00),
|
||||
SIMDE_FLOAT32_C( -8.88), SIMDE_FLOAT32_C( -627.06), SIMDE_FLOAT32_C( -341.51), SIMDE_FLOAT32_C( -695.91),
|
||||
SIMDE_FLOAT32_C( 637.94), SIMDE_FLOAT32_C( 57.65), SIMDE_FLOAT32_C( -842.68), SIMDE_FLOAT32_C( 684.25) } },
|
||||
};
|
||||
|
||||
for (size_t i = 0 ; i < (sizeof(test_vec) / sizeof(test_vec[0])) ; i++) {
|
||||
simde__m256 a = simde_mm256_loadu_ps(test_vec[i].a);
|
||||
simde__m256 b = simde_mm256_loadu_ps(test_vec[i].b);
|
||||
simde__m512 r = simde_x_mm512_set_m256(a, b);
|
||||
simde_test_x86_assert_equal_f32x16(r, simde_mm512_loadu_ps(test_vec[i].r), 1);
|
||||
}
|
||||
|
||||
return 0;
|
||||
#else
|
||||
fputc('\n', stdout);
|
||||
for (int i = 0 ; i < 8 ; i++) {
|
||||
simde__m256 a = simde_test_x86_random_f32x8(SIMDE_FLOAT32_C(-1000.0), SIMDE_FLOAT32_C(1000.0));
|
||||
simde__m256 b = simde_test_x86_random_f32x8(SIMDE_FLOAT32_C(-1000.0), SIMDE_FLOAT32_C(1000.0));
|
||||
simde__m512 r = simde_x_mm512_set_m256(a, b);
|
||||
|
||||
simde_test_x86_write_f32x8(2, a, SIMDE_TEST_VEC_POS_FIRST);
|
||||
simde_test_x86_write_f32x8(2, b, SIMDE_TEST_VEC_POS_MIDDLE);
|
||||
simde_test_x86_write_f32x16(2, r, SIMDE_TEST_VEC_POS_LAST);
|
||||
}
|
||||
return 1;
|
||||
#endif
|
||||
}
|
||||
|
||||
static int
|
||||
test_simde_x_mm512_set_m256i (SIMDE_MUNIT_TEST_ARGS) {
|
||||
#if 1
|
||||
static const struct {
|
||||
const int64_t a[4];
|
||||
const int64_t b[4];
|
||||
const int64_t r[8];
|
||||
} test_vec[] = {
|
||||
{ { INT64_C( 9185948727503546778), INT64_C( 3678627756266746177), INT64_C( 3412567430290792151), -INT64_C( 6689949871361817491) },
|
||||
{ INT64_C( 4729318369997616495), -INT64_C( 4574934939719185189), INT64_C( 6601267626571075438), -INT64_C( 2225916818331210642) },
|
||||
{ INT64_C( 4729318369997616495), -INT64_C( 4574934939719185189), INT64_C( 6601267626571075438), -INT64_C( 2225916818331210642),
|
||||
INT64_C( 9185948727503546778), INT64_C( 3678627756266746177), INT64_C( 3412567430290792151), -INT64_C( 6689949871361817491) } },
|
||||
{ { INT64_C( 5776890669553584873), -INT64_C( 6045763373581226384), -INT64_C( 37516912470906831), INT64_C( 2663195537103603362) },
|
||||
{ INT64_C( 855747269500008476), -INT64_C( 3183624226697084697), INT64_C( 4915516962277354406), INT64_C( 6634451241853890227) },
|
||||
{ INT64_C( 855747269500008476), -INT64_C( 3183624226697084697), INT64_C( 4915516962277354406), INT64_C( 6634451241853890227),
|
||||
INT64_C( 5776890669553584873), -INT64_C( 6045763373581226384), -INT64_C( 37516912470906831), INT64_C( 2663195537103603362) } },
|
||||
{ { INT64_C( 4678621373850722374), INT64_C( 8557463612466483789), -INT64_C( 3239807627526556638), -INT64_C( 635336641497439598) },
|
||||
{ INT64_C( 3859240631760657396), INT64_C( 5575146464983970840), -INT64_C( 8967199087320232806), INT64_C( 1739660642691141501) },
|
||||
{ INT64_C( 3859240631760657396), INT64_C( 5575146464983970840), -INT64_C( 8967199087320232806), INT64_C( 1739660642691141501),
|
||||
INT64_C( 4678621373850722374), INT64_C( 8557463612466483789), -INT64_C( 3239807627526556638), -INT64_C( 635336641497439598) } },
|
||||
{ { -INT64_C( 2540886964821361249), INT64_C( 6944871434024247528), INT64_C( 838699283998470959), INT64_C( 1960013050450344184) },
|
||||
{ INT64_C( 8573550280122210650), INT64_C( 1397501144658001982), INT64_C( 2303545201378164574), -INT64_C( 1772607854487064626) },
|
||||
{ INT64_C( 8573550280122210650), INT64_C( 1397501144658001982), INT64_C( 2303545201378164574), -INT64_C( 1772607854487064626),
|
||||
-INT64_C( 2540886964821361249), INT64_C( 6944871434024247528), INT64_C( 838699283998470959), INT64_C( 1960013050450344184) } },
|
||||
{ { -INT64_C( 6481805318794442488), -INT64_C( 2326373633025730880), -INT64_C( 8154397417344865650), -INT64_C( 8762526587941220110) },
|
||||
{ INT64_C( 3194786528158837577), -INT64_C( 7052488512568819265), -INT64_C( 6863722578472342415), INT64_C( 2467274241483970872) },
|
||||
{ INT64_C( 3194786528158837577), -INT64_C( 7052488512568819265), -INT64_C( 6863722578472342415), INT64_C( 2467274241483970872),
|
||||
-INT64_C( 6481805318794442488), -INT64_C( 2326373633025730880), -INT64_C( 8154397417344865650), -INT64_C( 8762526587941220110) } },
|
||||
{ { INT64_C( 4793845972517149423), INT64_C( 5753529798337189674), -INT64_C( 8295842357534774384), INT64_C( 8274099338729488088) },
|
||||
{ -INT64_C( 459273912366291237), INT64_C( 6401879826230355115), INT64_C( 8077053750437894198), -INT64_C( 5302718236152735117) },
|
||||
{ -INT64_C( 459273912366291237), INT64_C( 6401879826230355115), INT64_C( 8077053750437894198), -INT64_C( 5302718236152735117),
|
||||
INT64_C( 4793845972517149423), INT64_C( 5753529798337189674), -INT64_C( 8295842357534774384), INT64_C( 8274099338729488088) } },
|
||||
{ { INT64_C( 3775060514461463963), -INT64_C( 2884109564918262055), INT64_C( 8715724243471601645), -INT64_C( 6456519145089526061) },
|
||||
{ INT64_C( 632882395830319627), INT64_C( 540891665677255945), INT64_C( 3508163768285455153), -INT64_C( 51997053213008490) },
|
||||
{ INT64_C( 632882395830319627), INT64_C( 540891665677255945), INT64_C( 3508163768285455153), -INT64_C( 51997053213008490),
|
||||
INT64_C( 3775060514461463963), -INT64_C( 2884109564918262055), INT64_C( 8715724243471601645), -INT64_C( 6456519145089526061) } },
|
||||
{ { -INT64_C( 3173528335773575234), INT64_C( 8215972274809708258), -INT64_C( 6381786419661598494), INT64_C( 5866097473156042357) },
|
||||
{ INT64_C( 4288891779987471591), -INT64_C( 1980111581061119022), -INT64_C( 395311238656873013), INT64_C( 4883251489614842848) },
|
||||
{ INT64_C( 4288891779987471591), -INT64_C( 1980111581061119022), -INT64_C( 395311238656873013), INT64_C( 4883251489614842848),
|
||||
-INT64_C( 3173528335773575234), INT64_C( 8215972274809708258), -INT64_C( 6381786419661598494), INT64_C( 5866097473156042357) } },
|
||||
};
|
||||
|
||||
for (size_t i = 0 ; i < (sizeof(test_vec) / sizeof(test_vec[0])) ; i++) {
|
||||
simde__m256i a = simde_mm256_loadu_epi64(test_vec[i].a);
|
||||
simde__m256i b = simde_mm256_loadu_epi64(test_vec[i].b);
|
||||
simde__m512i r = simde_x_mm512_set_m256i(a, b);
|
||||
simde_test_x86_assert_equal_i64x8(r, simde_mm512_loadu_si512(test_vec[i].r));
|
||||
}
|
||||
|
||||
return 0;
|
||||
#else
|
||||
fputc('\n', stdout);
|
||||
for (int i = 0 ; i < 8 ; i++) {
|
||||
simde__m256i a = simde_test_x86_random_i64x4();
|
||||
simde__m256i b = simde_test_x86_random_i64x4();
|
||||
simde__m512i r = simde_x_mm512_set_m256i(a, b);
|
||||
|
||||
simde_test_x86_write_i64x4(2, a, SIMDE_TEST_VEC_POS_FIRST);
|
||||
simde_test_x86_write_i64x4(2, b, SIMDE_TEST_VEC_POS_MIDDLE);
|
||||
simde_test_x86_write_i64x8(2, r, SIMDE_TEST_VEC_POS_LAST);
|
||||
}
|
||||
return 1;
|
||||
#endif
|
||||
}
|
||||
|
||||
static int
|
||||
test_simde_x_mm512_set_m256d (SIMDE_MUNIT_TEST_ARGS) {
|
||||
#if 1
|
||||
static const struct {
|
||||
const simde_float64 a[4];
|
||||
const simde_float64 b[4];
|
||||
const simde_float64 r[8];
|
||||
} test_vec[] = {
|
||||
{ { SIMDE_FLOAT64_C( -516.49), SIMDE_FLOAT64_C( -372.13), SIMDE_FLOAT64_C( -232.67), SIMDE_FLOAT64_C( 646.34) },
|
||||
{ SIMDE_FLOAT64_C( 990.61), SIMDE_FLOAT64_C( -207.39), SIMDE_FLOAT64_C( 792.40), SIMDE_FLOAT64_C( -563.99) },
|
||||
{ SIMDE_FLOAT64_C( 990.61), SIMDE_FLOAT64_C( -207.39), SIMDE_FLOAT64_C( 792.40), SIMDE_FLOAT64_C( -563.99),
|
||||
SIMDE_FLOAT64_C( -516.49), SIMDE_FLOAT64_C( -372.13), SIMDE_FLOAT64_C( -232.67), SIMDE_FLOAT64_C( 646.34) } },
|
||||
{ { SIMDE_FLOAT64_C( 225.52), SIMDE_FLOAT64_C( 712.33), SIMDE_FLOAT64_C( 556.42), SIMDE_FLOAT64_C( 960.52) },
|
||||
{ SIMDE_FLOAT64_C( 332.11), SIMDE_FLOAT64_C( 54.37), SIMDE_FLOAT64_C( -217.87), SIMDE_FLOAT64_C( -680.84) },
|
||||
{ SIMDE_FLOAT64_C( 332.11), SIMDE_FLOAT64_C( 54.37), SIMDE_FLOAT64_C( -217.87), SIMDE_FLOAT64_C( -680.84),
|
||||
SIMDE_FLOAT64_C( 225.52), SIMDE_FLOAT64_C( 712.33), SIMDE_FLOAT64_C( 556.42), SIMDE_FLOAT64_C( 960.52) } },
|
||||
{ { SIMDE_FLOAT64_C( 996.26), SIMDE_FLOAT64_C( -253.95), SIMDE_FLOAT64_C( 521.15), SIMDE_FLOAT64_C( 662.65) },
|
||||
{ SIMDE_FLOAT64_C( -436.82), SIMDE_FLOAT64_C( -449.85), SIMDE_FLOAT64_C( 416.62), SIMDE_FLOAT64_C( -75.47) },
|
||||
{ SIMDE_FLOAT64_C( -436.82), SIMDE_FLOAT64_C( -449.85), SIMDE_FLOAT64_C( 416.62), SIMDE_FLOAT64_C( -75.47),
|
||||
SIMDE_FLOAT64_C( 996.26), SIMDE_FLOAT64_C( -253.95), SIMDE_FLOAT64_C( 521.15), SIMDE_FLOAT64_C( 662.65) } },
|
||||
{ { SIMDE_FLOAT64_C( 47.94), SIMDE_FLOAT64_C( -71.31), SIMDE_FLOAT64_C( 520.40), SIMDE_FLOAT64_C( 630.12) },
|
||||
{ SIMDE_FLOAT64_C( -407.55), SIMDE_FLOAT64_C( -233.01), SIMDE_FLOAT64_C( 482.29), SIMDE_FLOAT64_C( 75.96) },
|
||||
{ SIMDE_FLOAT64_C( -407.55), SIMDE_FLOAT64_C( -233.01), SIMDE_FLOAT64_C( 482.29), SIMDE_FLOAT64_C( 75.96),
|
||||
SIMDE_FLOAT64_C( 47.94), SIMDE_FLOAT64_C( -71.31), SIMDE_FLOAT64_C( 520.40), SIMDE_FLOAT64_C( 630.12) } },
|
||||
{ { SIMDE_FLOAT64_C( 394.86), SIMDE_FLOAT64_C( -750.38), SIMDE_FLOAT64_C( -277.69), SIMDE_FLOAT64_C( 385.47) },
|
||||
{ SIMDE_FLOAT64_C( 42.23), SIMDE_FLOAT64_C( -485.30), SIMDE_FLOAT64_C( 821.48), SIMDE_FLOAT64_C( -732.26) },
|
||||
{ SIMDE_FLOAT64_C( 42.23), SIMDE_FLOAT64_C( -485.30), SIMDE_FLOAT64_C( 821.48), SIMDE_FLOAT64_C( -732.26),
|
||||
SIMDE_FLOAT64_C( 394.86), SIMDE_FLOAT64_C( -750.38), SIMDE_FLOAT64_C( -277.69), SIMDE_FLOAT64_C( 385.47) } },
|
||||
{ { SIMDE_FLOAT64_C( -772.97), SIMDE_FLOAT64_C( 377.90), SIMDE_FLOAT64_C( -771.74), SIMDE_FLOAT64_C( 559.14) },
|
||||
{ SIMDE_FLOAT64_C( -567.73), SIMDE_FLOAT64_C( 10.40), SIMDE_FLOAT64_C( 878.30), SIMDE_FLOAT64_C( -571.47) },
|
||||
{ SIMDE_FLOAT64_C( -567.73), SIMDE_FLOAT64_C( 10.40), SIMDE_FLOAT64_C( 878.30), SIMDE_FLOAT64_C( -571.47),
|
||||
SIMDE_FLOAT64_C( -772.97), SIMDE_FLOAT64_C( 377.90), SIMDE_FLOAT64_C( -771.74), SIMDE_FLOAT64_C( 559.14) } },
|
||||
{ { SIMDE_FLOAT64_C( 756.44), SIMDE_FLOAT64_C( 399.44), SIMDE_FLOAT64_C( -908.83), SIMDE_FLOAT64_C( -680.38) },
|
||||
{ SIMDE_FLOAT64_C( 949.59), SIMDE_FLOAT64_C( 507.80), SIMDE_FLOAT64_C( 244.15), SIMDE_FLOAT64_C( -2.47) },
|
||||
{ SIMDE_FLOAT64_C( 949.59), SIMDE_FLOAT64_C( 507.80), SIMDE_FLOAT64_C( 244.15), SIMDE_FLOAT64_C( -2.47),
|
||||
SIMDE_FLOAT64_C( 756.44), SIMDE_FLOAT64_C( 399.44), SIMDE_FLOAT64_C( -908.83), SIMDE_FLOAT64_C( -680.38) } },
|
||||
{ { SIMDE_FLOAT64_C( -563.51), SIMDE_FLOAT64_C( -235.45), SIMDE_FLOAT64_C( -372.34), SIMDE_FLOAT64_C( 28.93) },
|
||||
{ SIMDE_FLOAT64_C( 531.55), SIMDE_FLOAT64_C( -890.05), SIMDE_FLOAT64_C( -895.11), SIMDE_FLOAT64_C( -73.60) },
|
||||
{ SIMDE_FLOAT64_C( 531.55), SIMDE_FLOAT64_C( -890.05), SIMDE_FLOAT64_C( -895.11), SIMDE_FLOAT64_C( -73.60),
|
||||
SIMDE_FLOAT64_C( -563.51), SIMDE_FLOAT64_C( -235.45), SIMDE_FLOAT64_C( -372.34), SIMDE_FLOAT64_C( 28.93) } },
|
||||
};
|
||||
|
||||
for (size_t i = 0 ; i < (sizeof(test_vec) / sizeof(test_vec[0])) ; i++) {
|
||||
simde__m256d a = simde_mm256_loadu_pd(test_vec[i].a);
|
||||
simde__m256d b = simde_mm256_loadu_pd(test_vec[i].b);
|
||||
simde__m512d r = simde_x_mm512_set_m256d(a, b);
|
||||
simde_test_x86_assert_equal_f64x8(r, simde_mm512_loadu_pd(test_vec[i].r), 1);
|
||||
}
|
||||
|
||||
return 0;
|
||||
#else
|
||||
fputc('\n', stdout);
|
||||
for (int i = 0 ; i < 8 ; i++) {
|
||||
simde__m256d a = simde_test_x86_random_f64x4(SIMDE_FLOAT64_C(-1000.0), SIMDE_FLOAT64_C(1000.0));
|
||||
simde__m256d b = simde_test_x86_random_f64x4(SIMDE_FLOAT64_C(-1000.0), SIMDE_FLOAT64_C(1000.0));
|
||||
simde__m512d r = simde_x_mm512_set_m256d(a, b);
|
||||
|
||||
simde_test_x86_write_f64x4(2, a, SIMDE_TEST_VEC_POS_FIRST);
|
||||
simde_test_x86_write_f64x4(2, b, SIMDE_TEST_VEC_POS_MIDDLE);
|
||||
simde_test_x86_write_f64x8(2, r, SIMDE_TEST_VEC_POS_LAST);
|
||||
}
|
||||
return 1;
|
||||
#endif
|
||||
}
|
||||
|
||||
SIMDE_TEST_FUNC_LIST_BEGIN
|
||||
SIMDE_TEST_FUNC_LIST_ENTRY(mm512_set_epi8)
|
||||
SIMDE_TEST_FUNC_LIST_ENTRY(mm512_set_epi16)
|
||||
|
|
@ -560,6 +1440,17 @@ SIMDE_TEST_FUNC_LIST_BEGIN
|
|||
SIMDE_TEST_FUNC_LIST_ENTRY(mm512_set_epi64)
|
||||
SIMDE_TEST_FUNC_LIST_ENTRY(mm512_set_ps)
|
||||
SIMDE_TEST_FUNC_LIST_ENTRY(mm512_set_pd)
|
||||
#if defined(SIMDE_FLOAT16_IS_SCALAR)
|
||||
SIMDE_TEST_FUNC_LIST_ENTRY(mm512_set_ph)
|
||||
#endif
|
||||
SIMDE_TEST_FUNC_LIST_ENTRY(x_mm512_set_epu8)
|
||||
SIMDE_TEST_FUNC_LIST_ENTRY(x_mm512_set_epu16)
|
||||
SIMDE_TEST_FUNC_LIST_ENTRY(x_mm512_set_epu32)
|
||||
SIMDE_TEST_FUNC_LIST_ENTRY(x_mm512_set_epu64)
|
||||
SIMDE_TEST_FUNC_LIST_ENTRY(x_mm512_set_m128i)
|
||||
SIMDE_TEST_FUNC_LIST_ENTRY(x_mm512_set_m256)
|
||||
SIMDE_TEST_FUNC_LIST_ENTRY(x_mm512_set_m256i)
|
||||
SIMDE_TEST_FUNC_LIST_ENTRY(x_mm512_set_m256d)
|
||||
SIMDE_TEST_FUNC_LIST_END
|
||||
|
||||
#include <test/x86/avx512/test-avx512-footer.h>
|
||||
|
|
|
|||
105
thirdparty/simde/test/x86/avx512/set1.c
vendored
105
thirdparty/simde/test/x86/avx512/set1.c
vendored
|
|
@ -1543,6 +1543,108 @@ test_simde_mm512_maskz_set1_epi64(SIMDE_MUNIT_TEST_ARGS) {
|
|||
return 0;
|
||||
}
|
||||
|
||||
#if defined(SIMDE_FLOAT16_IS_SCALAR)
|
||||
static int
|
||||
test_simde_mm512_set1_ph (SIMDE_MUNIT_TEST_ARGS) {
|
||||
#if 1
|
||||
static const struct {
|
||||
const simde_float16 a;
|
||||
const simde_float16 r[32];
|
||||
} test_vec[] = {
|
||||
{ SIMDE_FLOAT16_VALUE( -85.88),
|
||||
{ SIMDE_FLOAT16_VALUE( -85.88), SIMDE_FLOAT16_VALUE( -85.88), SIMDE_FLOAT16_VALUE( -85.88), SIMDE_FLOAT16_VALUE( -85.88),
|
||||
SIMDE_FLOAT16_VALUE( -85.88), SIMDE_FLOAT16_VALUE( -85.88), SIMDE_FLOAT16_VALUE( -85.88), SIMDE_FLOAT16_VALUE( -85.88),
|
||||
SIMDE_FLOAT16_VALUE( -85.88), SIMDE_FLOAT16_VALUE( -85.88), SIMDE_FLOAT16_VALUE( -85.88), SIMDE_FLOAT16_VALUE( -85.88),
|
||||
SIMDE_FLOAT16_VALUE( -85.88), SIMDE_FLOAT16_VALUE( -85.88), SIMDE_FLOAT16_VALUE( -85.88), SIMDE_FLOAT16_VALUE( -85.88),
|
||||
SIMDE_FLOAT16_VALUE( -85.88), SIMDE_FLOAT16_VALUE( -85.88), SIMDE_FLOAT16_VALUE( -85.88), SIMDE_FLOAT16_VALUE( -85.88),
|
||||
SIMDE_FLOAT16_VALUE( -85.88), SIMDE_FLOAT16_VALUE( -85.88), SIMDE_FLOAT16_VALUE( -85.88), SIMDE_FLOAT16_VALUE( -85.88),
|
||||
SIMDE_FLOAT16_VALUE( -85.88), SIMDE_FLOAT16_VALUE( -85.88), SIMDE_FLOAT16_VALUE( -85.88), SIMDE_FLOAT16_VALUE( -85.88),
|
||||
SIMDE_FLOAT16_VALUE( -85.88), SIMDE_FLOAT16_VALUE( -85.88), SIMDE_FLOAT16_VALUE( -85.88), SIMDE_FLOAT16_VALUE( -85.88) } },
|
||||
{ SIMDE_FLOAT16_VALUE( -49.66),
|
||||
{ SIMDE_FLOAT16_VALUE( -49.66), SIMDE_FLOAT16_VALUE( -49.66), SIMDE_FLOAT16_VALUE( -49.66), SIMDE_FLOAT16_VALUE( -49.66),
|
||||
SIMDE_FLOAT16_VALUE( -49.66), SIMDE_FLOAT16_VALUE( -49.66), SIMDE_FLOAT16_VALUE( -49.66), SIMDE_FLOAT16_VALUE( -49.66),
|
||||
SIMDE_FLOAT16_VALUE( -49.66), SIMDE_FLOAT16_VALUE( -49.66), SIMDE_FLOAT16_VALUE( -49.66), SIMDE_FLOAT16_VALUE( -49.66),
|
||||
SIMDE_FLOAT16_VALUE( -49.66), SIMDE_FLOAT16_VALUE( -49.66), SIMDE_FLOAT16_VALUE( -49.66), SIMDE_FLOAT16_VALUE( -49.66),
|
||||
SIMDE_FLOAT16_VALUE( -49.66), SIMDE_FLOAT16_VALUE( -49.66), SIMDE_FLOAT16_VALUE( -49.66), SIMDE_FLOAT16_VALUE( -49.66),
|
||||
SIMDE_FLOAT16_VALUE( -49.66), SIMDE_FLOAT16_VALUE( -49.66), SIMDE_FLOAT16_VALUE( -49.66), SIMDE_FLOAT16_VALUE( -49.66),
|
||||
SIMDE_FLOAT16_VALUE( -49.66), SIMDE_FLOAT16_VALUE( -49.66), SIMDE_FLOAT16_VALUE( -49.66), SIMDE_FLOAT16_VALUE( -49.66),
|
||||
SIMDE_FLOAT16_VALUE( -49.66), SIMDE_FLOAT16_VALUE( -49.66), SIMDE_FLOAT16_VALUE( -49.66), SIMDE_FLOAT16_VALUE( -49.66) } },
|
||||
{ SIMDE_FLOAT16_VALUE( 22.06),
|
||||
{ SIMDE_FLOAT16_VALUE( 22.06), SIMDE_FLOAT16_VALUE( 22.06), SIMDE_FLOAT16_VALUE( 22.06), SIMDE_FLOAT16_VALUE( 22.06),
|
||||
SIMDE_FLOAT16_VALUE( 22.06), SIMDE_FLOAT16_VALUE( 22.06), SIMDE_FLOAT16_VALUE( 22.06), SIMDE_FLOAT16_VALUE( 22.06),
|
||||
SIMDE_FLOAT16_VALUE( 22.06), SIMDE_FLOAT16_VALUE( 22.06), SIMDE_FLOAT16_VALUE( 22.06), SIMDE_FLOAT16_VALUE( 22.06),
|
||||
SIMDE_FLOAT16_VALUE( 22.06), SIMDE_FLOAT16_VALUE( 22.06), SIMDE_FLOAT16_VALUE( 22.06), SIMDE_FLOAT16_VALUE( 22.06),
|
||||
SIMDE_FLOAT16_VALUE( 22.06), SIMDE_FLOAT16_VALUE( 22.06), SIMDE_FLOAT16_VALUE( 22.06), SIMDE_FLOAT16_VALUE( 22.06),
|
||||
SIMDE_FLOAT16_VALUE( 22.06), SIMDE_FLOAT16_VALUE( 22.06), SIMDE_FLOAT16_VALUE( 22.06), SIMDE_FLOAT16_VALUE( 22.06),
|
||||
SIMDE_FLOAT16_VALUE( 22.06), SIMDE_FLOAT16_VALUE( 22.06), SIMDE_FLOAT16_VALUE( 22.06), SIMDE_FLOAT16_VALUE( 22.06),
|
||||
SIMDE_FLOAT16_VALUE( 22.06), SIMDE_FLOAT16_VALUE( 22.06), SIMDE_FLOAT16_VALUE( 22.06), SIMDE_FLOAT16_VALUE( 22.06) } },
|
||||
{ SIMDE_FLOAT16_VALUE( -38.62),
|
||||
{ SIMDE_FLOAT16_VALUE( -38.62), SIMDE_FLOAT16_VALUE( -38.62), SIMDE_FLOAT16_VALUE( -38.62), SIMDE_FLOAT16_VALUE( -38.62),
|
||||
SIMDE_FLOAT16_VALUE( -38.62), SIMDE_FLOAT16_VALUE( -38.62), SIMDE_FLOAT16_VALUE( -38.62), SIMDE_FLOAT16_VALUE( -38.62),
|
||||
SIMDE_FLOAT16_VALUE( -38.62), SIMDE_FLOAT16_VALUE( -38.62), SIMDE_FLOAT16_VALUE( -38.62), SIMDE_FLOAT16_VALUE( -38.62),
|
||||
SIMDE_FLOAT16_VALUE( -38.62), SIMDE_FLOAT16_VALUE( -38.62), SIMDE_FLOAT16_VALUE( -38.62), SIMDE_FLOAT16_VALUE( -38.62),
|
||||
SIMDE_FLOAT16_VALUE( -38.62), SIMDE_FLOAT16_VALUE( -38.62), SIMDE_FLOAT16_VALUE( -38.62), SIMDE_FLOAT16_VALUE( -38.62),
|
||||
SIMDE_FLOAT16_VALUE( -38.62), SIMDE_FLOAT16_VALUE( -38.62), SIMDE_FLOAT16_VALUE( -38.62), SIMDE_FLOAT16_VALUE( -38.62),
|
||||
SIMDE_FLOAT16_VALUE( -38.62), SIMDE_FLOAT16_VALUE( -38.62), SIMDE_FLOAT16_VALUE( -38.62), SIMDE_FLOAT16_VALUE( -38.62),
|
||||
SIMDE_FLOAT16_VALUE( -38.62), SIMDE_FLOAT16_VALUE( -38.62), SIMDE_FLOAT16_VALUE( -38.62), SIMDE_FLOAT16_VALUE( -38.62) } },
|
||||
{ SIMDE_FLOAT16_VALUE( 89.62),
|
||||
{ SIMDE_FLOAT16_VALUE( 89.62), SIMDE_FLOAT16_VALUE( 89.62), SIMDE_FLOAT16_VALUE( 89.62), SIMDE_FLOAT16_VALUE( 89.62),
|
||||
SIMDE_FLOAT16_VALUE( 89.62), SIMDE_FLOAT16_VALUE( 89.62), SIMDE_FLOAT16_VALUE( 89.62), SIMDE_FLOAT16_VALUE( 89.62),
|
||||
SIMDE_FLOAT16_VALUE( 89.62), SIMDE_FLOAT16_VALUE( 89.62), SIMDE_FLOAT16_VALUE( 89.62), SIMDE_FLOAT16_VALUE( 89.62),
|
||||
SIMDE_FLOAT16_VALUE( 89.62), SIMDE_FLOAT16_VALUE( 89.62), SIMDE_FLOAT16_VALUE( 89.62), SIMDE_FLOAT16_VALUE( 89.62),
|
||||
SIMDE_FLOAT16_VALUE( 89.62), SIMDE_FLOAT16_VALUE( 89.62), SIMDE_FLOAT16_VALUE( 89.62), SIMDE_FLOAT16_VALUE( 89.62),
|
||||
SIMDE_FLOAT16_VALUE( 89.62), SIMDE_FLOAT16_VALUE( 89.62), SIMDE_FLOAT16_VALUE( 89.62), SIMDE_FLOAT16_VALUE( 89.62),
|
||||
SIMDE_FLOAT16_VALUE( 89.62), SIMDE_FLOAT16_VALUE( 89.62), SIMDE_FLOAT16_VALUE( 89.62), SIMDE_FLOAT16_VALUE( 89.62),
|
||||
SIMDE_FLOAT16_VALUE( 89.62), SIMDE_FLOAT16_VALUE( 89.62), SIMDE_FLOAT16_VALUE( 89.62), SIMDE_FLOAT16_VALUE( 89.62) } },
|
||||
{ SIMDE_FLOAT16_VALUE( -97.06),
|
||||
{ SIMDE_FLOAT16_VALUE( -97.06), SIMDE_FLOAT16_VALUE( -97.06), SIMDE_FLOAT16_VALUE( -97.06), SIMDE_FLOAT16_VALUE( -97.06),
|
||||
SIMDE_FLOAT16_VALUE( -97.06), SIMDE_FLOAT16_VALUE( -97.06), SIMDE_FLOAT16_VALUE( -97.06), SIMDE_FLOAT16_VALUE( -97.06),
|
||||
SIMDE_FLOAT16_VALUE( -97.06), SIMDE_FLOAT16_VALUE( -97.06), SIMDE_FLOAT16_VALUE( -97.06), SIMDE_FLOAT16_VALUE( -97.06),
|
||||
SIMDE_FLOAT16_VALUE( -97.06), SIMDE_FLOAT16_VALUE( -97.06), SIMDE_FLOAT16_VALUE( -97.06), SIMDE_FLOAT16_VALUE( -97.06),
|
||||
SIMDE_FLOAT16_VALUE( -97.06), SIMDE_FLOAT16_VALUE( -97.06), SIMDE_FLOAT16_VALUE( -97.06), SIMDE_FLOAT16_VALUE( -97.06),
|
||||
SIMDE_FLOAT16_VALUE( -97.06), SIMDE_FLOAT16_VALUE( -97.06), SIMDE_FLOAT16_VALUE( -97.06), SIMDE_FLOAT16_VALUE( -97.06),
|
||||
SIMDE_FLOAT16_VALUE( -97.06), SIMDE_FLOAT16_VALUE( -97.06), SIMDE_FLOAT16_VALUE( -97.06), SIMDE_FLOAT16_VALUE( -97.06),
|
||||
SIMDE_FLOAT16_VALUE( -97.06), SIMDE_FLOAT16_VALUE( -97.06), SIMDE_FLOAT16_VALUE( -97.06), SIMDE_FLOAT16_VALUE( -97.06) } },
|
||||
{ SIMDE_FLOAT16_VALUE( 72.44),
|
||||
{ SIMDE_FLOAT16_VALUE( 72.44), SIMDE_FLOAT16_VALUE( 72.44), SIMDE_FLOAT16_VALUE( 72.44), SIMDE_FLOAT16_VALUE( 72.44),
|
||||
SIMDE_FLOAT16_VALUE( 72.44), SIMDE_FLOAT16_VALUE( 72.44), SIMDE_FLOAT16_VALUE( 72.44), SIMDE_FLOAT16_VALUE( 72.44),
|
||||
SIMDE_FLOAT16_VALUE( 72.44), SIMDE_FLOAT16_VALUE( 72.44), SIMDE_FLOAT16_VALUE( 72.44), SIMDE_FLOAT16_VALUE( 72.44),
|
||||
SIMDE_FLOAT16_VALUE( 72.44), SIMDE_FLOAT16_VALUE( 72.44), SIMDE_FLOAT16_VALUE( 72.44), SIMDE_FLOAT16_VALUE( 72.44),
|
||||
SIMDE_FLOAT16_VALUE( 72.44), SIMDE_FLOAT16_VALUE( 72.44), SIMDE_FLOAT16_VALUE( 72.44), SIMDE_FLOAT16_VALUE( 72.44),
|
||||
SIMDE_FLOAT16_VALUE( 72.44), SIMDE_FLOAT16_VALUE( 72.44), SIMDE_FLOAT16_VALUE( 72.44), SIMDE_FLOAT16_VALUE( 72.44),
|
||||
SIMDE_FLOAT16_VALUE( 72.44), SIMDE_FLOAT16_VALUE( 72.44), SIMDE_FLOAT16_VALUE( 72.44), SIMDE_FLOAT16_VALUE( 72.44),
|
||||
SIMDE_FLOAT16_VALUE( 72.44), SIMDE_FLOAT16_VALUE( 72.44), SIMDE_FLOAT16_VALUE( 72.44), SIMDE_FLOAT16_VALUE( 72.44) } },
|
||||
{ SIMDE_FLOAT16_VALUE( 81.69),
|
||||
{ SIMDE_FLOAT16_VALUE( 81.69), SIMDE_FLOAT16_VALUE( 81.69), SIMDE_FLOAT16_VALUE( 81.69), SIMDE_FLOAT16_VALUE( 81.69),
|
||||
SIMDE_FLOAT16_VALUE( 81.69), SIMDE_FLOAT16_VALUE( 81.69), SIMDE_FLOAT16_VALUE( 81.69), SIMDE_FLOAT16_VALUE( 81.69),
|
||||
SIMDE_FLOAT16_VALUE( 81.69), SIMDE_FLOAT16_VALUE( 81.69), SIMDE_FLOAT16_VALUE( 81.69), SIMDE_FLOAT16_VALUE( 81.69),
|
||||
SIMDE_FLOAT16_VALUE( 81.69), SIMDE_FLOAT16_VALUE( 81.69), SIMDE_FLOAT16_VALUE( 81.69), SIMDE_FLOAT16_VALUE( 81.69),
|
||||
SIMDE_FLOAT16_VALUE( 81.69), SIMDE_FLOAT16_VALUE( 81.69), SIMDE_FLOAT16_VALUE( 81.69), SIMDE_FLOAT16_VALUE( 81.69),
|
||||
SIMDE_FLOAT16_VALUE( 81.69), SIMDE_FLOAT16_VALUE( 81.69), SIMDE_FLOAT16_VALUE( 81.69), SIMDE_FLOAT16_VALUE( 81.69),
|
||||
SIMDE_FLOAT16_VALUE( 81.69), SIMDE_FLOAT16_VALUE( 81.69), SIMDE_FLOAT16_VALUE( 81.69), SIMDE_FLOAT16_VALUE( 81.69),
|
||||
SIMDE_FLOAT16_VALUE( 81.69), SIMDE_FLOAT16_VALUE( 81.69), SIMDE_FLOAT16_VALUE( 81.69), SIMDE_FLOAT16_VALUE( 81.69) } },
|
||||
};
|
||||
|
||||
for (size_t i = 0 ; i < (sizeof(test_vec) / sizeof(test_vec[0])) ; i++) {
|
||||
simde__m512h r = simde_mm512_set1_ph(test_vec[i].a);
|
||||
simde_test_x86_assert_equal_f16x32(r, simde_mm512_loadu_ph(test_vec[i].r), 1);
|
||||
}
|
||||
|
||||
return 0;
|
||||
#else
|
||||
fputc('\n', stdout);
|
||||
for (int i = 0 ; i < 8 ; i++) {
|
||||
simde_float16 a = simde_test_codegen_random_f16(SIMDE_FLOAT16_VALUE(-100.0), SIMDE_FLOAT16_VALUE(100.0));
|
||||
simde__m512h r = simde_mm512_set1_ph(a);
|
||||
|
||||
simde_test_codegen_write_f16(2, a, SIMDE_TEST_VEC_POS_FIRST);
|
||||
simde_test_x86_write_f16x32(2, r, SIMDE_TEST_VEC_POS_LAST);
|
||||
}
|
||||
return 1;
|
||||
#endif
|
||||
}
|
||||
#endif
|
||||
|
||||
SIMDE_TEST_FUNC_LIST_BEGIN
|
||||
SIMDE_TEST_FUNC_LIST_ENTRY(mm512_set1_epi8)
|
||||
SIMDE_TEST_FUNC_LIST_ENTRY(mm512_mask_set1_epi8)
|
||||
|
|
@ -1558,6 +1660,9 @@ SIMDE_TEST_FUNC_LIST_BEGIN
|
|||
SIMDE_TEST_FUNC_LIST_ENTRY(mm512_maskz_set1_epi64)
|
||||
SIMDE_TEST_FUNC_LIST_ENTRY(mm512_set1_ps)
|
||||
SIMDE_TEST_FUNC_LIST_ENTRY(mm512_set1_pd)
|
||||
#if defined(SIMDE_FLOAT16_IS_SCALAR)
|
||||
SIMDE_TEST_FUNC_LIST_ENTRY(mm512_set1_ph)
|
||||
#endif
|
||||
SIMDE_TEST_FUNC_LIST_END
|
||||
|
||||
#include <test/x86/avx512/test-avx512-footer.h>
|
||||
|
|
|
|||
8
thirdparty/simde/test/x86/avx512/setzero.c
vendored
8
thirdparty/simde/test/x86/avx512/setzero.c
vendored
|
|
@ -52,10 +52,18 @@ test_simde_mm512_setzero_pd(SIMDE_MUNIT_TEST_ARGS) {
|
|||
return 0;
|
||||
}
|
||||
|
||||
static int
|
||||
test_simde_mm512_setzero_ph(SIMDE_MUNIT_TEST_ARGS) {
|
||||
simde_test_x86_assert_equal_f16x32(simde_mm512_setzero_ph(), simde_mm512_set1_ph(SIMDE_FLOAT16_VALUE(0.0)), 1);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
SIMDE_TEST_FUNC_LIST_BEGIN
|
||||
SIMDE_TEST_FUNC_LIST_ENTRY(mm512_setzero_si512)
|
||||
SIMDE_TEST_FUNC_LIST_ENTRY(mm512_setzero_ps)
|
||||
SIMDE_TEST_FUNC_LIST_ENTRY(mm512_setzero_pd)
|
||||
SIMDE_TEST_FUNC_LIST_ENTRY(mm512_setzero_ph)
|
||||
SIMDE_TEST_FUNC_LIST_END
|
||||
|
||||
#include <test/x86/avx512/test-avx512-footer.h>
|
||||
|
|
|
|||
419
thirdparty/simde/test/x86/avx512/shuffle.c
vendored
419
thirdparty/simde/test/x86/avx512/shuffle.c
vendored
|
|
@ -433,6 +433,80 @@ test_simde_mm512_shuffle_epi8(SIMDE_MUNIT_TEST_ARGS) {
|
|||
return 0;
|
||||
}
|
||||
|
||||
static int
|
||||
test_simde_mm512_shuffle_epi32(SIMDE_MUNIT_TEST_ARGS) {
|
||||
#if 1
|
||||
const struct {
|
||||
int32_t a[16];
|
||||
int32_t imm8;
|
||||
int32_t r[16];
|
||||
} test_vec[8] = {
|
||||
{ { INT32_C( 971206559), -INT32_C( 584109496), -INT32_C( 1230684222), INT32_C( 318067129), -INT32_C( 2121378619), INT32_C( 476178527), -INT32_C( 1026677291), -INT32_C( 1808955404),
|
||||
INT32_C( 1070404086), INT32_C( 102562883), -INT32_C( 172179141), -INT32_C( 670584302), INT32_C( 1700369670), INT32_C( 1384299133), -INT32_C( 736800545), -INT32_C( 832027945) },
|
||||
INT32_C( 3),
|
||||
{ INT32_C( 318067129), INT32_C( 971206559), INT32_C( 971206559), INT32_C( 971206559), -INT32_C( 1808955404), -INT32_C( 2121378619), -INT32_C( 2121378619), -INT32_C( 2121378619),
|
||||
-INT32_C( 670584302), INT32_C( 1070404086), INT32_C( 1070404086), INT32_C( 1070404086), -INT32_C( 832027945), INT32_C( 1700369670), INT32_C( 1700369670), INT32_C( 1700369670) } },
|
||||
{ { INT32_C( 831982901), -INT32_C( 361915095), INT32_C( 201155161), -INT32_C( 15542935), -INT32_C( 394496210), INT32_C( 1237831673), INT32_C( 639736804), INT32_C( 947580675),
|
||||
INT32_C( 627708412), INT32_C( 118478766), -INT32_C( 1575809991), INT32_C( 262219233), -INT32_C( 1762189668), -INT32_C( 773865491), INT32_C( 1593245786), -INT32_C( 342461969) },
|
||||
INT32_C( 2),
|
||||
{ INT32_C( 201155161), INT32_C( 831982901), INT32_C( 831982901), INT32_C( 831982901), INT32_C( 639736804), -INT32_C( 394496210), -INT32_C( 394496210), -INT32_C( 394496210),
|
||||
-INT32_C( 1575809991), INT32_C( 627708412), INT32_C( 627708412), INT32_C( 627708412), INT32_C( 1593245786), -INT32_C( 1762189668), -INT32_C( 1762189668), -INT32_C( 1762189668) } },
|
||||
{ { -INT32_C( 684716032), INT32_C( 739260448), INT32_C( 1880011595), INT32_C( 1913396564), -INT32_C( 731930091), -INT32_C( 2110902142), -INT32_C( 1720546264), INT32_C( 589061411),
|
||||
-INT32_C( 1896133522), -INT32_C( 809890940), INT32_C( 322947262), -INT32_C( 75150106), INT32_C( 1892673006), INT32_C( 1039400213), -INT32_C( 1378392694), INT32_C( 819000258) },
|
||||
INT32_C( 3),
|
||||
{ INT32_C( 1913396564), -INT32_C( 684716032), -INT32_C( 684716032), -INT32_C( 684716032), INT32_C( 589061411), -INT32_C( 731930091), -INT32_C( 731930091), -INT32_C( 731930091),
|
||||
-INT32_C( 75150106), -INT32_C( 1896133522), -INT32_C( 1896133522), -INT32_C( 1896133522), INT32_C( 819000258), INT32_C( 1892673006), INT32_C( 1892673006), INT32_C( 1892673006) } },
|
||||
{ { -INT32_C( 674971957), INT32_C( 1100321657), INT32_C( 522692819), INT32_C( 319627822), -INT32_C( 282558735), -INT32_C( 696686991), INT32_C( 815277629), -INT32_C( 1032861194),
|
||||
INT32_C( 10040199), -INT32_C( 1706938681), INT32_C( 96037335), INT32_C( 2098775692), -INT32_C( 1251196860), -INT32_C( 477370970), INT32_C( 34808843), INT32_C( 1959035885) },
|
||||
INT32_C( 2),
|
||||
{ INT32_C( 522692819), -INT32_C( 674971957), -INT32_C( 674971957), -INT32_C( 674971957), INT32_C( 815277629), -INT32_C( 282558735), -INT32_C( 282558735), -INT32_C( 282558735),
|
||||
INT32_C( 96037335), INT32_C( 10040199), INT32_C( 10040199), INT32_C( 10040199), INT32_C( 34808843), -INT32_C( 1251196860), -INT32_C( 1251196860), -INT32_C( 1251196860) } },
|
||||
{ { -INT32_C( 1954712227), INT32_C( 543299511), -INT32_C( 1750308912), -INT32_C( 1059378561), INT32_C( 2087096726), INT32_C( 1082608156), -INT32_C( 533886627), -INT32_C( 1432903091),
|
||||
-INT32_C( 835316713), -INT32_C( 51472340), INT32_C( 2140379904), INT32_C( 1530884037), INT32_C( 483894784), INT32_C( 1297965040), INT32_C( 909019880), INT32_C( 1138804012) },
|
||||
INT32_C( 1),
|
||||
{ INT32_C( 543299511), -INT32_C( 1954712227), -INT32_C( 1954712227), -INT32_C( 1954712227), INT32_C( 1082608156), INT32_C( 2087096726), INT32_C( 2087096726), INT32_C( 2087096726),
|
||||
-INT32_C( 51472340), -INT32_C( 835316713), -INT32_C( 835316713), -INT32_C( 835316713), INT32_C( 1297965040), INT32_C( 483894784), INT32_C( 483894784), INT32_C( 483894784) } },
|
||||
{ { -INT32_C( 1358622442), -INT32_C( 1683029504), INT32_C( 73412245), INT32_C( 335854446), -INT32_C( 234610285), INT32_C( 148525438), INT32_C( 1144328319), INT32_C( 119437553),
|
||||
-INT32_C( 1967774838), -INT32_C( 1155177179), INT32_C( 46106004), -INT32_C( 753482688), INT32_C( 1673861861), -INT32_C( 345268117), -INT32_C( 1590714192), -INT32_C( 1549185767) },
|
||||
INT32_C( 1),
|
||||
{ -INT32_C( 1683029504), -INT32_C( 1358622442), -INT32_C( 1358622442), -INT32_C( 1358622442), INT32_C( 148525438), -INT32_C( 234610285), -INT32_C( 234610285), -INT32_C( 234610285),
|
||||
-INT32_C( 1155177179), -INT32_C( 1967774838), -INT32_C( 1967774838), -INT32_C( 1967774838), -INT32_C( 345268117), INT32_C( 1673861861), INT32_C( 1673861861), INT32_C( 1673861861) } },
|
||||
{ { -INT32_C( 980013729), -INT32_C( 682012334), -INT32_C( 719889647), -INT32_C( 1950684303), INT32_C( 1358306736), INT32_C( 687989128), INT32_C( 1581425169), -INT32_C( 1412438709),
|
||||
INT32_C( 1685087762), -INT32_C( 935605833), -INT32_C( 1784851932), -INT32_C( 299870403), -INT32_C( 46262668), INT32_C( 153501688), INT32_C( 761751778), INT32_C( 1608005453) },
|
||||
INT32_C( 1),
|
||||
{ -INT32_C( 682012334), -INT32_C( 980013729), -INT32_C( 980013729), -INT32_C( 980013729), INT32_C( 687989128), INT32_C( 1358306736), INT32_C( 1358306736), INT32_C( 1358306736),
|
||||
-INT32_C( 935605833), INT32_C( 1685087762), INT32_C( 1685087762), INT32_C( 1685087762), INT32_C( 153501688), -INT32_C( 46262668), -INT32_C( 46262668), -INT32_C( 46262668) } },
|
||||
{ { INT32_C( 290767688), INT32_C( 1345658366), INT32_C( 311347898), INT32_C( 25591018), -INT32_C( 84311110), INT32_C( 299631273), -INT32_C( 1604449943), INT32_C( 708689378),
|
||||
INT32_C( 2117898880), INT32_C( 1775202735), INT32_C( 645619004), -INT32_C( 1826159911), INT32_C( 797778053), -INT32_C( 1941935838), INT32_C( 1428987763), -INT32_C( 578852260) },
|
||||
INT32_C( 0),
|
||||
{ INT32_C( 290767688), INT32_C( 290767688), INT32_C( 290767688), INT32_C( 290767688), -INT32_C( 84311110), -INT32_C( 84311110), -INT32_C( 84311110), -INT32_C( 84311110),
|
||||
INT32_C( 2117898880), INT32_C( 2117898880), INT32_C( 2117898880), INT32_C( 2117898880), INT32_C( 797778053), INT32_C( 797778053), INT32_C( 797778053), INT32_C( 797778053) } },
|
||||
};
|
||||
|
||||
for (size_t i = 0 ; i < (sizeof(test_vec) / sizeof(test_vec[0])); i++) {
|
||||
simde__m512i r, a = simde_mm512_loadu_epi32(test_vec[i].a);
|
||||
SIMDE_CONSTIFY_4_(simde_mm512_shuffle_epi32, r, (HEDLEY_UNREACHABLE(), a), test_vec[i].imm8, a);
|
||||
simde_test_x86_assert_equal_i32x16(r, simde_mm512_loadu_epi32(test_vec[i].r));
|
||||
}
|
||||
|
||||
return 0;
|
||||
#else
|
||||
fputc('\n', stdout);
|
||||
|
||||
for (int i = 0; i < 8; i++) {
|
||||
simde__m512i r, a = simde_test_x86_random_i32x16();
|
||||
int32_t imm8 = simde_test_codegen_random_i8() & 3;
|
||||
SIMDE_CONSTIFY_4_(simde_mm512_shuffle_epi32, r, (HEDLEY_UNREACHABLE(), a), imm8, a);
|
||||
|
||||
simde_test_x86_write_i32x16(2, a, SIMDE_TEST_VEC_POS_FIRST);
|
||||
simde_test_codegen_write_i32(2, imm8, SIMDE_TEST_VEC_POS_MIDDLE);
|
||||
simde_test_x86_write_i32x16(2, r, SIMDE_TEST_VEC_POS_LAST);
|
||||
|
||||
}
|
||||
return 1;
|
||||
#endif
|
||||
}
|
||||
|
||||
static int
|
||||
test_simde_mm512_mask_shuffle_epi8(SIMDE_MUNIT_TEST_ARGS) {
|
||||
const struct {
|
||||
|
|
@ -4082,11 +4156,351 @@ test_simde_mm512_shuffle_ps (SIMDE_MUNIT_TEST_ARGS) {
|
|||
#endif
|
||||
}
|
||||
|
||||
static int
|
||||
test_simde_mm512_shuffle_pd (SIMDE_MUNIT_TEST_ARGS) {
|
||||
#if 1
|
||||
static const struct {
|
||||
const simde_float64 a[8];
|
||||
const simde_float64 b[8];
|
||||
const int imm8;
|
||||
const simde_float64 r[8];
|
||||
} test_vec[] = {
|
||||
{ { SIMDE_FLOAT64_C( -942.93), SIMDE_FLOAT64_C( -64.12), SIMDE_FLOAT64_C( -56.87), SIMDE_FLOAT64_C( 402.12),
|
||||
SIMDE_FLOAT64_C( -731.43), SIMDE_FLOAT64_C( -424.59), SIMDE_FLOAT64_C( 896.25), SIMDE_FLOAT64_C( -758.90) },
|
||||
{ SIMDE_FLOAT64_C( 971.71), SIMDE_FLOAT64_C( 442.47), SIMDE_FLOAT64_C( -154.85), SIMDE_FLOAT64_C( -222.75),
|
||||
SIMDE_FLOAT64_C( 895.37), SIMDE_FLOAT64_C( 150.67), SIMDE_FLOAT64_C( -864.35), SIMDE_FLOAT64_C( 903.59) },
|
||||
INT32_C( 6),
|
||||
{ SIMDE_FLOAT64_C( -942.93), SIMDE_FLOAT64_C( 442.47), SIMDE_FLOAT64_C( 402.12), SIMDE_FLOAT64_C( -154.85),
|
||||
SIMDE_FLOAT64_C( -731.43), SIMDE_FLOAT64_C( 895.37), SIMDE_FLOAT64_C( 896.25), SIMDE_FLOAT64_C( -864.35) } },
|
||||
{ { SIMDE_FLOAT64_C( -84.66), SIMDE_FLOAT64_C( -723.71), SIMDE_FLOAT64_C( 69.56), SIMDE_FLOAT64_C( 984.55),
|
||||
SIMDE_FLOAT64_C( 165.64), SIMDE_FLOAT64_C( -889.68), SIMDE_FLOAT64_C( 777.44), SIMDE_FLOAT64_C( 253.63) },
|
||||
{ SIMDE_FLOAT64_C( -802.95), SIMDE_FLOAT64_C( 456.39), SIMDE_FLOAT64_C( 844.31), SIMDE_FLOAT64_C( -745.88),
|
||||
SIMDE_FLOAT64_C( -607.73), SIMDE_FLOAT64_C( -212.56), SIMDE_FLOAT64_C( 656.25), SIMDE_FLOAT64_C( -339.16) },
|
||||
INT32_C( 190),
|
||||
{ SIMDE_FLOAT64_C( -84.66), SIMDE_FLOAT64_C( 456.39), SIMDE_FLOAT64_C( 984.55), SIMDE_FLOAT64_C( -745.88),
|
||||
SIMDE_FLOAT64_C( -889.68), SIMDE_FLOAT64_C( -212.56), SIMDE_FLOAT64_C( 777.44), SIMDE_FLOAT64_C( -339.16) } },
|
||||
{ { SIMDE_FLOAT64_C( -5.04), SIMDE_FLOAT64_C( 747.08), SIMDE_FLOAT64_C( -888.19), SIMDE_FLOAT64_C( -109.67),
|
||||
SIMDE_FLOAT64_C( -102.25), SIMDE_FLOAT64_C( -752.54), SIMDE_FLOAT64_C( -206.08), SIMDE_FLOAT64_C( -823.01) },
|
||||
{ SIMDE_FLOAT64_C( -792.26), SIMDE_FLOAT64_C( 950.74), SIMDE_FLOAT64_C( 203.17), SIMDE_FLOAT64_C( 123.08),
|
||||
SIMDE_FLOAT64_C( -772.97), SIMDE_FLOAT64_C( -727.27), SIMDE_FLOAT64_C( 107.63), SIMDE_FLOAT64_C( 392.67) },
|
||||
INT32_C( 121),
|
||||
{ SIMDE_FLOAT64_C( 747.08), SIMDE_FLOAT64_C( -792.26), SIMDE_FLOAT64_C( -888.19), SIMDE_FLOAT64_C( 123.08),
|
||||
SIMDE_FLOAT64_C( -752.54), SIMDE_FLOAT64_C( -727.27), SIMDE_FLOAT64_C( -823.01), SIMDE_FLOAT64_C( 107.63) } },
|
||||
{ { SIMDE_FLOAT64_C( -658.54), SIMDE_FLOAT64_C( -509.39), SIMDE_FLOAT64_C( -165.78), SIMDE_FLOAT64_C( -266.26),
|
||||
SIMDE_FLOAT64_C( 278.05), SIMDE_FLOAT64_C( -509.53), SIMDE_FLOAT64_C( 394.57), SIMDE_FLOAT64_C( -359.10) },
|
||||
{ SIMDE_FLOAT64_C( -957.04), SIMDE_FLOAT64_C( -703.49), SIMDE_FLOAT64_C( 975.46), SIMDE_FLOAT64_C( 37.93),
|
||||
SIMDE_FLOAT64_C( -956.41), SIMDE_FLOAT64_C( -912.73), SIMDE_FLOAT64_C( 928.25), SIMDE_FLOAT64_C( -58.66) },
|
||||
INT32_C( 213),
|
||||
{ SIMDE_FLOAT64_C( -509.39), SIMDE_FLOAT64_C( -957.04), SIMDE_FLOAT64_C( -266.26), SIMDE_FLOAT64_C( 975.46),
|
||||
SIMDE_FLOAT64_C( -509.53), SIMDE_FLOAT64_C( -956.41), SIMDE_FLOAT64_C( -359.10), SIMDE_FLOAT64_C( -58.66) } },
|
||||
{ { SIMDE_FLOAT64_C( -327.09), SIMDE_FLOAT64_C( -678.51), SIMDE_FLOAT64_C( 665.54), SIMDE_FLOAT64_C( -100.06),
|
||||
SIMDE_FLOAT64_C( -405.78), SIMDE_FLOAT64_C( -226.83), SIMDE_FLOAT64_C( -707.39), SIMDE_FLOAT64_C( -22.73) },
|
||||
{ SIMDE_FLOAT64_C( 658.24), SIMDE_FLOAT64_C( -61.08), SIMDE_FLOAT64_C( 557.37), SIMDE_FLOAT64_C( 999.71),
|
||||
SIMDE_FLOAT64_C( 429.53), SIMDE_FLOAT64_C( -608.41), SIMDE_FLOAT64_C( -266.56), SIMDE_FLOAT64_C( -292.42) },
|
||||
INT32_C( 130),
|
||||
{ SIMDE_FLOAT64_C( -327.09), SIMDE_FLOAT64_C( -61.08), SIMDE_FLOAT64_C( 665.54), SIMDE_FLOAT64_C( 557.37),
|
||||
SIMDE_FLOAT64_C( -405.78), SIMDE_FLOAT64_C( 429.53), SIMDE_FLOAT64_C( -707.39), SIMDE_FLOAT64_C( -292.42) } },
|
||||
{ { SIMDE_FLOAT64_C( -575.47), SIMDE_FLOAT64_C( 323.95), SIMDE_FLOAT64_C( 962.95), SIMDE_FLOAT64_C( -531.89),
|
||||
SIMDE_FLOAT64_C( 411.22), SIMDE_FLOAT64_C( 891.20), SIMDE_FLOAT64_C( 409.45), SIMDE_FLOAT64_C( 745.94) },
|
||||
{ SIMDE_FLOAT64_C( -386.62), SIMDE_FLOAT64_C( -472.23), SIMDE_FLOAT64_C( -711.59), SIMDE_FLOAT64_C( 286.29),
|
||||
SIMDE_FLOAT64_C( -150.74), SIMDE_FLOAT64_C( 953.95), SIMDE_FLOAT64_C( -813.77), SIMDE_FLOAT64_C( 443.48) },
|
||||
INT32_C( 164),
|
||||
{ SIMDE_FLOAT64_C( -575.47), SIMDE_FLOAT64_C( -386.62), SIMDE_FLOAT64_C( -531.89), SIMDE_FLOAT64_C( -711.59),
|
||||
SIMDE_FLOAT64_C( 411.22), SIMDE_FLOAT64_C( 953.95), SIMDE_FLOAT64_C( 409.45), SIMDE_FLOAT64_C( 443.48) } },
|
||||
{ { SIMDE_FLOAT64_C( 417.75), SIMDE_FLOAT64_C( 978.11), SIMDE_FLOAT64_C( -614.93), SIMDE_FLOAT64_C( -152.72),
|
||||
SIMDE_FLOAT64_C( -630.29), SIMDE_FLOAT64_C( 118.51), SIMDE_FLOAT64_C( 554.86), SIMDE_FLOAT64_C( 251.77) },
|
||||
{ SIMDE_FLOAT64_C( 246.53), SIMDE_FLOAT64_C( -96.66), SIMDE_FLOAT64_C( -823.21), SIMDE_FLOAT64_C( 671.05),
|
||||
SIMDE_FLOAT64_C( -772.71), SIMDE_FLOAT64_C( -860.26), SIMDE_FLOAT64_C( -860.83), SIMDE_FLOAT64_C( 638.50) },
|
||||
INT32_C( 60),
|
||||
{ SIMDE_FLOAT64_C( 417.75), SIMDE_FLOAT64_C( 246.53), SIMDE_FLOAT64_C( -152.72), SIMDE_FLOAT64_C( 671.05),
|
||||
SIMDE_FLOAT64_C( 118.51), SIMDE_FLOAT64_C( -860.26), SIMDE_FLOAT64_C( 554.86), SIMDE_FLOAT64_C( -860.83) } },
|
||||
{ { SIMDE_FLOAT64_C( -923.61), SIMDE_FLOAT64_C( 672.86), SIMDE_FLOAT64_C( 930.61), SIMDE_FLOAT64_C( -74.35),
|
||||
SIMDE_FLOAT64_C( 626.80), SIMDE_FLOAT64_C( -883.16), SIMDE_FLOAT64_C( -630.87), SIMDE_FLOAT64_C( -646.08) },
|
||||
{ SIMDE_FLOAT64_C( -404.32), SIMDE_FLOAT64_C( -210.12), SIMDE_FLOAT64_C( -260.72), SIMDE_FLOAT64_C( -986.57),
|
||||
SIMDE_FLOAT64_C( -232.01), SIMDE_FLOAT64_C( 124.35), SIMDE_FLOAT64_C( -139.29), SIMDE_FLOAT64_C( 137.70) },
|
||||
INT32_C( 142),
|
||||
{ SIMDE_FLOAT64_C( -923.61), SIMDE_FLOAT64_C( -210.12), SIMDE_FLOAT64_C( -74.35), SIMDE_FLOAT64_C( -986.57),
|
||||
SIMDE_FLOAT64_C( 626.80), SIMDE_FLOAT64_C( -232.01), SIMDE_FLOAT64_C( -630.87), SIMDE_FLOAT64_C( 137.70) } },
|
||||
};
|
||||
|
||||
simde__m512d a, b, r;
|
||||
|
||||
a = simde_mm512_loadu_pd(test_vec[0].a);
|
||||
b = simde_mm512_loadu_pd(test_vec[0].b);
|
||||
r = simde_mm512_shuffle_pd(a, b, INT32_C( 6));
|
||||
simde_test_x86_assert_equal_f64x8(r, simde_mm512_loadu_pd(test_vec[0].r), 1);
|
||||
|
||||
a = simde_mm512_loadu_pd(test_vec[1].a);
|
||||
b = simde_mm512_loadu_pd(test_vec[1].b);
|
||||
r = simde_mm512_shuffle_pd(a, b, INT32_C( 190));
|
||||
simde_test_x86_assert_equal_f64x8(r, simde_mm512_loadu_pd(test_vec[1].r), 1);
|
||||
|
||||
a = simde_mm512_loadu_pd(test_vec[2].a);
|
||||
b = simde_mm512_loadu_pd(test_vec[2].b);
|
||||
r = simde_mm512_shuffle_pd(a, b, INT32_C( 121));
|
||||
simde_test_x86_assert_equal_f64x8(r, simde_mm512_loadu_pd(test_vec[2].r), 1);
|
||||
|
||||
a = simde_mm512_loadu_pd(test_vec[3].a);
|
||||
b = simde_mm512_loadu_pd(test_vec[3].b);
|
||||
r = simde_mm512_shuffle_pd(a, b, INT32_C( 213));
|
||||
simde_test_x86_assert_equal_f64x8(r, simde_mm512_loadu_pd(test_vec[3].r), 1);
|
||||
|
||||
a = simde_mm512_loadu_pd(test_vec[4].a);
|
||||
b = simde_mm512_loadu_pd(test_vec[4].b);
|
||||
r = simde_mm512_shuffle_pd(a, b, INT32_C( 130));
|
||||
simde_test_x86_assert_equal_f64x8(r, simde_mm512_loadu_pd(test_vec[4].r), 1);
|
||||
|
||||
a = simde_mm512_loadu_pd(test_vec[5].a);
|
||||
b = simde_mm512_loadu_pd(test_vec[5].b);
|
||||
r = simde_mm512_shuffle_pd(a, b, INT32_C( 164));
|
||||
simde_test_x86_assert_equal_f64x8(r, simde_mm512_loadu_pd(test_vec[5].r), 1);
|
||||
|
||||
a = simde_mm512_loadu_pd(test_vec[6].a);
|
||||
b = simde_mm512_loadu_pd(test_vec[6].b);
|
||||
r = simde_mm512_shuffle_pd(a, b, INT32_C( 60));
|
||||
simde_test_x86_assert_equal_f64x8(r, simde_mm512_loadu_pd(test_vec[6].r), 1);
|
||||
|
||||
a = simde_mm512_loadu_pd(test_vec[7].a);
|
||||
b = simde_mm512_loadu_pd(test_vec[7].b);
|
||||
r = simde_mm512_shuffle_pd(a, b, INT32_C( 142));
|
||||
simde_test_x86_assert_equal_f64x8(r, simde_mm512_loadu_pd(test_vec[7].r), 1);
|
||||
|
||||
return 0;
|
||||
#else
|
||||
fputc('\n', stdout);
|
||||
for (int i = 0 ; i < 8 ; i++) {
|
||||
simde__m512d a = simde_test_x86_random_f64x8(SIMDE_FLOAT64_C(-1000.0), SIMDE_FLOAT64_C(1000.0));
|
||||
simde__m512d b = simde_test_x86_random_f64x8(SIMDE_FLOAT64_C(-1000.0), SIMDE_FLOAT64_C(1000.0));
|
||||
int imm8 = simde_test_codegen_random_i32() & 255;
|
||||
simde__m512d r;
|
||||
SIMDE_CONSTIFY_256_(simde_mm512_shuffle_pd, r, simde_mm512_setzero_pd(), imm8, a, b);
|
||||
|
||||
simde_test_x86_write_f64x8(2, a, SIMDE_TEST_VEC_POS_FIRST);
|
||||
simde_test_x86_write_f64x8(2, b, SIMDE_TEST_VEC_POS_MIDDLE);
|
||||
simde_test_codegen_write_i32(2, imm8, SIMDE_TEST_VEC_POS_MIDDLE);
|
||||
simde_test_x86_write_f64x8(2, r, SIMDE_TEST_VEC_POS_LAST);
|
||||
}
|
||||
return 1;
|
||||
#endif
|
||||
}
|
||||
|
||||
static int
|
||||
test_simde_mm512_shufflehi_epi16(SIMDE_MUNIT_TEST_ARGS) {
|
||||
#if 1
|
||||
const struct {
|
||||
int16_t a[32];
|
||||
uint8_t imm8;
|
||||
int16_t r[32];
|
||||
} test_vec[8] = {
|
||||
{ { INT16_C( 8165), -INT16_C( 20180), INT16_C( 7620), -INT16_C( 24104), -INT16_C( 20027), INT16_C( 17738), -INT16_C( 30792), -INT16_C( 1690),
|
||||
INT16_C( 8342), INT16_C( 22020), INT16_C( 10666), -INT16_C( 21638), INT16_C( 11237), -INT16_C( 18036), -INT16_C( 6313), INT16_C( 15786),
|
||||
-INT16_C( 10745), -INT16_C( 13330), -INT16_C( 14605), -INT16_C( 18324), -INT16_C( 18825), INT16_C( 12286), INT16_C( 25661), -INT16_C( 11480),
|
||||
INT16_C( 11396), INT16_C( 12074), -INT16_C( 23467), INT16_C( 15066), INT16_C( 26320), INT16_C( 10227), -INT16_C( 25011), INT16_C( 21604) },
|
||||
UINT8_C(116),
|
||||
{ INT16_C( 8165), -INT16_C( 20180), INT16_C( 7620), -INT16_C( 24104), -INT16_C( 20027), INT16_C( 17738), -INT16_C( 1690), INT16_C( 17738),
|
||||
INT16_C( 8342), INT16_C( 22020), INT16_C( 10666), -INT16_C( 21638), INT16_C( 11237), -INT16_C( 18036), INT16_C( 15786), -INT16_C( 18036),
|
||||
-INT16_C( 10745), -INT16_C( 13330), -INT16_C( 14605), -INT16_C( 18324), -INT16_C( 18825), INT16_C( 12286), -INT16_C( 11480), INT16_C( 12286),
|
||||
INT16_C( 11396), INT16_C( 12074), -INT16_C( 23467), INT16_C( 15066), INT16_C( 26320), INT16_C( 10227), INT16_C( 21604), INT16_C( 10227) } },
|
||||
{ { -INT16_C( 29927), -INT16_C( 28384), INT16_C( 7745), INT16_C( 32448), -INT16_C( 5757), INT16_C( 1874), INT16_C( 31765), INT16_C( 27446),
|
||||
INT16_C( 4128), -INT16_C( 3931), -INT16_C( 26250), -INT16_C( 15336), INT16_C( 31799), -INT16_C( 21736), INT16_C( 14543), -INT16_C( 5869),
|
||||
INT16_C( 13507), INT16_C( 1402), INT16_C( 14930), -INT16_C( 10877), -INT16_C( 10973), INT16_C( 14813), INT16_C( 4945), INT16_C( 29348),
|
||||
INT16_C( 18724), -INT16_C( 26014), INT16_C( 31458), INT16_C( 6494), INT16_C( 30711), -INT16_C( 14651), -INT16_C( 10065), INT16_C( 29359) },
|
||||
UINT8_C( 12),
|
||||
{ -INT16_C( 29927), -INT16_C( 28384), INT16_C( 7745), INT16_C( 32448), -INT16_C( 5757), INT16_C( 27446), -INT16_C( 5757), -INT16_C( 5757),
|
||||
INT16_C( 4128), -INT16_C( 3931), -INT16_C( 26250), -INT16_C( 15336), INT16_C( 31799), -INT16_C( 5869), INT16_C( 31799), INT16_C( 31799),
|
||||
INT16_C( 13507), INT16_C( 1402), INT16_C( 14930), -INT16_C( 10877), -INT16_C( 10973), INT16_C( 29348), -INT16_C( 10973), -INT16_C( 10973),
|
||||
INT16_C( 18724), -INT16_C( 26014), INT16_C( 31458), INT16_C( 6494), INT16_C( 30711), INT16_C( 29359), INT16_C( 30711), INT16_C( 30711) } },
|
||||
{ { -INT16_C( 1180), -INT16_C( 30924), INT16_C( 4560), INT16_C( 8896), INT16_C( 25637), INT16_C( 18836), -INT16_C( 2386), -INT16_C( 28445),
|
||||
INT16_C( 17009), INT16_C( 26794), INT16_C( 28601), INT16_C( 26670), -INT16_C( 8633), INT16_C( 21722), INT16_C( 20999), INT16_C( 27571),
|
||||
-INT16_C( 6323), INT16_C( 7667), -INT16_C( 19463), INT16_C( 7743), -INT16_C( 11496), -INT16_C( 14745), INT16_C( 19146), INT16_C( 15190),
|
||||
INT16_C( 140), INT16_C( 17827), -INT16_C( 11921), -INT16_C( 18515), -INT16_C( 30545), -INT16_C( 18677), -INT16_C( 16678), INT16_C( 10018) },
|
||||
UINT8_C(165),
|
||||
{ -INT16_C( 1180), -INT16_C( 30924), INT16_C( 4560), INT16_C( 8896), INT16_C( 18836), INT16_C( 18836), -INT16_C( 2386), -INT16_C( 2386),
|
||||
INT16_C( 17009), INT16_C( 26794), INT16_C( 28601), INT16_C( 26670), INT16_C( 21722), INT16_C( 21722), INT16_C( 20999), INT16_C( 20999),
|
||||
-INT16_C( 6323), INT16_C( 7667), -INT16_C( 19463), INT16_C( 7743), -INT16_C( 14745), -INT16_C( 14745), INT16_C( 19146), INT16_C( 19146),
|
||||
INT16_C( 140), INT16_C( 17827), -INT16_C( 11921), -INT16_C( 18515), -INT16_C( 18677), -INT16_C( 18677), -INT16_C( 16678), -INT16_C( 16678) } },
|
||||
{ { -INT16_C( 31543), -INT16_C( 7748), INT16_C( 9047), INT16_C( 8615), -INT16_C( 658), -INT16_C( 1444), -INT16_C( 2), INT16_C( 27968),
|
||||
-INT16_C( 4655), -INT16_C( 32732), INT16_C( 12149), INT16_C( 20279), INT16_C( 23277), -INT16_C( 27786), -INT16_C( 17553), INT16_C( 14385),
|
||||
-INT16_C( 4545), -INT16_C( 27111), -INT16_C( 16367), INT16_C( 32696), INT16_C( 5310), -INT16_C( 17286), -INT16_C( 17900), -INT16_C( 6871),
|
||||
INT16_C( 20135), INT16_C( 7525), -INT16_C( 25219), INT16_C( 27500), -INT16_C( 7177), INT16_C( 26366), INT16_C( 12190), -INT16_C( 8801) },
|
||||
UINT8_C( 29),
|
||||
{ -INT16_C( 31543), -INT16_C( 7748), INT16_C( 9047), INT16_C( 8615), -INT16_C( 1444), INT16_C( 27968), -INT16_C( 1444), -INT16_C( 658),
|
||||
-INT16_C( 4655), -INT16_C( 32732), INT16_C( 12149), INT16_C( 20279), -INT16_C( 27786), INT16_C( 14385), -INT16_C( 27786), INT16_C( 23277),
|
||||
-INT16_C( 4545), -INT16_C( 27111), -INT16_C( 16367), INT16_C( 32696), -INT16_C( 17286), -INT16_C( 6871), -INT16_C( 17286), INT16_C( 5310),
|
||||
INT16_C( 20135), INT16_C( 7525), -INT16_C( 25219), INT16_C( 27500), INT16_C( 26366), -INT16_C( 8801), INT16_C( 26366), -INT16_C( 7177) } },
|
||||
{ { INT16_C( 11129), INT16_C( 14254), INT16_C( 10304), INT16_C( 21747), INT16_C( 7394), -INT16_C( 30151), -INT16_C( 24982), -INT16_C( 5977),
|
||||
INT16_C( 4923), INT16_C( 12883), INT16_C( 20982), -INT16_C( 27495), INT16_C( 14464), -INT16_C( 24975), -INT16_C( 6672), INT16_C( 27085),
|
||||
INT16_C( 31504), INT16_C( 20640), -INT16_C( 27740), -INT16_C( 31068), -INT16_C( 8784), INT16_C( 6672), -INT16_C( 18564), -INT16_C( 18686),
|
||||
INT16_C( 21963), -INT16_C( 15894), -INT16_C( 31834), INT16_C( 10070), -INT16_C( 14405), -INT16_C( 21563), -INT16_C( 27988), -INT16_C( 17131) },
|
||||
UINT8_C( 13),
|
||||
{ INT16_C( 11129), INT16_C( 14254), INT16_C( 10304), INT16_C( 21747), -INT16_C( 30151), -INT16_C( 5977), INT16_C( 7394), INT16_C( 7394),
|
||||
INT16_C( 4923), INT16_C( 12883), INT16_C( 20982), -INT16_C( 27495), -INT16_C( 24975), INT16_C( 27085), INT16_C( 14464), INT16_C( 14464),
|
||||
INT16_C( 31504), INT16_C( 20640), -INT16_C( 27740), -INT16_C( 31068), INT16_C( 6672), -INT16_C( 18686), -INT16_C( 8784), -INT16_C( 8784),
|
||||
INT16_C( 21963), -INT16_C( 15894), -INT16_C( 31834), INT16_C( 10070), -INT16_C( 21563), -INT16_C( 17131), -INT16_C( 14405), -INT16_C( 14405) } },
|
||||
{ { -INT16_C( 19895), -INT16_C( 1736), INT16_C( 18575), INT16_C( 2835), INT16_C( 5632), -INT16_C( 13373), -INT16_C( 21141), INT16_C( 4748),
|
||||
-INT16_C( 7632), -INT16_C( 5319), -INT16_C( 342), INT16_C( 22166), -INT16_C( 21616), -INT16_C( 25325), INT16_C( 8545), -INT16_C( 21937),
|
||||
-INT16_C( 30765), INT16_C( 25251), -INT16_C( 18737), -INT16_C( 12434), INT16_C( 12748), INT16_C( 14490), INT16_C( 10206), INT16_C( 3658),
|
||||
-INT16_C( 31991), -INT16_C( 19463), -INT16_C( 28799), INT16_C( 4362), INT16_C( 7483), -INT16_C( 25426), -INT16_C( 706), INT16_C( 4422) },
|
||||
UINT8_C(132),
|
||||
{ -INT16_C( 19895), -INT16_C( 1736), INT16_C( 18575), INT16_C( 2835), INT16_C( 5632), -INT16_C( 13373), INT16_C( 5632), -INT16_C( 21141),
|
||||
-INT16_C( 7632), -INT16_C( 5319), -INT16_C( 342), INT16_C( 22166), -INT16_C( 21616), -INT16_C( 25325), -INT16_C( 21616), INT16_C( 8545),
|
||||
-INT16_C( 30765), INT16_C( 25251), -INT16_C( 18737), -INT16_C( 12434), INT16_C( 12748), INT16_C( 14490), INT16_C( 12748), INT16_C( 10206),
|
||||
-INT16_C( 31991), -INT16_C( 19463), -INT16_C( 28799), INT16_C( 4362), INT16_C( 7483), -INT16_C( 25426), INT16_C( 7483), -INT16_C( 706) } },
|
||||
{ { -INT16_C( 7521), INT16_C( 27683), -INT16_C( 16877), -INT16_C( 3676), -INT16_C( 4379), -INT16_C( 4353), -INT16_C( 1935), -INT16_C( 3422),
|
||||
-INT16_C( 21369), -INT16_C( 15869), -INT16_C( 20023), INT16_C( 2142), -INT16_C( 23377), INT16_C( 13081), -INT16_C( 29299), INT16_C( 11655),
|
||||
-INT16_C( 21649), -INT16_C( 32103), INT16_C( 15721), INT16_C( 20083), INT16_C( 29227), -INT16_C( 25540), -INT16_C( 8598), -INT16_C( 3442),
|
||||
-INT16_C( 28278), INT16_C( 21684), INT16_C( 4930), -INT16_C( 3748), INT16_C( 30135), INT16_C( 17701), -INT16_C( 21501), INT16_C( 29298) },
|
||||
UINT8_C( 87),
|
||||
{ -INT16_C( 7521), INT16_C( 27683), -INT16_C( 16877), -INT16_C( 3676), -INT16_C( 3422), -INT16_C( 4353), -INT16_C( 4353), -INT16_C( 4353),
|
||||
-INT16_C( 21369), -INT16_C( 15869), -INT16_C( 20023), INT16_C( 2142), INT16_C( 11655), INT16_C( 13081), INT16_C( 13081), INT16_C( 13081),
|
||||
-INT16_C( 21649), -INT16_C( 32103), INT16_C( 15721), INT16_C( 20083), -INT16_C( 3442), -INT16_C( 25540), -INT16_C( 25540), -INT16_C( 25540),
|
||||
-INT16_C( 28278), INT16_C( 21684), INT16_C( 4930), -INT16_C( 3748), INT16_C( 29298), INT16_C( 17701), INT16_C( 17701), INT16_C( 17701) } },
|
||||
{ { INT16_C( 26696), INT16_C( 29454), INT16_C( 19419), INT16_C( 17679), -INT16_C( 25303), -INT16_C( 19401), -INT16_C( 5074), INT16_C( 28680),
|
||||
INT16_C( 25855), -INT16_C( 18846), -INT16_C( 30759), -INT16_C( 8965), INT16_C( 27955), -INT16_C( 29873), INT16_C( 17528), -INT16_C( 16309),
|
||||
INT16_C( 23212), -INT16_C( 30925), INT16_C( 17061), -INT16_C( 12595), INT16_C( 1247), INT16_C( 3458), -INT16_C( 29968), -INT16_C( 4226),
|
||||
-INT16_C( 7954), -INT16_C( 14170), -INT16_C( 24217), -INT16_C( 25948), -INT16_C( 3313), -INT16_C( 30939), INT16_C( 28983), -INT16_C( 7096) },
|
||||
UINT8_C(203),
|
||||
{ INT16_C( 26696), INT16_C( 29454), INT16_C( 19419), INT16_C( 17679), INT16_C( 28680), -INT16_C( 5074), -INT16_C( 25303), INT16_C( 28680),
|
||||
INT16_C( 25855), -INT16_C( 18846), -INT16_C( 30759), -INT16_C( 8965), -INT16_C( 16309), INT16_C( 17528), INT16_C( 27955), -INT16_C( 16309),
|
||||
INT16_C( 23212), -INT16_C( 30925), INT16_C( 17061), -INT16_C( 12595), -INT16_C( 4226), -INT16_C( 29968), INT16_C( 1247), -INT16_C( 4226),
|
||||
-INT16_C( 7954), -INT16_C( 14170), -INT16_C( 24217), -INT16_C( 25948), -INT16_C( 7096), INT16_C( 28983), -INT16_C( 3313), -INT16_C( 7096) } },
|
||||
};
|
||||
|
||||
for (size_t i = 0 ; i < (sizeof(test_vec) / sizeof(test_vec[0])); i++) {
|
||||
simde__m512i r, a = simde_mm512_loadu_epi16(test_vec[i].a);
|
||||
SIMDE_CONSTIFY_256_(simde_mm512_shufflehi_epi16, r, (HEDLEY_UNREACHABLE(), a), test_vec[i].imm8, a);
|
||||
simde_test_x86_assert_equal_i16x32(r, simde_mm512_loadu_epi16(test_vec[i].r));
|
||||
}
|
||||
|
||||
return 0;
|
||||
#else
|
||||
fputc('\n', stdout);
|
||||
|
||||
for (int i = 0; i < 8; i++) {
|
||||
simde__m512i r, a = simde_test_x86_random_i16x32();
|
||||
uint8_t imm8 = simde_test_codegen_random_u32() & 255;
|
||||
SIMDE_CONSTIFY_256_(simde_mm512_shufflehi_epi16, r, (HEDLEY_UNREACHABLE(), a), imm8, a);
|
||||
|
||||
simde_test_x86_write_i16x32(2, a, SIMDE_TEST_VEC_POS_FIRST);
|
||||
simde_test_codegen_write_u8(2, imm8, SIMDE_TEST_VEC_POS_MIDDLE);
|
||||
simde_test_x86_write_i16x32(2, r, SIMDE_TEST_VEC_POS_LAST);
|
||||
}
|
||||
return 1;
|
||||
#endif
|
||||
}
|
||||
|
||||
static int
|
||||
test_simde_mm512_shufflelo_epi16(SIMDE_MUNIT_TEST_ARGS) {
|
||||
#if 1
|
||||
const struct {
|
||||
int16_t a[32];
|
||||
uint8_t imm8;
|
||||
int16_t r[32];
|
||||
} test_vec[8] = {
|
||||
{ { -INT16_C( 12781), -INT16_C( 20526), -INT16_C( 10139), INT16_C( 345), INT16_C( 21680), -INT16_C( 7148), -INT16_C( 18740), -INT16_C( 19412),
|
||||
INT16_C( 26293), INT16_C( 16008), -INT16_C( 16095), INT16_C( 29651), -INT16_C( 29408), -INT16_C( 2020), INT16_C( 23419), -INT16_C( 29007),
|
||||
-INT16_C( 31958), -INT16_C( 28867), -INT16_C( 27045), INT16_C( 2960), -INT16_C( 23317), -INT16_C( 18448), INT16_C( 7258), INT16_C( 4204),
|
||||
-INT16_C( 2942), -INT16_C( 23474), INT16_C( 8629), -INT16_C( 10985), INT16_C( 13230), INT16_C( 10957), INT16_C( 32399), -INT16_C( 17992) },
|
||||
UINT8_C( 2),
|
||||
{ -INT16_C( 10139), -INT16_C( 12781), -INT16_C( 12781), -INT16_C( 12781), INT16_C( 21680), -INT16_C( 7148), -INT16_C( 18740), -INT16_C( 19412),
|
||||
-INT16_C( 16095), INT16_C( 26293), INT16_C( 26293), INT16_C( 26293), -INT16_C( 29408), -INT16_C( 2020), INT16_C( 23419), -INT16_C( 29007),
|
||||
-INT16_C( 27045), -INT16_C( 31958), -INT16_C( 31958), -INT16_C( 31958), -INT16_C( 23317), -INT16_C( 18448), INT16_C( 7258), INT16_C( 4204),
|
||||
INT16_C( 8629), -INT16_C( 2942), -INT16_C( 2942), -INT16_C( 2942), INT16_C( 13230), INT16_C( 10957), INT16_C( 32399), -INT16_C( 17992) } },
|
||||
{ { -INT16_C( 10100), INT16_C( 30569), INT16_C( 22909), -INT16_C( 10449), -INT16_C( 25739), -INT16_C( 2073), INT16_C( 13711), INT16_C( 17819),
|
||||
-INT16_C( 19881), INT16_C( 1306), -INT16_C( 5914), INT16_C( 29999), -INT16_C( 6042), INT16_C( 26670), INT16_C( 30430), INT16_C( 27334),
|
||||
INT16_C( 12110), -INT16_C( 13342), INT16_C( 4488), -INT16_C( 605), -INT16_C( 30036), INT16_C( 15348), -INT16_C( 28480), INT16_C( 6016),
|
||||
-INT16_C( 25790), INT16_C( 10268), INT16_C( 19587), -INT16_C( 5731), -INT16_C( 13516), INT16_C( 4690), INT16_C( 6209), -INT16_C( 28548) },
|
||||
UINT8_C( 71),
|
||||
{ -INT16_C( 10449), INT16_C( 30569), -INT16_C( 10100), INT16_C( 30569), -INT16_C( 25739), -INT16_C( 2073), INT16_C( 13711), INT16_C( 17819),
|
||||
INT16_C( 29999), INT16_C( 1306), -INT16_C( 19881), INT16_C( 1306), -INT16_C( 6042), INT16_C( 26670), INT16_C( 30430), INT16_C( 27334),
|
||||
-INT16_C( 605), -INT16_C( 13342), INT16_C( 12110), -INT16_C( 13342), -INT16_C( 30036), INT16_C( 15348), -INT16_C( 28480), INT16_C( 6016),
|
||||
-INT16_C( 5731), INT16_C( 10268), -INT16_C( 25790), INT16_C( 10268), -INT16_C( 13516), INT16_C( 4690), INT16_C( 6209), -INT16_C( 28548) } },
|
||||
{ { -INT16_C( 401), INT16_C( 7116), -INT16_C( 16247), INT16_C( 18775), -INT16_C( 10416), -INT16_C( 27808), INT16_C( 31858), -INT16_C( 2629),
|
||||
INT16_C( 22984), -INT16_C( 801), INT16_C( 12580), INT16_C( 26126), -INT16_C( 29879), -INT16_C( 28426), INT16_C( 20969), INT16_C( 22879),
|
||||
INT16_C( 11088), -INT16_C( 9868), -INT16_C( 13333), INT16_C( 15394), -INT16_C( 32093), INT16_C( 5583), -INT16_C( 29954), -INT16_C( 14581),
|
||||
-INT16_C( 5405), INT16_C( 2243), -INT16_C( 11749), INT16_C( 25710), INT16_C( 25693), INT16_C( 18164), INT16_C( 21429), INT16_C( 1439) },
|
||||
UINT8_C(126),
|
||||
{ -INT16_C( 16247), INT16_C( 18775), INT16_C( 18775), INT16_C( 7116), -INT16_C( 10416), -INT16_C( 27808), INT16_C( 31858), -INT16_C( 2629),
|
||||
INT16_C( 12580), INT16_C( 26126), INT16_C( 26126), -INT16_C( 801), -INT16_C( 29879), -INT16_C( 28426), INT16_C( 20969), INT16_C( 22879),
|
||||
-INT16_C( 13333), INT16_C( 15394), INT16_C( 15394), -INT16_C( 9868), -INT16_C( 32093), INT16_C( 5583), -INT16_C( 29954), -INT16_C( 14581),
|
||||
-INT16_C( 11749), INT16_C( 25710), INT16_C( 25710), INT16_C( 2243), INT16_C( 25693), INT16_C( 18164), INT16_C( 21429), INT16_C( 1439) } },
|
||||
{ { INT16_C( 223), -INT16_C( 32091), INT16_C( 29826), -INT16_C( 32360), -INT16_C( 23553), -INT16_C( 7608), INT16_C( 2957), -INT16_C( 22294),
|
||||
INT16_C( 22749), INT16_C( 14860), INT16_C( 188), INT16_C( 29313), INT16_C( 8275), -INT16_C( 11913), INT16_C( 22068), INT16_C( 5178),
|
||||
-INT16_C( 8106), -INT16_C( 9834), INT16_C( 11860), INT16_C( 21338), -INT16_C( 23855), INT16_C( 24118), INT16_C( 8365), -INT16_C( 29946),
|
||||
INT16_C( 4729), INT16_C( 13765), INT16_C( 17938), INT16_C( 26023), INT16_C( 8039), -INT16_C( 25802), INT16_C( 29045), -INT16_C( 13393) },
|
||||
UINT8_C( 81),
|
||||
{ -INT16_C( 32091), INT16_C( 223), -INT16_C( 32091), -INT16_C( 32091), -INT16_C( 23553), -INT16_C( 7608), INT16_C( 2957), -INT16_C( 22294),
|
||||
INT16_C( 14860), INT16_C( 22749), INT16_C( 14860), INT16_C( 14860), INT16_C( 8275), -INT16_C( 11913), INT16_C( 22068), INT16_C( 5178),
|
||||
-INT16_C( 9834), -INT16_C( 8106), -INT16_C( 9834), -INT16_C( 9834), -INT16_C( 23855), INT16_C( 24118), INT16_C( 8365), -INT16_C( 29946),
|
||||
INT16_C( 13765), INT16_C( 4729), INT16_C( 13765), INT16_C( 13765), INT16_C( 8039), -INT16_C( 25802), INT16_C( 29045), -INT16_C( 13393) } },
|
||||
{ { -INT16_C( 396), INT16_C( 18169), INT16_C( 12192), INT16_C( 20132), -INT16_C( 21681), -INT16_C( 14119), -INT16_C( 24899), -INT16_C( 12034),
|
||||
-INT16_C( 23067), INT16_C( 19509), INT16_C( 27844), INT16_C( 14823), -INT16_C( 26659), INT16_C( 11781), -INT16_C( 22051), INT16_C( 20947),
|
||||
-INT16_C( 13144), INT16_C( 18583), INT16_C( 15611), INT16_C( 19350), INT16_C( 28647), -INT16_C( 23533), INT16_C( 4366), -INT16_C( 3212),
|
||||
-INT16_C( 21833), INT16_C( 31551), INT16_C( 9750), -INT16_C( 3147), -INT16_C( 17731), -INT16_C( 26079), -INT16_C( 2973), INT16_C( 3052) },
|
||||
UINT8_C(193),
|
||||
{ INT16_C( 18169), -INT16_C( 396), -INT16_C( 396), INT16_C( 20132), -INT16_C( 21681), -INT16_C( 14119), -INT16_C( 24899), -INT16_C( 12034),
|
||||
INT16_C( 19509), -INT16_C( 23067), -INT16_C( 23067), INT16_C( 14823), -INT16_C( 26659), INT16_C( 11781), -INT16_C( 22051), INT16_C( 20947),
|
||||
INT16_C( 18583), -INT16_C( 13144), -INT16_C( 13144), INT16_C( 19350), INT16_C( 28647), -INT16_C( 23533), INT16_C( 4366), -INT16_C( 3212),
|
||||
INT16_C( 31551), -INT16_C( 21833), -INT16_C( 21833), -INT16_C( 3147), -INT16_C( 17731), -INT16_C( 26079), -INT16_C( 2973), INT16_C( 3052) } },
|
||||
{ { -INT16_C( 5441), -INT16_C( 23033), INT16_C( 7002), INT16_C( 26699), -INT16_C( 16596), -INT16_C( 7333), -INT16_C( 26007), INT16_C( 32607),
|
||||
INT16_C( 5312), INT16_C( 32370), -INT16_C( 27698), INT16_C( 12568), INT16_C( 1160), INT16_C( 18749), -INT16_C( 28280), INT16_C( 18181),
|
||||
INT16_C( 3451), -INT16_C( 10770), INT16_C( 14632), INT16_C( 21565), -INT16_C( 26376), INT16_C( 25144), -INT16_C( 26830), -INT16_C( 3103),
|
||||
INT16_C( 21675), INT16_C( 31089), -INT16_C( 30233), INT16_C( 28586), -INT16_C( 6258), INT16_C( 5816), -INT16_C( 16776), -INT16_C( 2979) },
|
||||
UINT8_C(203),
|
||||
{ INT16_C( 26699), INT16_C( 7002), -INT16_C( 5441), INT16_C( 26699), -INT16_C( 16596), -INT16_C( 7333), -INT16_C( 26007), INT16_C( 32607),
|
||||
INT16_C( 12568), -INT16_C( 27698), INT16_C( 5312), INT16_C( 12568), INT16_C( 1160), INT16_C( 18749), -INT16_C( 28280), INT16_C( 18181),
|
||||
INT16_C( 21565), INT16_C( 14632), INT16_C( 3451), INT16_C( 21565), -INT16_C( 26376), INT16_C( 25144), -INT16_C( 26830), -INT16_C( 3103),
|
||||
INT16_C( 28586), -INT16_C( 30233), INT16_C( 21675), INT16_C( 28586), -INT16_C( 6258), INT16_C( 5816), -INT16_C( 16776), -INT16_C( 2979) } },
|
||||
{ { INT16_C( 1924), INT16_C( 32071), INT16_C( 32671), -INT16_C( 11553), -INT16_C( 16362), -INT16_C( 15931), INT16_C( 13844), -INT16_C( 966),
|
||||
-INT16_C( 6721), INT16_C( 19819), INT16_C( 9420), INT16_C( 17763), -INT16_C( 15902), -INT16_C( 21191), INT16_C( 524), -INT16_C( 28256),
|
||||
-INT16_C( 6391), -INT16_C( 22258), -INT16_C( 4761), INT16_C( 32123), INT16_C( 16557), -INT16_C( 15809), INT16_C( 31094), INT16_C( 13758),
|
||||
INT16_C( 10590), INT16_C( 11139), -INT16_C( 6579), INT16_C( 12144), -INT16_C( 22105), -INT16_C( 19236), INT16_C( 31915), -INT16_C( 19131) },
|
||||
UINT8_C(100),
|
||||
{ INT16_C( 1924), INT16_C( 32071), INT16_C( 32671), INT16_C( 32071), -INT16_C( 16362), -INT16_C( 15931), INT16_C( 13844), -INT16_C( 966),
|
||||
-INT16_C( 6721), INT16_C( 19819), INT16_C( 9420), INT16_C( 19819), -INT16_C( 15902), -INT16_C( 21191), INT16_C( 524), -INT16_C( 28256),
|
||||
-INT16_C( 6391), -INT16_C( 22258), -INT16_C( 4761), -INT16_C( 22258), INT16_C( 16557), -INT16_C( 15809), INT16_C( 31094), INT16_C( 13758),
|
||||
INT16_C( 10590), INT16_C( 11139), -INT16_C( 6579), INT16_C( 11139), -INT16_C( 22105), -INT16_C( 19236), INT16_C( 31915), -INT16_C( 19131) } },
|
||||
{ { -INT16_C( 9920), -INT16_C( 4792), -INT16_C( 30951), -INT16_C( 28753), INT16_C( 27905), INT16_C( 24516), INT16_C( 18327), -INT16_C( 7030),
|
||||
-INT16_C( 1490), -INT16_C( 10988), -INT16_C( 3933), INT16_C( 20361), -INT16_C( 12691), -INT16_C( 12028), INT16_C( 25121), INT16_C( 24988),
|
||||
-INT16_C( 7109), INT16_C( 21583), -INT16_C( 404), INT16_C( 28131), -INT16_C( 22676), INT16_C( 972), INT16_C( 22511), INT16_C( 7655),
|
||||
-INT16_C( 1199), -INT16_C( 2574), INT16_C( 31980), INT16_C( 22852), INT16_C( 18506), INT16_C( 27690), -INT16_C( 14678), -INT16_C( 6707) },
|
||||
UINT8_C(170),
|
||||
{ -INT16_C( 30951), -INT16_C( 30951), -INT16_C( 30951), -INT16_C( 30951), INT16_C( 27905), INT16_C( 24516), INT16_C( 18327), -INT16_C( 7030),
|
||||
-INT16_C( 3933), -INT16_C( 3933), -INT16_C( 3933), -INT16_C( 3933), -INT16_C( 12691), -INT16_C( 12028), INT16_C( 25121), INT16_C( 24988),
|
||||
-INT16_C( 404), -INT16_C( 404), -INT16_C( 404), -INT16_C( 404), -INT16_C( 22676), INT16_C( 972), INT16_C( 22511), INT16_C( 7655),
|
||||
INT16_C( 31980), INT16_C( 31980), INT16_C( 31980), INT16_C( 31980), INT16_C( 18506), INT16_C( 27690), -INT16_C( 14678), -INT16_C( 6707) } },
|
||||
};
|
||||
|
||||
for (size_t i = 0 ; i < (sizeof(test_vec) / sizeof(test_vec[0])); i++) {
|
||||
simde__m512i r, a = simde_mm512_loadu_epi16(test_vec[i].a);
|
||||
SIMDE_CONSTIFY_256_(simde_mm512_shufflelo_epi16, r, (HEDLEY_UNREACHABLE(), a), test_vec[i].imm8, a);
|
||||
simde_test_x86_assert_equal_i16x32(r, simde_mm512_loadu_epi16(test_vec[i].r));
|
||||
}
|
||||
|
||||
return 0;
|
||||
#else
|
||||
fputc('\n', stdout);
|
||||
|
||||
for (int i = 0; i < 8; i++) {
|
||||
simde__m512i r, a = simde_test_x86_random_i16x32();
|
||||
uint8_t imm8 = simde_test_codegen_random_u32() & 255;
|
||||
SIMDE_CONSTIFY_256_(simde_mm512_shufflelo_epi16, r, (HEDLEY_UNREACHABLE(), a), imm8, a);
|
||||
|
||||
simde_test_x86_write_i16x32(2, a, SIMDE_TEST_VEC_POS_FIRST);
|
||||
simde_test_codegen_write_u8(2, imm8, SIMDE_TEST_VEC_POS_MIDDLE);
|
||||
simde_test_x86_write_i16x32(2, r, SIMDE_TEST_VEC_POS_LAST);
|
||||
}
|
||||
return 1;
|
||||
#endif
|
||||
}
|
||||
|
||||
SIMDE_TEST_FUNC_LIST_BEGIN
|
||||
SIMDE_TEST_FUNC_LIST_ENTRY(mm512_shuffle_epi8)
|
||||
SIMDE_TEST_FUNC_LIST_ENTRY(mm512_mask_shuffle_epi8)
|
||||
SIMDE_TEST_FUNC_LIST_ENTRY(mm512_maskz_shuffle_epi8)
|
||||
|
||||
SIMDE_TEST_FUNC_LIST_ENTRY(mm512_shuffle_epi32)
|
||||
|
||||
SIMDE_TEST_FUNC_LIST_ENTRY(mm256_shuffle_f32x4)
|
||||
SIMDE_TEST_FUNC_LIST_ENTRY(mm256_mask_shuffle_f32x4)
|
||||
SIMDE_TEST_FUNC_LIST_ENTRY(mm256_maskz_shuffle_f32x4)
|
||||
|
|
@ -4120,6 +4534,11 @@ SIMDE_TEST_FUNC_LIST_BEGIN
|
|||
SIMDE_TEST_FUNC_LIST_ENTRY(mm512_maskz_shuffle_i64x2)
|
||||
|
||||
SIMDE_TEST_FUNC_LIST_ENTRY(mm512_shuffle_ps)
|
||||
SIMDE_TEST_FUNC_LIST_ENTRY(mm512_shuffle_pd)
|
||||
|
||||
SIMDE_TEST_FUNC_LIST_ENTRY(mm512_shufflehi_epi16)
|
||||
|
||||
SIMDE_TEST_FUNC_LIST_ENTRY(mm512_shufflelo_epi16)
|
||||
SIMDE_TEST_FUNC_LIST_END
|
||||
|
||||
#include <test/x86/avx512/test-avx512-footer.h>
|
||||
|
|
|
|||
13
thirdparty/simde/test/x86/avx512/slli.c
vendored
13
thirdparty/simde/test/x86/avx512/slli.c
vendored
|
|
@ -237,16 +237,17 @@ test_simde_mm512_slli_epi16 (SIMDE_MUNIT_TEST_ARGS) {
|
|||
};
|
||||
|
||||
for (size_t i = 0 ; i < (sizeof(test_vec) / sizeof(test_vec[0])) ; i++) {
|
||||
simde__m512i a = simde_mm512_loadu_epi16(test_vec[i].a);
|
||||
simde__m512i r0 = simde_mm512_slli_epi16(a, 0);
|
||||
simde__m512i a, r0, r3, r7, r13, r24;
|
||||
a = simde_mm512_loadu_epi16(test_vec[i].a);
|
||||
r0 = simde_mm512_slli_epi16(a, 0);
|
||||
simde_test_x86_assert_equal_i16x32(r0, simde_mm512_loadu_epi16(test_vec[i].r0));
|
||||
simde__m512i r3 = simde_mm512_slli_epi16(a, 3);
|
||||
r3 = simde_mm512_slli_epi16(a, 3);
|
||||
simde_test_x86_assert_equal_i16x32(r3, simde_mm512_loadu_epi16(test_vec[i].r3));
|
||||
simde__m512i r7 = simde_mm512_slli_epi16(a, 7);
|
||||
r7 = simde_mm512_slli_epi16(a, 7);
|
||||
simde_test_x86_assert_equal_i16x32(r7, simde_mm512_loadu_epi16(test_vec[i].r7));
|
||||
simde__m512i r13 = simde_mm512_slli_epi16(a, 13);
|
||||
r13 = simde_mm512_slli_epi16(a, 13);
|
||||
simde_test_x86_assert_equal_i16x32(r13, simde_mm512_loadu_epi16(test_vec[i].r13));
|
||||
simde__m512i r24 = simde_mm512_slli_epi16(a, 24);
|
||||
r24 = simde_mm512_slli_epi16(a, 24);
|
||||
simde_test_x86_assert_equal_i16x32(r24, simde_mm512_loadu_epi16(test_vec[i].r24));
|
||||
}
|
||||
|
||||
|
|
|
|||
146
thirdparty/simde/test/x86/avx512/srai.c
vendored
146
thirdparty/simde/test/x86/avx512/srai.c
vendored
|
|
@ -251,8 +251,154 @@ test_simde_mm512_srai_epi16 (SIMDE_MUNIT_TEST_ARGS) {
|
|||
return 0;
|
||||
}
|
||||
|
||||
static int
|
||||
test_simde_mm512_srai_epi32 (SIMDE_MUNIT_TEST_ARGS) {
|
||||
#if 1
|
||||
static const struct {
|
||||
const int32_t a[16];
|
||||
const int32_t r0[16];
|
||||
const int32_t r3[16];
|
||||
const int32_t r7[16];
|
||||
const int32_t r13[16];
|
||||
const int32_t r24[16];
|
||||
} test_vec[] = {
|
||||
{ { INT32_C( 60427838), -INT32_C( 250573213), INT32_C( 845732724), INT32_C( 1550216741), -INT32_C( 1660388006), INT32_C( 1551569461), -INT32_C( 1480297343), INT32_C( 830423283),
|
||||
-INT32_C( 1321985458), INT32_C( 480461992), INT32_C( 1162808095), -INT32_C( 727599750), INT32_C( 1735502386), INT32_C( 1053093308), INT32_C( 1424328801), INT32_C( 377841096) },
|
||||
{ INT32_C( 60427838), -INT32_C( 250573213), INT32_C( 845732724), INT32_C( 1550216741), -INT32_C( 1660388006), INT32_C( 1551569461), -INT32_C( 1480297343), INT32_C( 830423283),
|
||||
-INT32_C( 1321985458), INT32_C( 480461992), INT32_C( 1162808095), -INT32_C( 727599750), INT32_C( 1735502386), INT32_C( 1053093308), INT32_C( 1424328801), INT32_C( 377841096) },
|
||||
{ INT32_C( 7553479), -INT32_C( 31321652), INT32_C( 105716590), INT32_C( 193777092), -INT32_C( 207548501), INT32_C( 193946182), -INT32_C( 185037168), INT32_C( 103802910),
|
||||
-INT32_C( 165248183), INT32_C( 60057749), INT32_C( 145351011), -INT32_C( 90949969), INT32_C( 216937798), INT32_C( 131636663), INT32_C( 178041100), INT32_C( 47230137) },
|
||||
{ INT32_C( 472092), -INT32_C( 1957604), INT32_C( 6607286), INT32_C( 12111068), -INT32_C( 12971782), INT32_C( 12121636), -INT32_C( 11564823), INT32_C( 6487681),
|
||||
-INT32_C( 10328012), INT32_C( 3753609), INT32_C( 9084438), -INT32_C( 5684374), INT32_C( 13558612), INT32_C( 8227291), INT32_C( 11127568), INT32_C( 2951883) },
|
||||
{ INT32_C( 7376), -INT32_C( 30588), INT32_C( 103238), INT32_C( 189235), -INT32_C( 202685), INT32_C( 189400), -INT32_C( 180701), INT32_C( 101370),
|
||||
-INT32_C( 161376), INT32_C( 58650), INT32_C( 141944), -INT32_C( 88819), INT32_C( 211853), INT32_C( 128551), INT32_C( 173868), INT32_C( 46123) },
|
||||
{ INT32_C( 3), -INT32_C( 15), INT32_C( 50), INT32_C( 92), -INT32_C( 99), INT32_C( 92), -INT32_C( 89), INT32_C( 49),
|
||||
-INT32_C( 79), INT32_C( 28), INT32_C( 69), -INT32_C( 44), INT32_C( 103), INT32_C( 62), INT32_C( 84), INT32_C( 22) } },
|
||||
{ { INT32_C( 667466111), INT32_C( 490957822), -INT32_C( 261975434), INT32_C( 2059666503), INT32_C( 1793144494), -INT32_C( 2069322461), -INT32_C( 153579986), INT32_C( 1913478643),
|
||||
INT32_C( 345625878), -INT32_C( 1238180800), -INT32_C( 1230531473), INT32_C( 1177578392), -INT32_C( 995028319), -INT32_C( 448243273), -INT32_C( 623107865), -INT32_C( 1806898819) },
|
||||
{ INT32_C( 667466111), INT32_C( 490957822), -INT32_C( 261975434), INT32_C( 2059666503), INT32_C( 1793144494), -INT32_C( 2069322461), -INT32_C( 153579986), INT32_C( 1913478643),
|
||||
INT32_C( 345625878), -INT32_C( 1238180800), -INT32_C( 1230531473), INT32_C( 1177578392), -INT32_C( 995028319), -INT32_C( 448243273), -INT32_C( 623107865), -INT32_C( 1806898819) },
|
||||
{ INT32_C( 83433263), INT32_C( 61369727), -INT32_C( 32746930), INT32_C( 257458312), INT32_C( 224143061), -INT32_C( 258665308), -INT32_C( 19197499), INT32_C( 239184830),
|
||||
INT32_C( 43203234), -INT32_C( 154772600), -INT32_C( 153816435), INT32_C( 147197299), -INT32_C( 124378540), -INT32_C( 56030410), -INT32_C( 77888484), -INT32_C( 225862353) },
|
||||
{ INT32_C( 5214578), INT32_C( 3835607), -INT32_C( 2046684), INT32_C( 16091144), INT32_C( 14008941), -INT32_C( 16166582), -INT32_C( 1199844), INT32_C( 14949051),
|
||||
INT32_C( 2700202), -INT32_C( 9673288), -INT32_C( 9613528), INT32_C( 9199831), -INT32_C( 7773659), -INT32_C( 3501901), -INT32_C( 4868031), -INT32_C( 14116398) },
|
||||
{ INT32_C( 81477), INT32_C( 59931), -INT32_C( 31980), INT32_C( 251424), INT32_C( 218889), -INT32_C( 252603), -INT32_C( 18748), INT32_C( 233578),
|
||||
INT32_C( 42190), -INT32_C( 151146), -INT32_C( 150212), INT32_C( 143747), -INT32_C( 121464), -INT32_C( 54718), -INT32_C( 76063), -INT32_C( 220569) },
|
||||
{ INT32_C( 39), INT32_C( 29), -INT32_C( 16), INT32_C( 122), INT32_C( 106), -INT32_C( 124), -INT32_C( 10), INT32_C( 114),
|
||||
INT32_C( 20), -INT32_C( 74), -INT32_C( 74), INT32_C( 70), -INT32_C( 60), -INT32_C( 27), -INT32_C( 38), -INT32_C( 108) } },
|
||||
{ { -INT32_C( 22485570), INT32_C( 833936066), INT32_C( 132602735), INT32_C( 1749948615), -INT32_C( 517079254), INT32_C( 1086813528), INT32_C( 320512918), INT32_C( 1252485004),
|
||||
INT32_C( 239620172), -INT32_C( 1723859926), INT32_C( 530655064), INT32_C( 1770516287), INT32_C( 1179301102), -INT32_C( 1064955606), INT32_C( 1087611316), INT32_C( 1418361608) },
|
||||
{ -INT32_C( 22485570), INT32_C( 833936066), INT32_C( 132602735), INT32_C( 1749948615), -INT32_C( 517079254), INT32_C( 1086813528), INT32_C( 320512918), INT32_C( 1252485004),
|
||||
INT32_C( 239620172), -INT32_C( 1723859926), INT32_C( 530655064), INT32_C( 1770516287), INT32_C( 1179301102), -INT32_C( 1064955606), INT32_C( 1087611316), INT32_C( 1418361608) },
|
||||
{ -INT32_C( 2810697), INT32_C( 104242008), INT32_C( 16575341), INT32_C( 218743576), -INT32_C( 64634907), INT32_C( 135851691), INT32_C( 40064114), INT32_C( 156560625),
|
||||
INT32_C( 29952521), -INT32_C( 215482491), INT32_C( 66331883), INT32_C( 221314535), INT32_C( 147412637), -INT32_C( 133119451), INT32_C( 135951414), INT32_C( 177295201) },
|
||||
{ -INT32_C( 175669), INT32_C( 6515125), INT32_C( 1035958), INT32_C( 13671473), -INT32_C( 4039682), INT32_C( 8490730), INT32_C( 2504007), INT32_C( 9785039),
|
||||
INT32_C( 1872032), -INT32_C( 13467656), INT32_C( 4145742), INT32_C( 13832158), INT32_C( 9213289), -INT32_C( 8319966), INT32_C( 8496963), INT32_C( 11080950) },
|
||||
{ -INT32_C( 2745), INT32_C( 101798), INT32_C( 16186), INT32_C( 213616), -INT32_C( 63121), INT32_C( 132667), INT32_C( 39125), INT32_C( 152891),
|
||||
INT32_C( 29250), -INT32_C( 210433), INT32_C( 64777), INT32_C( 216127), INT32_C( 143957), -INT32_C( 130000), INT32_C( 132765), INT32_C( 173139) },
|
||||
{ -INT32_C( 2), INT32_C( 49), INT32_C( 7), INT32_C( 104), -INT32_C( 31), INT32_C( 64), INT32_C( 19), INT32_C( 74),
|
||||
INT32_C( 14), -INT32_C( 103), INT32_C( 31), INT32_C( 105), INT32_C( 70), -INT32_C( 64), INT32_C( 64), INT32_C( 84) } },
|
||||
{ { -INT32_C( 178007349), INT32_C( 663724751), INT32_C( 138817737), INT32_C( 225561887), -INT32_C( 1403798398), -INT32_C( 2106795315), -INT32_C( 2084421765), -INT32_C( 2049487430),
|
||||
-INT32_C( 293914081), -INT32_C( 1508570403), INT32_C( 1504664378), -INT32_C( 1419370455), -INT32_C( 1437091364), INT32_C( 237814675), -INT32_C( 1114509822), INT32_C( 1531078971) },
|
||||
{ -INT32_C( 178007349), INT32_C( 663724751), INT32_C( 138817737), INT32_C( 225561887), -INT32_C( 1403798398), -INT32_C( 2106795315), -INT32_C( 2084421765), -INT32_C( 2049487430),
|
||||
-INT32_C( 293914081), -INT32_C( 1508570403), INT32_C( 1504664378), -INT32_C( 1419370455), -INT32_C( 1437091364), INT32_C( 237814675), -INT32_C( 1114509822), INT32_C( 1531078971) },
|
||||
{ -INT32_C( 22250919), INT32_C( 82965593), INT32_C( 17352217), INT32_C( 28195235), -INT32_C( 175474800), -INT32_C( 263349415), -INT32_C( 260552721), -INT32_C( 256185929),
|
||||
-INT32_C( 36739261), -INT32_C( 188571301), INT32_C( 188083047), -INT32_C( 177421307), -INT32_C( 179636421), INT32_C( 29726834), -INT32_C( 139313728), INT32_C( 191384871) },
|
||||
{ -INT32_C( 1390683), INT32_C( 5185349), INT32_C( 1084513), INT32_C( 1762202), -INT32_C( 10967175), -INT32_C( 16459339), -INT32_C( 16284546), -INT32_C( 16011621),
|
||||
-INT32_C( 2296204), -INT32_C( 11785707), INT32_C( 11755190), -INT32_C( 11088832), -INT32_C( 11227277), INT32_C( 1857927), -INT32_C( 8707108), INT32_C( 11961554) },
|
||||
{ -INT32_C( 21730), INT32_C( 81021), INT32_C( 16945), INT32_C( 27534), -INT32_C( 171363), -INT32_C( 257178), -INT32_C( 254447), -INT32_C( 250182),
|
||||
-INT32_C( 35879), -INT32_C( 184152), INT32_C( 183674), -INT32_C( 173263), -INT32_C( 175427), INT32_C( 29030), -INT32_C( 136049), INT32_C( 186899) },
|
||||
{ -INT32_C( 11), INT32_C( 39), INT32_C( 8), INT32_C( 13), -INT32_C( 84), -INT32_C( 126), -INT32_C( 125), -INT32_C( 123),
|
||||
-INT32_C( 18), -INT32_C( 90), INT32_C( 89), -INT32_C( 85), -INT32_C( 86), INT32_C( 14), -INT32_C( 67), INT32_C( 91) } },
|
||||
{ { -INT32_C( 2142650973), INT32_C( 19357639), -INT32_C( 480586054), -INT32_C( 745619210), INT32_C( 226354554), -INT32_C( 1424184920), -INT32_C( 748114537), -INT32_C( 1171346922),
|
||||
INT32_C( 792360808), -INT32_C( 1859034666), INT32_C( 779389751), -INT32_C( 973012148), -INT32_C( 1848410392), -INT32_C( 1103302873), -INT32_C( 1282300771), -INT32_C( 1234321586) },
|
||||
{ -INT32_C( 2142650973), INT32_C( 19357639), -INT32_C( 480586054), -INT32_C( 745619210), INT32_C( 226354554), -INT32_C( 1424184920), -INT32_C( 748114537), -INT32_C( 1171346922),
|
||||
INT32_C( 792360808), -INT32_C( 1859034666), INT32_C( 779389751), -INT32_C( 973012148), -INT32_C( 1848410392), -INT32_C( 1103302873), -INT32_C( 1282300771), -INT32_C( 1234321586) },
|
||||
{ -INT32_C( 267831372), INT32_C( 2419704), -INT32_C( 60073257), -INT32_C( 93202402), INT32_C( 28294319), -INT32_C( 178023115), -INT32_C( 93514318), -INT32_C( 146418366),
|
||||
INT32_C( 99045101), -INT32_C( 232379334), INT32_C( 97423718), -INT32_C( 121626519), -INT32_C( 231051299), -INT32_C( 137912860), -INT32_C( 160287597), -INT32_C( 154290199) },
|
||||
{ -INT32_C( 16739461), INT32_C( 151231), -INT32_C( 3754579), -INT32_C( 5825151), INT32_C( 1768394), -INT32_C( 11126445), -INT32_C( 5844645), -INT32_C( 9151148),
|
||||
INT32_C( 6190318), -INT32_C( 14523709), INT32_C( 6088982), -INT32_C( 7601658), -INT32_C( 14440707), -INT32_C( 8619554), -INT32_C( 10017975), -INT32_C( 9643138) },
|
||||
{ -INT32_C( 261555), INT32_C( 2362), -INT32_C( 58666), -INT32_C( 91018), INT32_C( 27631), -INT32_C( 173851), -INT32_C( 91323), -INT32_C( 142987),
|
||||
INT32_C( 96723), -INT32_C( 226933), INT32_C( 95140), -INT32_C( 118776), -INT32_C( 225637), -INT32_C( 134681), -INT32_C( 156531), -INT32_C( 150675) },
|
||||
{ -INT32_C( 128), INT32_C( 1), -INT32_C( 29), -INT32_C( 45), INT32_C( 13), -INT32_C( 85), -INT32_C( 45), -INT32_C( 70),
|
||||
INT32_C( 47), -INT32_C( 111), INT32_C( 46), -INT32_C( 58), -INT32_C( 111), -INT32_C( 66), -INT32_C( 77), -INT32_C( 74) } },
|
||||
{ { INT32_C( 233220151), INT32_C( 1100879625), -INT32_C( 294710366), -INT32_C( 21729258), INT32_C( 361728238), INT32_C( 349424503), -INT32_C( 1094163089), INT32_C( 1534342436),
|
||||
-INT32_C( 412525859), INT32_C( 338167665), INT32_C( 805476122), -INT32_C( 181422329), -INT32_C( 1240809921), -INT32_C( 104079990), INT32_C( 1740084034), -INT32_C( 1497223992) },
|
||||
{ INT32_C( 233220151), INT32_C( 1100879625), -INT32_C( 294710366), -INT32_C( 21729258), INT32_C( 361728238), INT32_C( 349424503), -INT32_C( 1094163089), INT32_C( 1534342436),
|
||||
-INT32_C( 412525859), INT32_C( 338167665), INT32_C( 805476122), -INT32_C( 181422329), -INT32_C( 1240809921), -INT32_C( 104079990), INT32_C( 1740084034), -INT32_C( 1497223992) },
|
||||
{ INT32_C( 29152518), INT32_C( 137609953), -INT32_C( 36838796), -INT32_C( 2716158), INT32_C( 45216029), INT32_C( 43678062), -INT32_C( 136770387), INT32_C( 191792804),
|
||||
-INT32_C( 51565733), INT32_C( 42270958), INT32_C( 100684515), -INT32_C( 22677792), -INT32_C( 155101241), -INT32_C( 13009999), INT32_C( 217510504), -INT32_C( 187152999) },
|
||||
{ INT32_C( 1822032), INT32_C( 8600622), -INT32_C( 2302425), -INT32_C( 169760), INT32_C( 2826001), INT32_C( 2729878), -INT32_C( 8548150), INT32_C( 11987050),
|
||||
-INT32_C( 3222859), INT32_C( 2641934), INT32_C( 6292782), -INT32_C( 1417362), -INT32_C( 9693828), -INT32_C( 813125), INT32_C( 13594406), -INT32_C( 11697063) },
|
||||
{ INT32_C( 28469), INT32_C( 134384), -INT32_C( 35976), -INT32_C( 2653), INT32_C( 44156), INT32_C( 42654), -INT32_C( 133565), INT32_C( 187297),
|
||||
-INT32_C( 50358), INT32_C( 41280), INT32_C( 98324), -INT32_C( 22147), -INT32_C( 151467), -INT32_C( 12706), INT32_C( 212412), -INT32_C( 182767) },
|
||||
{ INT32_C( 13), INT32_C( 65), -INT32_C( 18), -INT32_C( 2), INT32_C( 21), INT32_C( 20), -INT32_C( 66), INT32_C( 91),
|
||||
-INT32_C( 25), INT32_C( 20), INT32_C( 48), -INT32_C( 11), -INT32_C( 74), -INT32_C( 7), INT32_C( 103), -INT32_C( 90) } },
|
||||
{ { -INT32_C( 124966010), INT32_C( 1292678451), INT32_C( 1400770124), INT32_C( 71871941), -INT32_C( 172273045), INT32_C( 1928300079), -INT32_C( 505829863), INT32_C( 1502059474),
|
||||
-INT32_C( 95349561), INT32_C( 356998601), INT32_C( 828949867), -INT32_C( 566906766), INT32_C( 852750338), -INT32_C( 1885027722), INT32_C( 997293417), -INT32_C( 543885288) },
|
||||
{ -INT32_C( 124966010), INT32_C( 1292678451), INT32_C( 1400770124), INT32_C( 71871941), -INT32_C( 172273045), INT32_C( 1928300079), -INT32_C( 505829863), INT32_C( 1502059474),
|
||||
-INT32_C( 95349561), INT32_C( 356998601), INT32_C( 828949867), -INT32_C( 566906766), INT32_C( 852750338), -INT32_C( 1885027722), INT32_C( 997293417), -INT32_C( 543885288) },
|
||||
{ -INT32_C( 15620752), INT32_C( 161584806), INT32_C( 175096265), INT32_C( 8983992), -INT32_C( 21534131), INT32_C( 241037509), -INT32_C( 63228733), INT32_C( 187757434),
|
||||
-INT32_C( 11918696), INT32_C( 44624825), INT32_C( 103618733), -INT32_C( 70863346), INT32_C( 106593792), -INT32_C( 235628466), INT32_C( 124661677), -INT32_C( 67985661) },
|
||||
{ -INT32_C( 976297), INT32_C( 10099050), INT32_C( 10943516), INT32_C( 561499), -INT32_C( 1345884), INT32_C( 15064844), -INT32_C( 3951796), INT32_C( 11734839),
|
||||
-INT32_C( 744919), INT32_C( 2789051), INT32_C( 6476170), -INT32_C( 4428960), INT32_C( 6662112), -INT32_C( 14726780), INT32_C( 7791354), -INT32_C( 4249104) },
|
||||
{ -INT32_C( 15255), INT32_C( 157797), INT32_C( 170992), INT32_C( 8773), -INT32_C( 21030), INT32_C( 235388), -INT32_C( 61747), INT32_C( 183356),
|
||||
-INT32_C( 11640), INT32_C( 43578), INT32_C( 101190), -INT32_C( 69203), INT32_C( 104095), -INT32_C( 230106), INT32_C( 121739), -INT32_C( 66393) },
|
||||
{ -INT32_C( 8), INT32_C( 77), INT32_C( 83), INT32_C( 4), -INT32_C( 11), INT32_C( 114), -INT32_C( 31), INT32_C( 89),
|
||||
-INT32_C( 6), INT32_C( 21), INT32_C( 49), -INT32_C( 34), INT32_C( 50), -INT32_C( 113), INT32_C( 59), -INT32_C( 33) } },
|
||||
{ { -INT32_C( 690363123), -INT32_C( 1360256702), INT32_C( 1507808486), INT32_C( 121050117), INT32_C( 2067335685), INT32_C( 906747341), INT32_C( 1936817242), -INT32_C( 2125330828),
|
||||
INT32_C( 777530603), INT32_C( 870073421), -INT32_C( 1651721320), -INT32_C( 727333937), -INT32_C( 1689198898), INT32_C( 382819260), INT32_C( 1267286743), INT32_C( 885906504) },
|
||||
{ -INT32_C( 690363123), -INT32_C( 1360256702), INT32_C( 1507808486), INT32_C( 121050117), INT32_C( 2067335685), INT32_C( 906747341), INT32_C( 1936817242), -INT32_C( 2125330828),
|
||||
INT32_C( 777530603), INT32_C( 870073421), -INT32_C( 1651721320), -INT32_C( 727333937), -INT32_C( 1689198898), INT32_C( 382819260), INT32_C( 1267286743), INT32_C( 885906504) },
|
||||
{ -INT32_C( 86295391), -INT32_C( 170032088), INT32_C( 188476060), INT32_C( 15131264), INT32_C( 258416960), INT32_C( 113343417), INT32_C( 242102155), -INT32_C( 265666354),
|
||||
INT32_C( 97191325), INT32_C( 108759177), -INT32_C( 206465165), -INT32_C( 90916743), -INT32_C( 211149863), INT32_C( 47852407), INT32_C( 158410842), INT32_C( 110738313) },
|
||||
{ -INT32_C( 5393462), -INT32_C( 10627006), INT32_C( 11779753), INT32_C( 945704), INT32_C( 16151060), INT32_C( 7083963), INT32_C( 15131384), -INT32_C( 16604148),
|
||||
INT32_C( 6074457), INT32_C( 6797448), -INT32_C( 12904073), -INT32_C( 5682297), -INT32_C( 13196867), INT32_C( 2990775), INT32_C( 9900677), INT32_C( 6921144) },
|
||||
{ -INT32_C( 84273), -INT32_C( 166047), INT32_C( 184058), INT32_C( 14776), INT32_C( 252360), INT32_C( 110686), INT32_C( 236427), -INT32_C( 259440),
|
||||
INT32_C( 94913), INT32_C( 106210), -INT32_C( 201627), -INT32_C( 88786), -INT32_C( 206202), INT32_C( 46730), INT32_C( 154698), INT32_C( 108142) },
|
||||
{ -INT32_C( 42), -INT32_C( 82), INT32_C( 89), INT32_C( 7), INT32_C( 123), INT32_C( 54), INT32_C( 115), -INT32_C( 127),
|
||||
INT32_C( 46), INT32_C( 51), -INT32_C( 99), -INT32_C( 44), -INT32_C( 101), INT32_C( 22), INT32_C( 75), INT32_C( 52) } },
|
||||
};
|
||||
|
||||
for (size_t i = 0 ; i < (sizeof(test_vec) / sizeof(test_vec[0])) ; i++) {
|
||||
simde__m512i a = simde_mm512_loadu_epi32(test_vec[i].a);
|
||||
simde__m512i r0 = simde_mm512_srai_epi32(a, 0);
|
||||
simde__m512i r3 = simde_mm512_srai_epi32(a, 3);
|
||||
simde__m512i r7 = simde_mm512_srai_epi32(a, 7);
|
||||
simde__m512i r13 = simde_mm512_srai_epi32(a, 13);
|
||||
simde__m512i r24 = simde_mm512_srai_epi32(a, 24);
|
||||
simde_test_x86_assert_equal_i32x16(r0, simde_mm512_loadu_epi32(test_vec[i].r0));
|
||||
simde_test_x86_assert_equal_i32x16(r3, simde_mm512_loadu_epi32(test_vec[i].r3));
|
||||
simde_test_x86_assert_equal_i32x16(r7, simde_mm512_loadu_epi32(test_vec[i].r7));
|
||||
simde_test_x86_assert_equal_i32x16(r13, simde_mm512_loadu_epi32(test_vec[i].r13));
|
||||
simde_test_x86_assert_equal_i32x16(r24, simde_mm512_loadu_epi32(test_vec[i].r24));
|
||||
}
|
||||
|
||||
return 0;
|
||||
#else
|
||||
fputc('\n', stdout);
|
||||
for (int i = 0 ; i < 8 ; i++) {
|
||||
simde__m512i a = simde_test_x86_random_i32x16();
|
||||
simde__m512i r0 = simde_mm512_srai_epi32(a, 0);
|
||||
simde__m512i r3 = simde_mm512_srai_epi32(a, 3);
|
||||
simde__m512i r7 = simde_mm512_srai_epi32(a, 7);
|
||||
simde__m512i r13 = simde_mm512_srai_epi32(a, 13);
|
||||
simde__m512i r24 = simde_mm512_srai_epi32(a, 24);
|
||||
|
||||
simde_test_x86_write_i32x16(2, a, SIMDE_TEST_VEC_POS_FIRST);
|
||||
simde_test_x86_write_i32x16(2, r0, SIMDE_TEST_VEC_POS_MIDDLE);
|
||||
simde_test_x86_write_i32x16(2, r3, SIMDE_TEST_VEC_POS_MIDDLE);
|
||||
simde_test_x86_write_i32x16(2, r7, SIMDE_TEST_VEC_POS_MIDDLE);
|
||||
simde_test_x86_write_i32x16(2, r13, SIMDE_TEST_VEC_POS_MIDDLE);
|
||||
simde_test_x86_write_i32x16(2, r24, SIMDE_TEST_VEC_POS_LAST);
|
||||
}
|
||||
return 1;
|
||||
#endif
|
||||
}
|
||||
|
||||
SIMDE_TEST_FUNC_LIST_BEGIN
|
||||
SIMDE_TEST_FUNC_LIST_ENTRY(mm512_srai_epi16)
|
||||
SIMDE_TEST_FUNC_LIST_ENTRY(mm512_srai_epi32)
|
||||
SIMDE_TEST_FUNC_LIST_END
|
||||
|
||||
#include <test/x86/avx512/test-avx512-footer.h>
|
||||
|
|
|
|||
865
thirdparty/simde/test/x86/avx512/storeu.c
vendored
865
thirdparty/simde/test/x86/avx512/storeu.c
vendored
|
|
@ -29,6 +29,586 @@
|
|||
#include <test/x86/avx512/test-avx512.h>
|
||||
#include <simde/x86/avx512/storeu.h>
|
||||
|
||||
static int
|
||||
test_simde_mm256_storeu_epi8 (SIMDE_MUNIT_TEST_ARGS) {
|
||||
#if 1
|
||||
static const struct {
|
||||
const int8_t a[32];
|
||||
const int8_t r[32];
|
||||
} test_vec[] = {
|
||||
{ { INT8_C( 75), INT8_C( 44), INT8_C( 120), -INT8_C( 77), -INT8_C( 11), -INT8_C( 54), -INT8_C( 120), -INT8_C( 90),
|
||||
INT8_C( 76), -INT8_C( 120), INT8_C( 18), INT8_C( 102), -INT8_C( 27), INT8_C( 105), -INT8_C( 91), -INT8_C( 67),
|
||||
-INT8_C( 127), -INT8_C( 90), -INT8_C( 52), -INT8_C( 1), -INT8_C( 106), INT8_C( 47), -INT8_C( 109), -INT8_C( 117),
|
||||
-INT8_C( 83), -INT8_C( 57), INT8_C( 1), INT8_C( 120), -INT8_C( 46), INT8_C( 84), -INT8_C( 19), INT8_C( 30) },
|
||||
{ INT8_C( 75), INT8_C( 44), INT8_C( 120), -INT8_C( 77), -INT8_C( 11), -INT8_C( 54), -INT8_C( 120), -INT8_C( 90),
|
||||
INT8_C( 76), -INT8_C( 120), INT8_C( 18), INT8_C( 102), -INT8_C( 27), INT8_C( 105), -INT8_C( 91), -INT8_C( 67),
|
||||
-INT8_C( 127), -INT8_C( 90), -INT8_C( 52), -INT8_C( 1), -INT8_C( 106), INT8_C( 47), -INT8_C( 109), -INT8_C( 117),
|
||||
-INT8_C( 83), -INT8_C( 57), INT8_C( 1), INT8_C( 120), -INT8_C( 46), INT8_C( 84), -INT8_C( 19), INT8_C( 30) } },
|
||||
{ { INT8_MIN, INT8_C( 101), -INT8_C( 47), INT8_C( 117), INT8_C( 47), INT8_C( 90), INT8_C( 28), INT8_C( 124),
|
||||
-INT8_C( 30), INT8_C( 46), -INT8_C( 30), -INT8_C( 57), -INT8_C( 105), -INT8_C( 121), -INT8_C( 124), INT8_C( 25),
|
||||
INT8_C( 45), INT8_C( 80), INT8_C( 24), -INT8_C( 61), INT8_MAX, -INT8_C( 85), INT8_C( 79), INT8_C( 44),
|
||||
INT8_C( 114), INT8_C( 80), -INT8_C( 92), INT8_C( 69), -INT8_C( 91), -INT8_C( 110), INT8_C( 99), INT8_C( 37) },
|
||||
{ INT8_MIN, INT8_C( 101), -INT8_C( 47), INT8_C( 117), INT8_C( 47), INT8_C( 90), INT8_C( 28), INT8_C( 124),
|
||||
-INT8_C( 30), INT8_C( 46), -INT8_C( 30), -INT8_C( 57), -INT8_C( 105), -INT8_C( 121), -INT8_C( 124), INT8_C( 25),
|
||||
INT8_C( 45), INT8_C( 80), INT8_C( 24), -INT8_C( 61), INT8_MAX, -INT8_C( 85), INT8_C( 79), INT8_C( 44),
|
||||
INT8_C( 114), INT8_C( 80), -INT8_C( 92), INT8_C( 69), -INT8_C( 91), -INT8_C( 110), INT8_C( 99), INT8_C( 37) } },
|
||||
{ { -INT8_C( 9), INT8_C( 52), -INT8_C( 101), INT8_C( 39), -INT8_C( 114), -INT8_C( 73), -INT8_C( 93), INT8_C( 113),
|
||||
-INT8_C( 27), -INT8_C( 123), INT8_C( 56), INT8_C( 124), INT8_C( 13), -INT8_C( 67), -INT8_C( 107), INT8_C( 58),
|
||||
INT8_C( 13), -INT8_C( 82), -INT8_C( 2), -INT8_C( 115), INT8_C( 89), INT8_C( 77), -INT8_C( 71), -INT8_C( 52),
|
||||
-INT8_C( 99), INT8_C( 94), INT8_C( 17), INT8_C( 66), -INT8_C( 16), INT8_C( 116), INT8_C( 104), -INT8_C( 25) },
|
||||
{ -INT8_C( 9), INT8_C( 52), -INT8_C( 101), INT8_C( 39), -INT8_C( 114), -INT8_C( 73), -INT8_C( 93), INT8_C( 113),
|
||||
-INT8_C( 27), -INT8_C( 123), INT8_C( 56), INT8_C( 124), INT8_C( 13), -INT8_C( 67), -INT8_C( 107), INT8_C( 58),
|
||||
INT8_C( 13), -INT8_C( 82), -INT8_C( 2), -INT8_C( 115), INT8_C( 89), INT8_C( 77), -INT8_C( 71), -INT8_C( 52),
|
||||
-INT8_C( 99), INT8_C( 94), INT8_C( 17), INT8_C( 66), -INT8_C( 16), INT8_C( 116), INT8_C( 104), -INT8_C( 25) } },
|
||||
{ { -INT8_C( 88), INT8_C( 3), INT8_C( 14), INT8_C( 55), -INT8_C( 70), -INT8_C( 79), -INT8_C( 88), -INT8_C( 97),
|
||||
INT8_C( 55), -INT8_C( 32), INT8_C( 27), INT8_C( 68), -INT8_C( 99), -INT8_C( 79), INT8_C( 126), -INT8_C( 85),
|
||||
INT8_C( 95), INT8_C( 124), INT8_C( 56), -INT8_C( 72), -INT8_C( 55), -INT8_C( 15), -INT8_C( 124), INT8_C( 103),
|
||||
INT8_C( 79), -INT8_C( 107), -INT8_C( 87), INT8_C( 63), INT8_C( 9), INT8_C( 17), INT8_C( 39), -INT8_C( 78) },
|
||||
{ -INT8_C( 88), INT8_C( 3), INT8_C( 14), INT8_C( 55), -INT8_C( 70), -INT8_C( 79), -INT8_C( 88), -INT8_C( 97),
|
||||
INT8_C( 55), -INT8_C( 32), INT8_C( 27), INT8_C( 68), -INT8_C( 99), -INT8_C( 79), INT8_C( 126), -INT8_C( 85),
|
||||
INT8_C( 95), INT8_C( 124), INT8_C( 56), -INT8_C( 72), -INT8_C( 55), -INT8_C( 15), -INT8_C( 124), INT8_C( 103),
|
||||
INT8_C( 79), -INT8_C( 107), -INT8_C( 87), INT8_C( 63), INT8_C( 9), INT8_C( 17), INT8_C( 39), -INT8_C( 78) } },
|
||||
{ { INT8_C( 20), INT8_C( 53), -INT8_C( 23), -INT8_C( 50), -INT8_C( 25), -INT8_C( 111), INT8_C( 109), INT8_C( 30),
|
||||
INT8_C( 113), -INT8_C( 119), INT8_C( 98), INT8_C( 15), INT8_C( 58), -INT8_C( 32), -INT8_C( 70), -INT8_C( 103),
|
||||
INT8_C( 93), -INT8_C( 14), INT8_C( 81), INT8_C( 38), -INT8_C( 29), -INT8_C( 42), -INT8_C( 115), INT8_C( 51),
|
||||
INT8_C( 107), INT8_C( 55), INT8_C( 114), INT8_C( 117), INT8_C( 72), -INT8_C( 103), INT8_C( 39), INT8_C( 93) },
|
||||
{ INT8_C( 20), INT8_C( 53), -INT8_C( 23), -INT8_C( 50), -INT8_C( 25), -INT8_C( 111), INT8_C( 109), INT8_C( 30),
|
||||
INT8_C( 113), -INT8_C( 119), INT8_C( 98), INT8_C( 15), INT8_C( 58), -INT8_C( 32), -INT8_C( 70), -INT8_C( 103),
|
||||
INT8_C( 93), -INT8_C( 14), INT8_C( 81), INT8_C( 38), -INT8_C( 29), -INT8_C( 42), -INT8_C( 115), INT8_C( 51),
|
||||
INT8_C( 107), INT8_C( 55), INT8_C( 114), INT8_C( 117), INT8_C( 72), -INT8_C( 103), INT8_C( 39), INT8_C( 93) } },
|
||||
{ { -INT8_C( 49), INT8_C( 16), INT8_C( 43), -INT8_C( 74), -INT8_C( 95), -INT8_C( 103), -INT8_C( 44), INT8_C( 18),
|
||||
INT8_C( 34), INT8_C( 54), INT8_C( 33), INT8_C( 92), INT8_C( 22), -INT8_C( 37), -INT8_C( 11), INT8_C( 115),
|
||||
-INT8_C( 51), INT8_C( 70), -INT8_C( 102), -INT8_C( 79), INT8_C( 28), INT8_C( 39), -INT8_C( 28), -INT8_C( 120),
|
||||
INT8_C( 94), INT8_C( 86), -INT8_C( 3), -INT8_C( 89), -INT8_C( 16), INT8_C( 36), INT8_C( 4), -INT8_C( 65) },
|
||||
{ -INT8_C( 49), INT8_C( 16), INT8_C( 43), -INT8_C( 74), -INT8_C( 95), -INT8_C( 103), -INT8_C( 44), INT8_C( 18),
|
||||
INT8_C( 34), INT8_C( 54), INT8_C( 33), INT8_C( 92), INT8_C( 22), -INT8_C( 37), -INT8_C( 11), INT8_C( 115),
|
||||
-INT8_C( 51), INT8_C( 70), -INT8_C( 102), -INT8_C( 79), INT8_C( 28), INT8_C( 39), -INT8_C( 28), -INT8_C( 120),
|
||||
INT8_C( 94), INT8_C( 86), -INT8_C( 3), -INT8_C( 89), -INT8_C( 16), INT8_C( 36), INT8_C( 4), -INT8_C( 65) } },
|
||||
{ { INT8_C( 52), INT8_C( 47), INT8_C( 117), -INT8_C( 43), -INT8_C( 56), INT8_C( 73), -INT8_C( 25), -INT8_C( 22),
|
||||
INT8_MAX, INT8_C( 9), INT8_C( 70), -INT8_C( 107), -INT8_C( 28), INT8_C( 59), INT8_C( 9), -INT8_C( 78),
|
||||
-INT8_C( 126), -INT8_C( 93), INT8_C( 99), -INT8_C( 98), -INT8_C( 54), INT8_C( 71), INT8_C( 38), INT8_C( 41),
|
||||
-INT8_C( 99), INT8_C( 35), -INT8_C( 48), -INT8_C( 115), INT8_C( 71), -INT8_C( 44), INT8_C( 76), INT8_C( 123) },
|
||||
{ INT8_C( 52), INT8_C( 47), INT8_C( 117), -INT8_C( 43), -INT8_C( 56), INT8_C( 73), -INT8_C( 25), -INT8_C( 22),
|
||||
INT8_MAX, INT8_C( 9), INT8_C( 70), -INT8_C( 107), -INT8_C( 28), INT8_C( 59), INT8_C( 9), -INT8_C( 78),
|
||||
-INT8_C( 126), -INT8_C( 93), INT8_C( 99), -INT8_C( 98), -INT8_C( 54), INT8_C( 71), INT8_C( 38), INT8_C( 41),
|
||||
-INT8_C( 99), INT8_C( 35), -INT8_C( 48), -INT8_C( 115), INT8_C( 71), -INT8_C( 44), INT8_C( 76), INT8_C( 123) } },
|
||||
{ { INT8_C( 3), -INT8_C( 63), INT8_C( 80), -INT8_C( 52), INT8_C( 10), INT8_C( 56), -INT8_C( 74), -INT8_C( 119),
|
||||
INT8_C( 65), -INT8_C( 3), INT8_C( 31), INT8_C( 37), INT8_C( 56), INT8_C( 40), -INT8_C( 41), -INT8_C( 70),
|
||||
-INT8_C( 53), INT8_C( 58), INT8_C( 89), -INT8_C( 107), -INT8_C( 127), INT8_MAX, -INT8_C( 66), INT8_C( 31),
|
||||
-INT8_C( 93), -INT8_C( 114), -INT8_C( 84), -INT8_C( 22), INT8_C( 98), -INT8_C( 7), INT8_C( 102), INT8_C( 102) },
|
||||
{ INT8_C( 3), -INT8_C( 63), INT8_C( 80), -INT8_C( 52), INT8_C( 10), INT8_C( 56), -INT8_C( 74), -INT8_C( 119),
|
||||
INT8_C( 65), -INT8_C( 3), INT8_C( 31), INT8_C( 37), INT8_C( 56), INT8_C( 40), -INT8_C( 41), -INT8_C( 70),
|
||||
-INT8_C( 53), INT8_C( 58), INT8_C( 89), -INT8_C( 107), -INT8_C( 127), INT8_MAX, -INT8_C( 66), INT8_C( 31),
|
||||
-INT8_C( 93), -INT8_C( 114), -INT8_C( 84), -INT8_C( 22), INT8_C( 98), -INT8_C( 7), INT8_C( 102), INT8_C( 102) } },
|
||||
};
|
||||
|
||||
for (size_t i = 0 ; i < (sizeof(test_vec) / sizeof(test_vec[0])) ; i++) {
|
||||
simde__m256i a = simde_mm256_loadu_epi8(test_vec[i].a);
|
||||
int8_t r[sizeof(simde__m256i) / sizeof(int8_t)] = {0};
|
||||
simde_mm256_storeu_epi8(r, a);
|
||||
simde_assert_equal_vi8(sizeof(r) / sizeof(r[0]), r, test_vec[i].r);
|
||||
}
|
||||
|
||||
return 0;
|
||||
#else
|
||||
fputc('\n', stdout);
|
||||
for (int i = 0 ; i < 8 ; i++) {
|
||||
simde__m256i a = simde_test_x86_random_i8x32();
|
||||
int8_t r[sizeof(simde__m256i) / sizeof(int8_t)] = {0};
|
||||
simde_mm256_storeu_epi8(r, a);
|
||||
|
||||
simde_test_x86_write_i8x32(2, a, SIMDE_TEST_VEC_POS_FIRST);
|
||||
simde_test_codegen_write_vi8(2, sizeof(r) / sizeof(r[0]), r, SIMDE_TEST_VEC_POS_LAST);
|
||||
}
|
||||
return 1;
|
||||
#endif
|
||||
}
|
||||
|
||||
static int
|
||||
test_simde_mm256_storeu_epi16 (SIMDE_MUNIT_TEST_ARGS) {
|
||||
#if 1
|
||||
static const struct {
|
||||
const int16_t a[16];
|
||||
const int16_t r[16];
|
||||
} test_vec[] = {
|
||||
{ { INT16_C( 27201), -INT16_C( 10931), INT16_C( 26543), -INT16_C( 17697), -INT16_C( 5170), -INT16_C( 2379), INT16_C( 24504), -INT16_C( 22914),
|
||||
INT16_C( 3457), -INT16_C( 18629), -INT16_C( 4523), INT16_C( 1253), -INT16_C( 9921), INT16_C( 31191), INT16_C( 9211), INT16_C( 15721) },
|
||||
{ INT16_C( 27201), -INT16_C( 10931), INT16_C( 26543), -INT16_C( 17697), -INT16_C( 5170), -INT16_C( 2379), INT16_C( 24504), -INT16_C( 22914),
|
||||
INT16_C( 3457), -INT16_C( 18629), -INT16_C( 4523), INT16_C( 1253), -INT16_C( 9921), INT16_C( 31191), INT16_C( 9211), INT16_C( 15721) } },
|
||||
{ { -INT16_C( 18803), INT16_C( 15634), -INT16_C( 3810), -INT16_C( 4873), -INT16_C( 21283), -INT16_C( 27166), INT16_C( 24587), -INT16_C( 29381),
|
||||
INT16_C( 30573), -INT16_C( 15804), INT16_C( 10597), -INT16_C( 23097), -INT16_C( 25086), -INT16_C( 482), -INT16_C( 30782), INT16_C( 20283) },
|
||||
{ -INT16_C( 18803), INT16_C( 15634), -INT16_C( 3810), -INT16_C( 4873), -INT16_C( 21283), -INT16_C( 27166), INT16_C( 24587), -INT16_C( 29381),
|
||||
INT16_C( 30573), -INT16_C( 15804), INT16_C( 10597), -INT16_C( 23097), -INT16_C( 25086), -INT16_C( 482), -INT16_C( 30782), INT16_C( 20283) } },
|
||||
{ { INT16_C( 19773), INT16_C( 23436), -INT16_C( 31938), INT16_C( 6983), INT16_C( 10544), INT16_C( 15281), -INT16_C( 4982), -INT16_C( 2104),
|
||||
INT16_C( 3171), -INT16_C( 13894), -INT16_C( 32458), INT16_C( 14446), -INT16_C( 29665), -INT16_C( 7882), INT16_C( 28947), INT16_C( 20529) },
|
||||
{ INT16_C( 19773), INT16_C( 23436), -INT16_C( 31938), INT16_C( 6983), INT16_C( 10544), INT16_C( 15281), -INT16_C( 4982), -INT16_C( 2104),
|
||||
INT16_C( 3171), -INT16_C( 13894), -INT16_C( 32458), INT16_C( 14446), -INT16_C( 29665), -INT16_C( 7882), INT16_C( 28947), INT16_C( 20529) } },
|
||||
{ { -INT16_C( 16962), -INT16_C( 596), -INT16_C( 3263), INT16_C( 28952), -INT16_C( 14051), -INT16_C( 22612), INT16_C( 30134), INT16_C( 6558),
|
||||
INT16_C( 22657), -INT16_C( 18462), INT16_C( 20697), -INT16_C( 1552), INT16_C( 9948), -INT16_C( 4134), INT16_C( 2968), INT16_C( 22080) },
|
||||
{ -INT16_C( 16962), -INT16_C( 596), -INT16_C( 3263), INT16_C( 28952), -INT16_C( 14051), -INT16_C( 22612), INT16_C( 30134), INT16_C( 6558),
|
||||
INT16_C( 22657), -INT16_C( 18462), INT16_C( 20697), -INT16_C( 1552), INT16_C( 9948), -INT16_C( 4134), INT16_C( 2968), INT16_C( 22080) } },
|
||||
{ { -INT16_C( 4919), INT16_C( 2643), INT16_C( 27871), -INT16_C( 901), INT16_C( 10037), -INT16_C( 5213), INT16_C( 17052), INT16_C( 7685),
|
||||
-INT16_C( 6246), INT16_C( 29909), -INT16_C( 15048), INT16_C( 5229), INT16_C( 18412), -INT16_C( 31740), INT16_C( 17491), INT16_C( 7386) },
|
||||
{ -INT16_C( 4919), INT16_C( 2643), INT16_C( 27871), -INT16_C( 901), INT16_C( 10037), -INT16_C( 5213), INT16_C( 17052), INT16_C( 7685),
|
||||
-INT16_C( 6246), INT16_C( 29909), -INT16_C( 15048), INT16_C( 5229), INT16_C( 18412), -INT16_C( 31740), INT16_C( 17491), INT16_C( 7386) } },
|
||||
{ { INT16_C( 11824), INT16_C( 3878), -INT16_C( 24166), -INT16_C( 12532), -INT16_C( 20536), INT16_C( 26043), -INT16_C( 16143), -INT16_C( 29565),
|
||||
INT16_C( 22695), -INT16_C( 8448), INT16_C( 27934), INT16_C( 2804), -INT16_C( 1868), INT16_C( 1934), INT16_C( 26684), INT16_C( 27683) },
|
||||
{ INT16_C( 11824), INT16_C( 3878), -INT16_C( 24166), -INT16_C( 12532), -INT16_C( 20536), INT16_C( 26043), -INT16_C( 16143), -INT16_C( 29565),
|
||||
INT16_C( 22695), -INT16_C( 8448), INT16_C( 27934), INT16_C( 2804), -INT16_C( 1868), INT16_C( 1934), INT16_C( 26684), INT16_C( 27683) } },
|
||||
{ { INT16_C( 18838), INT16_C( 12411), -INT16_C( 30742), -INT16_C( 19712), -INT16_C( 17609), INT16_C( 10264), -INT16_C( 25733), INT16_C( 8884),
|
||||
-INT16_C( 19213), INT16_C( 4354), -INT16_C( 2527), -INT16_C( 10725), -INT16_C( 22034), INT16_C( 10973), INT16_C( 274), -INT16_C( 22378) },
|
||||
{ INT16_C( 18838), INT16_C( 12411), -INT16_C( 30742), -INT16_C( 19712), -INT16_C( 17609), INT16_C( 10264), -INT16_C( 25733), INT16_C( 8884),
|
||||
-INT16_C( 19213), INT16_C( 4354), -INT16_C( 2527), -INT16_C( 10725), -INT16_C( 22034), INT16_C( 10973), INT16_C( 274), -INT16_C( 22378) } },
|
||||
{ { INT16_C( 4426), INT16_C( 13785), -INT16_C( 9831), -INT16_C( 12056), INT16_C( 148), INT16_C( 4088), -INT16_C( 21093), -INT16_C( 29135),
|
||||
INT16_C( 13153), -INT16_C( 31840), -INT16_C( 17623), INT16_C( 5977), INT16_C( 13925), INT16_C( 30529), -INT16_C( 10441), -INT16_C( 32225) },
|
||||
{ INT16_C( 4426), INT16_C( 13785), -INT16_C( 9831), -INT16_C( 12056), INT16_C( 148), INT16_C( 4088), -INT16_C( 21093), -INT16_C( 29135),
|
||||
INT16_C( 13153), -INT16_C( 31840), -INT16_C( 17623), INT16_C( 5977), INT16_C( 13925), INT16_C( 30529), -INT16_C( 10441), -INT16_C( 32225) } },
|
||||
};
|
||||
|
||||
for (size_t i = 0 ; i < (sizeof(test_vec) / sizeof(test_vec[0])) ; i++) {
|
||||
simde__m256i a = simde_mm256_loadu_epi16(test_vec[i].a);
|
||||
int16_t r[sizeof(simde__m256i) / sizeof(int16_t)] = {0};
|
||||
simde_mm256_storeu_epi16(r, a);
|
||||
simde_assert_equal_vi16(sizeof(r) / sizeof(r[0]), r, test_vec[i].r);
|
||||
}
|
||||
|
||||
return 0;
|
||||
#else
|
||||
fputc('\n', stdout);
|
||||
for (int i = 0 ; i < 8 ; i++) {
|
||||
simde__m256i a = simde_test_x86_random_i16x16();
|
||||
int16_t r[sizeof(simde__m256i) / sizeof(int16_t)] = {0};
|
||||
simde_mm256_storeu_epi16(r, a);
|
||||
|
||||
simde_test_x86_write_i16x16(2, a, SIMDE_TEST_VEC_POS_FIRST);
|
||||
simde_test_codegen_write_vi16(2, sizeof(r) / sizeof(r[0]), r, SIMDE_TEST_VEC_POS_LAST);
|
||||
}
|
||||
return 1;
|
||||
#endif
|
||||
}
|
||||
|
||||
static int
|
||||
test_simde_mm256_mask_storeu_epi16 (SIMDE_MUNIT_TEST_ARGS) {
|
||||
#if 1
|
||||
static const struct {
|
||||
const simde__mmask16 k;
|
||||
const int16_t a[16];
|
||||
const int16_t r[16];
|
||||
} test_vec[] = {
|
||||
{ UINT16_C(28210),
|
||||
{ -INT16_C( 30445), INT16_C( 24637), -INT16_C( 23832), -INT16_C( 6664), INT16_C( 24593), INT16_C( 7346), -INT16_C( 18995), -INT16_C( 14219),
|
||||
INT16_C( 2046), INT16_C( 78), INT16_C( 21593), INT16_C( 29794), -INT16_C( 1520), -INT16_C( 25702), -INT16_C( 13160), -INT16_C( 21750) },
|
||||
{ INT16_C( 0), INT16_C( 24637), INT16_C( 0), INT16_C( 0), INT16_C( 24593), INT16_C( 7346), INT16_C( 0), INT16_C( 0),
|
||||
INT16_C( 0), INT16_C( 78), INT16_C( 21593), INT16_C( 29794), INT16_C( 0), -INT16_C( 25702), -INT16_C( 13160), INT16_C( 0) } },
|
||||
{ UINT16_C(18261),
|
||||
{ INT16_C( 15628), INT16_C( 1257), -INT16_C( 1502), -INT16_C( 11164), INT16_C( 12822), -INT16_C( 29559), -INT16_C( 30726), INT16_C( 18579),
|
||||
-INT16_C( 4984), -INT16_C( 5476), -INT16_C( 21408), -INT16_C( 1307), INT16_C( 32072), INT16_C( 21190), INT16_C( 6953), INT16_C( 13721) },
|
||||
{ INT16_C( 15628), INT16_C( 0), -INT16_C( 1502), INT16_C( 0), INT16_C( 12822), INT16_C( 0), -INT16_C( 30726), INT16_C( 0),
|
||||
-INT16_C( 4984), -INT16_C( 5476), -INT16_C( 21408), INT16_C( 0), INT16_C( 0), INT16_C( 0), INT16_C( 6953), INT16_C( 0) } },
|
||||
{ UINT16_C(33368),
|
||||
{ INT16_C( 31545), -INT16_C( 24964), -INT16_C( 28081), -INT16_C( 9776), -INT16_C( 13794), -INT16_C( 20128), -INT16_C( 6126), -INT16_C( 20835),
|
||||
-INT16_C( 557), -INT16_C( 18341), -INT16_C( 23561), -INT16_C( 17099), INT16_C( 24309), -INT16_C( 28968), INT16_C( 12691), -INT16_C( 13040) },
|
||||
{ INT16_C( 0), INT16_C( 0), INT16_C( 0), -INT16_C( 9776), -INT16_C( 13794), INT16_C( 0), -INT16_C( 6126), INT16_C( 0),
|
||||
INT16_C( 0), -INT16_C( 18341), INT16_C( 0), INT16_C( 0), INT16_C( 0), INT16_C( 0), INT16_C( 0), -INT16_C( 13040) } },
|
||||
{ UINT16_C(36012),
|
||||
{ -INT16_C( 1173), INT16_C( 15134), INT16_C( 15828), INT16_C( 13573), INT16_C( 6126), -INT16_C( 29667), -INT16_C( 3899), INT16_C( 8329),
|
||||
-INT16_C( 32344), -INT16_C( 8509), -INT16_C( 18370), INT16_C( 5948), -INT16_C( 12218), INT16_C( 22088), -INT16_C( 2915), INT16_C( 2274) },
|
||||
{ INT16_C( 0), INT16_C( 0), INT16_C( 15828), INT16_C( 13573), INT16_C( 0), -INT16_C( 29667), INT16_C( 0), INT16_C( 8329),
|
||||
INT16_C( 0), INT16_C( 0), -INT16_C( 18370), INT16_C( 5948), INT16_C( 0), INT16_C( 0), INT16_C( 0), INT16_C( 2274) } },
|
||||
{ UINT16_C( 495),
|
||||
{ -INT16_C( 15293), INT16_C( 18494), INT16_C( 11513), INT16_C( 5727), INT16_C( 9400), INT16_C( 16903), -INT16_C( 20667), INT16_C( 2243),
|
||||
INT16_C( 397), -INT16_C( 13631), INT16_C( 1816), INT16_C( 24730), INT16_C( 14174), INT16_C( 16468), INT16_C( 17471), -INT16_C( 32191) },
|
||||
{ -INT16_C( 15293), INT16_C( 18494), INT16_C( 11513), INT16_C( 5727), INT16_C( 0), INT16_C( 16903), -INT16_C( 20667), INT16_C( 2243),
|
||||
INT16_C( 397), INT16_C( 0), INT16_C( 0), INT16_C( 0), INT16_C( 0), INT16_C( 0), INT16_C( 0), INT16_C( 0) } },
|
||||
{ UINT16_C(32520),
|
||||
{ INT16_C( 458), INT16_C( 10668), INT16_C( 25623), INT16_C( 7757), -INT16_C( 27994), INT16_C( 27086), INT16_C( 23451), INT16_C( 23659),
|
||||
-INT16_C( 31963), -INT16_C( 16541), -INT16_C( 15900), INT16_C( 14582), INT16_C( 13570), INT16_C( 17276), -INT16_C( 31561), -INT16_C( 32317) },
|
||||
{ INT16_C( 0), INT16_C( 0), INT16_C( 0), INT16_C( 7757), INT16_C( 0), INT16_C( 0), INT16_C( 0), INT16_C( 0),
|
||||
-INT16_C( 31963), -INT16_C( 16541), -INT16_C( 15900), INT16_C( 14582), INT16_C( 13570), INT16_C( 17276), -INT16_C( 31561), INT16_C( 0) } },
|
||||
{ UINT16_C(28549),
|
||||
{ -INT16_C( 25174), -INT16_C( 1837), INT16_C( 31419), -INT16_C( 30326), INT16_C( 9699), INT16_C( 20197), INT16_C( 2689), -INT16_C( 6702),
|
||||
-INT16_C( 18742), -INT16_C( 16218), -INT16_C( 22290), INT16_C( 27638), -INT16_C( 21012), -INT16_C( 20497), INT16_C( 29999), -INT16_C( 9954) },
|
||||
{ -INT16_C( 25174), INT16_C( 0), INT16_C( 31419), INT16_C( 0), INT16_C( 0), INT16_C( 0), INT16_C( 0), -INT16_C( 6702),
|
||||
-INT16_C( 18742), -INT16_C( 16218), -INT16_C( 22290), INT16_C( 27638), INT16_C( 0), -INT16_C( 20497), INT16_C( 29999), INT16_C( 0) } },
|
||||
{ UINT16_C(61714),
|
||||
{ -INT16_C( 12847), INT16_C( 23659), INT16_C( 20311), INT16_C( 15489), INT16_C( 925), INT16_C( 28486), INT16_C( 4328), -INT16_C( 29147),
|
||||
INT16_C( 5329), -INT16_C( 14537), INT16_C( 9087), INT16_C( 28276), -INT16_C( 23598), -INT16_C( 3869), -INT16_C( 2691), INT16_C( 20193) },
|
||||
{ INT16_C( 0), INT16_C( 23659), INT16_C( 0), INT16_C( 0), INT16_C( 925), INT16_C( 0), INT16_C( 0), INT16_C( 0),
|
||||
INT16_C( 5329), INT16_C( 0), INT16_C( 0), INT16_C( 0), -INT16_C( 23598), -INT16_C( 3869), -INT16_C( 2691), INT16_C( 20193) } },
|
||||
};
|
||||
|
||||
for (size_t i = 0 ; i < (sizeof(test_vec) / sizeof(test_vec[0])) ; i++) {
|
||||
simde__m256i a = simde_mm256_loadu_epi16(test_vec[i].a);
|
||||
int16_t r[sizeof(simde__m256i) / sizeof(int16_t)] = {0};
|
||||
simde_mm256_mask_storeu_epi16(r, test_vec[i].k, a);
|
||||
simde_assert_equal_vi16(sizeof(r) / sizeof(r[0]), r, test_vec[i].r);
|
||||
}
|
||||
|
||||
return 0;
|
||||
#else
|
||||
fputc('\n', stdout);
|
||||
for (int i = 0 ; i < 8 ; i++) {
|
||||
simde__mmask16 k = simde_test_x86_random_mmask16();
|
||||
simde__m256i a = simde_test_x86_random_i16x16();
|
||||
int16_t r[sizeof(simde__m256i) / sizeof(int16_t)] = {0};
|
||||
simde_mm256_mask_storeu_epi16(r, k, a);
|
||||
|
||||
simde_test_x86_write_mmask16(2, k, SIMDE_TEST_VEC_POS_FIRST);
|
||||
simde_test_x86_write_i16x16(2, a, SIMDE_TEST_VEC_POS_MIDDLE);
|
||||
simde_test_codegen_write_vi16(2, sizeof(r) / sizeof(r[0]), r, SIMDE_TEST_VEC_POS_LAST);
|
||||
}
|
||||
return 1;
|
||||
#endif
|
||||
}
|
||||
|
||||
static int
|
||||
test_simde_mm256_storeu_epi32 (SIMDE_MUNIT_TEST_ARGS) {
|
||||
#if 1
|
||||
static const struct {
|
||||
const int32_t a[8];
|
||||
const int32_t r[8];
|
||||
} test_vec[] = {
|
||||
{ { -INT32_C( 2101872407), INT32_C( 1699913681), INT32_C( 980699807), INT32_C( 1506322167), INT32_C( 64776409), -INT32_C( 1994771164), -INT32_C( 1560257429), INT32_C( 472194867) },
|
||||
{ -INT32_C( 2101872407), INT32_C( 1699913681), INT32_C( 980699807), INT32_C( 1506322167), INT32_C( 64776409), -INT32_C( 1994771164), -INT32_C( 1560257429), INT32_C( 472194867) } },
|
||||
{ { -INT32_C( 375464936), INT32_C( 441446523), INT32_C( 844415803), INT32_C( 1133190249), -INT32_C( 1455003771), INT32_C( 137519260), -INT32_C( 257215812), INT32_C( 1762447441) },
|
||||
{ -INT32_C( 375464936), INT32_C( 441446523), INT32_C( 844415803), INT32_C( 1133190249), -INT32_C( 1455003771), INT32_C( 137519260), -INT32_C( 257215812), INT32_C( 1762447441) } },
|
||||
{ { INT32_C( 659794860), -INT32_C( 700341605), -INT32_C( 821455515), INT32_C( 907187377), -INT32_C( 1730193156), INT32_C( 1973424568), -INT32_C( 1788523709), -INT32_C( 939626213) },
|
||||
{ INT32_C( 659794860), -INT32_C( 700341605), -INT32_C( 821455515), INT32_C( 907187377), -INT32_C( 1730193156), INT32_C( 1973424568), -INT32_C( 1788523709), -INT32_C( 939626213) } },
|
||||
{ { -INT32_C( 1192341220), INT32_C( 1502490611), INT32_C( 1982371780), INT32_C( 682375724), INT32_C( 1254132882), -INT32_C( 507551331), -INT32_C( 931781460), -INT32_C( 1299221354) },
|
||||
{ -INT32_C( 1192341220), INT32_C( 1502490611), INT32_C( 1982371780), INT32_C( 682375724), INT32_C( 1254132882), -INT32_C( 507551331), -INT32_C( 931781460), -INT32_C( 1299221354) } },
|
||||
{ { -INT32_C( 1184203066), INT32_C( 1913846189), -INT32_C( 1125631344), INT32_C( 115643508), -INT32_C( 1101945568), -INT32_C( 1298198522), -INT32_C( 881191627), INT32_C( 1333594761) },
|
||||
{ -INT32_C( 1184203066), INT32_C( 1913846189), -INT32_C( 1125631344), INT32_C( 115643508), -INT32_C( 1101945568), -INT32_C( 1298198522), -INT32_C( 881191627), INT32_C( 1333594761) } },
|
||||
{ { INT32_C( 889841800), INT32_C( 1906777057), -INT32_C( 902918314), INT32_C( 1154552356), -INT32_C( 1123933513), INT32_C( 1735434546), INT32_C( 1077078710), INT32_C( 2089791732) },
|
||||
{ INT32_C( 889841800), INT32_C( 1906777057), -INT32_C( 902918314), INT32_C( 1154552356), -INT32_C( 1123933513), INT32_C( 1735434546), INT32_C( 1077078710), INT32_C( 2089791732) } },
|
||||
{ { INT32_C( 2041747608), INT32_C( 183130548), INT32_C( 232003817), -INT32_C( 497965781), -INT32_C( 90155833), -INT32_C( 1402924811), -INT32_C( 269708038), -INT32_C( 596935868) },
|
||||
{ INT32_C( 2041747608), INT32_C( 183130548), INT32_C( 232003817), -INT32_C( 497965781), -INT32_C( 90155833), -INT32_C( 1402924811), -INT32_C( 269708038), -INT32_C( 596935868) } },
|
||||
{ { -INT32_C( 933946092), INT32_C( 1624391543), -INT32_C( 2089965992), INT32_C( 325434956), INT32_C( 135070994), INT32_C( 280260373), INT32_C( 1207934979), INT32_C( 790850075) },
|
||||
{ -INT32_C( 933946092), INT32_C( 1624391543), -INT32_C( 2089965992), INT32_C( 325434956), INT32_C( 135070994), INT32_C( 280260373), INT32_C( 1207934979), INT32_C( 790850075) } },
|
||||
};
|
||||
|
||||
for (size_t i = 0 ; i < (sizeof(test_vec) / sizeof(test_vec[0])) ; i++) {
|
||||
simde__m256i a = simde_mm256_loadu_epi32(test_vec[i].a);
|
||||
int32_t r[sizeof(simde__m256i) / sizeof(int32_t)] = {0};
|
||||
simde_mm256_storeu_epi32(r, a);
|
||||
simde_assert_equal_vi32(sizeof(r) / sizeof(r[0]), r, test_vec[i].r);
|
||||
}
|
||||
|
||||
return 0;
|
||||
#else
|
||||
fputc('\n', stdout);
|
||||
for (int i = 0 ; i < 8 ; i++) {
|
||||
simde__m256i a = simde_test_x86_random_i32x8();
|
||||
int32_t r[sizeof(simde__m256i) / sizeof(int32_t)] = {0};
|
||||
simde_mm256_storeu_epi32(r, a);
|
||||
|
||||
simde_test_x86_write_i32x8(2, a, SIMDE_TEST_VEC_POS_FIRST);
|
||||
simde_test_codegen_write_vi32(2, sizeof(r) / sizeof(r[0]), r, SIMDE_TEST_VEC_POS_LAST);
|
||||
}
|
||||
return 1;
|
||||
#endif
|
||||
}
|
||||
|
||||
static int
|
||||
test_simde_mm256_storeu_epi64 (SIMDE_MUNIT_TEST_ARGS) {
|
||||
#if 1
|
||||
static const struct {
|
||||
const int64_t a[4];
|
||||
const int64_t r[4];
|
||||
} test_vec[] = {
|
||||
{ { -INT64_C( 8520414791212126978), INT64_C( 6470760737637609380), INT64_C( 7372765298930470642), INT64_C( 9137132392545280597) },
|
||||
{ -INT64_C( 8520414791212126978), INT64_C( 6470760737637609380), INT64_C( 7372765298930470642), INT64_C( 9137132392545280597) } },
|
||||
{ { -INT64_C( 6181695135723249974), INT64_C( 6582275189149771364), INT64_C( 1378027538322451646), -INT64_C( 1793282446973829346) },
|
||||
{ -INT64_C( 6181695135723249974), INT64_C( 6582275189149771364), INT64_C( 1378027538322451646), -INT64_C( 1793282446973829346) } },
|
||||
{ { INT64_C( 3047472147532648602), INT64_C( 1960335077399948657), INT64_C( 8772998174208204782), -INT64_C( 9045984628089229966) },
|
||||
{ INT64_C( 3047472147532648602), INT64_C( 1960335077399948657), INT64_C( 8772998174208204782), -INT64_C( 9045984628089229966) } },
|
||||
{ { INT64_C( 5166874341197089733), INT64_C( 5643948629755485914), -INT64_C( 8302182390395426828), -INT64_C( 2733242877560954714) },
|
||||
{ INT64_C( 5166874341197089733), INT64_C( 5643948629755485914), -INT64_C( 8302182390395426828), -INT64_C( 2733242877560954714) } },
|
||||
{ { INT64_C( 8843408995216798621), INT64_C( 2640521362198879223), -INT64_C( 84940192658251989), INT64_C( 2164997219794349596) },
|
||||
{ INT64_C( 8843408995216798621), INT64_C( 2640521362198879223), -INT64_C( 84940192658251989), INT64_C( 2164997219794349596) } },
|
||||
{ { INT64_C( 9217545211248472017), -INT64_C( 3712237534943208409), INT64_C( 5003750052667256346), INT64_C( 7741830259258359250) },
|
||||
{ INT64_C( 9217545211248472017), -INT64_C( 3712237534943208409), INT64_C( 5003750052667256346), INT64_C( 7741830259258359250) } },
|
||||
{ { INT64_C( 8501044911504360177), INT64_C( 7336723655508676452), -INT64_C( 7375690268599065803), -INT64_C( 8265410862250190267) },
|
||||
{ INT64_C( 8501044911504360177), INT64_C( 7336723655508676452), -INT64_C( 7375690268599065803), -INT64_C( 8265410862250190267) } },
|
||||
{ { INT64_C( 5990350384227821662), INT64_C( 7601841099293388239), -INT64_C( 1914473353548638451), INT64_C( 1562487073980897926) },
|
||||
{ INT64_C( 5990350384227821662), INT64_C( 7601841099293388239), -INT64_C( 1914473353548638451), INT64_C( 1562487073980897926) } },
|
||||
};
|
||||
|
||||
for (size_t i = 0 ; i < (sizeof(test_vec) / sizeof(test_vec[0])) ; i++) {
|
||||
simde__m256i a = simde_mm256_loadu_epi64(test_vec[i].a);
|
||||
int64_t r[sizeof(simde__m256i) / sizeof(int64_t)] = {0};
|
||||
simde_mm256_storeu_epi64(r, a);
|
||||
simde_assert_equal_vi64(sizeof(r) / sizeof(r[0]), r, test_vec[i].r);
|
||||
}
|
||||
|
||||
return 0;
|
||||
#else
|
||||
fputc('\n', stdout);
|
||||
for (int i = 0 ; i < 8 ; i++) {
|
||||
simde__m256i a = simde_test_x86_random_i64x4();
|
||||
int64_t r[sizeof(simde__m256i) / sizeof(int64_t)] = {0};
|
||||
simde_mm256_storeu_epi64(r, a);
|
||||
|
||||
simde_test_x86_write_i64x4(2, a, SIMDE_TEST_VEC_POS_FIRST);
|
||||
simde_test_codegen_write_vi64(2, sizeof(r) / sizeof(r[0]), r, SIMDE_TEST_VEC_POS_LAST);
|
||||
}
|
||||
return 1;
|
||||
#endif
|
||||
}
|
||||
|
||||
static int
|
||||
test_simde_mm512_mask_storeu_epi16 (SIMDE_MUNIT_TEST_ARGS) {
|
||||
#if 1
|
||||
static const struct {
|
||||
const simde__mmask32 k;
|
||||
const int16_t a[32];
|
||||
const int16_t r[32];
|
||||
} test_vec[] = {
|
||||
{ UINT32_C(3161047277),
|
||||
{ INT16_C( 31302), -INT16_C( 9255), -INT16_C( 26754), INT16_C( 6282), -INT16_C( 5995), -INT16_C( 32261), INT16_C( 26193), -INT16_C( 16077),
|
||||
INT16_C( 16306), -INT16_C( 19025), INT16_C( 24681), -INT16_C( 27311), -INT16_C( 26783), INT16_C( 20344), -INT16_C( 7592), -INT16_C( 25077),
|
||||
-INT16_C( 7076), -INT16_C( 9606), INT16_C( 1148), INT16_C( 4594), -INT16_C( 4628), INT16_C( 15762), -INT16_C( 15020), INT16_C( 1790),
|
||||
-INT16_C( 21243), INT16_C( 28347), INT16_C( 3341), INT16_C( 28419), INT16_C( 31652), -INT16_C( 834), -INT16_C( 13987), -INT16_C( 18021) },
|
||||
{ INT16_C( 31302), INT16_C( 0), -INT16_C( 26754), INT16_C( 6282), INT16_C( 0), -INT16_C( 32261), INT16_C( 26193), -INT16_C( 16077),
|
||||
INT16_C( 0), INT16_C( 0), INT16_C( 0), INT16_C( 0), INT16_C( 0), INT16_C( 0), -INT16_C( 7592), -INT16_C( 25077),
|
||||
-INT16_C( 7076), INT16_C( 0), INT16_C( 0), INT16_C( 4594), INT16_C( 0), INT16_C( 15762), -INT16_C( 15020), INT16_C( 0),
|
||||
INT16_C( 0), INT16_C( 0), INT16_C( 3341), INT16_C( 28419), INT16_C( 31652), -INT16_C( 834), INT16_C( 0), -INT16_C( 18021) } },
|
||||
{ UINT32_C( 714347950),
|
||||
{ -INT16_C( 31207), INT16_C( 1339), -INT16_C( 12940), -INT16_C( 14269), INT16_C( 16786), -INT16_C( 26674), -INT16_C( 30225), -INT16_C( 1019),
|
||||
INT16_C( 2198), INT16_C( 15211), INT16_C( 10628), -INT16_C( 7881), -INT16_C( 11533), -INT16_C( 24165), INT16_C( 12263), INT16_C( 203),
|
||||
INT16_C( 1717), INT16_C( 10502), INT16_C( 18899), INT16_C( 26097), -INT16_C( 16502), INT16_C( 31229), INT16_C( 585), -INT16_C( 8330),
|
||||
-INT16_C( 7925), -INT16_C( 28902), INT16_C( 21003), -INT16_C( 400), INT16_C( 2852), INT16_C( 3231), INT16_C( 27194), -INT16_C( 4084) },
|
||||
{ INT16_C( 0), INT16_C( 1339), -INT16_C( 12940), -INT16_C( 14269), INT16_C( 0), -INT16_C( 26674), INT16_C( 0), -INT16_C( 1019),
|
||||
INT16_C( 2198), INT16_C( 0), INT16_C( 10628), INT16_C( 0), -INT16_C( 11533), INT16_C( 0), INT16_C( 0), INT16_C( 0),
|
||||
INT16_C( 0), INT16_C( 0), INT16_C( 18899), INT16_C( 0), -INT16_C( 16502), INT16_C( 0), INT16_C( 0), -INT16_C( 8330),
|
||||
INT16_C( 0), -INT16_C( 28902), INT16_C( 0), -INT16_C( 400), INT16_C( 0), INT16_C( 3231), INT16_C( 0), INT16_C( 0) } },
|
||||
{ UINT32_C(1125716592),
|
||||
{ INT16_C( 2907), -INT16_C( 6488), -INT16_C( 23094), INT16_C( 4959), -INT16_C( 10840), -INT16_C( 19469), INT16_C( 3511), -INT16_C( 15806),
|
||||
-INT16_C( 19873), -INT16_C( 31552), INT16_C( 24510), -INT16_C( 1904), -INT16_C( 25399), INT16_C( 14824), INT16_C( 687), INT16_C( 2684),
|
||||
INT16_C( 9229), -INT16_C( 10256), INT16_C( 20682), INT16_C( 29419), -INT16_C( 8667), -INT16_C( 9179), INT16_C( 26603), INT16_C( 19358),
|
||||
INT16_C( 24089), -INT16_C( 10289), INT16_C( 24509), -INT16_C( 31024), -INT16_C( 18181), -INT16_C( 21825), INT16_C( 15290), -INT16_C( 14411) },
|
||||
{ INT16_C( 0), INT16_C( 0), INT16_C( 0), INT16_C( 0), -INT16_C( 10840), -INT16_C( 19469), INT16_C( 3511), INT16_C( 0),
|
||||
INT16_C( 0), -INT16_C( 31552), INT16_C( 0), INT16_C( 0), -INT16_C( 25399), INT16_C( 0), INT16_C( 0), INT16_C( 0),
|
||||
INT16_C( 9229), INT16_C( 0), INT16_C( 0), INT16_C( 29419), -INT16_C( 8667), INT16_C( 0), INT16_C( 0), INT16_C( 0),
|
||||
INT16_C( 24089), -INT16_C( 10289), INT16_C( 0), INT16_C( 0), INT16_C( 0), INT16_C( 0), INT16_C( 15290), INT16_C( 0) } },
|
||||
{ UINT32_C( 715105632),
|
||||
{ -INT16_C( 29963), INT16_C( 7068), -INT16_C( 16024), INT16_C( 21495), -INT16_C( 27096), INT16_C( 16798), INT16_C( 28148), -INT16_C( 19943),
|
||||
-INT16_C( 5684), -INT16_C( 14280), -INT16_C( 1887), INT16_C( 23666), INT16_C( 10035), -INT16_C( 27869), -INT16_C( 15667), -INT16_C( 15683),
|
||||
INT16_C( 22860), -INT16_C( 19235), -INT16_C( 10982), INT16_C( 16904), -INT16_C( 22933), INT16_C( 24452), -INT16_C( 25324), -INT16_C( 8175),
|
||||
INT16_C( 19078), INT16_C( 10152), INT16_C( 6978), INT16_C( 30083), -INT16_C( 22718), INT16_C( 3849), -INT16_C( 14743), -INT16_C( 18734) },
|
||||
{ INT16_C( 0), INT16_C( 0), INT16_C( 0), INT16_C( 0), INT16_C( 0), INT16_C( 16798), INT16_C( 28148), INT16_C( 0),
|
||||
-INT16_C( 5684), INT16_C( 0), -INT16_C( 1887), INT16_C( 0), INT16_C( 0), -INT16_C( 27869), INT16_C( 0), -INT16_C( 15683),
|
||||
INT16_C( 22860), -INT16_C( 19235), -INT16_C( 10982), INT16_C( 16904), -INT16_C( 22933), INT16_C( 0), INT16_C( 0), -INT16_C( 8175),
|
||||
INT16_C( 0), INT16_C( 10152), INT16_C( 0), INT16_C( 30083), INT16_C( 0), INT16_C( 3849), INT16_C( 0), INT16_C( 0) } },
|
||||
{ UINT32_C( 980070176),
|
||||
{ INT16_C( 29316), -INT16_C( 4227), INT16_C( 281), INT16_C( 11599), INT16_C( 24734), INT16_C( 9229), -INT16_C( 18774), -INT16_C( 5045),
|
||||
-INT16_C( 12335), INT16_C( 4962), INT16_C( 27510), -INT16_C( 8413), -INT16_C( 2767), INT16_C( 20885), INT16_C( 164), INT16_C( 10636),
|
||||
INT16_C( 2418), -INT16_C( 29928), INT16_C( 26378), -INT16_C( 22344), -INT16_C( 14648), INT16_C( 29388), INT16_C( 6012), INT16_C( 19807),
|
||||
-INT16_C( 15898), INT16_C( 23648), -INT16_C( 31956), INT16_C( 23868), -INT16_C( 11912), INT16_C( 7599), INT16_C( 15313), INT16_C( 17478) },
|
||||
{ INT16_C( 0), INT16_C( 0), INT16_C( 0), INT16_C( 0), INT16_C( 0), INT16_C( 9229), INT16_C( 0), INT16_C( 0),
|
||||
-INT16_C( 12335), INT16_C( 4962), INT16_C( 27510), -INT16_C( 8413), INT16_C( 0), INT16_C( 20885), INT16_C( 0), INT16_C( 10636),
|
||||
INT16_C( 0), -INT16_C( 29928), INT16_C( 0), -INT16_C( 22344), INT16_C( 0), INT16_C( 29388), INT16_C( 6012), INT16_C( 0),
|
||||
INT16_C( 0), INT16_C( 23648), INT16_C( 0), INT16_C( 23868), -INT16_C( 11912), INT16_C( 7599), INT16_C( 0), INT16_C( 0) } },
|
||||
{ UINT32_C(1322212932),
|
||||
{ -INT16_C( 30522), -INT16_C( 28938), -INT16_C( 15794), -INT16_C( 13824), INT16_C( 24537), -INT16_C( 16361), INT16_C( 30496), INT16_C( 19484),
|
||||
INT16_C( 22779), INT16_C( 29610), INT16_C( 22826), -INT16_C( 1136), -INT16_C( 10604), -INT16_C( 10177), INT16_C( 3893), -INT16_C( 1242),
|
||||
INT16_C( 7319), -INT16_C( 6775), -INT16_C( 30242), -INT16_C( 18513), -INT16_C( 14615), INT16_C( 2423), -INT16_C( 27587), INT16_C( 14422),
|
||||
INT16_C( 236), INT16_C( 5804), INT16_C( 15449), -INT16_C( 4846), INT16_C( 20755), INT16_C( 18629), -INT16_C( 5280), -INT16_C( 2237) },
|
||||
{ INT16_C( 0), INT16_C( 0), -INT16_C( 15794), INT16_C( 0), INT16_C( 0), INT16_C( 0), INT16_C( 30496), INT16_C( 0),
|
||||
INT16_C( 0), INT16_C( 29610), INT16_C( 22826), -INT16_C( 1136), -INT16_C( 10604), INT16_C( 0), INT16_C( 3893), INT16_C( 0),
|
||||
INT16_C( 7319), -INT16_C( 6775), -INT16_C( 30242), -INT16_C( 18513), INT16_C( 0), INT16_C( 0), -INT16_C( 27587), INT16_C( 14422),
|
||||
INT16_C( 0), INT16_C( 5804), INT16_C( 15449), -INT16_C( 4846), INT16_C( 0), INT16_C( 0), -INT16_C( 5280), INT16_C( 0) } },
|
||||
{ UINT32_C(3856452615),
|
||||
{ -INT16_C( 29867), INT16_C( 16028), INT16_C( 5201), -INT16_C( 28856), -INT16_C( 24920), -INT16_C( 27449), INT16_C( 29598), -INT16_C( 2133),
|
||||
-INT16_C( 16976), -INT16_C( 15388), -INT16_C( 22258), INT16_C( 28427), INT16_C( 20116), -INT16_C( 25754), INT16_C( 17178), INT16_C( 28544),
|
||||
INT16_C( 7374), INT16_C( 8366), -INT16_C( 2512), -INT16_C( 10065), INT16_C( 30356), INT16_C( 12909), INT16_C( 6378), -INT16_C( 26071),
|
||||
INT16_C( 3541), -INT16_C( 7331), INT16_C( 26806), INT16_C( 19026), -INT16_C( 17994), -INT16_C( 12059), INT16_C( 26108), -INT16_C( 13761) },
|
||||
{ -INT16_C( 29867), INT16_C( 16028), INT16_C( 5201), INT16_C( 0), INT16_C( 0), INT16_C( 0), INT16_C( 0), INT16_C( 0),
|
||||
INT16_C( 0), INT16_C( 0), -INT16_C( 22258), INT16_C( 28427), INT16_C( 0), INT16_C( 0), INT16_C( 17178), INT16_C( 28544),
|
||||
INT16_C( 0), INT16_C( 0), -INT16_C( 2512), -INT16_C( 10065), INT16_C( 30356), INT16_C( 0), INT16_C( 6378), -INT16_C( 26071),
|
||||
INT16_C( 3541), INT16_C( 0), INT16_C( 26806), INT16_C( 0), INT16_C( 0), -INT16_C( 12059), INT16_C( 26108), -INT16_C( 13761) } },
|
||||
{ UINT32_C(3001740673),
|
||||
{ -INT16_C( 26141), INT16_C( 30602), -INT16_C( 2288), -INT16_C( 1367), -INT16_C( 11761), -INT16_C( 7020), -INT16_C( 3617), -INT16_C( 27192),
|
||||
INT16_C( 6745), INT16_C( 4063), -INT16_C( 15149), -INT16_C( 12321), INT16_C( 7721), -INT16_C( 21606), -INT16_C( 31732), -INT16_C( 4259),
|
||||
-INT16_C( 6370), INT16_C( 11879), INT16_C( 4319), -INT16_C( 4568), -INT16_C( 17181), -INT16_C( 15661), -INT16_C( 25683), INT16_C( 1624),
|
||||
INT16_C( 14261), -INT16_C( 30443), -INT16_C( 2820), INT16_C( 9560), -INT16_C( 3566), INT16_C( 7888), INT16_C( 11639), -INT16_C( 27378) },
|
||||
{ -INT16_C( 26141), INT16_C( 0), INT16_C( 0), INT16_C( 0), INT16_C( 0), INT16_C( 0), INT16_C( 0), -INT16_C( 27192),
|
||||
INT16_C( 6745), INT16_C( 0), -INT16_C( 15149), -INT16_C( 12321), INT16_C( 0), -INT16_C( 21606), -INT16_C( 31732), -INT16_C( 4259),
|
||||
INT16_C( 0), INT16_C( 11879), INT16_C( 0), -INT16_C( 4568), INT16_C( 0), -INT16_C( 15661), -INT16_C( 25683), INT16_C( 1624),
|
||||
INT16_C( 0), -INT16_C( 30443), INT16_C( 0), INT16_C( 0), -INT16_C( 3566), INT16_C( 7888), INT16_C( 0), -INT16_C( 27378) } },
|
||||
};
|
||||
|
||||
for (size_t i = 0 ; i < (sizeof(test_vec) / sizeof(test_vec[0])) ; i++) {
|
||||
simde__m512i a = simde_mm512_loadu_epi16(test_vec[i].a);
|
||||
int16_t r[sizeof(simde__m512i) / sizeof(int16_t)] = {0};
|
||||
simde_mm512_mask_storeu_epi16(r, test_vec[i].k, a);
|
||||
simde_assert_equal_vi16(sizeof(r) / sizeof(r[0]), r, test_vec[i].r);
|
||||
}
|
||||
|
||||
return 0;
|
||||
#else
|
||||
fputc('\n', stdout);
|
||||
for (int i = 0 ; i < 8 ; i++) {
|
||||
simde__mmask32 k = simde_test_x86_random_mmask32();
|
||||
simde__m512i a = simde_test_x86_random_i16x32();
|
||||
int16_t r[sizeof(simde__m512i) / sizeof(int16_t)] = {0};
|
||||
simde_mm512_mask_storeu_epi16(r, k, a);
|
||||
|
||||
simde_test_x86_write_mmask32(2, k, SIMDE_TEST_VEC_POS_FIRST);
|
||||
simde_test_x86_write_i16x32(2, a, SIMDE_TEST_VEC_POS_MIDDLE);
|
||||
simde_test_codegen_write_vi16(2, sizeof(r) / sizeof(r[0]), r, SIMDE_TEST_VEC_POS_LAST);
|
||||
}
|
||||
return 1;
|
||||
#endif
|
||||
}
|
||||
|
||||
static int
|
||||
test_simde_mm512_mask_storeu_epi32 (SIMDE_MUNIT_TEST_ARGS) {
|
||||
#if 1
|
||||
static const struct {
|
||||
const simde__mmask16 k;
|
||||
const int32_t a[16];
|
||||
const int32_t r[16];
|
||||
} test_vec[] = {
|
||||
{ UINT16_C(55402),
|
||||
{ -INT32_C( 482117629), INT32_C( 1751154497), INT32_C( 358358359), -INT32_C( 1089895882), -INT32_C( 2112504547), -INT32_C( 136177260), INT32_C( 730405331), -INT32_C( 1929120887),
|
||||
-INT32_C( 1401928085), INT32_C( 487903429), INT32_C( 607285741), INT32_C( 283327475), -INT32_C( 1919747848), -INT32_C( 444304366), INT32_C( 370150797), INT32_C( 1805849344) },
|
||||
{ INT32_C( 0), INT32_C( 1751154497), INT32_C( 0), -INT32_C( 1089895882), INT32_C( 0), -INT32_C( 136177260), INT32_C( 730405331), INT32_C( 0),
|
||||
INT32_C( 0), INT32_C( 0), INT32_C( 0), INT32_C( 283327475), -INT32_C( 1919747848), INT32_C( 0), INT32_C( 370150797), INT32_C( 1805849344) } },
|
||||
{ UINT16_C( 4953),
|
||||
{ INT32_C( 753147415), INT32_C( 1839059259), -INT32_C( 659975947), INT32_C( 852599200), -INT32_C( 1297685714), -INT32_C( 658558008), -INT32_C( 303317175), INT32_C( 1107313706),
|
||||
-INT32_C( 1636899742), -INT32_C( 1425339466), INT32_C( 998552731), -INT32_C( 2073209514), INT32_C( 3609400), -INT32_C( 1881606586), -INT32_C( 528694346), INT32_C( 1763867911) },
|
||||
{ INT32_C( 753147415), INT32_C( 0), INT32_C( 0), INT32_C( 852599200), -INT32_C( 1297685714), INT32_C( 0), -INT32_C( 303317175), INT32_C( 0),
|
||||
-INT32_C( 1636899742), -INT32_C( 1425339466), INT32_C( 0), INT32_C( 0), INT32_C( 3609400), INT32_C( 0), INT32_C( 0), INT32_C( 0) } },
|
||||
{ UINT16_C(36961),
|
||||
{ INT32_C( 328931079), INT32_C( 1204238019), -INT32_C( 560194191), -INT32_C( 638462814), -INT32_C( 1395705900), INT32_C( 1131382215), -INT32_C( 2000652698), -INT32_C( 417783073),
|
||||
-INT32_C( 50678727), INT32_C( 1547944427), -INT32_C( 2126782497), -INT32_C( 2024133453), INT32_C( 724773220), INT32_C( 359572143), -INT32_C( 123916520), -INT32_C( 1965050287) },
|
||||
{ INT32_C( 328931079), INT32_C( 0), INT32_C( 0), INT32_C( 0), INT32_C( 0), INT32_C( 1131382215), -INT32_C( 2000652698), INT32_C( 0),
|
||||
INT32_C( 0), INT32_C( 0), INT32_C( 0), INT32_C( 0), INT32_C( 724773220), INT32_C( 0), INT32_C( 0), -INT32_C( 1965050287) } },
|
||||
{ UINT16_C(55659),
|
||||
{ -INT32_C( 895854969), -INT32_C( 307594830), INT32_C( 1411014138), INT32_C( 410943205), INT32_C( 398142889), -INT32_C( 549006526), -INT32_C( 1432971317), -INT32_C( 1451032286),
|
||||
INT32_C( 158539351), -INT32_C( 1829298793), INT32_C( 1625690491), INT32_C( 947414159), -INT32_C( 749784175), -INT32_C( 759982585), INT32_C( 1333610797), -INT32_C( 1577582518) },
|
||||
{ -INT32_C( 895854969), -INT32_C( 307594830), INT32_C( 0), INT32_C( 410943205), INT32_C( 0), -INT32_C( 549006526), -INT32_C( 1432971317), INT32_C( 0),
|
||||
INT32_C( 158539351), INT32_C( 0), INT32_C( 0), INT32_C( 947414159), -INT32_C( 749784175), INT32_C( 0), INT32_C( 1333610797), -INT32_C( 1577582518) } },
|
||||
{ UINT16_C(27678),
|
||||
{ -INT32_C( 1584810326), INT32_C( 783418440), -INT32_C( 577552028), -INT32_C( 921688967), -INT32_C( 1419831304), INT32_C( 1744080106), -INT32_C( 731431204), -INT32_C( 1992259873),
|
||||
-INT32_C( 2077504964), INT32_C( 867360206), -INT32_C( 1743764193), INT32_C( 1650532458), INT32_C( 571326520), INT32_C( 696844621), INT32_C( 519958591), -INT32_C( 1297662346) },
|
||||
{ INT32_C( 0), INT32_C( 783418440), -INT32_C( 577552028), -INT32_C( 921688967), -INT32_C( 1419831304), INT32_C( 0), INT32_C( 0), INT32_C( 0),
|
||||
INT32_C( 0), INT32_C( 0), -INT32_C( 1743764193), INT32_C( 1650532458), INT32_C( 0), INT32_C( 696844621), INT32_C( 519958591), INT32_C( 0) } },
|
||||
{ UINT16_C(53768),
|
||||
{ -INT32_C( 374286794), INT32_C( 422498057), -INT32_C( 918906777), INT32_C( 126448378), INT32_C( 487118484), -INT32_C( 49461249), INT32_C( 222004325), INT32_C( 1843348278),
|
||||
INT32_C( 592875289), -INT32_C( 969112482), INT32_C( 395277853), INT32_C( 2082412776), -INT32_C( 291952657), -INT32_C( 722753681), INT32_C( 1642145323), -INT32_C( 2083602071) },
|
||||
{ INT32_C( 0), INT32_C( 0), INT32_C( 0), INT32_C( 126448378), INT32_C( 0), INT32_C( 0), INT32_C( 0), INT32_C( 0),
|
||||
INT32_C( 0), -INT32_C( 969112482), INT32_C( 0), INT32_C( 0), -INT32_C( 291952657), INT32_C( 0), INT32_C( 1642145323), -INT32_C( 2083602071) } },
|
||||
{ UINT16_C( 9296),
|
||||
{ -INT32_C( 492195930), INT32_C( 72992373), -INT32_C( 65256995), INT32_C( 1461980094), -INT32_C( 436300806), INT32_C( 1225533799), INT32_C( 1493857675), -INT32_C( 1635886344),
|
||||
INT32_C( 2122393353), -INT32_C( 897393939), -INT32_C( 641229029), -INT32_C( 1540232278), -INT32_C( 443928706), -INT32_C( 466708903), INT32_C( 71120907), -INT32_C( 1667056749) },
|
||||
{ INT32_C( 0), INT32_C( 0), INT32_C( 0), INT32_C( 0), -INT32_C( 436300806), INT32_C( 0), INT32_C( 1493857675), INT32_C( 0),
|
||||
INT32_C( 0), INT32_C( 0), -INT32_C( 641229029), INT32_C( 0), INT32_C( 0), -INT32_C( 466708903), INT32_C( 0), INT32_C( 0) } },
|
||||
{ UINT16_C( 9186),
|
||||
{ -INT32_C( 1644310757), INT32_C( 1631328666), INT32_C( 592242674), INT32_C( 357812875), -INT32_C( 559174481), -INT32_C( 854149232), INT32_C( 1569302971), INT32_C( 1635871558),
|
||||
-INT32_C( 704741829), -INT32_C( 1976157289), -INT32_C( 1381137886), -INT32_C( 71106484), INT32_C( 1020882604), -INT32_C( 536154075), -INT32_C( 549547111), INT32_C( 960544766) },
|
||||
{ INT32_C( 0), INT32_C( 1631328666), INT32_C( 0), INT32_C( 0), INT32_C( 0), -INT32_C( 854149232), INT32_C( 1569302971), INT32_C( 1635871558),
|
||||
-INT32_C( 704741829), -INT32_C( 1976157289), INT32_C( 0), INT32_C( 0), INT32_C( 0), -INT32_C( 536154075), INT32_C( 0), INT32_C( 0) } },
|
||||
};
|
||||
|
||||
for (size_t i = 0 ; i < (sizeof(test_vec) / sizeof(test_vec[0])) ; i++) {
|
||||
simde__m512i a = simde_mm512_loadu_epi32(test_vec[i].a);
|
||||
int32_t r[sizeof(simde__m512i) / sizeof(int32_t)] = {0};
|
||||
simde_mm512_mask_storeu_epi32(r, test_vec[i].k, a);
|
||||
simde_assert_equal_vi32(sizeof(r) / sizeof(r[0]), r, test_vec[i].r);
|
||||
}
|
||||
|
||||
return 0;
|
||||
#else
|
||||
fputc('\n', stdout);
|
||||
for (int i = 0 ; i < 8 ; i++) {
|
||||
simde__mmask16 k = simde_test_x86_random_mmask16();
|
||||
simde__m512i a = simde_test_x86_random_i32x16();
|
||||
int32_t r[sizeof(simde__m512i) / sizeof(int32_t)] = {0};
|
||||
simde_mm512_mask_storeu_epi32(r, k, a);
|
||||
|
||||
simde_test_x86_write_mmask16(2, k, SIMDE_TEST_VEC_POS_FIRST);
|
||||
simde_test_x86_write_i32x16(2, a, SIMDE_TEST_VEC_POS_MIDDLE);
|
||||
simde_test_codegen_write_vi32(2, sizeof(r) / sizeof(r[0]), r, SIMDE_TEST_VEC_POS_LAST);
|
||||
}
|
||||
return 1;
|
||||
#endif
|
||||
}
|
||||
|
||||
static int
|
||||
test_simde_mm512_mask_storeu_epi64 (SIMDE_MUNIT_TEST_ARGS) {
|
||||
#if 1
|
||||
static const struct {
|
||||
const simde__mmask8 k;
|
||||
const int64_t a[8];
|
||||
const int64_t r[8];
|
||||
} test_vec[] = {
|
||||
{ UINT8_C(140),
|
||||
{ INT64_C( 2562700009037383963), INT64_C( 1308779348439673865), -INT64_C( 5339793039729417525), INT64_C( 2117810040372576678),
|
||||
-INT64_C( 8756891595817225406), INT64_C( 1830653111813772914), INT64_C( 2244642510274902763), -INT64_C( 8470329406450741421) },
|
||||
{ INT64_C( 0), INT64_C( 0), -INT64_C( 5339793039729417525), INT64_C( 2117810040372576678),
|
||||
INT64_C( 0), INT64_C( 0), INT64_C( 0), -INT64_C( 8470329406450741421) } },
|
||||
{ UINT8_C( 75),
|
||||
{ -INT64_C( 1089783859999285208), -INT64_C( 2980442202066504465), -INT64_C( 8508586972572412923), -INT64_C( 2592001133508411293),
|
||||
INT64_C( 1046851753557545021), INT64_C( 2508621669439293022), -INT64_C( 1206501201345372546), -INT64_C( 5947652635700358171) },
|
||||
{ -INT64_C( 1089783859999285208), -INT64_C( 2980442202066504465), INT64_C( 0), -INT64_C( 2592001133508411293),
|
||||
INT64_C( 0), INT64_C( 0), -INT64_C( 1206501201345372546), INT64_C( 0) } },
|
||||
{ UINT8_C(129),
|
||||
{ -INT64_C( 7978214924530662209), INT64_C( 3485453036345573750), INT64_C( 7716543402514060939), -INT64_C( 2051239941935222955),
|
||||
INT64_C( 5704112228317014476), INT64_C( 3861429489220180053), INT64_C( 6009345608553681571), -INT64_C( 7768178532301520854) },
|
||||
{ -INT64_C( 7978214924530662209), INT64_C( 0), INT64_C( 0), INT64_C( 0),
|
||||
INT64_C( 0), INT64_C( 0), INT64_C( 0), -INT64_C( 7768178532301520854) } },
|
||||
{ UINT8_C( 12),
|
||||
{ INT64_C( 3271359719308340477), -INT64_C( 5362930207397852061), INT64_C( 3681418865116679537), -INT64_C( 7760106128574487200),
|
||||
-INT64_C( 3873646092186471492), -INT64_C( 7930754142963100200), INT64_C( 648964377864479707), INT64_C( 5343127945035447802) },
|
||||
{ INT64_C( 0), INT64_C( 0), INT64_C( 3681418865116679537), -INT64_C( 7760106128574487200),
|
||||
INT64_C( 0), INT64_C( 0), INT64_C( 0), INT64_C( 0) } },
|
||||
{ UINT8_C(206),
|
||||
{ -INT64_C( 5787406331112235829), INT64_C( 9143259257570912954), -INT64_C( 5733309158096653857), -INT64_C( 944198849684176771),
|
||||
-INT64_C( 3085396635198874652), INT64_C( 4592194289628216930), -INT64_C( 8010739272058084751), INT64_C( 9168358635236430371) },
|
||||
{ INT64_C( 0), INT64_C( 9143259257570912954), -INT64_C( 5733309158096653857), -INT64_C( 944198849684176771),
|
||||
INT64_C( 0), INT64_C( 0), -INT64_C( 8010739272058084751), INT64_C( 9168358635236430371) } },
|
||||
{ UINT8_C(168),
|
||||
{ INT64_C( 3161412780293357061), -INT64_C( 5140635953256522890), -INT64_C( 5564941019078996866), INT64_C( 5780312172140433154),
|
||||
INT64_C( 657996772073667273), -INT64_C( 768453664766448441), INT64_C( 9080764808903925939), -INT64_C( 1799956482170727830) },
|
||||
{ INT64_C( 0), INT64_C( 0), INT64_C( 0), INT64_C( 5780312172140433154),
|
||||
INT64_C( 0), -INT64_C( 768453664766448441), INT64_C( 0), -INT64_C( 1799956482170727830) } },
|
||||
{ UINT8_C( 63),
|
||||
{ -INT64_C( 6177007952796131886), INT64_C( 6464377649729954587), INT64_C( 7021766093045041580), -INT64_C( 7488577646745760),
|
||||
-INT64_C( 5842641429838514366), -INT64_C( 3730557049928414297), -INT64_C( 4404443046703001744), INT64_C( 475778217440468589) },
|
||||
{ -INT64_C( 6177007952796131886), INT64_C( 6464377649729954587), INT64_C( 7021766093045041580), -INT64_C( 7488577646745760),
|
||||
-INT64_C( 5842641429838514366), -INT64_C( 3730557049928414297), INT64_C( 0), INT64_C( 0) } },
|
||||
{ UINT8_C( 4),
|
||||
{ INT64_C( 4360404944681387800), -INT64_C( 5923313649767848714), -INT64_C( 8452745041858835459), -INT64_C( 176954415573480647),
|
||||
INT64_C( 6776049819067163291), -INT64_C( 8283096560490092863), INT64_C( 2776613124672920530), -INT64_C( 4129740201756141875) },
|
||||
{ INT64_C( 0), INT64_C( 0), -INT64_C( 8452745041858835459), INT64_C( 0),
|
||||
INT64_C( 0), INT64_C( 0), INT64_C( 0), INT64_C( 0) } },
|
||||
};
|
||||
|
||||
for (size_t i = 0 ; i < (sizeof(test_vec) / sizeof(test_vec[0])) ; i++) {
|
||||
simde__m512i a = simde_mm512_loadu_epi64(test_vec[i].a);
|
||||
int64_t r[sizeof(simde__m512i) / sizeof(int64_t)] = {0};
|
||||
simde_mm512_mask_storeu_epi64(r, test_vec[i].k, a);
|
||||
simde_assert_equal_vi64(sizeof(r) / sizeof(r[0]), r, test_vec[i].r);
|
||||
}
|
||||
|
||||
return 0;
|
||||
#else
|
||||
fputc('\n', stdout);
|
||||
for (int i = 0 ; i < 8 ; i++) {
|
||||
simde__mmask8 k = simde_test_x86_random_mmask8();
|
||||
simde__m512i a = simde_test_x86_random_i64x8();
|
||||
int64_t r[sizeof(simde__m512i) / sizeof(int64_t)] = {0};
|
||||
simde_mm512_mask_storeu_epi64(r, k, a);
|
||||
|
||||
simde_test_x86_write_mmask8(2, k, SIMDE_TEST_VEC_POS_FIRST);
|
||||
simde_test_x86_write_i64x8(2, a, SIMDE_TEST_VEC_POS_MIDDLE);
|
||||
simde_test_codegen_write_vi64(2, sizeof(r) / sizeof(r[0]), r, SIMDE_TEST_VEC_POS_LAST);
|
||||
}
|
||||
return 1;
|
||||
#endif
|
||||
}
|
||||
|
||||
static int
|
||||
test_simde_mm512_storeu_ps (SIMDE_MUNIT_TEST_ARGS) {
|
||||
#if 1
|
||||
|
|
@ -104,7 +684,7 @@ test_simde_mm512_storeu_ps (SIMDE_MUNIT_TEST_ARGS) {
|
|||
|
||||
for (size_t i = 0 ; i < (sizeof(test_vec) / sizeof(test_vec[0])) ; i++) {
|
||||
simde__m512 a = simde_mm512_loadu_ps(test_vec[i].a);
|
||||
simde_float32 r[sizeof(simde__m512) / sizeof(simde_float32)];
|
||||
simde_float32 r[sizeof(simde__m512) / sizeof(simde_float32)] = {0};
|
||||
simde_mm512_storeu_ps(r, a);
|
||||
simde_assert_equal_vf32(sizeof(r) / sizeof(r[0]), r, test_vec[i].r, 1);
|
||||
}
|
||||
|
|
@ -114,7 +694,7 @@ test_simde_mm512_storeu_ps (SIMDE_MUNIT_TEST_ARGS) {
|
|||
fputc('\n', stdout);
|
||||
for (int i = 0 ; i < 8 ; i++) {
|
||||
simde__m512 a = simde_test_x86_random_f32x16(SIMDE_FLOAT32_C(-1000.0), SIMDE_FLOAT32_C(1000.0));
|
||||
simde_float32 r[sizeof(simde__m512) / sizeof(simde_float32)];
|
||||
simde_float32 r[sizeof(simde__m512) / sizeof(simde_float32)] = {0};
|
||||
simde_mm512_storeu_ps(r, a);
|
||||
|
||||
simde_test_x86_write_f32x16(2, a, SIMDE_TEST_VEC_POS_FIRST);
|
||||
|
|
@ -124,8 +704,287 @@ test_simde_mm512_storeu_ps (SIMDE_MUNIT_TEST_ARGS) {
|
|||
#endif
|
||||
}
|
||||
|
||||
#if defined(SIMDE_FLOAT16_IS_SCALAR)
|
||||
static int
|
||||
test_simde_mm512_storeu_ph (SIMDE_MUNIT_TEST_ARGS) {
|
||||
#if 1
|
||||
static const struct {
|
||||
const simde_float16 a[32];
|
||||
const simde_float16 r[32];
|
||||
} test_vec[] = {
|
||||
{ { SIMDE_FLOAT16_VALUE( 614.50), SIMDE_FLOAT16_VALUE( 397.50), SIMDE_FLOAT16_VALUE( 743.00), SIMDE_FLOAT16_VALUE( 963.00),
|
||||
SIMDE_FLOAT16_VALUE( 996.00), SIMDE_FLOAT16_VALUE( -396.25), SIMDE_FLOAT16_VALUE( 558.50), SIMDE_FLOAT16_VALUE( -368.25),
|
||||
SIMDE_FLOAT16_VALUE( 209.25), SIMDE_FLOAT16_VALUE( 440.00), SIMDE_FLOAT16_VALUE( -763.50), SIMDE_FLOAT16_VALUE( 731.00),
|
||||
SIMDE_FLOAT16_VALUE( -291.50), SIMDE_FLOAT16_VALUE( -477.50), SIMDE_FLOAT16_VALUE( 439.25), SIMDE_FLOAT16_VALUE( -934.50),
|
||||
SIMDE_FLOAT16_VALUE( 999.50), SIMDE_FLOAT16_VALUE( -494.75), SIMDE_FLOAT16_VALUE( 79.06), SIMDE_FLOAT16_VALUE( 249.88),
|
||||
SIMDE_FLOAT16_VALUE( -358.00), SIMDE_FLOAT16_VALUE( 242.00), SIMDE_FLOAT16_VALUE( -751.50), SIMDE_FLOAT16_VALUE( 483.25),
|
||||
SIMDE_FLOAT16_VALUE( -873.00), SIMDE_FLOAT16_VALUE( 974.50), SIMDE_FLOAT16_VALUE( -845.50), SIMDE_FLOAT16_VALUE( 801.00),
|
||||
SIMDE_FLOAT16_VALUE( -563.50), SIMDE_FLOAT16_VALUE( 43.72), SIMDE_FLOAT16_VALUE( -969.50), SIMDE_FLOAT16_VALUE( -949.00) },
|
||||
{ SIMDE_FLOAT16_VALUE( 614.50), SIMDE_FLOAT16_VALUE( 397.50), SIMDE_FLOAT16_VALUE( 743.00), SIMDE_FLOAT16_VALUE( 963.00),
|
||||
SIMDE_FLOAT16_VALUE( 996.00), SIMDE_FLOAT16_VALUE( -396.25), SIMDE_FLOAT16_VALUE( 558.50), SIMDE_FLOAT16_VALUE( -368.25),
|
||||
SIMDE_FLOAT16_VALUE( 209.25), SIMDE_FLOAT16_VALUE( 440.00), SIMDE_FLOAT16_VALUE( -763.50), SIMDE_FLOAT16_VALUE( 731.00),
|
||||
SIMDE_FLOAT16_VALUE( -291.50), SIMDE_FLOAT16_VALUE( -477.50), SIMDE_FLOAT16_VALUE( 439.25), SIMDE_FLOAT16_VALUE( -934.50),
|
||||
SIMDE_FLOAT16_VALUE( 999.50), SIMDE_FLOAT16_VALUE( -494.75), SIMDE_FLOAT16_VALUE( 79.06), SIMDE_FLOAT16_VALUE( 249.88),
|
||||
SIMDE_FLOAT16_VALUE( -358.00), SIMDE_FLOAT16_VALUE( 242.00), SIMDE_FLOAT16_VALUE( -751.50), SIMDE_FLOAT16_VALUE( 483.25),
|
||||
SIMDE_FLOAT16_VALUE( -873.00), SIMDE_FLOAT16_VALUE( 974.50), SIMDE_FLOAT16_VALUE( -845.50), SIMDE_FLOAT16_VALUE( 801.00),
|
||||
SIMDE_FLOAT16_VALUE( -563.50), SIMDE_FLOAT16_VALUE( 43.72), SIMDE_FLOAT16_VALUE( -969.50), SIMDE_FLOAT16_VALUE( -949.00) } },
|
||||
{ { SIMDE_FLOAT16_VALUE( -559.00), SIMDE_FLOAT16_VALUE( 773.50), SIMDE_FLOAT16_VALUE( -985.50), SIMDE_FLOAT16_VALUE( -562.50),
|
||||
SIMDE_FLOAT16_VALUE( -622.50), SIMDE_FLOAT16_VALUE( 572.50), SIMDE_FLOAT16_VALUE( 69.19), SIMDE_FLOAT16_VALUE( 586.50),
|
||||
SIMDE_FLOAT16_VALUE( 12.58), SIMDE_FLOAT16_VALUE( 305.75), SIMDE_FLOAT16_VALUE( 317.75), SIMDE_FLOAT16_VALUE( 721.00),
|
||||
SIMDE_FLOAT16_VALUE( 828.50), SIMDE_FLOAT16_VALUE( -243.00), SIMDE_FLOAT16_VALUE( 786.50), SIMDE_FLOAT16_VALUE( 828.00),
|
||||
SIMDE_FLOAT16_VALUE( 262.25), SIMDE_FLOAT16_VALUE( -134.50), SIMDE_FLOAT16_VALUE( 77.88), SIMDE_FLOAT16_VALUE( 904.00),
|
||||
SIMDE_FLOAT16_VALUE( -892.50), SIMDE_FLOAT16_VALUE( 326.00), SIMDE_FLOAT16_VALUE( 387.50), SIMDE_FLOAT16_VALUE( -765.50),
|
||||
SIMDE_FLOAT16_VALUE( 300.50), SIMDE_FLOAT16_VALUE( 542.00), SIMDE_FLOAT16_VALUE( -965.00), SIMDE_FLOAT16_VALUE( 737.00),
|
||||
SIMDE_FLOAT16_VALUE( -414.00), SIMDE_FLOAT16_VALUE( -934.50), SIMDE_FLOAT16_VALUE( 788.00), SIMDE_FLOAT16_VALUE( 27.16) },
|
||||
{ SIMDE_FLOAT16_VALUE( -559.00), SIMDE_FLOAT16_VALUE( 773.50), SIMDE_FLOAT16_VALUE( -985.50), SIMDE_FLOAT16_VALUE( -562.50),
|
||||
SIMDE_FLOAT16_VALUE( -622.50), SIMDE_FLOAT16_VALUE( 572.50), SIMDE_FLOAT16_VALUE( 69.19), SIMDE_FLOAT16_VALUE( 586.50),
|
||||
SIMDE_FLOAT16_VALUE( 12.58), SIMDE_FLOAT16_VALUE( 305.75), SIMDE_FLOAT16_VALUE( 317.75), SIMDE_FLOAT16_VALUE( 721.00),
|
||||
SIMDE_FLOAT16_VALUE( 828.50), SIMDE_FLOAT16_VALUE( -243.00), SIMDE_FLOAT16_VALUE( 786.50), SIMDE_FLOAT16_VALUE( 828.00),
|
||||
SIMDE_FLOAT16_VALUE( 262.25), SIMDE_FLOAT16_VALUE( -134.50), SIMDE_FLOAT16_VALUE( 77.88), SIMDE_FLOAT16_VALUE( 904.00),
|
||||
SIMDE_FLOAT16_VALUE( -892.50), SIMDE_FLOAT16_VALUE( 326.00), SIMDE_FLOAT16_VALUE( 387.50), SIMDE_FLOAT16_VALUE( -765.50),
|
||||
SIMDE_FLOAT16_VALUE( 300.50), SIMDE_FLOAT16_VALUE( 542.00), SIMDE_FLOAT16_VALUE( -965.00), SIMDE_FLOAT16_VALUE( 737.00),
|
||||
SIMDE_FLOAT16_VALUE( -414.00), SIMDE_FLOAT16_VALUE( -934.50), SIMDE_FLOAT16_VALUE( 788.00), SIMDE_FLOAT16_VALUE( 27.16) } },
|
||||
{ { SIMDE_FLOAT16_VALUE( 839.00), SIMDE_FLOAT16_VALUE( 802.50), SIMDE_FLOAT16_VALUE( 464.50), SIMDE_FLOAT16_VALUE( -783.50),
|
||||
SIMDE_FLOAT16_VALUE( 375.00), SIMDE_FLOAT16_VALUE( -466.25), SIMDE_FLOAT16_VALUE( 803.00), SIMDE_FLOAT16_VALUE( -612.50),
|
||||
SIMDE_FLOAT16_VALUE( 839.50), SIMDE_FLOAT16_VALUE( 120.81), SIMDE_FLOAT16_VALUE( -891.00), SIMDE_FLOAT16_VALUE( 668.00),
|
||||
SIMDE_FLOAT16_VALUE( 878.00), SIMDE_FLOAT16_VALUE( 895.00), SIMDE_FLOAT16_VALUE( 495.75), SIMDE_FLOAT16_VALUE( 140.00),
|
||||
SIMDE_FLOAT16_VALUE( -239.25), SIMDE_FLOAT16_VALUE( -426.50), SIMDE_FLOAT16_VALUE( 44.31), SIMDE_FLOAT16_VALUE( -131.75),
|
||||
SIMDE_FLOAT16_VALUE( 899.50), SIMDE_FLOAT16_VALUE( -568.00), SIMDE_FLOAT16_VALUE( 102.56), SIMDE_FLOAT16_VALUE( 200.00),
|
||||
SIMDE_FLOAT16_VALUE( 974.00), SIMDE_FLOAT16_VALUE( 137.75), SIMDE_FLOAT16_VALUE( -62.97), SIMDE_FLOAT16_VALUE( -440.00),
|
||||
SIMDE_FLOAT16_VALUE( 203.38), SIMDE_FLOAT16_VALUE( -275.00), SIMDE_FLOAT16_VALUE( 587.00), SIMDE_FLOAT16_VALUE( 42.59) },
|
||||
{ SIMDE_FLOAT16_VALUE( 839.00), SIMDE_FLOAT16_VALUE( 802.50), SIMDE_FLOAT16_VALUE( 464.50), SIMDE_FLOAT16_VALUE( -783.50),
|
||||
SIMDE_FLOAT16_VALUE( 375.00), SIMDE_FLOAT16_VALUE( -466.25), SIMDE_FLOAT16_VALUE( 803.00), SIMDE_FLOAT16_VALUE( -612.50),
|
||||
SIMDE_FLOAT16_VALUE( 839.50), SIMDE_FLOAT16_VALUE( 120.81), SIMDE_FLOAT16_VALUE( -891.00), SIMDE_FLOAT16_VALUE( 668.00),
|
||||
SIMDE_FLOAT16_VALUE( 878.00), SIMDE_FLOAT16_VALUE( 895.00), SIMDE_FLOAT16_VALUE( 495.75), SIMDE_FLOAT16_VALUE( 140.00),
|
||||
SIMDE_FLOAT16_VALUE( -239.25), SIMDE_FLOAT16_VALUE( -426.50), SIMDE_FLOAT16_VALUE( 44.31), SIMDE_FLOAT16_VALUE( -131.75),
|
||||
SIMDE_FLOAT16_VALUE( 899.50), SIMDE_FLOAT16_VALUE( -568.00), SIMDE_FLOAT16_VALUE( 102.56), SIMDE_FLOAT16_VALUE( 200.00),
|
||||
SIMDE_FLOAT16_VALUE( 974.00), SIMDE_FLOAT16_VALUE( 137.75), SIMDE_FLOAT16_VALUE( -62.97), SIMDE_FLOAT16_VALUE( -440.00),
|
||||
SIMDE_FLOAT16_VALUE( 203.38), SIMDE_FLOAT16_VALUE( -275.00), SIMDE_FLOAT16_VALUE( 587.00), SIMDE_FLOAT16_VALUE( 42.59) } },
|
||||
{ { SIMDE_FLOAT16_VALUE( -472.50), SIMDE_FLOAT16_VALUE( 51.56), SIMDE_FLOAT16_VALUE( 259.00), SIMDE_FLOAT16_VALUE( 902.50),
|
||||
SIMDE_FLOAT16_VALUE( 585.00), SIMDE_FLOAT16_VALUE( 62.31), SIMDE_FLOAT16_VALUE( -710.00), SIMDE_FLOAT16_VALUE( 424.75),
|
||||
SIMDE_FLOAT16_VALUE( -817.00), SIMDE_FLOAT16_VALUE( -601.00), SIMDE_FLOAT16_VALUE( 92.44), SIMDE_FLOAT16_VALUE( -939.00),
|
||||
SIMDE_FLOAT16_VALUE( -706.00), SIMDE_FLOAT16_VALUE( -411.75), SIMDE_FLOAT16_VALUE( 200.88), SIMDE_FLOAT16_VALUE( 54.81),
|
||||
SIMDE_FLOAT16_VALUE( 161.75), SIMDE_FLOAT16_VALUE( -755.00), SIMDE_FLOAT16_VALUE( 923.00), SIMDE_FLOAT16_VALUE( 61.38),
|
||||
SIMDE_FLOAT16_VALUE( -323.00), SIMDE_FLOAT16_VALUE( 25.62), SIMDE_FLOAT16_VALUE( -738.50), SIMDE_FLOAT16_VALUE( -349.00),
|
||||
SIMDE_FLOAT16_VALUE( -836.50), SIMDE_FLOAT16_VALUE( 198.50), SIMDE_FLOAT16_VALUE( 211.00), SIMDE_FLOAT16_VALUE( 366.75),
|
||||
SIMDE_FLOAT16_VALUE( 923.50), SIMDE_FLOAT16_VALUE( -201.88), SIMDE_FLOAT16_VALUE( -590.50), SIMDE_FLOAT16_VALUE( -549.00) },
|
||||
{ SIMDE_FLOAT16_VALUE( -472.50), SIMDE_FLOAT16_VALUE( 51.56), SIMDE_FLOAT16_VALUE( 259.00), SIMDE_FLOAT16_VALUE( 902.50),
|
||||
SIMDE_FLOAT16_VALUE( 585.00), SIMDE_FLOAT16_VALUE( 62.31), SIMDE_FLOAT16_VALUE( -710.00), SIMDE_FLOAT16_VALUE( 424.75),
|
||||
SIMDE_FLOAT16_VALUE( -817.00), SIMDE_FLOAT16_VALUE( -601.00), SIMDE_FLOAT16_VALUE( 92.44), SIMDE_FLOAT16_VALUE( -939.00),
|
||||
SIMDE_FLOAT16_VALUE( -706.00), SIMDE_FLOAT16_VALUE( -411.75), SIMDE_FLOAT16_VALUE( 200.88), SIMDE_FLOAT16_VALUE( 54.81),
|
||||
SIMDE_FLOAT16_VALUE( 161.75), SIMDE_FLOAT16_VALUE( -755.00), SIMDE_FLOAT16_VALUE( 923.00), SIMDE_FLOAT16_VALUE( 61.38),
|
||||
SIMDE_FLOAT16_VALUE( -323.00), SIMDE_FLOAT16_VALUE( 25.62), SIMDE_FLOAT16_VALUE( -738.50), SIMDE_FLOAT16_VALUE( -349.00),
|
||||
SIMDE_FLOAT16_VALUE( -836.50), SIMDE_FLOAT16_VALUE( 198.50), SIMDE_FLOAT16_VALUE( 211.00), SIMDE_FLOAT16_VALUE( 366.75),
|
||||
SIMDE_FLOAT16_VALUE( 923.50), SIMDE_FLOAT16_VALUE( -201.88), SIMDE_FLOAT16_VALUE( -590.50), SIMDE_FLOAT16_VALUE( -549.00) } },
|
||||
{ { SIMDE_FLOAT16_VALUE( 849.50), SIMDE_FLOAT16_VALUE( 668.50), SIMDE_FLOAT16_VALUE( -646.50), SIMDE_FLOAT16_VALUE( 435.00),
|
||||
SIMDE_FLOAT16_VALUE( -269.25), SIMDE_FLOAT16_VALUE( -356.25), SIMDE_FLOAT16_VALUE( -140.38), SIMDE_FLOAT16_VALUE( -86.06),
|
||||
SIMDE_FLOAT16_VALUE( 42.69), SIMDE_FLOAT16_VALUE( 952.00), SIMDE_FLOAT16_VALUE( -25.16), SIMDE_FLOAT16_VALUE( 336.75),
|
||||
SIMDE_FLOAT16_VALUE( -459.75), SIMDE_FLOAT16_VALUE( -824.00), SIMDE_FLOAT16_VALUE( -608.50), SIMDE_FLOAT16_VALUE( 702.00),
|
||||
SIMDE_FLOAT16_VALUE( -579.00), SIMDE_FLOAT16_VALUE( -685.50), SIMDE_FLOAT16_VALUE( -236.75), SIMDE_FLOAT16_VALUE( 98.06),
|
||||
SIMDE_FLOAT16_VALUE( 340.25), SIMDE_FLOAT16_VALUE( 24.69), SIMDE_FLOAT16_VALUE( 749.00), SIMDE_FLOAT16_VALUE( 503.75),
|
||||
SIMDE_FLOAT16_VALUE( -777.00), SIMDE_FLOAT16_VALUE( -39.78), SIMDE_FLOAT16_VALUE( -129.50), SIMDE_FLOAT16_VALUE( -853.00),
|
||||
SIMDE_FLOAT16_VALUE( 758.50), SIMDE_FLOAT16_VALUE( 280.00), SIMDE_FLOAT16_VALUE( -402.25), SIMDE_FLOAT16_VALUE( 608.00) },
|
||||
{ SIMDE_FLOAT16_VALUE( 849.50), SIMDE_FLOAT16_VALUE( 668.50), SIMDE_FLOAT16_VALUE( -646.50), SIMDE_FLOAT16_VALUE( 435.00),
|
||||
SIMDE_FLOAT16_VALUE( -269.25), SIMDE_FLOAT16_VALUE( -356.25), SIMDE_FLOAT16_VALUE( -140.38), SIMDE_FLOAT16_VALUE( -86.06),
|
||||
SIMDE_FLOAT16_VALUE( 42.69), SIMDE_FLOAT16_VALUE( 952.00), SIMDE_FLOAT16_VALUE( -25.16), SIMDE_FLOAT16_VALUE( 336.75),
|
||||
SIMDE_FLOAT16_VALUE( -459.75), SIMDE_FLOAT16_VALUE( -824.00), SIMDE_FLOAT16_VALUE( -608.50), SIMDE_FLOAT16_VALUE( 702.00),
|
||||
SIMDE_FLOAT16_VALUE( -579.00), SIMDE_FLOAT16_VALUE( -685.50), SIMDE_FLOAT16_VALUE( -236.75), SIMDE_FLOAT16_VALUE( 98.06),
|
||||
SIMDE_FLOAT16_VALUE( 340.25), SIMDE_FLOAT16_VALUE( 24.69), SIMDE_FLOAT16_VALUE( 749.00), SIMDE_FLOAT16_VALUE( 503.75),
|
||||
SIMDE_FLOAT16_VALUE( -777.00), SIMDE_FLOAT16_VALUE( -39.78), SIMDE_FLOAT16_VALUE( -129.50), SIMDE_FLOAT16_VALUE( -853.00),
|
||||
SIMDE_FLOAT16_VALUE( 758.50), SIMDE_FLOAT16_VALUE( 280.00), SIMDE_FLOAT16_VALUE( -402.25), SIMDE_FLOAT16_VALUE( 608.00) } },
|
||||
{ { SIMDE_FLOAT16_VALUE( -51.50), SIMDE_FLOAT16_VALUE( -48.50), SIMDE_FLOAT16_VALUE( 42.84), SIMDE_FLOAT16_VALUE( 679.50),
|
||||
SIMDE_FLOAT16_VALUE( 595.50), SIMDE_FLOAT16_VALUE( 902.50), SIMDE_FLOAT16_VALUE( -406.75), SIMDE_FLOAT16_VALUE( -362.00),
|
||||
SIMDE_FLOAT16_VALUE( 854.50), SIMDE_FLOAT16_VALUE( 568.00), SIMDE_FLOAT16_VALUE( 975.00), SIMDE_FLOAT16_VALUE( -605.50),
|
||||
SIMDE_FLOAT16_VALUE( 744.00), SIMDE_FLOAT16_VALUE( -633.50), SIMDE_FLOAT16_VALUE( -903.50), SIMDE_FLOAT16_VALUE( -835.00),
|
||||
SIMDE_FLOAT16_VALUE( -319.00), SIMDE_FLOAT16_VALUE( -140.25), SIMDE_FLOAT16_VALUE( 263.00), SIMDE_FLOAT16_VALUE( -979.00),
|
||||
SIMDE_FLOAT16_VALUE( 884.50), SIMDE_FLOAT16_VALUE( 12.23), SIMDE_FLOAT16_VALUE( 525.00), SIMDE_FLOAT16_VALUE( -892.50),
|
||||
SIMDE_FLOAT16_VALUE( 972.50), SIMDE_FLOAT16_VALUE( -604.50), SIMDE_FLOAT16_VALUE( -745.50), SIMDE_FLOAT16_VALUE( 731.00),
|
||||
SIMDE_FLOAT16_VALUE( 675.50), SIMDE_FLOAT16_VALUE( -147.75), SIMDE_FLOAT16_VALUE( 338.75), SIMDE_FLOAT16_VALUE( -376.00) },
|
||||
{ SIMDE_FLOAT16_VALUE( -51.50), SIMDE_FLOAT16_VALUE( -48.50), SIMDE_FLOAT16_VALUE( 42.84), SIMDE_FLOAT16_VALUE( 679.50),
|
||||
SIMDE_FLOAT16_VALUE( 595.50), SIMDE_FLOAT16_VALUE( 902.50), SIMDE_FLOAT16_VALUE( -406.75), SIMDE_FLOAT16_VALUE( -362.00),
|
||||
SIMDE_FLOAT16_VALUE( 854.50), SIMDE_FLOAT16_VALUE( 568.00), SIMDE_FLOAT16_VALUE( 975.00), SIMDE_FLOAT16_VALUE( -605.50),
|
||||
SIMDE_FLOAT16_VALUE( 744.00), SIMDE_FLOAT16_VALUE( -633.50), SIMDE_FLOAT16_VALUE( -903.50), SIMDE_FLOAT16_VALUE( -835.00),
|
||||
SIMDE_FLOAT16_VALUE( -319.00), SIMDE_FLOAT16_VALUE( -140.25), SIMDE_FLOAT16_VALUE( 263.00), SIMDE_FLOAT16_VALUE( -979.00),
|
||||
SIMDE_FLOAT16_VALUE( 884.50), SIMDE_FLOAT16_VALUE( 12.23), SIMDE_FLOAT16_VALUE( 525.00), SIMDE_FLOAT16_VALUE( -892.50),
|
||||
SIMDE_FLOAT16_VALUE( 972.50), SIMDE_FLOAT16_VALUE( -604.50), SIMDE_FLOAT16_VALUE( -745.50), SIMDE_FLOAT16_VALUE( 731.00),
|
||||
SIMDE_FLOAT16_VALUE( 675.50), SIMDE_FLOAT16_VALUE( -147.75), SIMDE_FLOAT16_VALUE( 338.75), SIMDE_FLOAT16_VALUE( -376.00) } },
|
||||
{ { SIMDE_FLOAT16_VALUE( 803.50), SIMDE_FLOAT16_VALUE( -618.50), SIMDE_FLOAT16_VALUE( -697.00), SIMDE_FLOAT16_VALUE( 399.00),
|
||||
SIMDE_FLOAT16_VALUE( -716.00), SIMDE_FLOAT16_VALUE( -103.50), SIMDE_FLOAT16_VALUE( -963.00), SIMDE_FLOAT16_VALUE( -861.50),
|
||||
SIMDE_FLOAT16_VALUE( -535.50), SIMDE_FLOAT16_VALUE( -988.50), SIMDE_FLOAT16_VALUE( -467.00), SIMDE_FLOAT16_VALUE( -791.50),
|
||||
SIMDE_FLOAT16_VALUE( -622.00), SIMDE_FLOAT16_VALUE( -370.50), SIMDE_FLOAT16_VALUE( -626.50), SIMDE_FLOAT16_VALUE( 59.03),
|
||||
SIMDE_FLOAT16_VALUE( 489.25), SIMDE_FLOAT16_VALUE( 636.50), SIMDE_FLOAT16_VALUE( 80.25), SIMDE_FLOAT16_VALUE( 373.75),
|
||||
SIMDE_FLOAT16_VALUE( -351.25), SIMDE_FLOAT16_VALUE( -394.75), SIMDE_FLOAT16_VALUE( 481.25), SIMDE_FLOAT16_VALUE( -378.75),
|
||||
SIMDE_FLOAT16_VALUE( 0.61), SIMDE_FLOAT16_VALUE( 735.50), SIMDE_FLOAT16_VALUE( -648.00), SIMDE_FLOAT16_VALUE( -324.00),
|
||||
SIMDE_FLOAT16_VALUE( -412.25), SIMDE_FLOAT16_VALUE( 690.50), SIMDE_FLOAT16_VALUE( 299.75), SIMDE_FLOAT16_VALUE( -608.50) },
|
||||
{ SIMDE_FLOAT16_VALUE( 803.50), SIMDE_FLOAT16_VALUE( -618.50), SIMDE_FLOAT16_VALUE( -697.00), SIMDE_FLOAT16_VALUE( 399.00),
|
||||
SIMDE_FLOAT16_VALUE( -716.00), SIMDE_FLOAT16_VALUE( -103.50), SIMDE_FLOAT16_VALUE( -963.00), SIMDE_FLOAT16_VALUE( -861.50),
|
||||
SIMDE_FLOAT16_VALUE( -535.50), SIMDE_FLOAT16_VALUE( -988.50), SIMDE_FLOAT16_VALUE( -467.00), SIMDE_FLOAT16_VALUE( -791.50),
|
||||
SIMDE_FLOAT16_VALUE( -622.00), SIMDE_FLOAT16_VALUE( -370.50), SIMDE_FLOAT16_VALUE( -626.50), SIMDE_FLOAT16_VALUE( 59.03),
|
||||
SIMDE_FLOAT16_VALUE( 489.25), SIMDE_FLOAT16_VALUE( 636.50), SIMDE_FLOAT16_VALUE( 80.25), SIMDE_FLOAT16_VALUE( 373.75),
|
||||
SIMDE_FLOAT16_VALUE( -351.25), SIMDE_FLOAT16_VALUE( -394.75), SIMDE_FLOAT16_VALUE( 481.25), SIMDE_FLOAT16_VALUE( -378.75),
|
||||
SIMDE_FLOAT16_VALUE( 0.61), SIMDE_FLOAT16_VALUE( 735.50), SIMDE_FLOAT16_VALUE( -648.00), SIMDE_FLOAT16_VALUE( -324.00),
|
||||
SIMDE_FLOAT16_VALUE( -412.25), SIMDE_FLOAT16_VALUE( 690.50), SIMDE_FLOAT16_VALUE( 299.75), SIMDE_FLOAT16_VALUE( -608.50) } },
|
||||
{ { SIMDE_FLOAT16_VALUE( -927.50), SIMDE_FLOAT16_VALUE( 603.00), SIMDE_FLOAT16_VALUE( 790.50), SIMDE_FLOAT16_VALUE( -644.00),
|
||||
SIMDE_FLOAT16_VALUE( -500.50), SIMDE_FLOAT16_VALUE( 827.50), SIMDE_FLOAT16_VALUE( -505.25), SIMDE_FLOAT16_VALUE( -35.69),
|
||||
SIMDE_FLOAT16_VALUE( 839.00), SIMDE_FLOAT16_VALUE( 27.69), SIMDE_FLOAT16_VALUE( 172.88), SIMDE_FLOAT16_VALUE( -783.00),
|
||||
SIMDE_FLOAT16_VALUE( 657.00), SIMDE_FLOAT16_VALUE( 546.50), SIMDE_FLOAT16_VALUE( 276.25), SIMDE_FLOAT16_VALUE( 146.50),
|
||||
SIMDE_FLOAT16_VALUE( 183.00), SIMDE_FLOAT16_VALUE( -643.50), SIMDE_FLOAT16_VALUE( -479.75), SIMDE_FLOAT16_VALUE( 832.00),
|
||||
SIMDE_FLOAT16_VALUE( -38.28), SIMDE_FLOAT16_VALUE( -998.50), SIMDE_FLOAT16_VALUE( -547.00), SIMDE_FLOAT16_VALUE( 962.50),
|
||||
SIMDE_FLOAT16_VALUE( 737.00), SIMDE_FLOAT16_VALUE( -194.88), SIMDE_FLOAT16_VALUE( -361.75), SIMDE_FLOAT16_VALUE( -675.00),
|
||||
SIMDE_FLOAT16_VALUE( -504.00), SIMDE_FLOAT16_VALUE( 938.00), SIMDE_FLOAT16_VALUE( -283.50), SIMDE_FLOAT16_VALUE( -431.75) },
|
||||
{ SIMDE_FLOAT16_VALUE( -927.50), SIMDE_FLOAT16_VALUE( 603.00), SIMDE_FLOAT16_VALUE( 790.50), SIMDE_FLOAT16_VALUE( -644.00),
|
||||
SIMDE_FLOAT16_VALUE( -500.50), SIMDE_FLOAT16_VALUE( 827.50), SIMDE_FLOAT16_VALUE( -505.25), SIMDE_FLOAT16_VALUE( -35.69),
|
||||
SIMDE_FLOAT16_VALUE( 839.00), SIMDE_FLOAT16_VALUE( 27.69), SIMDE_FLOAT16_VALUE( 172.88), SIMDE_FLOAT16_VALUE( -783.00),
|
||||
SIMDE_FLOAT16_VALUE( 657.00), SIMDE_FLOAT16_VALUE( 546.50), SIMDE_FLOAT16_VALUE( 276.25), SIMDE_FLOAT16_VALUE( 146.50),
|
||||
SIMDE_FLOAT16_VALUE( 183.00), SIMDE_FLOAT16_VALUE( -643.50), SIMDE_FLOAT16_VALUE( -479.75), SIMDE_FLOAT16_VALUE( 832.00),
|
||||
SIMDE_FLOAT16_VALUE( -38.28), SIMDE_FLOAT16_VALUE( -998.50), SIMDE_FLOAT16_VALUE( -547.00), SIMDE_FLOAT16_VALUE( 962.50),
|
||||
SIMDE_FLOAT16_VALUE( 737.00), SIMDE_FLOAT16_VALUE( -194.88), SIMDE_FLOAT16_VALUE( -361.75), SIMDE_FLOAT16_VALUE( -675.00),
|
||||
SIMDE_FLOAT16_VALUE( -504.00), SIMDE_FLOAT16_VALUE( 938.00), SIMDE_FLOAT16_VALUE( -283.50), SIMDE_FLOAT16_VALUE( -431.75) } },
|
||||
};
|
||||
|
||||
for (size_t i = 0 ; i < (sizeof(test_vec) / sizeof(test_vec[0])) ; i++) {
|
||||
simde__m512h a = simde_mm512_loadu_ph(test_vec[i].a);
|
||||
simde_float16 r[sizeof(simde__m512) / sizeof(simde_float16)] = { SIMDE_FLOAT16_VALUE(0.00) };
|
||||
simde_mm512_storeu_ph(r, a);
|
||||
simde_assert_equal_vf16(sizeof(r) / sizeof(r[0]), r, test_vec[i].r, 1);
|
||||
}
|
||||
|
||||
return 0;
|
||||
#else
|
||||
fputc('\n', stdout);
|
||||
for (int i = 0 ; i < 8 ; i++) {
|
||||
simde__m512h a = simde_test_x86_random_f16x32(SIMDE_FLOAT16_VALUE(-1000.0), SIMDE_FLOAT16_VALUE(1000.0));
|
||||
simde_float16 r[sizeof(simde__m512) / sizeof(simde_float16)] = {0};
|
||||
simde_mm512_storeu_ph(r, a);
|
||||
|
||||
simde_test_x86_write_f16x32(2, a, SIMDE_TEST_VEC_POS_FIRST);
|
||||
simde_test_codegen_write_vf16(2, sizeof(r) / sizeof(r[0]), r, SIMDE_TEST_VEC_POS_LAST);
|
||||
}
|
||||
return 1;
|
||||
#endif
|
||||
}
|
||||
#endif
|
||||
|
||||
static int
|
||||
test_simde_mm512_mask_storeu_ps (SIMDE_MUNIT_TEST_ARGS) {
|
||||
#if 1
|
||||
static const struct {
|
||||
const simde__mmask16 k;
|
||||
const simde_float32 a[16];
|
||||
const simde_float32 r[16];
|
||||
} test_vec[] = {
|
||||
{ UINT32_C( 7865),
|
||||
{ SIMDE_FLOAT32_C( -286.88), SIMDE_FLOAT32_C( -712.57), SIMDE_FLOAT32_C( 535.33), SIMDE_FLOAT32_C( -422.10),
|
||||
SIMDE_FLOAT32_C( 535.50), SIMDE_FLOAT32_C( -31.61), SIMDE_FLOAT32_C( 662.71), SIMDE_FLOAT32_C( 715.73),
|
||||
SIMDE_FLOAT32_C( -24.31), SIMDE_FLOAT32_C( 499.53), SIMDE_FLOAT32_C( 480.56), SIMDE_FLOAT32_C( -172.05),
|
||||
SIMDE_FLOAT32_C( 947.38), SIMDE_FLOAT32_C( -179.67), SIMDE_FLOAT32_C( -314.08), SIMDE_FLOAT32_C( -467.39) },
|
||||
{ SIMDE_FLOAT32_C( -286.88), SIMDE_FLOAT32_C( 0.00), SIMDE_FLOAT32_C( 0.00), SIMDE_FLOAT32_C( -422.10),
|
||||
SIMDE_FLOAT32_C( 535.50), SIMDE_FLOAT32_C( -31.61), SIMDE_FLOAT32_C( 0.00), SIMDE_FLOAT32_C( 715.73),
|
||||
SIMDE_FLOAT32_C( 0.00), SIMDE_FLOAT32_C( 499.53), SIMDE_FLOAT32_C( 480.56), SIMDE_FLOAT32_C( -172.05),
|
||||
SIMDE_FLOAT32_C( 947.38), SIMDE_FLOAT32_C( 0.00), SIMDE_FLOAT32_C( 0.00), SIMDE_FLOAT32_C( 0.00) } },
|
||||
{ UINT32_C( 13393),
|
||||
{ SIMDE_FLOAT32_C( -376.40), SIMDE_FLOAT32_C( 155.39), SIMDE_FLOAT32_C( 746.47), SIMDE_FLOAT32_C( 426.83),
|
||||
SIMDE_FLOAT32_C( -220.63), SIMDE_FLOAT32_C( 72.51), SIMDE_FLOAT32_C( -599.14), SIMDE_FLOAT32_C( -398.66),
|
||||
SIMDE_FLOAT32_C( 715.40), SIMDE_FLOAT32_C( 828.16), SIMDE_FLOAT32_C( -864.09), SIMDE_FLOAT32_C( 74.53),
|
||||
SIMDE_FLOAT32_C( 206.13), SIMDE_FLOAT32_C( -150.97), SIMDE_FLOAT32_C( 361.96), SIMDE_FLOAT32_C( -258.54) },
|
||||
{ SIMDE_FLOAT32_C( -376.40), SIMDE_FLOAT32_C( 0.00), SIMDE_FLOAT32_C( 0.00), SIMDE_FLOAT32_C( 0.00),
|
||||
SIMDE_FLOAT32_C( -220.63), SIMDE_FLOAT32_C( 0.00), SIMDE_FLOAT32_C( -599.14), SIMDE_FLOAT32_C( 0.00),
|
||||
SIMDE_FLOAT32_C( 0.00), SIMDE_FLOAT32_C( 0.00), SIMDE_FLOAT32_C( -864.09), SIMDE_FLOAT32_C( 0.00),
|
||||
SIMDE_FLOAT32_C( 206.13), SIMDE_FLOAT32_C( -150.97), SIMDE_FLOAT32_C( 0.00), SIMDE_FLOAT32_C( 0.00) } },
|
||||
{ UINT32_C( 29383),
|
||||
{ SIMDE_FLOAT32_C( 709.85), SIMDE_FLOAT32_C( 89.64), SIMDE_FLOAT32_C( -386.81), SIMDE_FLOAT32_C( -314.46),
|
||||
SIMDE_FLOAT32_C( -410.82), SIMDE_FLOAT32_C( -906.25), SIMDE_FLOAT32_C( 513.48), SIMDE_FLOAT32_C( -463.44),
|
||||
SIMDE_FLOAT32_C( -85.92), SIMDE_FLOAT32_C( -800.59), SIMDE_FLOAT32_C( 69.17), SIMDE_FLOAT32_C( -147.43),
|
||||
SIMDE_FLOAT32_C( -254.83), SIMDE_FLOAT32_C( 692.76), SIMDE_FLOAT32_C( -992.04), SIMDE_FLOAT32_C( -508.36) },
|
||||
{ SIMDE_FLOAT32_C( 709.85), SIMDE_FLOAT32_C( 89.64), SIMDE_FLOAT32_C( -386.81), SIMDE_FLOAT32_C( 0.00),
|
||||
SIMDE_FLOAT32_C( 0.00), SIMDE_FLOAT32_C( 0.00), SIMDE_FLOAT32_C( 513.48), SIMDE_FLOAT32_C( -463.44),
|
||||
SIMDE_FLOAT32_C( 0.00), SIMDE_FLOAT32_C( -800.59), SIMDE_FLOAT32_C( 0.00), SIMDE_FLOAT32_C( 0.00),
|
||||
SIMDE_FLOAT32_C( -254.83), SIMDE_FLOAT32_C( 692.76), SIMDE_FLOAT32_C( -992.04), SIMDE_FLOAT32_C( 0.00) } },
|
||||
{ UINT32_C( 58153),
|
||||
{ SIMDE_FLOAT32_C( 564.15), SIMDE_FLOAT32_C( 520.45), SIMDE_FLOAT32_C( 388.67), SIMDE_FLOAT32_C( 279.56),
|
||||
SIMDE_FLOAT32_C( 348.62), SIMDE_FLOAT32_C( 524.58), SIMDE_FLOAT32_C( -645.91), SIMDE_FLOAT32_C( -445.25),
|
||||
SIMDE_FLOAT32_C( -626.39), SIMDE_FLOAT32_C( 716.05), SIMDE_FLOAT32_C( 296.21), SIMDE_FLOAT32_C( 800.54),
|
||||
SIMDE_FLOAT32_C( -386.50), SIMDE_FLOAT32_C( 6.06), SIMDE_FLOAT32_C( -109.82), SIMDE_FLOAT32_C( 226.69) },
|
||||
{ SIMDE_FLOAT32_C( 564.15), SIMDE_FLOAT32_C( 0.00), SIMDE_FLOAT32_C( 0.00), SIMDE_FLOAT32_C( 279.56),
|
||||
SIMDE_FLOAT32_C( 0.00), SIMDE_FLOAT32_C( 524.58), SIMDE_FLOAT32_C( 0.00), SIMDE_FLOAT32_C( 0.00),
|
||||
SIMDE_FLOAT32_C( -626.39), SIMDE_FLOAT32_C( 716.05), SIMDE_FLOAT32_C( 0.00), SIMDE_FLOAT32_C( 0.00),
|
||||
SIMDE_FLOAT32_C( 0.00), SIMDE_FLOAT32_C( 6.06), SIMDE_FLOAT32_C( -109.82), SIMDE_FLOAT32_C( 226.69) } },
|
||||
{ UINT32_C( 54955),
|
||||
{ SIMDE_FLOAT32_C( 320.44), SIMDE_FLOAT32_C( 205.08), SIMDE_FLOAT32_C( -984.08), SIMDE_FLOAT32_C( -765.48),
|
||||
SIMDE_FLOAT32_C( 404.49), SIMDE_FLOAT32_C( 85.08), SIMDE_FLOAT32_C( 87.10), SIMDE_FLOAT32_C( -850.34),
|
||||
SIMDE_FLOAT32_C( -222.15), SIMDE_FLOAT32_C( 95.06), SIMDE_FLOAT32_C( -358.70), SIMDE_FLOAT32_C( 897.44),
|
||||
SIMDE_FLOAT32_C( 882.39), SIMDE_FLOAT32_C( -794.55), SIMDE_FLOAT32_C( 417.89), SIMDE_FLOAT32_C( 271.06) },
|
||||
{ SIMDE_FLOAT32_C( 320.44), SIMDE_FLOAT32_C( 205.08), SIMDE_FLOAT32_C( 0.00), SIMDE_FLOAT32_C( -765.48),
|
||||
SIMDE_FLOAT32_C( 0.00), SIMDE_FLOAT32_C( 85.08), SIMDE_FLOAT32_C( 0.00), SIMDE_FLOAT32_C( -850.34),
|
||||
SIMDE_FLOAT32_C( 0.00), SIMDE_FLOAT32_C( 95.06), SIMDE_FLOAT32_C( -358.70), SIMDE_FLOAT32_C( 0.00),
|
||||
SIMDE_FLOAT32_C( 882.39), SIMDE_FLOAT32_C( 0.00), SIMDE_FLOAT32_C( 417.89), SIMDE_FLOAT32_C( 271.06) } },
|
||||
{ UINT32_C( 19422),
|
||||
{ SIMDE_FLOAT32_C( -204.36), SIMDE_FLOAT32_C( 839.09), SIMDE_FLOAT32_C( 321.26), SIMDE_FLOAT32_C( 169.25),
|
||||
SIMDE_FLOAT32_C( 555.14), SIMDE_FLOAT32_C( -382.52), SIMDE_FLOAT32_C( -30.21), SIMDE_FLOAT32_C( -831.36),
|
||||
SIMDE_FLOAT32_C( 623.54), SIMDE_FLOAT32_C( 859.97), SIMDE_FLOAT32_C( 395.33), SIMDE_FLOAT32_C( 315.14),
|
||||
SIMDE_FLOAT32_C( 339.33), SIMDE_FLOAT32_C( -284.22), SIMDE_FLOAT32_C( -479.78), SIMDE_FLOAT32_C( 355.24) },
|
||||
{ SIMDE_FLOAT32_C( 0.00), SIMDE_FLOAT32_C( 839.09), SIMDE_FLOAT32_C( 321.26), SIMDE_FLOAT32_C( 169.25),
|
||||
SIMDE_FLOAT32_C( 555.14), SIMDE_FLOAT32_C( 0.00), SIMDE_FLOAT32_C( -30.21), SIMDE_FLOAT32_C( -831.36),
|
||||
SIMDE_FLOAT32_C( 623.54), SIMDE_FLOAT32_C( 859.97), SIMDE_FLOAT32_C( 0.00), SIMDE_FLOAT32_C( 315.14),
|
||||
SIMDE_FLOAT32_C( 0.00), SIMDE_FLOAT32_C( 0.00), SIMDE_FLOAT32_C( -479.78), SIMDE_FLOAT32_C( 0.00) } },
|
||||
{ UINT32_C( 34841),
|
||||
{ SIMDE_FLOAT32_C( -559.67), SIMDE_FLOAT32_C( -962.60), SIMDE_FLOAT32_C( -925.63), SIMDE_FLOAT32_C( 218.17),
|
||||
SIMDE_FLOAT32_C( 132.45), SIMDE_FLOAT32_C( -284.34), SIMDE_FLOAT32_C( 115.61), SIMDE_FLOAT32_C( 14.84),
|
||||
SIMDE_FLOAT32_C( -78.89), SIMDE_FLOAT32_C( -466.49), SIMDE_FLOAT32_C( -714.10), SIMDE_FLOAT32_C( -593.88),
|
||||
SIMDE_FLOAT32_C( 300.02), SIMDE_FLOAT32_C( 81.54), SIMDE_FLOAT32_C( -754.79), SIMDE_FLOAT32_C( -378.72) },
|
||||
{ SIMDE_FLOAT32_C( -559.67), SIMDE_FLOAT32_C( 0.00), SIMDE_FLOAT32_C( 0.00), SIMDE_FLOAT32_C( 218.17),
|
||||
SIMDE_FLOAT32_C( 132.45), SIMDE_FLOAT32_C( 0.00), SIMDE_FLOAT32_C( 0.00), SIMDE_FLOAT32_C( 0.00),
|
||||
SIMDE_FLOAT32_C( 0.00), SIMDE_FLOAT32_C( 0.00), SIMDE_FLOAT32_C( 0.00), SIMDE_FLOAT32_C( -593.88),
|
||||
SIMDE_FLOAT32_C( 0.00), SIMDE_FLOAT32_C( 0.00), SIMDE_FLOAT32_C( 0.00), SIMDE_FLOAT32_C( -378.72) } },
|
||||
{ UINT32_C( 16183),
|
||||
{ SIMDE_FLOAT32_C( 238.76), SIMDE_FLOAT32_C( 220.58), SIMDE_FLOAT32_C( 968.99), SIMDE_FLOAT32_C( -137.70),
|
||||
SIMDE_FLOAT32_C( 80.55), SIMDE_FLOAT32_C( 364.32), SIMDE_FLOAT32_C( -822.56), SIMDE_FLOAT32_C( -580.12),
|
||||
SIMDE_FLOAT32_C( -919.90), SIMDE_FLOAT32_C( -302.34), SIMDE_FLOAT32_C( 775.12), SIMDE_FLOAT32_C( 30.40),
|
||||
SIMDE_FLOAT32_C( -377.63), SIMDE_FLOAT32_C( -784.55), SIMDE_FLOAT32_C( 67.80), SIMDE_FLOAT32_C( -303.26) },
|
||||
{ SIMDE_FLOAT32_C( 238.76), SIMDE_FLOAT32_C( 220.58), SIMDE_FLOAT32_C( 968.99), SIMDE_FLOAT32_C( 0.00),
|
||||
SIMDE_FLOAT32_C( 80.55), SIMDE_FLOAT32_C( 364.32), SIMDE_FLOAT32_C( 0.00), SIMDE_FLOAT32_C( 0.00),
|
||||
SIMDE_FLOAT32_C( -919.90), SIMDE_FLOAT32_C( -302.34), SIMDE_FLOAT32_C( 775.12), SIMDE_FLOAT32_C( 30.40),
|
||||
SIMDE_FLOAT32_C( -377.63), SIMDE_FLOAT32_C( -784.55), SIMDE_FLOAT32_C( 0.00), SIMDE_FLOAT32_C( 0.00) } },
|
||||
};
|
||||
|
||||
for (size_t i = 0 ; i < (sizeof(test_vec) / sizeof(test_vec[0])) ; i++) {
|
||||
simde__m512 a = simde_mm512_loadu_ps(test_vec[i].a);
|
||||
simde_float32 r[sizeof(simde__m512) / sizeof(simde_float32)] = {0};
|
||||
simde_mm512_mask_storeu_ps(r, test_vec[i].k, a);
|
||||
simde_assert_equal_vf32(sizeof(r) / sizeof(r[0]), r, test_vec[i].r, 1);
|
||||
}
|
||||
|
||||
return 0;
|
||||
#else
|
||||
fputc('\n', stdout);
|
||||
for (int i = 0 ; i < 8 ; i++) {
|
||||
simde__mmask16 k = simde_test_x86_random_mmask16();
|
||||
simde__m512 a = simde_test_x86_random_f32x16(SIMDE_FLOAT32_C(-1000.0), SIMDE_FLOAT32_C(1000.0));
|
||||
simde_float32 r[sizeof(simde__m512) / sizeof(simde_float32)] = {0};
|
||||
simde_mm512_mask_storeu_ps(r, k, a);
|
||||
|
||||
simde_test_x86_write_mmask32(2, k, SIMDE_TEST_VEC_POS_FIRST);
|
||||
simde_test_x86_write_f32x16(2, a, SIMDE_TEST_VEC_POS_MIDDLE);
|
||||
simde_test_codegen_write_vf32(2, sizeof(r) / sizeof(r[0]), r, SIMDE_TEST_VEC_POS_LAST);
|
||||
}
|
||||
return 1;
|
||||
#endif
|
||||
}
|
||||
|
||||
SIMDE_TEST_FUNC_LIST_BEGIN
|
||||
SIMDE_TEST_FUNC_LIST_ENTRY(mm512_storeu_ps)
|
||||
SIMDE_TEST_FUNC_LIST_ENTRY(mm256_storeu_epi8)
|
||||
SIMDE_TEST_FUNC_LIST_ENTRY(mm256_storeu_epi16)
|
||||
SIMDE_TEST_FUNC_LIST_ENTRY(mm256_mask_storeu_epi16)
|
||||
SIMDE_TEST_FUNC_LIST_ENTRY(mm256_storeu_epi32)
|
||||
SIMDE_TEST_FUNC_LIST_ENTRY(mm256_storeu_epi64)
|
||||
SIMDE_TEST_FUNC_LIST_ENTRY(mm512_mask_storeu_epi16)
|
||||
SIMDE_TEST_FUNC_LIST_ENTRY(mm512_mask_storeu_epi32)
|
||||
SIMDE_TEST_FUNC_LIST_ENTRY(mm512_mask_storeu_epi64)
|
||||
SIMDE_TEST_FUNC_LIST_ENTRY(mm512_storeu_ps)
|
||||
SIMDE_TEST_FUNC_LIST_ENTRY(mm512_mask_storeu_ps)
|
||||
#if defined(SIMDE_FLOAT16_IS_SCALAR)
|
||||
SIMDE_TEST_FUNC_LIST_ENTRY(mm512_storeu_ph)
|
||||
#endif
|
||||
SIMDE_TEST_FUNC_LIST_END
|
||||
|
||||
#include <test/x86/avx512/test-avx512-footer.h>
|
||||
|
|
|
|||
|
|
@ -6,8 +6,12 @@
|
|||
#include "../../../simde/x86/avx512/storeu.h"
|
||||
#include "../../../simde/x86/avx512/loadu.h"
|
||||
|
||||
HEDLEY_DIAGNOSTIC_PUSH
|
||||
SIMDE_DISABLE_UNWANTED_DIAGNOSTICS
|
||||
|
||||
SIMDE_TEST_X86_GENERATE_FLOAT_TYPE_FUNCS_(__m512, 32, 16, simde_mm512_storeu_ps)
|
||||
SIMDE_TEST_X86_GENERATE_FLOAT_TYPE_FUNCS_(__m512d, 64, 8, simde_mm512_storeu_pd)
|
||||
SIMDE_TEST_X86_GENERATE_FLOAT_TYPE_FUNCS_(__m512h, 16, 32, simde_mm512_storeu_ph)
|
||||
SIMDE_TEST_X86_GENERATE_INT_TYPE_FUNCS_(__m512i, 8, 64, simde_mm512_storeu_si512)
|
||||
SIMDE_TEST_X86_GENERATE_INT_TYPE_FUNCS_(__m512i, 16, 32, simde_mm512_storeu_si512)
|
||||
SIMDE_TEST_X86_GENERATE_INT_TYPE_FUNCS_(__m512i, 32, 16, simde_mm512_storeu_si512)
|
||||
|
|
@ -33,6 +37,7 @@ SIMDE_TEST_X86_GENERATE_MASK_FUNCS_(16)
|
|||
SIMDE_TEST_X86_GENERATE_MASK_FUNCS_(32)
|
||||
SIMDE_TEST_X86_GENERATE_MASK_FUNCS_(64)
|
||||
|
||||
#define simde_test_x86_assert_equal_f16x32(a, b, precision) do { if (simde_test_x86_assert_equal_f16x32_(a, b, simde_test_f16_precision_to_slop(precision), __FILE__, __LINE__, #a, #b)) { return 1; } } while (0)
|
||||
#define simde_test_x86_assert_equal_f32x16(a, b, precision) do { if (simde_test_x86_assert_equal_f32x16_(a, b, simde_test_f32_precision_to_slop(precision), __FILE__, __LINE__, #a, #b)) { return 1; } } while (0)
|
||||
#define simde_test_x86_assert_equal_f64x8(a, b, precision) do { if (simde_test_x86_assert_equal_f64x8_(a, b, simde_test_f64_precision_to_slop(precision), __FILE__, __LINE__, #a, #b)) { return 1; } } while (0)
|
||||
#define simde_test_x86_assert_equal_i8x64(a, b) do { if (simde_test_x86_assert_equal_i8x64_(a, b, __FILE__, __LINE__, #a, #b)) { return 1; } } while (0)
|
||||
|
|
@ -44,6 +49,9 @@ SIMDE_TEST_X86_GENERATE_MASK_FUNCS_(64)
|
|||
#define simde_test_x86_assert_equal_u32x16(a, b) do { if (simde_test_x86_assert_equal_u32x16_(a, b, __FILE__, __LINE__, #a, #b)) { return 1; } } while (0)
|
||||
#define simde_test_x86_assert_equal_u64x8(a, b) do { if (simde_test_x86_assert_equal_u64x8_(a, b, __FILE__, __LINE__, #a, #b)) { return 1; } } while (0)
|
||||
|
||||
/* SIMDE_DISABLE_UNWANTED_DIAGNOSTICS */
|
||||
HEDLEY_DIAGNOSTIC_POP
|
||||
|
||||
#if !defined(SIMDE_TEST_BARE)
|
||||
#define SIMDE_TEST_DECLARE_SUITE(name) SIMDE_TEST_SUITE_DECLARE_GETTERS(HEDLEY_CONCAT(simde_test_x86_avx512_get_suite_,name))
|
||||
#include <test/x86/avx512/declare-suites.h>
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue