Update googletest to 1.18.0 and SIMDe to 0.8.2.
Googletest 1.18 asks for CMake 3.13 or newer, so configuring the tests no longer warns that CMake compatibility below 3.10 is deprecated. Co-authored-by: Cursor <cursoragent@cursor.com>
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912 changed files with 224964 additions and 11502 deletions
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thirdparty/simde/test/x86/avx512/fpclass.c
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thirdparty/simde/test/x86/avx512/fpclass.c
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/* SPDX-License-Identifier: MIT
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*
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* Permission is hereby granted, free of charge, to any person
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* obtaining a copy of this software and associated documentation
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* files (the "Software"), to deal in the Software without
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* restriction, including without limitation the rights to use, copy,
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* modify, merge, publish, distribute, sublicense, and/or sell copies
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* of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be
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* included in all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
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* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
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* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*
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* Copyright:
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* 2023 Michael R. Crusoe <crusoe@debian.org>
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*/
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#define SIMDE_TEST_X86_AVX512_INSN fpclass
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#include <test/x86/avx512/test-avx512.h>
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#include <simde/x86/avx512/fpclass.h>
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static int
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test_simde_mm256_fpclass_ps_mask (SIMDE_MUNIT_TEST_ARGS) {
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#if 1
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simde_float32 sNaNf = simde_uint32_as_float32(0xff800011),
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denormalf = simde_uint32_as_float32(0x007fffff);
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simde__m256 a = simde_mm256_set_ps(
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SIMDE_MATH_NANF , SIMDE_FLOAT32_C(0.0),
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-SIMDE_FLOAT32_C(0.0) , SIMDE_MATH_INFINITYF,
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-SIMDE_MATH_INFINITYF , denormalf,
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-SIMDE_FLOAT32_C(42.23), sNaNf);
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simde_assert_equal_mmask8(simde_mm256_fpclass_ps_mask(a, 0x01), 128);
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simde_assert_equal_mmask8(simde_mm256_fpclass_ps_mask(a, 0x02), 64);
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simde_assert_equal_mmask8(simde_mm256_fpclass_ps_mask(a, 0x04), 32);
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simde_assert_equal_mmask8(simde_mm256_fpclass_ps_mask(a, 0x08), 16);
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simde_assert_equal_mmask8(simde_mm256_fpclass_ps_mask(a, 0x10), 8);
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simde_assert_equal_mmask8(simde_mm256_fpclass_ps_mask(a, 0x20), 4);
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simde_assert_equal_mmask8(simde_mm256_fpclass_ps_mask(a, 0x40), 2);
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simde_assert_equal_mmask8(simde_mm256_fpclass_ps_mask(a, 0x80), 1);
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return 0;
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#else
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fputc('\n', stdout);
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simde_float32 sNaNf = simde_uint32_as_float32(0xff800011),
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denormalf = simde_uint32_as_float32(0x007fffff);
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simde__m256 a = simde_mm256_set_ps(
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SIMDE_MATH_NANF , SIMDE_FLOAT32_C(0.0),
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-SIMDE_FLOAT32_C(0.0) , SIMDE_MATH_INFINITYF,
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-SIMDE_MATH_INFINITYF , denormalf,
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-SIMDE_FLOAT32_C(42.23), sNaNf);
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simde__mmask8 r0 = simde_mm256_fpclass_ps_mask(a, SIMDE_MATH_FP_QNAN);
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simde__mmask8 r1 = simde_mm256_fpclass_ps_mask(a, SIMDE_MATH_FP_PZERO);
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simde__mmask8 r2 = simde_mm256_fpclass_ps_mask(a, SIMDE_MATH_FP_NZERO);
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simde__mmask8 r3 = simde_mm256_fpclass_ps_mask(a, SIMDE_MATH_FP_PINF);
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simde__mmask8 r4 = simde_mm256_fpclass_ps_mask(a, SIMDE_MATH_FP_NINF);
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simde__mmask8 r5 = simde_mm256_fpclass_ps_mask(a, SIMDE_MATH_FP_DENORMAL);
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simde__mmask8 r6 = simde_mm256_fpclass_ps_mask(a, SIMDE_MATH_FP_NEGATIVE);
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simde__mmask8 r7 = simde_mm256_fpclass_ps_mask(a, SIMDE_MATH_FP_SNAN);
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simde_test_x86_write_f32x8(2, a, SIMDE_TEST_VEC_POS_FIRST);
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simde_test_x86_write_mmask8(2, r0, SIMDE_TEST_VEC_POS_MIDDLE);
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simde_test_x86_write_mmask8(2, r1, SIMDE_TEST_VEC_POS_MIDDLE);
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simde_test_x86_write_mmask8(2, r2, SIMDE_TEST_VEC_POS_MIDDLE);
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simde_test_x86_write_mmask8(2, r3, SIMDE_TEST_VEC_POS_MIDDLE);
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simde_test_x86_write_mmask8(2, r4, SIMDE_TEST_VEC_POS_MIDDLE);
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simde_test_x86_write_mmask8(2, r5, SIMDE_TEST_VEC_POS_MIDDLE);
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simde_test_x86_write_mmask8(2, r6, SIMDE_TEST_VEC_POS_MIDDLE);
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simde_test_x86_write_mmask8(2, r7, SIMDE_TEST_VEC_POS_LAST);
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return 1;
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#endif
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}
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static int
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test_simde_mm512_fpclass_ph_mask (SIMDE_MUNIT_TEST_ARGS) {
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#if 1
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simde_float16 qNaN = SIMDE_NANHF,
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denormal = simde_uint16_as_float16(0x0001),
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pzero = simde_uint16_as_float16(0x0000),
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nzero = simde_uint16_as_float16(0x8000),
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pinfinity = SIMDE_INFINITYHF, //simde_uint16_as_float16(0x7C00),
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ninfinity = SIMDE_NINFINITYHF, //simde_uint16_as_float16(0xFC00),
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sNaN = simde_uint16_as_float16(0x7C01);
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simde__m512h a = simde_mm512_set_ph(
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SIMDE_FLOAT16_VALUE( 31.00), SIMDE_FLOAT16_VALUE( 30.00), SIMDE_FLOAT16_VALUE( 29.00), SIMDE_FLOAT16_VALUE( 28.00),
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SIMDE_FLOAT16_VALUE( 27.00), SIMDE_FLOAT16_VALUE( 26.00), SIMDE_FLOAT16_VALUE( 25.00), SIMDE_FLOAT16_VALUE( 24.00),
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SIMDE_FLOAT16_VALUE( 23.00), SIMDE_FLOAT16_VALUE( 22.00), SIMDE_FLOAT16_VALUE( 21.00), SIMDE_FLOAT16_VALUE( 20.00),
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SIMDE_FLOAT16_VALUE( 19.00), SIMDE_FLOAT16_VALUE( 18.00), SIMDE_FLOAT16_VALUE( 17.00), SIMDE_FLOAT16_VALUE( 16.00),
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SIMDE_FLOAT16_VALUE( 15.00), SIMDE_FLOAT16_VALUE( 14.00), SIMDE_FLOAT16_VALUE( 13.00), SIMDE_FLOAT16_VALUE( 12.00),
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SIMDE_FLOAT16_VALUE( 11.00), SIMDE_FLOAT16_VALUE( 10.00), SIMDE_FLOAT16_VALUE( 9.00), SIMDE_FLOAT16_VALUE( 8.00),
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qNaN , pzero,
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nzero , pinfinity,
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ninfinity , denormal,
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SIMDE_FLOAT16_VALUE(-42.23), sNaN);
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#if !defined(SIMDE_ARCH_ARM_CHECK) || !SIMDE_ARCH_ARM_CHECK(4, 0)
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simde_assert_equal_mmask32(simde_mm512_fpclass_ph_mask(a, 0x01), 128);
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// armel silently converts the signaling NaN to a quiet one???
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#endif
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simde_assert_equal_mmask32(simde_mm512_fpclass_ph_mask(a, 0x02), 64);
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simde_assert_equal_mmask32(simde_mm512_fpclass_ph_mask(a, 0x04), 32);
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simde_assert_equal_mmask32(simde_mm512_fpclass_ph_mask(a, 0x08), 16);
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simde_assert_equal_mmask32(simde_mm512_fpclass_ph_mask(a, 0x10), 8);
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simde_assert_equal_mmask32(simde_mm512_fpclass_ph_mask(a, 0x20), 4);
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simde_assert_equal_mmask32(simde_mm512_fpclass_ph_mask(a, 0x40), 2);
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#if !defined(SIMDE_ARCH_ARM_CHECK) || !SIMDE_ARCH_ARM_CHECK(4, 0)
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simde_assert_equal_mmask32(simde_mm512_fpclass_ph_mask(a, 0x80), 1);
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#endif
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return 0;
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#else
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fputc('\n', stdout);
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simde_float16 qNaN = simde_uint16_as_float16(0x7E00),
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denormal = simde_uint16_as_float16(0x0001),
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pzero = simde_uint16_as_float16(0x0000),
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nzero = simde_uint16_as_float16(0x8000),
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pinfinity = simde_uint16_as_float16(0x7C00),
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ninfinity = simde_uint16_as_float16(0xFC00),
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sNaN = simde_uint16_as_float16(0x7C01);
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simde__m512h a = simde_mm512_set_ph(
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SIMDE_FLOAT16_VALUE( 31.00), SIMDE_FLOAT16_VALUE( 30.00), SIMDE_FLOAT16_VALUE( 29.00), SIMDE_FLOAT16_VALUE( 28.00),
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SIMDE_FLOAT16_VALUE( 27.00), SIMDE_FLOAT16_VALUE( 26.00), SIMDE_FLOAT16_VALUE( 25.00), SIMDE_FLOAT16_VALUE( 24.00),
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SIMDE_FLOAT16_VALUE( 23.00), SIMDE_FLOAT16_VALUE( 22.00), SIMDE_FLOAT16_VALUE( 21.00), SIMDE_FLOAT16_VALUE( 20.00),
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SIMDE_FLOAT16_VALUE( 19.00), SIMDE_FLOAT16_VALUE( 18.00), SIMDE_FLOAT16_VALUE( 17.00), SIMDE_FLOAT16_VALUE( 16.00),
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SIMDE_FLOAT16_VALUE( 15.00), SIMDE_FLOAT16_VALUE( 14.00), SIMDE_FLOAT16_VALUE( 13.00), SIMDE_FLOAT16_VALUE( 12.00),
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SIMDE_FLOAT16_VALUE( 11.00), SIMDE_FLOAT16_VALUE( 10.00), SIMDE_FLOAT16_VALUE( 9.00), SIMDE_FLOAT16_VALUE( 8.00),
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qNaN , pzero,
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nzero , pinfinity,
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ninfinity , denormal,
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SIMDE_FLOAT16_VALUE(-42.23), sNaN);
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simde__mmask32 r0 = simde_mm512_fpclass_ph_mask(a, SIMDE_MATH_FP_QNAN);
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simde__mmask32 r1 = simde_mm512_fpclass_ph_mask(a, SIMDE_MATH_FP_PZERO);
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simde__mmask32 r2 = simde_mm512_fpclass_ph_mask(a, SIMDE_MATH_FP_NZERO);
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simde__mmask32 r3 = simde_mm512_fpclass_ph_mask(a, SIMDE_MATH_FP_PINF);
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simde__mmask32 r4 = simde_mm512_fpclass_ph_mask(a, SIMDE_MATH_FP_NINF);
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simde__mmask32 r5 = simde_mm512_fpclass_ph_mask(a, SIMDE_MATH_FP_DENORMAL);
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simde__mmask32 r6 = simde_mm512_fpclass_ph_mask(a, SIMDE_MATH_FP_NEGATIVE);
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simde__mmask32 r7 = simde_mm512_fpclass_ph_mask(a, SIMDE_MATH_FP_SNAN);
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simde_test_x86_write_f16x32(2, a, SIMDE_TEST_VEC_POS_FIRST);
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simde_test_x86_write_mmask32(2, r0, SIMDE_TEST_VEC_POS_MIDDLE);
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simde_test_x86_write_mmask32(2, r1, SIMDE_TEST_VEC_POS_MIDDLE);
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simde_test_x86_write_mmask32(2, r2, SIMDE_TEST_VEC_POS_MIDDLE);
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simde_test_x86_write_mmask32(2, r3, SIMDE_TEST_VEC_POS_MIDDLE);
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simde_test_x86_write_mmask32(2, r4, SIMDE_TEST_VEC_POS_MIDDLE);
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simde_test_x86_write_mmask32(2, r5, SIMDE_TEST_VEC_POS_MIDDLE);
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simde_test_x86_write_mmask32(2, r6, SIMDE_TEST_VEC_POS_MIDDLE);
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simde_test_x86_write_mmask32(2, r7, SIMDE_TEST_VEC_POS_LAST);
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return 1;
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#endif
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}
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static int
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test_simde_mm512_fpclass_pd_mask (SIMDE_MUNIT_TEST_ARGS) {
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#if 1
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simde_float64 sNaNf = simde_uint64_as_float64(0x7FF0000000000001),
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denormalf = simde_uint64_as_float64(0x0000000000000001);
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simde__m512d a = simde_mm512_set_pd(
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SIMDE_MATH_NAN , SIMDE_FLOAT64_C(0.0),
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-SIMDE_FLOAT64_C(0.0) , SIMDE_MATH_INFINITY,
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-SIMDE_MATH_INFINITY , denormalf,
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-SIMDE_FLOAT64_C(42.23), sNaNf);
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simde_assert_equal_mmask8(simde_mm512_fpclass_pd_mask(a, 0x01), 128);
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simde_assert_equal_mmask8(simde_mm512_fpclass_pd_mask(a, 0x02), 64);
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simde_assert_equal_mmask8(simde_mm512_fpclass_pd_mask(a, 0x04), 32);
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simde_assert_equal_mmask8(simde_mm512_fpclass_pd_mask(a, 0x08), 16);
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simde_assert_equal_mmask8(simde_mm512_fpclass_pd_mask(a, 0x10), 8);
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simde_assert_equal_mmask8(simde_mm512_fpclass_pd_mask(a, 0x20), 4);
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simde_assert_equal_mmask8(simde_mm512_fpclass_pd_mask(a, 0x40), 2);
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simde_assert_equal_mmask8(simde_mm512_fpclass_pd_mask(a, 0x80), 1);
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return 0;
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#else
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fputc('\n', stdout);
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simde_float64 sNaNf = simde_uint64_as_float64(0x7FF0000000000001),
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denormalf = simde_uint64_as_float64(0x0000000000000001);
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simde__m512d a = simde_mm512_set_pd(
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SIMDE_MATH_NAN , SIMDE_FLOAT64_C(0.0),
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-SIMDE_FLOAT64_C(0.0) , SIMDE_MATH_INFINITY,
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-SIMDE_MATH_INFINITY , denormalf,
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-SIMDE_FLOAT64_C(42.23), sNaNf);
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simde__mmask8 r0 = simde_mm512_fpclass_pd_mask(a, SIMDE_MATH_FP_QNAN);
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simde__mmask8 r1 = simde_mm512_fpclass_pd_mask(a, SIMDE_MATH_FP_PZERO);
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simde__mmask8 r2 = simde_mm512_fpclass_pd_mask(a, SIMDE_MATH_FP_NZERO);
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simde__mmask8 r3 = simde_mm512_fpclass_pd_mask(a, SIMDE_MATH_FP_PINF);
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simde__mmask8 r4 = simde_mm512_fpclass_pd_mask(a, SIMDE_MATH_FP_NINF);
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simde__mmask8 r5 = simde_mm512_fpclass_pd_mask(a, SIMDE_MATH_FP_DENORMAL);
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simde__mmask8 r6 = simde_mm512_fpclass_pd_mask(a, SIMDE_MATH_FP_NEGATIVE);
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simde__mmask8 r7 = simde_mm512_fpclass_pd_mask(a, SIMDE_MATH_FP_SNAN);
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simde_test_x86_write_f64x8(2, a, SIMDE_TEST_VEC_POS_FIRST);
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simde_test_x86_write_mmask8(2, r0, SIMDE_TEST_VEC_POS_MIDDLE);
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simde_test_x86_write_mmask8(2, r1, SIMDE_TEST_VEC_POS_MIDDLE);
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simde_test_x86_write_mmask8(2, r2, SIMDE_TEST_VEC_POS_MIDDLE);
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simde_test_x86_write_mmask8(2, r3, SIMDE_TEST_VEC_POS_MIDDLE);
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simde_test_x86_write_mmask8(2, r4, SIMDE_TEST_VEC_POS_MIDDLE);
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simde_test_x86_write_mmask8(2, r5, SIMDE_TEST_VEC_POS_MIDDLE);
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simde_test_x86_write_mmask8(2, r6, SIMDE_TEST_VEC_POS_MIDDLE);
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simde_test_x86_write_mmask8(2, r7, SIMDE_TEST_VEC_POS_LAST);
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return 1;
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#endif
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}
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SIMDE_TEST_FUNC_LIST_BEGIN
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SIMDE_TEST_FUNC_LIST_ENTRY(mm256_fpclass_ps_mask)
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SIMDE_TEST_FUNC_LIST_ENTRY(mm512_fpclass_ph_mask)
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SIMDE_TEST_FUNC_LIST_ENTRY(mm512_fpclass_pd_mask)
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SIMDE_TEST_FUNC_LIST_END
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#include <test/x86/avx512/test-avx512-footer.h>
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